From patchwork Sun Nov 3 16:57:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Drew Fustini X-Patchwork-Id: 13860530 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5204CD11183 for ; Sun, 3 Nov 2024 17:03:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=uuqAYebJGo9+2sS/yNKmM03aMGi5QzQUQBo+DutCtrw=; b=nCGlnwIG2ixezI OJT0cW1vPLuXnIR1sx9hc6Kjk2zdPttZN6SwKc4kOC6G5oK6nGLYidlq8TBYnO9WVBdExJT4sgp41 mm3YLsRi3ZhRVypKHr+eAW4wv/Xr/GWsekco1GmCz4LrFmWPPzlMsnB8Z4gM0KnzWYOtuNAHUHxLR cmBd50J+g7U7zYR0RKH2EeNB5gyaodJ2TG1/4MGkgI5zdNjl+68Srg+EtuX90wChwtDQuJ1HOOqHG yiPwQCBxrkvFQZwCP6g2uvKCYoJZQ9Y/ZAhiOqlEfNbjJXPjerGCl++JTyG0nMScvkBEmxYwIX9eS 9C1ZngkfYiDkHUnxqO2Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1t7e0U-0000000BkBU-34Zo; Sun, 03 Nov 2024 17:03:18 +0000 Received: from mail-pl1-x634.google.com ([2607:f8b0:4864:20::634]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1t7dvV-0000000BjMe-3JN9 for linux-riscv@lists.infradead.org; Sun, 03 Nov 2024 16:58:12 +0000 Received: by mail-pl1-x634.google.com with SMTP id d9443c01a7336-20c6f492d2dso36566975ad.0 for ; Sun, 03 Nov 2024 08:58:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tenstorrent.com; s=google; t=1730653088; x=1731257888; darn=lists.infradead.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=pzL62SVyIjejPV0WK5Icvrl5yXIEFUYP1mc1b47FbtQ=; b=D7mcPC3CXL2VTiLwGw5tytIceudUcCSee5/QRX5Pz4bQs2yFBlU9Fr4z316Chom9zJ dUYvEV7YRiUFXIrwAUElH7Kck2PttkfNRaGJuD/UBYB8YJ5Ayk3/LL0UrlHShRdJLRyj JWekrYLo+KvKWqYDhQO8y0AOh2h0ddqvgFE4sgz8m5gLG4OQqV8AgQZu9FR8ohKg9YvC d54sTeJ2xUJLD9O+eoZ0DqHCS5/kA9NOAS1IZvB2zrAyMSv2FIgLQLeI6or0DIi7oPYn Rp6Qdp6ZrtrQ88zHC6S1aRJhNJM9bUaW3VAN/bM4mmPxHW1G7zEgZjIYmEr/y0B8rMXp BdUw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1730653088; x=1731257888; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=pzL62SVyIjejPV0WK5Icvrl5yXIEFUYP1mc1b47FbtQ=; b=A14HhkDKsWFOQv4KBZ9z5A+vPTdQc7XlATsuqdxQi9r/YVz+zfIf+5cdGRb3SDx5qQ i8/9lHpOuimAa0e/OF+OSbtfkYJKWB8R/AArIT3OY2zhFG2a7HCgggkX+Gx+GkSaPCBA 4BQ6Pcs4iAchrvYO/EjqDFmF2w7niK7MtNWwlS08Cgw8c5+toh+FPr4TCt7GtrIhGspD zrZjaKq6kKx3Drz0rBGyfuXVj1YlA0qnC7l466Xz9kn6w2xM1LAq7g+Lr/HcRANsNXtX uHMU5wkn5OPpeizCruxBGLb33qjbUgNmEbO0bwY2XWKmWuBxGXwDXFZrP7724sybnk5Y W2qg== X-Forwarded-Encrypted: i=1; AJvYcCX77JcdxLQV+pIO0ukXlq59O2HevgWIzr9qNDAskqON3w2+sisFOE69GnvvTtS84mGYp4xGC0SHFJndSQ==@lists.infradead.org X-Gm-Message-State: AOJu0Yxml8LaiS2psHhd1uSJRFsjzZKeqEO0W30/TQUikanxnR3SlbVc YJ2JiY0gxPPY0M/uXgB681Uknt73gKggAUbEpDRhNTVcFaB5IG7KefkqCX4S8vc= X-Google-Smtp-Source: AGHT+IFa5XNytNlWFhmE0DXZf4pmgbvq4x1WDC/qd9g/nrM981EhgPHOC8zQXwTK7AWCgpf8maFo3w== X-Received: by 2002:a17:902:d490:b0:20c:e222:619c with SMTP id d9443c01a7336-2111af5a32dmr117485425ad.42.1730653088162; Sun, 03 Nov 2024 08:58:08 -0800 (PST) Received: from [127.0.1.1] (71-34-69-82.ptld.qwest.net. [71.34.69.82]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-211057c9783sm47531355ad.236.2024.11.03.08.58.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 03 Nov 2024 08:58:07 -0800 (PST) From: Drew Fustini Date: Sun, 03 Nov 2024 08:57:59 -0800 Subject: [PATCH net-next v7 1/2] dt-bindings: net: Add T-HEAD dwmac support MIME-Version: 1.0 Message-Id: <20241103-th1520-gmac-v7-1-ef094a30169c@tenstorrent.com> References: <20241103-th1520-gmac-v7-0-ef094a30169c@tenstorrent.com> In-Reply-To: <20241103-th1520-gmac-v7-0-ef094a30169c@tenstorrent.com> To: Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alexandre Torgue , Giuseppe Cavallaro , Jose Abreu , Maxime Coquelin , Emil Renner Berthing , Jisheng Zhang , Guo Ren , Fu Wei , Paul Walmsley , Palmer Dabbelt , Albert Ou , Andrew Lunn , Drew Fustini Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-riscv@lists.infradead.org, Drew Fustini , linux-stm32@st-md-mailman.stormreply.com, Krzysztof Kozlowski X-Mailer: b4 0.14.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241103_085810_298677_FE9FAA3A X-CRM114-Status: GOOD ( 14.88 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org From: Jisheng Zhang Add documentation to describe the DesginWare-based GMAC controllers in the T-HEAD TH1520 SoC. Reviewed-by: Andrew Lunn Reviewed-by: Krzysztof Kozlowski Signed-off-by: Jisheng Zhang Signed-off-by: Emil Renner Berthing [drew: rename compatible, add apb registers as second reg of gmac node, add clocks and interrupts poroperties] Signed-off-by: Drew Fustini --- .../devicetree/bindings/net/snps,dwmac.yaml | 1 + .../devicetree/bindings/net/thead,th1520-gmac.yaml | 110 +++++++++++++++++++++ MAINTAINERS | 1 + 3 files changed, 112 insertions(+) diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml index 4e2ba1bf788c..474ade185033 100644 --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml @@ -99,6 +99,7 @@ properties: - snps,dwxgmac-2.10 - starfive,jh7100-dwmac - starfive,jh7110-dwmac + - thead,th1520-gmac reg: minItems: 1 diff --git a/Documentation/devicetree/bindings/net/thead,th1520-gmac.yaml b/Documentation/devicetree/bindings/net/thead,th1520-gmac.yaml new file mode 100644 index 000000000000..6d9de3303762 --- /dev/null +++ b/Documentation/devicetree/bindings/net/thead,th1520-gmac.yaml @@ -0,0 +1,110 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/thead,th1520-gmac.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: T-HEAD TH1520 GMAC Ethernet controller + +maintainers: + - Drew Fustini + +description: | + The TH1520 GMAC is described in the TH1520 Peripheral Interface User Manual + https://git.beagleboard.org/beaglev-ahead/beaglev-ahead/-/tree/main/docs + + Features include + - Compliant with IEEE802.3 Specification + - IEEE 1588-2008 standard for precision networked clock synchronization + - Supports 10/100/1000Mbps data transfer rate + - Supports RGMII/MII interface + - Preamble and start of frame data (SFD) insertion in Transmit path + - Preamble and SFD deletion in the Receive path + - Automatic CRC and pad generation options for receive frames + - MDIO master interface for PHY device configuration and management + + The GMAC Registers consists of two parts + - APB registers are used to configure clock frequency/clock enable/clock + direction/PHY interface type. + - AHB registers are use to configure GMAC core (DesignWare Core part). + GMAC core register consists of DMA registers and GMAC registers. + +select: + properties: + compatible: + contains: + enum: + - thead,th1520-gmac + required: + - compatible + +allOf: + - $ref: snps,dwmac.yaml# + +properties: + compatible: + items: + - enum: + - thead,th1520-gmac + - const: snps,dwmac-3.70a + + reg: + items: + - description: DesignWare GMAC IP core registers + - description: GMAC APB registers + + reg-names: + items: + - const: dwmac + - const: apb + + clocks: + items: + - description: GMAC main clock + - description: Peripheral registers interface clock + + clock-names: + items: + - const: stmmaceth + - const: pclk + + interrupts: + items: + - description: Combined signal for various interrupt events + + interrupt-names: + items: + - const: macirq + +required: + - clocks + - clock-names + +unevaluatedProperties: false + +examples: + - | + gmac0: ethernet@e7070000 { + compatible = "thead,th1520-gmac", "snps,dwmac-3.70a"; + reg = <0xe7070000 0x2000>, <0xec003000 0x1000>; + reg-names = "dwmac", "apb"; + clocks = <&clk 1>, <&clk 2>; + clock-names = "stmmaceth", "pclk"; + interrupts = <66>; + interrupt-names = "macirq"; + phy-mode = "rgmii-id"; + snps,fixed-burst; + snps,axi-config = <&stmmac_axi_setup>; + snps,pbl = <32>; + phy-handle = <&phy0>; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwmac-mdio"; + + phy0: ethernet-phy@0 { + reg = <0>; + }; + }; + }; diff --git a/MAINTAINERS b/MAINTAINERS index f39ab140710f..72dee6d07ced 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -19827,6 +19827,7 @@ L: linux-riscv@lists.infradead.org S: Maintained T: git https://github.com/pdp7/linux.git F: Documentation/devicetree/bindings/clock/thead,th1520-clk-ap.yaml +F: Documentation/devicetree/bindings/net/thead,th1520-gmac.yaml F: arch/riscv/boot/dts/thead/ F: drivers/clk/thead/clk-th1520-ap.c F: include/dt-bindings/clock/thead,th1520-clk-ap.h From patchwork Sun Nov 3 16:58:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Drew Fustini X-Patchwork-Id: 13860531 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 12510D11182 for ; Sun, 3 Nov 2024 17:03:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=vaGLzO+NQwUAiujr0JU8zAwDcBq54PXIIdjS9PUQyyo=; b=voFBKXiPD3cS5F MGyRcw9aOGqkebsYFQNwxPKfTn+44d1mQuU+MZWMyPdt+CH/1jlJccVG5lvUsv9RHN3J8McL7A+4N sE1ty569Wxvgen+8GdbPdchgGdJcEpHbHBtZg7wUx9BKwz5sIaiH3L1kkNmLqGYyDvb+ApUuKrVUC clNWPprVsfGkaPt10kEhC3Wjdl64G83cdyNkyQ1ijfMbtffhoU1c7F8AYdsnJJV5wYiCKTzv+j9af EBBZA/zWfjda6T4Arz5xuoaB/NlTPyM/WCqrenbu/VZePNcmLK+XOjsAmRUB0tHajPMVG9ZmkoEuG bsXCWE3LF3uKd38msvQw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1t7e0V-0000000BkC3-1tjm; Sun, 03 Nov 2024 17:03:19 +0000 Received: from mail-pl1-x635.google.com ([2607:f8b0:4864:20::635]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1t7dvW-0000000BjNF-2cTp for linux-riscv@lists.infradead.org; Sun, 03 Nov 2024 16:58:13 +0000 Received: by mail-pl1-x635.google.com with SMTP id d9443c01a7336-20cdda5cfb6so33136515ad.3 for ; Sun, 03 Nov 2024 08:58:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tenstorrent.com; s=google; t=1730653089; x=1731257889; darn=lists.infradead.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=Wpjo/TYXuVj+kJtSeeoa47athMXrUQ0tEtCps3hD5uI=; b=TkbtPaVzbmvapXcmG5vSdclQ7W1xw112ddSFTs1HaJIvX/WxRsZnQCWsoSfw/KsDc/ D0NOidgcTwXPbRQvcq2+Se/5I4Iprh4Vt9OE8Yr5+vEjhnabxe6qbxemf3OI41SVWTi/ y4cTTNQNu5Cirp1nlsFvNP6gUjT0S5T/05xfMo9Z2CcwU9RFDBmmmEWZbES0kEIHw+xE buhPhLQJg22nqnEhL5EupTnxssL/AwILOndfVSEGWbQDLFdgwefUbPYwe7649uNNffWI HrFlN48eA9pPFiSsBAUC4KSQAhooAoX2DztbqtS08PY322D/+98Zhu6olFbgjrlyQ1Um AQlg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1730653089; x=1731257889; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Wpjo/TYXuVj+kJtSeeoa47athMXrUQ0tEtCps3hD5uI=; b=T0urEPt1kuxFltD4t9vh5mEFZpe+51aV5W8c3P0l6MmapGay56GKD9iytykw9FJEeL lGFIdFkP0G8cniE+NIdrW9nc4O8tFmetaVGEWQYERv5rC0pFmOCwgluGTCvpP55+2MDT 8GYu3z8cpg5s7xr7ESChRuYYaeY5Kcyf172RjRy8isYcnZt5EvNYPDANkch8fUm9aqBM uUHDJhaLLgTp6E908q1/EW9RDK0bDrhewAIU2Vl6yxTGxw+Dxnf6BfAovPfeKMglpKY3 5OB37oxH1qOMQtQRcFDXi/VT+ri5UOzPhWzDiSX1XEwFSCJ40ZyiHD8OC0UQINtEuXmi UQUg== X-Forwarded-Encrypted: i=1; AJvYcCVSk+yVep4gPm+iq3UW8yWYZcko7TLx1kUEJgsawMvqacy15uhJ7LLknuHki7ZuWEKoLqq8Gjt3FUbtsw==@lists.infradead.org X-Gm-Message-State: AOJu0YwOpUlC+GPBjeeytJi3R9LacisVP7KE/oGUkGg6j/vXkGvda2uH 5VSJguvcuhBOMrhcmTl4yQX64B/ViG9Ho5j0ocg870fy9k8K8CaKpSZtbY0ooLw= X-Google-Smtp-Source: AGHT+IH4CUmNlQEj295YqF5a2EBsZggdpPFPyaX6AYOl1G2yXvfzR+DbE4H+Xhj9TYIedBb/D4SPJA== X-Received: by 2002:a17:902:b205:b0:20c:ea0a:9665 with SMTP id d9443c01a7336-21103b1d99dmr143142765ad.32.1730653089291; Sun, 03 Nov 2024 08:58:09 -0800 (PST) Received: from [127.0.1.1] (71-34-69-82.ptld.qwest.net. [71.34.69.82]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-211057c9783sm47531355ad.236.2024.11.03.08.58.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 03 Nov 2024 08:58:08 -0800 (PST) From: Drew Fustini Date: Sun, 03 Nov 2024 08:58:00 -0800 Subject: [PATCH net-next v7 2/2] net: stmmac: Add glue layer for T-HEAD TH1520 SoC MIME-Version: 1.0 Message-Id: <20241103-th1520-gmac-v7-2-ef094a30169c@tenstorrent.com> References: <20241103-th1520-gmac-v7-0-ef094a30169c@tenstorrent.com> In-Reply-To: <20241103-th1520-gmac-v7-0-ef094a30169c@tenstorrent.com> To: Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alexandre Torgue , Giuseppe Cavallaro , Jose Abreu , Maxime Coquelin , Emil Renner Berthing , Jisheng Zhang , Guo Ren , Fu Wei , Paul Walmsley , Palmer Dabbelt , Albert Ou , Andrew Lunn , Drew Fustini Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-riscv@lists.infradead.org, Drew Fustini , linux-stm32@st-md-mailman.stormreply.com X-Mailer: b4 0.14.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241103_085810_722342_FAA80C4B X-CRM114-Status: GOOD ( 21.74 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org From: Jisheng Zhang Add dwmac glue driver to support the DesignWare-based GMAC controllers on the T-HEAD TH1520 SoC. Reviewed-by: Andrew Lunn Signed-off-by: Jisheng Zhang [esmil: rename plat->interface -> plat->mac_interface, use devm_stmmac_probe_config_dt()] Signed-off-by: Emil Renner Berthing [drew: convert from stmmac_dvr_probe() to devm_stmmac_pltfr_probe(), convert register access from regmap to regular mmio] Signed-off-by: Drew Fustini --- MAINTAINERS | 1 + drivers/net/ethernet/stmicro/stmmac/Kconfig | 10 + drivers/net/ethernet/stmicro/stmmac/Makefile | 1 + drivers/net/ethernet/stmicro/stmmac/dwmac-thead.c | 273 ++++++++++++++++++++++ 4 files changed, 285 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 72dee6d07ced..b53f9f6b3e04 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -19830,6 +19830,7 @@ F: Documentation/devicetree/bindings/clock/thead,th1520-clk-ap.yaml F: Documentation/devicetree/bindings/net/thead,th1520-gmac.yaml F: arch/riscv/boot/dts/thead/ F: drivers/clk/thead/clk-th1520-ap.c +F: drivers/net/ethernet/stmicro/stmmac/dwmac-thead.c F: include/dt-bindings/clock/thead,th1520-clk-ap.h RNBD BLOCK DRIVERS diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig index 05cc07b8f48c..6658536a4e17 100644 --- a/drivers/net/ethernet/stmicro/stmmac/Kconfig +++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig @@ -228,6 +228,16 @@ config DWMAC_SUN8I stmmac device driver. This driver is used for H3/A83T/A64 EMAC ethernet controller. +config DWMAC_THEAD + tristate "T-HEAD dwmac support" + depends on OF && (ARCH_THEAD || COMPILE_TEST) + help + Support for ethernet controllers on T-HEAD RISC-V SoCs + + This selects the T-HEAD platform specific glue layer support for + the stmmac device driver. This driver is used for T-HEAD TH1520 + ethernet controller. + config DWMAC_IMX8 tristate "NXP IMX8 DWMAC support" default ARCH_MXC diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile b/drivers/net/ethernet/stmicro/stmmac/Makefile index c2f0e91f6bf8..d065634c6223 100644 --- a/drivers/net/ethernet/stmicro/stmmac/Makefile +++ b/drivers/net/ethernet/stmicro/stmmac/Makefile @@ -28,6 +28,7 @@ obj-$(CONFIG_DWMAC_STI) += dwmac-sti.o obj-$(CONFIG_DWMAC_STM32) += dwmac-stm32.o obj-$(CONFIG_DWMAC_SUNXI) += dwmac-sunxi.o obj-$(CONFIG_DWMAC_SUN8I) += dwmac-sun8i.o +obj-$(CONFIG_DWMAC_THEAD) += dwmac-thead.o obj-$(CONFIG_DWMAC_DWC_QOS_ETH) += dwmac-dwc-qos-eth.o obj-$(CONFIG_DWMAC_INTEL_PLAT) += dwmac-intel-plat.o obj-$(CONFIG_DWMAC_LOONGSON1) += dwmac-loongson1.o diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-thead.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-thead.c new file mode 100644 index 000000000000..dce84ed184e9 --- /dev/null +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-thead.c @@ -0,0 +1,273 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * T-HEAD DWMAC platform driver + * + * Copyright (C) 2021 Alibaba Group Holding Limited. + * Copyright (C) 2023 Jisheng Zhang + * + */ + +#include +#include +#include +#include +#include +#include + +#include "stmmac_platform.h" + +#define GMAC_CLK_EN 0x00 +#define GMAC_TX_CLK_EN BIT(1) +#define GMAC_TX_CLK_N_EN BIT(2) +#define GMAC_TX_CLK_OUT_EN BIT(3) +#define GMAC_RX_CLK_EN BIT(4) +#define GMAC_RX_CLK_N_EN BIT(5) +#define GMAC_EPHY_REF_CLK_EN BIT(6) +#define GMAC_RXCLK_DELAY_CTRL 0x04 +#define GMAC_RXCLK_BYPASS BIT(15) +#define GMAC_RXCLK_INVERT BIT(14) +#define GMAC_RXCLK_DELAY GENMASK(4, 0) +#define GMAC_TXCLK_DELAY_CTRL 0x08 +#define GMAC_TXCLK_BYPASS BIT(15) +#define GMAC_TXCLK_INVERT BIT(14) +#define GMAC_TXCLK_DELAY GENMASK(4, 0) +#define GMAC_PLLCLK_DIV 0x0c +#define GMAC_PLLCLK_DIV_EN BIT(31) +#define GMAC_PLLCLK_DIV_NUM GENMASK(7, 0) +#define GMAC_GTXCLK_SEL 0x18 +#define GMAC_GTXCLK_SEL_PLL BIT(0) +#define GMAC_INTF_CTRL 0x1c +#define PHY_INTF_MASK BIT(0) +#define PHY_INTF_RGMII FIELD_PREP(PHY_INTF_MASK, 1) +#define PHY_INTF_MII_GMII FIELD_PREP(PHY_INTF_MASK, 0) +#define GMAC_TXCLK_OEN 0x20 +#define TXCLK_DIR_MASK BIT(0) +#define TXCLK_DIR_OUTPUT FIELD_PREP(TXCLK_DIR_MASK, 0) +#define TXCLK_DIR_INPUT FIELD_PREP(TXCLK_DIR_MASK, 1) + +#define GMAC_GMII_RGMII_RATE 125000000 +#define GMAC_MII_RATE 25000000 + +struct thead_dwmac { + struct plat_stmmacenet_data *plat; + void __iomem *apb_base; + struct device *dev; +}; + +static int thead_dwmac_set_phy_if(struct plat_stmmacenet_data *plat) +{ + struct thead_dwmac *dwmac = plat->bsp_priv; + u32 phyif; + + switch (plat->mac_interface) { + case PHY_INTERFACE_MODE_MII: + phyif = PHY_INTF_MII_GMII; + break; + case PHY_INTERFACE_MODE_RGMII: + case PHY_INTERFACE_MODE_RGMII_ID: + case PHY_INTERFACE_MODE_RGMII_TXID: + case PHY_INTERFACE_MODE_RGMII_RXID: + phyif = PHY_INTF_RGMII; + break; + default: + dev_err(dwmac->dev, "unsupported phy interface %d\n", + plat->mac_interface); + return -EINVAL; + } + + writel(phyif, dwmac->apb_base + GMAC_INTF_CTRL); + return 0; +} + +static int thead_dwmac_set_txclk_dir(struct plat_stmmacenet_data *plat) +{ + struct thead_dwmac *dwmac = plat->bsp_priv; + u32 txclk_dir; + + switch (plat->mac_interface) { + case PHY_INTERFACE_MODE_MII: + txclk_dir = TXCLK_DIR_INPUT; + break; + case PHY_INTERFACE_MODE_RGMII: + case PHY_INTERFACE_MODE_RGMII_ID: + case PHY_INTERFACE_MODE_RGMII_TXID: + case PHY_INTERFACE_MODE_RGMII_RXID: + txclk_dir = TXCLK_DIR_OUTPUT; + break; + default: + dev_err(dwmac->dev, "unsupported phy interface %d\n", + plat->mac_interface); + return -EINVAL; + } + + writel(txclk_dir, dwmac->apb_base + GMAC_TXCLK_OEN); + return 0; +} + +static void thead_dwmac_fix_speed(void *priv, unsigned int speed, unsigned int mode) +{ + struct plat_stmmacenet_data *plat; + struct thead_dwmac *dwmac = priv; + unsigned long rate; + u32 div, reg; + + plat = dwmac->plat; + + switch (plat->mac_interface) { + /* For MII, rxc/txc is provided by phy */ + case PHY_INTERFACE_MODE_MII: + return; + + case PHY_INTERFACE_MODE_RGMII: + case PHY_INTERFACE_MODE_RGMII_ID: + case PHY_INTERFACE_MODE_RGMII_RXID: + case PHY_INTERFACE_MODE_RGMII_TXID: + rate = clk_get_rate(plat->stmmac_clk); + if (!rate || rate % GMAC_GMII_RGMII_RATE != 0 || + rate % GMAC_MII_RATE != 0) { + dev_err(dwmac->dev, "invalid gmac rate %ld\n", rate); + return; + } + + writel(0, dwmac->apb_base + GMAC_PLLCLK_DIV); + + switch (speed) { + case SPEED_1000: + div = rate / GMAC_GMII_RGMII_RATE; + break; + case SPEED_100: + div = rate / GMAC_MII_RATE; + break; + case SPEED_10: + div = rate * 10 / GMAC_MII_RATE; + break; + default: + dev_err(dwmac->dev, "invalid speed %u\n", speed); + return; + } + + reg = FIELD_PREP(GMAC_PLLCLK_DIV_EN, 1) | + FIELD_PREP(GMAC_PLLCLK_DIV_NUM, div); + writel(reg, dwmac->apb_base + GMAC_PLLCLK_DIV); + break; + default: + dev_err(dwmac->dev, "unsupported phy interface %d\n", + plat->mac_interface); + return; + } +} + +static int thead_dwmac_enable_clk(struct plat_stmmacenet_data *plat) +{ + struct thead_dwmac *dwmac = plat->bsp_priv; + u32 reg; + + switch (plat->mac_interface) { + case PHY_INTERFACE_MODE_MII: + reg = GMAC_RX_CLK_EN | GMAC_TX_CLK_EN; + break; + + case PHY_INTERFACE_MODE_RGMII: + case PHY_INTERFACE_MODE_RGMII_ID: + case PHY_INTERFACE_MODE_RGMII_RXID: + case PHY_INTERFACE_MODE_RGMII_TXID: + /* use pll */ + writel(GMAC_GTXCLK_SEL_PLL, dwmac->apb_base + GMAC_GTXCLK_SEL); + reg = GMAC_TX_CLK_EN | GMAC_TX_CLK_N_EN | GMAC_TX_CLK_OUT_EN | + GMAC_RX_CLK_EN | GMAC_RX_CLK_N_EN; + break; + + default: + dev_err(dwmac->dev, "unsupported phy interface %d\n", + plat->mac_interface); + return -EINVAL; + } + + writel(reg, dwmac->apb_base + GMAC_CLK_EN); + return 0; +} + +static int thead_dwmac_init(struct platform_device *pdev, void *priv) +{ + struct thead_dwmac *dwmac = priv; + unsigned int reg; + int ret; + + ret = thead_dwmac_set_phy_if(dwmac->plat); + if (ret) + return ret; + + ret = thead_dwmac_set_txclk_dir(dwmac->plat); + if (ret) + return ret; + + reg = readl(dwmac->apb_base + GMAC_RXCLK_DELAY_CTRL); + reg &= ~(GMAC_RXCLK_DELAY); + reg |= FIELD_PREP(GMAC_RXCLK_DELAY, 0); + writel(reg, dwmac->apb_base + GMAC_RXCLK_DELAY_CTRL); + + reg = readl(dwmac->apb_base + GMAC_TXCLK_DELAY_CTRL); + reg &= ~(GMAC_TXCLK_DELAY); + reg |= FIELD_PREP(GMAC_TXCLK_DELAY, 0); + writel(reg, dwmac->apb_base + GMAC_TXCLK_DELAY_CTRL); + + return thead_dwmac_enable_clk(dwmac->plat); +} + +static int thead_dwmac_probe(struct platform_device *pdev) +{ + struct stmmac_resources stmmac_res; + struct plat_stmmacenet_data *plat; + struct thead_dwmac *dwmac; + void __iomem *apb; + int ret; + + ret = stmmac_get_platform_resources(pdev, &stmmac_res); + if (ret) + return dev_err_probe(&pdev->dev, ret, + "failed to get resources\n"); + + plat = devm_stmmac_probe_config_dt(pdev, stmmac_res.mac); + if (IS_ERR(plat)) + return dev_err_probe(&pdev->dev, PTR_ERR(plat), + "dt configuration failed\n"); + + dwmac = devm_kzalloc(&pdev->dev, sizeof(*dwmac), GFP_KERNEL); + if (!dwmac) + return -ENOMEM; + + apb = devm_platform_ioremap_resource(pdev, 1); + if (IS_ERR(apb)) + return dev_err_probe(&pdev->dev, PTR_ERR(apb), + "failed to remap gmac apb registers\n"); + + dwmac->dev = &pdev->dev; + dwmac->plat = plat; + dwmac->apb_base = apb; + plat->bsp_priv = dwmac; + plat->fix_mac_speed = thead_dwmac_fix_speed; + plat->init = thead_dwmac_init; + + return devm_stmmac_pltfr_probe(pdev, plat, &stmmac_res); +} + +static const struct of_device_id thead_dwmac_match[] = { + { .compatible = "thead,th1520-gmac" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, thead_dwmac_match); + +static struct platform_driver thead_dwmac_driver = { + .probe = thead_dwmac_probe, + .driver = { + .name = "thead-dwmac", + .pm = &stmmac_pltfr_pm_ops, + .of_match_table = thead_dwmac_match, + }, +}; +module_platform_driver(thead_dwmac_driver); + +MODULE_AUTHOR("Jisheng Zhang "); +MODULE_AUTHOR("Drew Fustini "); +MODULE_DESCRIPTION("T-HEAD DWMAC platform driver"); +MODULE_LICENSE("GPL");