From patchwork Thu Nov 7 13:50:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lorenzo Bianconi X-Patchwork-Id: 13866535 X-Patchwork-Delegate: kw@linux.com Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CF3A9212646 for ; Thu, 7 Nov 2024 13:51:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730987484; cv=none; b=GVGFtC+EMAcYvlZ0Q43iH+yaQhZ8rNzU6IkCMHb1AhV+TjKxbVaT7bl0QE1ojdgeoMQI8UjCZL/uUZG3a9NsLbI/cSdaNjQ3jstpkNWeDJSq3IBBcxKprNZKLl+hPHQxFzCnuN+sv61CaYRHYC2muXRR3gFZKt8VDP4Ju8GtlJA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730987484; c=relaxed/simple; bh=WjKW4w6m9vxglUpKnIKGk6mwn72chjGL/VfCQGNIAxM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=snxQGu0CzfD797aN/mXGJd1wE2TwyAO96vxti8jmYTGCShe3i00PcWHMdxK8+ZmVc4mEAJwd4iCB2y5QZARrgzjkXmRBtkJctbdIBZzJWkAUq9SokciDyDpFb5nLPHNtTw9z7YhvxoaX61AIxrzQddPUJfmGSab7x/AoVyhSIoM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ExGndzms; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ExGndzms" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5BBB6C4CECC; Thu, 7 Nov 2024 13:51:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1730987484; bh=WjKW4w6m9vxglUpKnIKGk6mwn72chjGL/VfCQGNIAxM=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=ExGndzmsAu9yPvANhTikksjegfEO+gzD/zauKwUogXN0B4EhHorTvDxNnlxhF2RIv aOLG0RQ6HCywBNB8fJRWXcPvi7seUek9snum1XkoQBmfmKPOKwImKPD/xdkEqkfn2U 50oUpSQd84YFiZxHhbG3tH2NvGdiUxNkNkO79grcxDTydShRmbYqnrZ1LtdvpcNrTQ d1e/mDu7rcnUs9IPw/oVU5knuJnWEMI0IWP/tZ7v9G7SH88+0/Qzv9GAHf7AU1Gboi 8l3SogVe1V1KMC0vkQYX87wuBDWxZf13iU8Wd5bWCFH4cCG/J9VpmTWOVXd8y2G3T2 bJMkuClCQZCMw== From: Lorenzo Bianconi Date: Thu, 07 Nov 2024 14:50:53 +0100 Subject: [PATCH 1/3] PCI: mediatek-gen3: Add missing reset_control_deassert for mac_rst in mtk_pcie_en7581_power_up Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241107-pcie-en7581-fixes-v1-1-af0c872323c7@kernel.org> References: <20241107-pcie-en7581-fixes-v1-0-af0c872323c7@kernel.org> In-Reply-To: <20241107-pcie-en7581-fixes-v1-0-af0c872323c7@kernel.org> To: Ryder Lee , Jianjun Wang , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Bjorn Helgaas , Philipp Zabel , Matthias Brugger , AngeloGioacchino Del Regno Cc: linux-pci@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Lorenzo Bianconi X-Mailer: b4 0.14.2 Even if this is not a real issue since Airoha EN7581 SoC does not require the mac reset line, add missing reset_control_deassert() for mac reset line in mtk_pcie_en7581_power_up callback. Signed-off-by: Lorenzo Bianconi --- drivers/pci/controller/pcie-mediatek-gen3.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/pci/controller/pcie-mediatek-gen3.c b/drivers/pci/controller/pcie-mediatek-gen3.c index 66ce4b5d309bb6d64618c70ac5e0a529e0910511..0fac0b9fd785e463d26d29d695b923db41eef9cc 100644 --- a/drivers/pci/controller/pcie-mediatek-gen3.c +++ b/drivers/pci/controller/pcie-mediatek-gen3.c @@ -897,6 +897,9 @@ static int mtk_pcie_en7581_power_up(struct mtk_gen3_pcie *pcie) */ mdelay(PCIE_EN7581_RESET_TIME_MS); + /* MAC power on and enable transaction layer clocks */ + reset_control_deassert(pcie->mac_reset); + pm_runtime_enable(dev); pm_runtime_get_sync(dev); @@ -931,6 +934,7 @@ static int mtk_pcie_en7581_power_up(struct mtk_gen3_pcie *pcie) err_clk_prepare: pm_runtime_put_sync(dev); pm_runtime_disable(dev); + reset_control_assert(pcie->mac_reset); reset_control_bulk_assert(pcie->soc->phy_resets.num_resets, pcie->phy_resets); err_phy_deassert: phy_power_off(pcie->phy); From patchwork Thu Nov 7 13:50:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lorenzo Bianconi X-Patchwork-Id: 13866536 X-Patchwork-Delegate: kw@linux.com Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BA8672101B7 for ; Thu, 7 Nov 2024 13:51:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730987487; cv=none; b=prlfHTkbW/KWQTcZfrV4KlWiX2alGEJdTzh1HrSgMIpMV0xgdwmfGw4n55+ev8p9qi83KtANxZJrF3yb19f/XHYyFK08VsCrKJIeLzHNCVEAm283u5c2wrJdX0ynnYBibYwUREbi7G1Ex1cuVXzloRiyK5pisOWY1IpYI288a/0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730987487; c=relaxed/simple; bh=EyDwIt88XF1ie7BfiMN0PnlL3XgXILjIU8/naicxr1A=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=OZ+6Xbc+ph5+cyeV9xXTMu993jGNbBMi0xlxpIM/oaJq7Fp0uWXQ5+Lwun5LREu+yPSPbbOgO3TN+6B6mWE4mUFZHvWJtNPhsd2I8WZGoMyO0aSIhib1tRpIH9asPBViA2Dxc+ctN14n5gyxOmzjegwPgQEW7aQs8fIrHvce5r4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=KrrO1sAW; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="KrrO1sAW" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 123BAC4CED0; Thu, 7 Nov 2024 13:51:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1730987487; bh=EyDwIt88XF1ie7BfiMN0PnlL3XgXILjIU8/naicxr1A=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=KrrO1sAWC/yWE+U/fKXp2U0WRJrLNKqbduLjYdaKGr7aUOFo1pA6YcWtxSkQ+XD+y 63w9cjDUX/6NBHKjF9QsEJCEe+mf39xKnH/+suYjhl2uWiJ4xQs8JBKCm6eASY+zjR bxOcJN0d9llvXnZlXV1eo1Bsb27z0t2dzLoww1s9o6eJa8zZ/DUVcCygU5CGvGdjWh XjniDYse61zmVo9knPZBjpeRtQ//VtXqFi3rdVvGNNOP3PJe5lZnk1mqRxy55a4LRB BJmW7KeZY55Uv29JioF+rjw99U6Lv4MMdAZxbI90a1cKNV1oXM3YmTKKi2vPkehTAE htHd0YpGjDBsg== From: Lorenzo Bianconi Date: Thu, 07 Nov 2024 14:50:54 +0100 Subject: [PATCH 2/3] PCI: mediatek-gen3: rely on clk_bulk_prepare_enable in mtk_pcie_en7581_power_up Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241107-pcie-en7581-fixes-v1-2-af0c872323c7@kernel.org> References: <20241107-pcie-en7581-fixes-v1-0-af0c872323c7@kernel.org> In-Reply-To: <20241107-pcie-en7581-fixes-v1-0-af0c872323c7@kernel.org> To: Ryder Lee , Jianjun Wang , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Bjorn Helgaas , Philipp Zabel , Matthias Brugger , AngeloGioacchino Del Regno Cc: linux-pci@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Lorenzo Bianconi X-Mailer: b4 0.14.2 Squash clk_bulk_prepare and clk_bulk_enable in clk_bulk_prepare_enable in mtk_pcie_en7581_power_up routine Signed-off-by: Lorenzo Bianconi --- drivers/pci/controller/pcie-mediatek-gen3.c | 14 +++----------- 1 file changed, 3 insertions(+), 11 deletions(-) diff --git a/drivers/pci/controller/pcie-mediatek-gen3.c b/drivers/pci/controller/pcie-mediatek-gen3.c index 0fac0b9fd785e463d26d29d695b923db41eef9cc..8c8c733a145634cdbfefd339f4a692f25a6e24de 100644 --- a/drivers/pci/controller/pcie-mediatek-gen3.c +++ b/drivers/pci/controller/pcie-mediatek-gen3.c @@ -903,12 +903,6 @@ static int mtk_pcie_en7581_power_up(struct mtk_gen3_pcie *pcie) pm_runtime_enable(dev); pm_runtime_get_sync(dev); - err = clk_bulk_prepare(pcie->num_clks, pcie->clks); - if (err) { - dev_err(dev, "failed to prepare clock\n"); - goto err_clk_prepare; - } - val = FIELD_PREP(PCIE_VAL_LN0_DOWNSTREAM, 0x47) | FIELD_PREP(PCIE_VAL_LN1_DOWNSTREAM, 0x47) | FIELD_PREP(PCIE_VAL_LN0_UPSTREAM, 0x41) | @@ -921,17 +915,15 @@ static int mtk_pcie_en7581_power_up(struct mtk_gen3_pcie *pcie) FIELD_PREP(PCIE_K_FINETUNE_MAX, 0xf); writel_relaxed(val, pcie->base + PCIE_PIPE4_PIE8_REG); - err = clk_bulk_enable(pcie->num_clks, pcie->clks); + err = clk_bulk_prepare_enable(pcie->num_clks, pcie->clks); if (err) { dev_err(dev, "failed to prepare clock\n"); - goto err_clk_enable; + goto err_clk_init; } return 0; -err_clk_enable: - clk_bulk_unprepare(pcie->num_clks, pcie->clks); -err_clk_prepare: +err_clk_init: pm_runtime_put_sync(dev); pm_runtime_disable(dev); reset_control_assert(pcie->mac_reset); From patchwork Thu Nov 7 13:50:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lorenzo Bianconi X-Patchwork-Id: 13866537 X-Patchwork-Delegate: kw@linux.com Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A4FC821264D for ; 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dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Zikc2VXF" Received: by smtp.kernel.org (Postfix) with ESMTPSA id E196BC4CECC; Thu, 7 Nov 2024 13:51:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1730987490; bh=btGOvKZTxZhuaxAnzRi1ntXNxujI8W8vvUilrAMbVOE=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=Zikc2VXFiWG6/99xKSMZnRo6dLllsbHAsCjJjy7JHGNrfbHuwtWCrEQcLnJ5Xp+ID /VYRfkguYkSTn/d6DCMrjYv4Scq8fIshoRYWkg45ttHdpuIdGluoJLVsCZy5Q4QhJ6 sXK/hFtofEGozO18hsVQnDNcrnKu36od0fVooytjIAddhozdY5CFXaml6RGoxXbRaC iBZg6gxCBMmWN0wVHfk7Q/iwuRj8v8YleKr7zoO8IZMZEkNGy71tLinT65t4z3u+pr cxuHCc0fNRJVcssxCE1A5/HPOJz2Ubn43OknWXDQkxH4X7bD389u2zHn48KceYGQzn 24uMjxTfiiFJg== From: Lorenzo Bianconi Date: Thu, 07 Nov 2024 14:50:55 +0100 Subject: [PATCH 3/3] PCI: mediatek-gen3: Move reset/assert callbacks in .power_up() Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241107-pcie-en7581-fixes-v1-3-af0c872323c7@kernel.org> References: <20241107-pcie-en7581-fixes-v1-0-af0c872323c7@kernel.org> In-Reply-To: <20241107-pcie-en7581-fixes-v1-0-af0c872323c7@kernel.org> To: Ryder Lee , Jianjun Wang , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Bjorn Helgaas , Philipp Zabel , Matthias Brugger , AngeloGioacchino Del Regno Cc: linux-pci@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Lorenzo Bianconi X-Mailer: b4 0.14.2 In order to make the code more readable, move phy and mac reset lines assert/de-assert configuration in .power_up callback (mtk_pcie_en7581_power_up/mtk_pcie_power_up). Signed-off-by: Lorenzo Bianconi --- drivers/pci/controller/pcie-mediatek-gen3.c | 24 ++++++++++++++++-------- 1 file changed, 16 insertions(+), 8 deletions(-) diff --git a/drivers/pci/controller/pcie-mediatek-gen3.c b/drivers/pci/controller/pcie-mediatek-gen3.c index 8c8c733a145634cdbfefd339f4a692f25a6e24de..c0127d0fb4f059b9f9e816360130e183e8f0e990 100644 --- a/drivers/pci/controller/pcie-mediatek-gen3.c +++ b/drivers/pci/controller/pcie-mediatek-gen3.c @@ -867,6 +867,13 @@ static int mtk_pcie_en7581_power_up(struct mtk_gen3_pcie *pcie) int err; u32 val; + /* + * The controller may have been left out of reset by the bootloader + * so make sure that we get a clean start by asserting resets here. + */ + reset_control_bulk_assert(pcie->soc->phy_resets.num_resets, + pcie->phy_resets); + reset_control_assert(pcie->mac_reset); /* * Wait for the time needed to complete the bulk assert in * mtk_pcie_setup for EN7581 SoC. @@ -941,6 +948,15 @@ static int mtk_pcie_power_up(struct mtk_gen3_pcie *pcie) struct device *dev = pcie->dev; int err; + /* + * The controller may have been left out of reset by the bootloader + * so make sure that we get a clean start by asserting resets here. + */ + reset_control_bulk_assert(pcie->soc->phy_resets.num_resets, + pcie->phy_resets); + reset_control_assert(pcie->mac_reset); + usleep_range(10, 20); + /* PHY power on and enable pipe clock */ err = reset_control_bulk_deassert(pcie->soc->phy_resets.num_resets, pcie->phy_resets); if (err) { @@ -1013,14 +1029,6 @@ static int mtk_pcie_setup(struct mtk_gen3_pcie *pcie) * counter since the bulk is shared. */ reset_control_bulk_deassert(pcie->soc->phy_resets.num_resets, pcie->phy_resets); - /* - * The controller may have been left out of reset by the bootloader - * so make sure that we get a clean start by asserting resets here. - */ - reset_control_bulk_assert(pcie->soc->phy_resets.num_resets, pcie->phy_resets); - - reset_control_assert(pcie->mac_reset); - usleep_range(10, 20); /* Don't touch the hardware registers before power up */ err = pcie->soc->power_up(pcie);