From patchwork Sun Nov 10 22:18:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 13870079 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CE158D12D59 for ; Sun, 10 Nov 2024 22:21:01 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tAGHR-0003ZG-EB; Sun, 10 Nov 2024 17:19:37 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tAGHM-0003Yn-83 for qemu-devel@nongnu.org; Sun, 10 Nov 2024 17:19:32 -0500 Received: from sender4-pp-f112.zoho.com ([136.143.188.112]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tAGHK-0008KD-Iv for qemu-devel@nongnu.org; Sun, 10 Nov 2024 17:19:32 -0500 ARC-Seal: i=1; a=rsa-sha256; t=1731277155; cv=none; d=zohomail.com; s=zohoarc; b=TGxhiiCIkm4Jcqhb0giZbFaXkSonn1NL0agxWcVIh1GEMeUM7ZFrOrnVRT0aid+5a/uZI1DpMWzFZmCRTWVqTYOJbmdhZm4Unby+ONnVlyRYv1BtXi3yn4/BdJo3Y3MugHmahPee91AIO6m4ic1MyL/y/WhomzpID1+ykIXERIg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1731277155; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:Subject:To:To:Message-Id:Reply-To; bh=YX8Cx3IAbZCZCZ5QLBTfQHwoqaPoB7M3PM5VoA7yqzk=; b=H6SFmNtVOCIOYpKGAIomxsKc+HGiTy7KI9yW7ltUBL3iRVnpU7CU7PcSLVNRWklu3S9zJxydk3iqhS6KfHwbDU7K1J3pHmhzKg65YiIENQKlEtq6tLqeXaO9yzCZ/cfTZp3YtoTzZWYtTrVfrmvrx1LJHNja5K2zptimT+Qy8qY= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=collabora.com; spf=pass smtp.mailfrom=dmitry.osipenko@collabora.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1731277155; s=zohomail; d=collabora.com; i=dmitry.osipenko@collabora.com; h=From:From:To:To:Cc:Cc:Subject:Subject:Date:Date:Message-ID:In-Reply-To:References:MIME-Version:Content-Transfer-Encoding:Message-Id:Reply-To; bh=YX8Cx3IAbZCZCZ5QLBTfQHwoqaPoB7M3PM5VoA7yqzk=; b=Ws41nWqqGtXscdLwWMRlTdMCG654hirslMtCz15q/yOscQua6rj7XVnqklIgjuiD 7iLfXBI5DIgFt8H5ZZYtP6G5flc81QvwYAvoaZdIsmwmWR2ZkWs//AVSkQwmyAuYVi3 Itk3/tFt9vfqjcgyxsrkFC6ZPTFjTzHJg4X5e5ug= Received: by mx.zohomail.com with SMTPS id 1731277153390643.3435933019216; Sun, 10 Nov 2024 14:19:13 -0800 (PST) From: Dmitry Osipenko To: Akihiko Odaki , Huang Rui , =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Gerd Hoffmann , =?utf-8?q?Alex_Benn=C3=A9e?= , "Michael S . Tsirkin" , Paolo Bonzini Cc: Gert Wollny , qemu-devel@nongnu.org, Gurchetan Singh , Alyssa Ross , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Alex Deucher , Stefano Stabellini , =?utf-8?q?Christian_K?= =?utf-8?q?=C3=B6nig?= , Xenia Ragiadakou , Pierre-Eric Pelloux-Prayer , Honglei Huang , Julia Zhang , Chen Jiqian , Rob Clark , Yiwei Zhang , Sergio Lopez Pascual Subject: [PATCH v4 1/5] ui/sdl2: Restore original context after new context creation Date: Mon, 11 Nov 2024 01:18:33 +0300 Message-ID: <20241110221838.2241356-2-dmitry.osipenko@collabora.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241110221838.2241356-1-dmitry.osipenko@collabora.com> References: <20241110221838.2241356-1-dmitry.osipenko@collabora.com> MIME-Version: 1.0 X-ZohoMailClient: External Received-SPF: pass client-ip=136.143.188.112; envelope-from=dmitry.osipenko@collabora.com; helo=sender4-pp-f112.zoho.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=-0.01, RCVD_IN_MSPIKE_WL=-0.01, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org SDL API changes GL context to a newly created GL context, which differs from other GL providers that don't switch context. Change SDL backend to restore the original GL context. This allows Qemu's virtio-gpu to support new virglrenderer async-fencing feature for Virgl contexts, otherwise virglrenderer's vrend creates a fence-sync context on the Qemu's main-loop thread that erroneously stays in-use by the main-loop after creation, not allowing vrend's fence-sync thread switch to this new context that belongs to it. Signed-off-by: Dmitry Osipenko --- ui/sdl2-gl.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/ui/sdl2-gl.c b/ui/sdl2-gl.c index e01d9ab0c7bf..b1fe96d6af22 100644 --- a/ui/sdl2-gl.c +++ b/ui/sdl2-gl.c @@ -168,6 +168,9 @@ QEMUGLContext sdl2_gl_create_context(DisplayGLCtx *dgc, SDL_GL_CONTEXT_PROFILE_ES); ctx = SDL_GL_CreateContext(scon->real_window); } + + SDL_GL_MakeCurrent(scon->real_window, scon->winctx); + return (QEMUGLContext)ctx; } From patchwork Sun Nov 10 22:18:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 13870075 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C7374D12D59 for ; Sun, 10 Nov 2024 22:20:16 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tAGHT-0003Zm-Rl; Sun, 10 Nov 2024 17:19:39 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tAGHN-0003Z1-Bv for qemu-devel@nongnu.org; Sun, 10 Nov 2024 17:19:33 -0500 Received: from sender4-pp-f112.zoho.com ([136.143.188.112]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tAGHL-0008KR-1f for qemu-devel@nongnu.org; Sun, 10 Nov 2024 17:19:33 -0500 ARC-Seal: i=1; a=rsa-sha256; t=1731277161; cv=none; d=zohomail.com; s=zohoarc; b=SkTvTh6MYi7UgHcmMr9lAEo/9WntCRtY/w5HkJ+6YGvCHPS6rzVJKkt+M6SnsjQpWxOeZBuyl3wVU//K/ClX2YIJZkE3V38MDxX/f5eenbUZJF4iJlFQ4KZGJp5Z4b/Ea4FV2hztHrh8H3O84Re6mmvOMXkFdQNX/EJcJsrxEfA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1731277161; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:Subject:To:To:Message-Id:Reply-To; bh=/oPbj7OtCKM0lBO24aRbhFCi+YU2qrTYkE3/7RdR1+U=; b=Y2U4Cy7GFtEYxMwdpg3UG9br9nQArI8zi+DDkB8ccvAE3CQMkL3iY51vnWIfv3LvQ2E+LSWl7YAk6MkhShMGstwKMBqnlNhHnqKWTC2QoYSewl4TjpWxspJdhm2B/AXhFd6JatO4+1V6qJ9tOIxolqKQHAKrH4b78vzca+PpQSU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=collabora.com; spf=pass smtp.mailfrom=dmitry.osipenko@collabora.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1731277161; s=zohomail; d=collabora.com; i=dmitry.osipenko@collabora.com; h=From:From:To:To:Cc:Cc:Subject:Subject:Date:Date:Message-ID:In-Reply-To:References:MIME-Version:Content-Transfer-Encoding:Message-Id:Reply-To; bh=/oPbj7OtCKM0lBO24aRbhFCi+YU2qrTYkE3/7RdR1+U=; b=BvnfYOnlJxV1rF4T1zuilOEN69tEOthG4lNR/SDRTFJHyBLWGU8nBzNJRwkGKKUu Ah7mTT2+O3t8enGViA4lBMfn8pfH9YdzAa2dpokIK7IkoJ2cd6nqDdAqKjh6c2bhj+Q h3MYZQ4m2PVTJYYOj5PQNmfpZd8VTkISuGEZkEXk= Received: by mx.zohomail.com with SMTPS id 1731277159619699.9805170078749; Sun, 10 Nov 2024 14:19:19 -0800 (PST) From: Dmitry Osipenko To: Akihiko Odaki , Huang Rui , =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Gerd Hoffmann , =?utf-8?q?Alex_Benn=C3=A9e?= , "Michael S . Tsirkin" , Paolo Bonzini Cc: Gert Wollny , qemu-devel@nongnu.org, Gurchetan Singh , Alyssa Ross , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Alex Deucher , Stefano Stabellini , =?utf-8?q?Christian_K?= =?utf-8?q?=C3=B6nig?= , Xenia Ragiadakou , Pierre-Eric Pelloux-Prayer , Honglei Huang , Julia Zhang , Chen Jiqian , Rob Clark , Yiwei Zhang , Sergio Lopez Pascual Subject: [PATCH v4 2/5] ui/sdl2: Implement dpy dmabuf functions Date: Mon, 11 Nov 2024 01:18:34 +0300 Message-ID: <20241110221838.2241356-3-dmitry.osipenko@collabora.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241110221838.2241356-1-dmitry.osipenko@collabora.com> References: <20241110221838.2241356-1-dmitry.osipenko@collabora.com> MIME-Version: 1.0 X-ZohoMailClient: External Received-SPF: pass client-ip=136.143.188.112; envelope-from=dmitry.osipenko@collabora.com; helo=sender4-pp-f112.zoho.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=-0.01, RCVD_IN_MSPIKE_WL=-0.01, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Pierre-Eric Pelloux-Prayer If EGL is used, we can rely on dmabuf to import textures without doing copies. To get this working on X11, we use the existing SDL hint: SDL_HINT_VIDEO_X11_FORCE_EGL (because dmabuf can't be used with GLX). Signed-off-by: Pierre-Eric Pelloux-Prayer Signed-off-by: Dmitry Osipenko --- include/ui/sdl2.h | 7 ++++++ meson.build | 6 ++--- ui/sdl2-gl.c | 64 +++++++++++++++++++++++++++++++++++++++++++++++ ui/sdl2.c | 42 +++++++++++++++++++++++++++++++ 4 files changed, 115 insertions(+), 4 deletions(-) diff --git a/include/ui/sdl2.h b/include/ui/sdl2.h index dbe6e3d9739b..9daf5ecffae7 100644 --- a/include/ui/sdl2.h +++ b/include/ui/sdl2.h @@ -45,6 +45,7 @@ struct sdl2_console { bool gui_keysym; SDL_GLContext winctx; QKbdState *kbd; + bool has_dmabuf; #ifdef CONFIG_OPENGL QemuGLShader *gls; egl_fb guest_fb; @@ -96,5 +97,11 @@ void sdl2_gl_scanout_texture(DisplayChangeListener *dcl, void *d3d_tex2d); void sdl2_gl_scanout_flush(DisplayChangeListener *dcl, uint32_t x, uint32_t y, uint32_t w, uint32_t h); +void sdl2_gl_scanout_dmabuf(DisplayChangeListener *dcl, + QemuDmaBuf *dmabuf); +void sdl2_gl_release_dmabuf(DisplayChangeListener *dcl, + QemuDmaBuf *dmabuf); +bool sdl2_gl_has_dmabuf(DisplayChangeListener *dcl); +void sdl2_gl_console_init(struct sdl2_console *scon); #endif /* SDL2_H */ diff --git a/meson.build b/meson.build index e0b880e4e138..d4bb8a8e2323 100644 --- a/meson.build +++ b/meson.build @@ -1937,10 +1937,8 @@ if get_option('gtk') \ endif endif -x11 = not_found -if gtkx11.found() - x11 = dependency('x11', method: 'pkg-config', required: gtkx11.found()) -endif +x11 = dependency('x11', method: 'pkg-config', required: gtkx11.found()) + png = not_found if get_option('png').allowed() and have_system png = dependency('libpng', version: '>=1.6.34', required: get_option('png'), diff --git a/ui/sdl2-gl.c b/ui/sdl2-gl.c index b1fe96d6af22..8d53e340d40d 100644 --- a/ui/sdl2-gl.c +++ b/ui/sdl2-gl.c @@ -26,6 +26,8 @@ */ #include "qemu/osdep.h" +#include "qemu/main-loop.h" +#include "qemu/error-report.h" #include "ui/console.h" #include "ui/input.h" #include "ui/sdl2.h" @@ -249,3 +251,65 @@ void sdl2_gl_scanout_flush(DisplayChangeListener *dcl, SDL_GL_SwapWindow(scon->real_window); } + +void sdl2_gl_scanout_dmabuf(DisplayChangeListener *dcl, + QemuDmaBuf *dmabuf) +{ + struct sdl2_console *scon = container_of(dcl, struct sdl2_console, dcl); + + assert(scon->opengl); + SDL_GL_MakeCurrent(scon->real_window, scon->winctx); + + egl_dmabuf_import_texture(dmabuf); + if (!qemu_dmabuf_get_texture(dmabuf)) { + error_report("%s: failed fd=%d", __func__, qemu_dmabuf_get_fd(dmabuf)); + return; + } + + sdl2_gl_scanout_texture(dcl, qemu_dmabuf_get_texture(dmabuf), false, + qemu_dmabuf_get_width(dmabuf), + qemu_dmabuf_get_height(dmabuf), + 0, 0, + qemu_dmabuf_get_width(dmabuf), + qemu_dmabuf_get_height(dmabuf), + NULL); + + if (qemu_dmabuf_get_allow_fences(dmabuf)) { + scon->guest_fb.dmabuf = dmabuf; + } +} + +void sdl2_gl_release_dmabuf(DisplayChangeListener *dcl, + QemuDmaBuf *dmabuf) +{ + egl_dmabuf_release_texture(dmabuf); +} + +bool sdl2_gl_has_dmabuf(DisplayChangeListener *dcl) +{ + struct sdl2_console *scon = container_of(dcl, struct sdl2_console, dcl); + + return scon->has_dmabuf; +} + +void sdl2_gl_console_init(struct sdl2_console *scon) +{ + bool hidden = scon->hidden; + + scon->hidden = true; + scon->surface = qemu_create_displaysurface(1, 1); + sdl2_window_create(scon); + + /* + * QEMU checks whether console supports dma-buf before switching + * to the console. To break this chicken-egg problem we pre-check + * dma-buf availability beforehand using a dummy SDL window. + */ + scon->has_dmabuf = qemu_egl_has_dmabuf(); + + sdl2_window_destroy(scon); + qemu_free_displaysurface(scon->surface); + + scon->surface = NULL; + scon->hidden = hidden; +} diff --git a/ui/sdl2.c b/ui/sdl2.c index bd4f5a9da14a..c81f693b8299 100644 --- a/ui/sdl2.c +++ b/ui/sdl2.c @@ -35,6 +35,10 @@ #include "ui/win32-kbd-hook.h" #include "qemu/log.h" +#ifdef CONFIG_X11 +#include +#endif + static int sdl2_num_outputs; static struct sdl2_console *sdl2_console; @@ -120,6 +124,9 @@ void sdl2_window_create(struct sdl2_console *scon) /* The SDL renderer is only used by sdl2-2D, when OpenGL is disabled */ scon->real_renderer = SDL_CreateRenderer(scon->real_window, -1, 0); } + + qemu_egl_display = eglGetCurrentDisplay(); + sdl_update_caption(scon); } @@ -820,6 +827,10 @@ static const DisplayChangeListenerOps dcl_gl_ops = { .dpy_gl_scanout_disable = sdl2_gl_scanout_disable, .dpy_gl_scanout_texture = sdl2_gl_scanout_texture, .dpy_gl_update = sdl2_gl_scanout_flush, + + .dpy_gl_scanout_dmabuf = sdl2_gl_scanout_dmabuf, + .dpy_gl_release_dmabuf = sdl2_gl_release_dmabuf, + .dpy_has_dmabuf = sdl2_gl_has_dmabuf, }; static bool @@ -847,6 +858,35 @@ static void sdl2_display_early_init(DisplayOptions *o) } } +static void sdl2_set_hint_x11_force_egl(void) +{ +#if defined(SDL_HINT_VIDEO_X11_FORCE_EGL) && defined(CONFIG_OPENGL) && \ + defined(CONFIG_X11) + Display *x_disp = XOpenDisplay(NULL); + EGLDisplay egl_display; + + if (!x_disp) { + return; + } + + /* Prefer EGL over GLX to get dma-buf support. */ + egl_display = eglGetDisplay((EGLNativeDisplayType)x_disp); + + if (egl_display != EGL_NO_DISPLAY) { + /* + * Setting X11_FORCE_EGL hint doesn't make SDL to prefer X11 over + * Wayland. SDL will use Wayland driver even if XWayland presents. + * It's always safe to set the hint even if X11 is not used by SDL. + * SDL will work regardless of the hint. + */ + SDL_SetHint(SDL_HINT_VIDEO_X11_FORCE_EGL, "1"); + eglTerminate(egl_display); + } + + XCloseDisplay(x_disp); +#endif +} + static void sdl2_display_init(DisplayState *ds, DisplayOptions *o) { uint8_t data = 0; @@ -877,6 +917,7 @@ static void sdl2_display_init(DisplayState *ds, DisplayOptions *o) SDL_SetHint(SDL_HINT_ALLOW_ALT_TAB_WHILE_GRABBED, "0"); #endif SDL_SetHint(SDL_HINT_WINDOWS_NO_CLOSE_ON_ALT_F4, "1"); + sdl2_set_hint_x11_force_egl(); SDL_EnableScreenSaver(); memset(&info, 0, sizeof(info)); SDL_VERSION(&info.version); @@ -923,6 +964,7 @@ static void sdl2_display_init(DisplayState *ds, DisplayOptions *o) sdl2_console[i].kbd = qkbd_state_init(con); if (display_opengl) { qemu_console_set_display_gl_ctx(con, &sdl2_console[i].dgc); + sdl2_gl_console_init(&sdl2_console[i]); } register_displaychangelistener(&sdl2_console[i].dcl); From patchwork Sun Nov 10 22:18:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 13870074 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E1A6DD12D5A for ; Sun, 10 Nov 2024 22:20:16 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tAGHU-0003a6-Oh; Sun, 10 Nov 2024 17:19:40 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tAGHT-0003Zj-Jr for qemu-devel@nongnu.org; Sun, 10 Nov 2024 17:19:39 -0500 Received: from sender4-pp-f112.zoho.com ([136.143.188.112]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tAGHS-0008Lg-5S for qemu-devel@nongnu.org; Sun, 10 Nov 2024 17:19:39 -0500 ARC-Seal: i=1; a=rsa-sha256; t=1731277167; cv=none; d=zohomail.com; s=zohoarc; b=bRak+vU8VrwnUBTkftzvjuT64atu7D0suqyfBeEuqNLRLQzqRtTsgxNVMBBbbQRj8pK9bAuqswfOJJp7BngivI5Z/oqvo/0WkyrlbydzuPyiVaBul3dGCdpZyJMZxsAeimLk9tYSCEvz04OpLKEnMgW8bHkQKVbDOKKLk45oQOU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1731277167; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:Subject:To:To:Message-Id:Reply-To; bh=ZKkj1ZhoGl9h72b5XKg/9foqAW3+vlixReRBYZ0DK24=; b=dwQ5czkpY8ymzLxozQGPUufmaiVPFuIi0F/2F5/HdbTaOKZ8lPksz+5mfB2rFkq50uV+PFPS8mLXV10eHEKvHYmCAyeOvjchTfq7ZHgJBKFTWqqgLabq7ldw6okYQ2SVQyMfjFW1pxQBGdrNVumO+RKRiDdthsVrSY0AsEUlm0M= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=collabora.com; spf=pass smtp.mailfrom=dmitry.osipenko@collabora.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1731277167; s=zohomail; d=collabora.com; i=dmitry.osipenko@collabora.com; h=From:From:To:To:Cc:Cc:Subject:Subject:Date:Date:Message-ID:In-Reply-To:References:MIME-Version:Content-Transfer-Encoding:Message-Id:Reply-To; bh=ZKkj1ZhoGl9h72b5XKg/9foqAW3+vlixReRBYZ0DK24=; b=lBPaZ3AnANkWffuzmgFmptpaLTz56f4RIwZei1P2QWumlanG6EaNhPUSphyKt9hZ +9eFleeJL2lfhDzZXTtqts7UFYaqH5nsOLGmBzN3yTl3nnufPISsB0DV+e6tOFKIMuP AVSZBXezUM5tTEiulOcYoMj/ShYvF6aJe5SKdIG0= Received: by mx.zohomail.com with SMTPS id 1731277165671380.5859505731843; Sun, 10 Nov 2024 14:19:25 -0800 (PST) From: Dmitry Osipenko To: Akihiko Odaki , Huang Rui , =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Gerd Hoffmann , =?utf-8?q?Alex_Benn=C3=A9e?= , "Michael S . Tsirkin" , Paolo Bonzini Cc: Gert Wollny , qemu-devel@nongnu.org, Gurchetan Singh , Alyssa Ross , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Alex Deucher , Stefano Stabellini , =?utf-8?q?Christian_K?= =?utf-8?q?=C3=B6nig?= , Xenia Ragiadakou , Pierre-Eric Pelloux-Prayer , Honglei Huang , Julia Zhang , Chen Jiqian , Rob Clark , Yiwei Zhang , Sergio Lopez Pascual Subject: [PATCH v4 3/5] virtio-gpu: Handle virgl fence creation errors Date: Mon, 11 Nov 2024 01:18:35 +0300 Message-ID: <20241110221838.2241356-4-dmitry.osipenko@collabora.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241110221838.2241356-1-dmitry.osipenko@collabora.com> References: <20241110221838.2241356-1-dmitry.osipenko@collabora.com> MIME-Version: 1.0 X-ZohoMailClient: External Received-SPF: pass client-ip=136.143.188.112; envelope-from=dmitry.osipenko@collabora.com; helo=sender4-pp-f112.zoho.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=-0.01, RCVD_IN_MSPIKE_WL=-0.01, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Print out error messages when virgl fence creation fails to aid debugging of the fence-related bugs. Signed-off-by: Dmitry Osipenko --- hw/display/virtio-gpu-virgl.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/hw/display/virtio-gpu-virgl.c b/hw/display/virtio-gpu-virgl.c index eedae7357f1a..a875c68a35e5 100644 --- a/hw/display/virtio-gpu-virgl.c +++ b/hw/display/virtio-gpu-virgl.c @@ -892,6 +892,7 @@ void virtio_gpu_virgl_process_cmd(VirtIOGPU *g, struct virtio_gpu_ctrl_command *cmd) { bool cmd_suspended = false; + int ret; VIRTIO_GPU_FILL_CMD(cmd->cmd_hdr); @@ -990,7 +991,17 @@ void virtio_gpu_virgl_process_cmd(VirtIOGPU *g, } trace_virtio_gpu_fence_ctrl(cmd->cmd_hdr.fence_id, cmd->cmd_hdr.type); - virgl_renderer_create_fence(cmd->cmd_hdr.fence_id, cmd->cmd_hdr.type); + + /* + * Unlike other virglrenderer functions, this one returns a positive + * error code. + */ + ret = virgl_renderer_create_fence(cmd->cmd_hdr.fence_id, 0); + if (ret) { + qemu_log_mask(LOG_GUEST_ERROR, + "%s: virgl_renderer_create_fence error: %s", + __func__, strerror(ret)); + } } static void virgl_write_fence(void *opaque, uint32_t fence) From patchwork Sun Nov 10 22:18:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 13870077 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 049AAD12D59 for ; Sun, 10 Nov 2024 22:20:40 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tAGHd-0003bF-5I; Sun, 10 Nov 2024 17:19:49 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tAGHb-0003aw-Gu for qemu-devel@nongnu.org; Sun, 10 Nov 2024 17:19:47 -0500 Received: from sender4-pp-f112.zoho.com ([136.143.188.112]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tAGHZ-0008MV-KU for qemu-devel@nongnu.org; Sun, 10 Nov 2024 17:19:47 -0500 ARC-Seal: i=1; a=rsa-sha256; t=1731277173; cv=none; d=zohomail.com; s=zohoarc; b=gqKPBT9XFjeJY4RMUMtPWZR8goNYxur0xGj1VdiocAKuLrWH6Xknt6xNbtoGwsKTfHLbsHY6EJnsSrynCgfwrcKBqbVD+IFP1gtZnoQIiJKN04BDwdAYkQRBPkkejnNoj0jESOEbguJFkYPxQax8+MHnWQ/omQ2vDz/t+YmYGPA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1731277173; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:Subject:To:To:Message-Id:Reply-To; bh=5Nb+BvwKBVdjjN1VXLasoK86PSOuJGwKkc/o2hN/PNQ=; b=VTnAT+HGptCiZsgZZVH+gzPy0HRY8JAkT+cPfjmS6E+MMF+QZxvy+Npi/1oNEIKN74NeGprmLB9qlSJ1oOck4XmlNmXku1kOaFtCf3Bm35mVUCxwY+mU0Y8Eu4QcJuPRTtPaEb4trO8UJ+i1toFYQrGXEy0s2Zc2+FCNcYqq2Vg= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=collabora.com; spf=pass smtp.mailfrom=dmitry.osipenko@collabora.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1731277173; s=zohomail; d=collabora.com; i=dmitry.osipenko@collabora.com; h=From:From:To:To:Cc:Cc:Subject:Subject:Date:Date:Message-ID:In-Reply-To:References:MIME-Version:Content-Transfer-Encoding:Message-Id:Reply-To; bh=5Nb+BvwKBVdjjN1VXLasoK86PSOuJGwKkc/o2hN/PNQ=; b=ENG5/00orHkeNQi3AtxXp0yF8pb7QsRUwYKNjz94f7luzhIN5TZ8W+uERGFUiV7u 6RvJWbfbChbujX72zgk/48WcCepTGyV0CQLUNpOldU5teFbbdRWRrR+Siu/w5uoxqZL yFPbyWgMgYg19ZJXj3tfRPhqlz/Y02sj2Dh0irqQ= Received: by mx.zohomail.com with SMTPS id 1731277172055543.203383486787; Sun, 10 Nov 2024 14:19:32 -0800 (PST) From: Dmitry Osipenko To: Akihiko Odaki , Huang Rui , =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Gerd Hoffmann , =?utf-8?q?Alex_Benn=C3=A9e?= , "Michael S . Tsirkin" , Paolo Bonzini Cc: Gert Wollny , qemu-devel@nongnu.org, Gurchetan Singh , Alyssa Ross , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Alex Deucher , Stefano Stabellini , =?utf-8?q?Christian_K?= =?utf-8?q?=C3=B6nig?= , Xenia Ragiadakou , Pierre-Eric Pelloux-Prayer , Honglei Huang , Julia Zhang , Chen Jiqian , Rob Clark , Yiwei Zhang , Sergio Lopez Pascual Subject: [PATCH v4 4/5] virtio-gpu: Support asynchronous fencing Date: Mon, 11 Nov 2024 01:18:36 +0300 Message-ID: <20241110221838.2241356-5-dmitry.osipenko@collabora.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241110221838.2241356-1-dmitry.osipenko@collabora.com> References: <20241110221838.2241356-1-dmitry.osipenko@collabora.com> MIME-Version: 1.0 X-ZohoMailClient: External Received-SPF: pass client-ip=136.143.188.112; envelope-from=dmitry.osipenko@collabora.com; helo=sender4-pp-f112.zoho.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=-0.01, RCVD_IN_MSPIKE_WL=-0.01, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Support asynchronous fencing feature of virglrenderer. It allows Qemu to handle fence as soon as it's signalled instead of periodically polling the fence status. This feature is required for enabling DRM context support in Qemu because legacy fencing mode isn't supported for DRM contexts in virglrenderer. Signed-off-by: Dmitry Osipenko --- hw/display/virtio-gpu-gl.c | 3 + hw/display/virtio-gpu-virgl.c | 141 ++++++++++++++++++++++++++++----- include/hw/virtio/virtio-gpu.h | 13 +++ 3 files changed, 135 insertions(+), 22 deletions(-) diff --git a/hw/display/virtio-gpu-gl.c b/hw/display/virtio-gpu-gl.c index 7c0e448b4661..53d938f23f20 100644 --- a/hw/display/virtio-gpu-gl.c +++ b/hw/display/virtio-gpu-gl.c @@ -170,6 +170,9 @@ static void virtio_gpu_gl_device_unrealize(DeviceState *qdev) if (gl->renderer_state >= RS_INITED) { #if VIRGL_VERSION_MAJOR >= 1 qemu_bh_delete(gl->cmdq_resume_bh); + + virtio_gpu_virgl_reset_async_fences(g); + qemu_bh_delete(gl->async_fence_bh); #endif if (virtio_gpu_stats_enabled(g->parent_obj.conf)) { timer_free(gl->print_stats); diff --git a/hw/display/virtio-gpu-virgl.c b/hw/display/virtio-gpu-virgl.c index a875c68a35e5..d59c7b6d48ed 100644 --- a/hw/display/virtio-gpu-virgl.c +++ b/hw/display/virtio-gpu-virgl.c @@ -891,6 +891,7 @@ static void virgl_cmd_set_scanout_blob(VirtIOGPU *g, void virtio_gpu_virgl_process_cmd(VirtIOGPU *g, struct virtio_gpu_ctrl_command *cmd) { + VirtIOGPUGL *gl = VIRTIO_GPU_GL(g); bool cmd_suspended = false; int ret; @@ -992,35 +993,73 @@ void virtio_gpu_virgl_process_cmd(VirtIOGPU *g, trace_virtio_gpu_fence_ctrl(cmd->cmd_hdr.fence_id, cmd->cmd_hdr.type); - /* - * Unlike other virglrenderer functions, this one returns a positive - * error code. - */ - ret = virgl_renderer_create_fence(cmd->cmd_hdr.fence_id, 0); - if (ret) { - qemu_log_mask(LOG_GUEST_ERROR, - "%s: virgl_renderer_create_fence error: %s", - __func__, strerror(ret)); + if (gl->context_fence_enabled && + (cmd->cmd_hdr.flags & VIRTIO_GPU_FLAG_INFO_RING_IDX)) { + uint32_t flags = 0; + + ret = virgl_renderer_context_create_fence(cmd->cmd_hdr.ctx_id, flags, + cmd->cmd_hdr.ring_idx, + cmd->cmd_hdr.fence_id); + if (ret) { + qemu_log_mask(LOG_GUEST_ERROR, + "%s: virgl_renderer_context_create_fence error: %s", + __func__, strerror(-ret)); + } + } else { + /* + * Unlike other virglrenderer functions, this one returns a positive + * error code. + */ + ret = virgl_renderer_create_fence(cmd->cmd_hdr.fence_id, 0); + if (ret) { + qemu_log_mask(LOG_GUEST_ERROR, + "%s: virgl_renderer_create_fence error: %s", + __func__, strerror(ret)); + } } } -static void virgl_write_fence(void *opaque, uint32_t fence) +static void virtio_gpu_virgl_async_fence_bh(void *opaque) { - VirtIOGPU *g = opaque; + QSLIST_HEAD(, virtio_gpu_virgl_context_fence) async_fenceq; struct virtio_gpu_ctrl_command *cmd, *tmp; + struct virtio_gpu_virgl_context_fence *f; + VirtIOGPU *g = opaque; + VirtIOGPUGL *gl = VIRTIO_GPU_GL(g); - QTAILQ_FOREACH_SAFE(cmd, &g->fenceq, next, tmp) { - /* - * the guest can end up emitting fences out of order - * so we should check all fenced cmds not just the first one. - */ - if (cmd->cmd_hdr.fence_id > fence) { - continue; + QSLIST_MOVE_ATOMIC(&async_fenceq, &gl->async_fenceq); + + while (!QSLIST_EMPTY(&async_fenceq)) { + f = QSLIST_FIRST(&async_fenceq); + + QSLIST_REMOVE_HEAD(&async_fenceq, next); + + QTAILQ_FOREACH_SAFE(cmd, &g->fenceq, next, tmp) { + /* + * the guest can end up emitting fences out of order + * so we should check all fenced cmds not just the first one. + */ + if (cmd->cmd_hdr.fence_id > f->fence_id) { + continue; + } + if (cmd->cmd_hdr.flags & VIRTIO_GPU_FLAG_INFO_RING_IDX) { + if (cmd->cmd_hdr.ring_idx != f->ring_idx) { + continue; + } + if (cmd->cmd_hdr.ctx_id != f->ctx_id) { + continue; + } + } else if (f->ring_idx >= 0) { + /* ctx0 GL-query fences don't have ring info */ + continue; + } + virtio_gpu_ctrl_response_nodata(g, cmd, VIRTIO_GPU_RESP_OK_NODATA); + QTAILQ_REMOVE(&g->fenceq, cmd, next); + g_free(cmd); } - trace_virtio_gpu_fence_resp(cmd->cmd_hdr.fence_id); - virtio_gpu_ctrl_response_nodata(g, cmd, VIRTIO_GPU_RESP_OK_NODATA); - QTAILQ_REMOVE(&g->fenceq, cmd, next); - g_free(cmd); + + trace_virtio_gpu_fence_resp(f->fence_id); + g_free(f); g->inflight--; if (virtio_gpu_stats_enabled(g->parent_obj.conf)) { trace_virtio_gpu_dec_inflight_fences(g->inflight); @@ -1028,6 +1067,52 @@ static void virgl_write_fence(void *opaque, uint32_t fence) } } +void virtio_gpu_virgl_reset_async_fences(VirtIOGPU *g) +{ + struct virtio_gpu_virgl_context_fence *f; + VirtIOGPUGL *gl = VIRTIO_GPU_GL(g); + + while (!QSLIST_EMPTY(&gl->async_fenceq)) { + f = QSLIST_FIRST(&gl->async_fenceq); + + QSLIST_REMOVE_HEAD(&gl->async_fenceq, next); + + g_free(f); + } +} + +static void +virtio_gpu_virgl_push_async_fence(VirtIOGPU *g, uint32_t ctx_id, + int64_t ring_idx, uint64_t fence_id) +{ + struct virtio_gpu_virgl_context_fence *f; + VirtIOGPUGL *gl = VIRTIO_GPU_GL(g); + + f = g_new(struct virtio_gpu_virgl_context_fence, 1); + f->ctx_id = ctx_id; + f->ring_idx = ring_idx; + f->fence_id = fence_id; + + QSLIST_INSERT_HEAD_ATOMIC(&gl->async_fenceq, f, next); + + qemu_bh_schedule(gl->async_fence_bh); +} + +static void virgl_write_fence(void *opaque, uint32_t fence) +{ + VirtIOGPU *g = opaque; + + virtio_gpu_virgl_push_async_fence(g, 0, -1, fence); +} + +static void virgl_write_context_fence(void *opaque, uint32_t ctx_id, + uint32_t ring_idx, uint64_t fence) +{ + VirtIOGPU *g = opaque; + + virtio_gpu_virgl_push_async_fence(g, ctx_id, ring_idx, fence); +} + static virgl_renderer_gl_context virgl_create_context(void *opaque, int scanout_idx, struct virgl_renderer_gl_ctx_param *params) @@ -1115,6 +1200,8 @@ void virtio_gpu_virgl_reset_scanout(VirtIOGPU *g) dpy_gfx_replace_surface(g->parent_obj.scanout[i].con, NULL); dpy_gl_scanout_disable(g->parent_obj.scanout[i].con); } + + virtio_gpu_virgl_reset_async_fences(g); } void virtio_gpu_virgl_reset(VirtIOGPU *g) @@ -1132,6 +1219,12 @@ int virtio_gpu_virgl_init(VirtIOGPU *g) if (qemu_egl_display) { virtio_gpu_3d_cbs.version = 4; virtio_gpu_3d_cbs.get_egl_display = virgl_get_egl_display; +#if VIRGL_VERSION_MAJOR >= 1 + virtio_gpu_3d_cbs.write_context_fence = virgl_write_context_fence; + flags |= VIRGL_RENDERER_ASYNC_FENCE_CB; + flags |= VIRGL_RENDERER_THREAD_SYNC; + gl->context_fence_enabled = true; +#endif } #endif #ifdef VIRGL_RENDERER_D3D11_SHARE_TEXTURE @@ -1165,6 +1258,10 @@ int virtio_gpu_virgl_init(VirtIOGPU *g) gl->cmdq_resume_bh = aio_bh_new(qemu_get_aio_context(), virtio_gpu_virgl_resume_cmdq_bh, g); + + gl->async_fence_bh = aio_bh_new(qemu_get_aio_context(), + virtio_gpu_virgl_async_fence_bh, + g); #endif return 0; diff --git a/include/hw/virtio/virtio-gpu.h b/include/hw/virtio/virtio-gpu.h index 553799b8cc72..99cc6286f473 100644 --- a/include/hw/virtio/virtio-gpu.h +++ b/include/hw/virtio/virtio-gpu.h @@ -227,6 +227,13 @@ struct VirtIOGPUClass { Error **errp); }; +struct virtio_gpu_virgl_context_fence { + uint32_t ctx_id; + int64_t ring_idx; + uint64_t fence_id; + QSLIST_ENTRY(virtio_gpu_virgl_context_fence) next; +}; + /* VirtIOGPUGL renderer states */ typedef enum { RS_START, /* starting state */ @@ -244,6 +251,11 @@ struct VirtIOGPUGL { QEMUTimer *print_stats; QEMUBH *cmdq_resume_bh; + + QEMUBH *async_fence_bh; + QSLIST_HEAD(, virtio_gpu_virgl_context_fence) async_fenceq; + + bool context_fence_enabled; }; struct VhostUserGPU { @@ -358,5 +370,6 @@ void virtio_gpu_virgl_reset_scanout(VirtIOGPU *g); void virtio_gpu_virgl_reset(VirtIOGPU *g); int virtio_gpu_virgl_init(VirtIOGPU *g); GArray *virtio_gpu_virgl_get_capsets(VirtIOGPU *g); +void virtio_gpu_virgl_reset_async_fences(VirtIOGPU *g); #endif From patchwork Sun Nov 10 22:18:37 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 13870076 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B87E5D12D5A for ; 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Sun, 10 Nov 2024 14:19:38 -0800 (PST) From: Dmitry Osipenko To: Akihiko Odaki , Huang Rui , =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Gerd Hoffmann , =?utf-8?q?Alex_Benn=C3=A9e?= , "Michael S . Tsirkin" , Paolo Bonzini Cc: Gert Wollny , qemu-devel@nongnu.org, Gurchetan Singh , Alyssa Ross , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Alex Deucher , Stefano Stabellini , =?utf-8?q?Christian_K?= =?utf-8?q?=C3=B6nig?= , Xenia Ragiadakou , Pierre-Eric Pelloux-Prayer , Honglei Huang , Julia Zhang , Chen Jiqian , Rob Clark , Yiwei Zhang , Sergio Lopez Pascual Subject: [PATCH v4 5/5] virtio-gpu: Support DRM native context Date: Mon, 11 Nov 2024 01:18:37 +0300 Message-ID: <20241110221838.2241356-6-dmitry.osipenko@collabora.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241110221838.2241356-1-dmitry.osipenko@collabora.com> References: <20241110221838.2241356-1-dmitry.osipenko@collabora.com> MIME-Version: 1.0 X-ZohoMailClient: External Received-SPF: pass client-ip=136.143.188.112; envelope-from=dmitry.osipenko@collabora.com; helo=sender4-pp-f112.zoho.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=-0.01, RCVD_IN_MSPIKE_WL=-0.01, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Add support for DRM native contexts to VirtIO-GPU. DRM context is enabled using a new virtio-gpu-gl device option "drm_native_context=on". Unlike Virgl and Venus contexts that operate on application API level, DRM native contexts work on a kernel UAPI level. This lower level results in a lightweight context implementations that yield better performance. Signed-off-by: Dmitry Osipenko --- docs/system/devices/virtio-gpu.rst | 11 +++++++++++ hw/display/virtio-gpu-gl.c | 2 ++ hw/display/virtio-gpu-virgl.c | 22 ++++++++++++++++++++++ hw/display/virtio-gpu.c | 15 +++++++++++++++ include/hw/virtio/virtio-gpu.h | 3 +++ 5 files changed, 53 insertions(+) diff --git a/docs/system/devices/virtio-gpu.rst b/docs/system/devices/virtio-gpu.rst index b7eb0fc0e727..f20c60016376 100644 --- a/docs/system/devices/virtio-gpu.rst +++ b/docs/system/devices/virtio-gpu.rst @@ -82,6 +82,17 @@ of virtio-gpu host memory window. This is typically between 256M and 8G. .. _venus: https://gitlab.freedesktop.org/virgl/venus-protocol/ +DRM native context is supported since release of `virglrenderer`_ v1.0.0 +using `drm`_ protocol. ``DRM`` virtio-gpu capability set ("capset") requires +host blob support (``hostmem`` and ``blob`` fields) and should be enabled +using ``drm_native_context`` field. The ``hostmem`` field specifies the size +of virtio-gpu host memory window. This is typically between 256M and 8G. + +.. parsed-literal:: + -device virtio-gpu-gl,hostmem=8G,blob=on,drm_native_context=on + +.. _drm: https://gitlab.freedesktop.org/virgl/virglrenderer/-/tree/main/src/drm + virtio-gpu rutabaga ------------------- diff --git a/hw/display/virtio-gpu-gl.c b/hw/display/virtio-gpu-gl.c index 53d938f23f20..23533fd8f35b 100644 --- a/hw/display/virtio-gpu-gl.c +++ b/hw/display/virtio-gpu-gl.c @@ -159,6 +159,8 @@ static Property virtio_gpu_gl_properties[] = { VIRTIO_GPU_FLAG_STATS_ENABLED, false), DEFINE_PROP_BIT("venus", VirtIOGPU, parent_obj.conf.flags, VIRTIO_GPU_FLAG_VENUS_ENABLED, false), + DEFINE_PROP_BIT("drm_native_context", VirtIOGPU, parent_obj.conf.flags, + VIRTIO_GPU_FLAG_DRM_ENABLED, false), DEFINE_PROP_END_OF_LIST(), }; diff --git a/hw/display/virtio-gpu-virgl.c b/hw/display/virtio-gpu-virgl.c index d59c7b6d48ed..5090dd717184 100644 --- a/hw/display/virtio-gpu-virgl.c +++ b/hw/display/virtio-gpu-virgl.c @@ -1236,6 +1236,19 @@ int virtio_gpu_virgl_init(VirtIOGPU *g) if (virtio_gpu_venus_enabled(g->parent_obj.conf)) { flags |= VIRGL_RENDERER_VENUS | VIRGL_RENDERER_RENDER_SERVER; } + if (virtio_gpu_drm_enabled(g->parent_obj.conf)) { + flags |= VIRGL_RENDERER_DRM; + + if (!gl->context_fence_enabled) { + /* + * Virglrenderer skips enabling DRM context support without + * enabled async-fence feature. VirtIO-GPU will initialize + * successfully, but DRM context won't be available in guest. + */ + error_report("DRM native context requires EGL display"); + return -EINVAL; + } + } #endif ret = virgl_renderer_init(g, flags, &virtio_gpu_3d_cbs); @@ -1298,5 +1311,14 @@ GArray *virtio_gpu_virgl_get_capsets(VirtIOGPU *g) } } + if (virtio_gpu_drm_enabled(g->parent_obj.conf)) { + virgl_renderer_get_cap_set(VIRTIO_GPU_CAPSET_DRM, + &capset_max_ver, + &capset_max_size); + if (capset_max_size) { + virtio_gpu_virgl_add_capset(capset_ids, VIRTIO_GPU_CAPSET_DRM); + } + } + return capset_ids; } diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c index c0570ef8565a..c1acafe6246b 100644 --- a/hw/display/virtio-gpu.c +++ b/hw/display/virtio-gpu.c @@ -1492,6 +1492,21 @@ void virtio_gpu_device_realize(DeviceState *qdev, Error **errp) #endif } + if (virtio_gpu_drm_enabled(g->parent_obj.conf)) { +#ifdef VIRGL_VERSION_MAJOR + #if VIRGL_VERSION_MAJOR >= 1 + if (!virtio_gpu_blob_enabled(g->parent_obj.conf) || + !virtio_gpu_hostmem_enabled(g->parent_obj.conf)) { + error_setg(errp, "drm requires enabled blob and hostmem options"); + return; + } + #else + error_setg(errp, "old virglrenderer, drm unsupported"); + return; + #endif +#endif + } + if (!virtio_gpu_base_device_realize(qdev, virtio_gpu_handle_ctrl_cb, virtio_gpu_handle_cursor_cb, diff --git a/include/hw/virtio/virtio-gpu.h b/include/hw/virtio/virtio-gpu.h index 99cc6286f473..f1799fcb6eee 100644 --- a/include/hw/virtio/virtio-gpu.h +++ b/include/hw/virtio/virtio-gpu.h @@ -98,6 +98,7 @@ enum virtio_gpu_base_conf_flags { VIRTIO_GPU_FLAG_CONTEXT_INIT_ENABLED, VIRTIO_GPU_FLAG_RUTABAGA_ENABLED, VIRTIO_GPU_FLAG_VENUS_ENABLED, + VIRTIO_GPU_FLAG_DRM_ENABLED, }; #define virtio_gpu_virgl_enabled(_cfg) \ @@ -118,6 +119,8 @@ enum virtio_gpu_base_conf_flags { (_cfg.hostmem > 0) #define virtio_gpu_venus_enabled(_cfg) \ (_cfg.flags & (1 << VIRTIO_GPU_FLAG_VENUS_ENABLED)) +#define virtio_gpu_drm_enabled(_cfg) \ + (_cfg.flags & (1 << VIRTIO_GPU_FLAG_DRM_ENABLED)) struct virtio_gpu_base_conf { uint32_t max_outputs;