From patchwork Fri Nov 15 16:01:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kandpal, Suraj" X-Patchwork-Id: 13876523 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 839ABD68BC6 for ; Fri, 15 Nov 2024 16:01:30 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 04DAD10E2D3; Fri, 15 Nov 2024 16:01:30 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="Ptv1rnbi"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id DA2CA10E0A3; Fri, 15 Nov 2024 16:01:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1731686489; x=1763222489; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=XsTeGkmG9i6S6OiNlnKzy5a/WQ30dIM4QBUohrPHpGQ=; b=Ptv1rnbiofWKMjJOzE1CF+MFsZ96WScwUAP6wKnrU5ayVdq2tbW2OF2w zppokHpdaJyixhsex373RpCR/6BUK1uso33/x4RJIWpSNNe91rzHE3oCi RcUddFW/4pg+58GPJXzVo1n5cTxCf4JVrQBMJfA4jZ2Lw9vV3rnRp1UJi 1fz2hOlZC7qlS1IFYRS+h7fj+SE4l03iX14Pmj0tZ90BZY62dbx3PI/xq mj5DAoRV/G7yYbx7s4LYEzNEMZo69uoi5n7vdYLA+CQ5C6s5wkviHlZXK xvfPH5/Z460zHNVFZlL8LWCAzAV6vKhqmUEsm23cPV8juec8BvQKXkBAu Q==; X-CSE-ConnectionGUID: 7slcn0KVTDK6c7rUvJQYIQ== X-CSE-MsgGUID: 10xRveSaRhifPy60zeJzHQ== X-IronPort-AV: E=McAfee;i="6700,10204,11257"; a="31456777" X-IronPort-AV: E=Sophos;i="6.12,157,1728975600"; d="scan'208";a="31456777" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Nov 2024 08:01:28 -0800 X-CSE-ConnectionGUID: 5aB7TvDVSGyc6sexrUXG+w== X-CSE-MsgGUID: CMJb3B75S46386j9M9U7Lg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,157,1728975600"; d="scan'208";a="88760617" Received: from kandpal-x299-ud4-pro.iind.intel.com ([10.190.239.10]) by orviesa006.jf.intel.com with ESMTP; 15 Nov 2024 08:01:26 -0800 From: Suraj Kandpal To: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org Cc: vinod.govindapillai@intel.com, jani.nikula@intel.com, Suraj Kandpal Subject: [PATCH 1/6] drm/i915/wm: Initialize max_latency variable to appropriate value Date: Fri, 15 Nov 2024 21:31:11 +0530 Message-Id: <20241115160116.1436521-1-suraj.kandpal@intel.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Initialize max_latency variable to LNL_PKG_C_LATENCY_MASK which helps to eliminate the else block and make the whole code a lot cleaner. While we are at it group the initialized variable together. Signed-off-by: Suraj Kandpal --- drivers/gpu/drm/i915/display/skl_watermark.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c index 1a4c1fa24820..a49e8915346e 100644 --- a/drivers/gpu/drm/i915/display/skl_watermark.c +++ b/drivers/gpu/drm/i915/display/skl_watermark.c @@ -2857,9 +2857,8 @@ static int skl_wm_add_affected_planes(struct intel_atomic_state *state, static void skl_program_dpkgc_latency(struct drm_i915_private *i915, bool enable_dpkgc) { - u32 max_latency = 0; + u32 max_latency = LNL_PKG_C_LATENCY_MASK, added_wake_time = 0; u32 clear = 0, val = 0; - u32 added_wake_time = 0; if (DISPLAY_VER(i915) < 20) return; @@ -2870,9 +2869,6 @@ skl_program_dpkgc_latency(struct drm_i915_private *i915, bool enable_dpkgc) max_latency = LNL_PKG_C_LATENCY_MASK; added_wake_time = DSB_EXE_TIME + i915->display.sagv.block_time_us; - } else { - max_latency = LNL_PKG_C_LATENCY_MASK; - added_wake_time = 0; } clear |= LNL_ADDED_WAKE_TIME_MASK | LNL_PKG_C_LATENCY_MASK; From patchwork Fri Nov 15 16:01:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kandpal, Suraj" X-Patchwork-Id: 13876524 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CE90FD68BCB for ; Fri, 15 Nov 2024 16:01:31 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1DA9B10E0ED; Fri, 15 Nov 2024 16:01:31 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="WaMSWHHh"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id EBA1210E0ED; Fri, 15 Nov 2024 16:01:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1731686490; x=1763222490; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Ug++sS9rj9nF1Dvu5/mwNdQeqr//RhiXelmvU/bM+G8=; b=WaMSWHHhznuABN+0aTbAuPhJuivHcNuEv51Vf1fRZI4lldwUtPJ8aTDg 8HBjG7qETjZYNumLW/Z84Ac6cpPIU/4R2G42nQRlgVR2YqWe40S34LfZD 8+6OTSfhS5bll5QK8APGComN+kJeIF/pWjOnIQCPCXVj3FhimcY4XD02m FrL2ybqmbRJxZzHMuHdxFo0sPZtMSbEXax5o1OYOxRGGaGS1QZYbAFPt/ mr47QvTFH8uRwOeYn3zTM9wqKvzARScZ3jZolNyCqwZQ6esk3oQJ0WAPy 7xQviuxhV+O1cAFlm6nRHJmSH9UIrwW8LUxIRGutYdKFnO0m26yTXQjk0 Q==; X-CSE-ConnectionGUID: DoPuoFcYQJa5tq0J294bGw== X-CSE-MsgGUID: MgeA+IZ7TkS8Bfr20NR0Gg== X-IronPort-AV: E=McAfee;i="6700,10204,11257"; a="31456782" X-IronPort-AV: E=Sophos;i="6.12,157,1728975600"; d="scan'208";a="31456782" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Nov 2024 08:01:30 -0800 X-CSE-ConnectionGUID: +hXS9Ec9Tsm2BdkBgkx4Xw== X-CSE-MsgGUID: cANoJN/UTFigRDZUp0aJlA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,157,1728975600"; d="scan'208";a="88760628" Received: from kandpal-x299-ud4-pro.iind.intel.com ([10.190.239.10]) by orviesa006.jf.intel.com with ESMTP; 15 Nov 2024 08:01:28 -0800 From: Suraj Kandpal To: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org Cc: vinod.govindapillai@intel.com, jani.nikula@intel.com, Suraj Kandpal Subject: [PATCH 2/6] drm/i915/wm: Refactor dpkgc value prepration Date: Fri, 15 Nov 2024 21:31:12 +0530 Message-Id: <20241115160116.1436521-2-suraj.kandpal@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241115160116.1436521-1-suraj.kandpal@intel.com> References: <20241115160116.1436521-1-suraj.kandpal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Refactor the value getting prepped to be written into the PKG_C_LATENCY register by ORing the REG_FIELD_PREP values instead of having val getiing operated on twice. We dont need the clear and val variables to be initialized. Lets also group all the initialized variable together. Signed-off-by: Suraj Kandpal --- drivers/gpu/drm/i915/display/skl_watermark.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c index a49e8915346e..6d5f64ed52ed 100644 --- a/drivers/gpu/drm/i915/display/skl_watermark.c +++ b/drivers/gpu/drm/i915/display/skl_watermark.c @@ -2858,7 +2858,7 @@ static void skl_program_dpkgc_latency(struct drm_i915_private *i915, bool enable_dpkgc) { u32 max_latency = LNL_PKG_C_LATENCY_MASK, added_wake_time = 0; - u32 clear = 0, val = 0; + u32 clear, val; if (DISPLAY_VER(i915) < 20) return; @@ -2871,9 +2871,9 @@ skl_program_dpkgc_latency(struct drm_i915_private *i915, bool enable_dpkgc) i915->display.sagv.block_time_us; } - clear |= LNL_ADDED_WAKE_TIME_MASK | LNL_PKG_C_LATENCY_MASK; - val |= REG_FIELD_PREP(LNL_PKG_C_LATENCY_MASK, max_latency); - val |= REG_FIELD_PREP(LNL_ADDED_WAKE_TIME_MASK, added_wake_time); + clear = LNL_ADDED_WAKE_TIME_MASK | LNL_PKG_C_LATENCY_MASK; + val = REG_FIELD_PREP(LNL_PKG_C_LATENCY_MASK, max_latency) | + REG_FIELD_PREP(LNL_ADDED_WAKE_TIME_MASK, added_wake_time); intel_uncore_rmw(&i915->uncore, LNL_PKG_C_LATENCY, clear, val); } From patchwork Fri Nov 15 16:01:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kandpal, Suraj" X-Patchwork-Id: 13876525 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8B711D68BCC for ; Fri, 15 Nov 2024 16:01:33 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 27C7E10E896; Fri, 15 Nov 2024 16:01:33 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="MDcOS7/7"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id D418610E895; Fri, 15 Nov 2024 16:01:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1731686492; x=1763222492; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=6iJFiR9p/HrjgFXkXnks++/sgGTDjsHgouZLDIkIFsU=; b=MDcOS7/7NEfRDWCj8wmmLVBP5hl8uRx0MdkyRXV2spFJYekFl3MDPMZA QDGCysKZuu/z4gOyrY82hYJC80ZacIRO/nvDo/UPOEUE81+XZNl4MbSb0 FoxYtxXRDeROgPR9RAEjnCMWBAYKNJAHHZ6cttGBqaxSy7jpUGUUI97LF KvFysJT0QSx1LnpNhFuUF5PFd3bl5xLxYDT7RZWmcdsXV0i308XBGcDTl mmzNYcXov2WXcef5qWUuapnEY83N5UfHWVZW1fORgVkKFHorJthopDY5R j3lumavl3eclDUzzqxF8AS011ye7qLW9zedQmRxlgMECXvebzbNW6cLjn Q==; X-CSE-ConnectionGUID: CLyuHhJOSvW5yY2byTxhGQ== X-CSE-MsgGUID: 8j846vwcRamDBxXGx+fKaA== X-IronPort-AV: E=McAfee;i="6700,10204,11257"; a="31456788" X-IronPort-AV: E=Sophos;i="6.12,157,1728975600"; d="scan'208";a="31456788" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Nov 2024 08:01:32 -0800 X-CSE-ConnectionGUID: JAPx/FXuSZGXiTgtKEe0WQ== X-CSE-MsgGUID: K2WLFkCQQ6OFuF7NScL2GA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,157,1728975600"; d="scan'208";a="88760639" Received: from kandpal-x299-ud4-pro.iind.intel.com ([10.190.239.10]) by orviesa006.jf.intel.com with ESMTP; 15 Nov 2024 08:01:30 -0800 From: Suraj Kandpal To: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org Cc: vinod.govindapillai@intel.com, jani.nikula@intel.com, Suraj Kandpal Subject: [PATCH 3/6] drm/i915/wm: Rename enable_dpkgc variable Date: Fri, 15 Nov 2024 21:31:13 +0530 Message-Id: <20241115160116.1436521-3-suraj.kandpal@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241115160116.1436521-1-suraj.kandpal@intel.com> References: <20241115160116.1436521-1-suraj.kandpal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Rename the enable_dpkgc variable to make it more clear what it represents which is that if we are in fixed refresh rate or not. Signed-off-by: Suraj Kandpal --- drivers/gpu/drm/i915/display/skl_watermark.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c index 6d5f64ed52ed..9ce3b5580df4 100644 --- a/drivers/gpu/drm/i915/display/skl_watermark.c +++ b/drivers/gpu/drm/i915/display/skl_watermark.c @@ -2855,7 +2855,8 @@ static int skl_wm_add_affected_planes(struct intel_atomic_state *state, * Program PKG_C_LATENCY Added Wake Time = 0 */ static void -skl_program_dpkgc_latency(struct drm_i915_private *i915, bool enable_dpkgc) +skl_program_dpkgc_latency(struct drm_i915_private *i915, + bool fixed_refresh_rate) { u32 max_latency = LNL_PKG_C_LATENCY_MASK, added_wake_time = 0; u32 clear, val; @@ -2863,7 +2864,7 @@ skl_program_dpkgc_latency(struct drm_i915_private *i915, bool enable_dpkgc) if (DISPLAY_VER(i915) < 20) return; - if (enable_dpkgc) { + if (fixed_refresh_rate) { max_latency = skl_watermark_max_latency(i915, 1); if (max_latency == 0) max_latency = LNL_PKG_C_LATENCY_MASK; From patchwork Fri Nov 15 16:01:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kandpal, Suraj" X-Patchwork-Id: 13876526 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 753B4D68BCB for ; Fri, 15 Nov 2024 16:01:35 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0B35F10E898; Fri, 15 Nov 2024 16:01:35 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="GqkJekwD"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id AF95210E898; Fri, 15 Nov 2024 16:01:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1731686494; x=1763222494; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=dcxyCqhmmB/xtS+6E8n19rUe+6IBt26o+GVJkNp51cI=; b=GqkJekwDevPKbmgYGonUZCAta8Wqi4dw6Ra0YQ0LG8pox/ut67U+gCgB GgfE93rSxdFtHlzmDUNEbffnU09sgLfNgMuZYuxw6uz4+TOkp+wXJwjmd 4YHZgZugotNSGhZiExbE7aAsw0gdzZThiDyumrXcMeXMYlfrVj79UUGjg VpGVU+KgOH4ybAjYGg5fQKxRoqTT9Q7FZQbql7UmuhFYh7wJC7zr/cMPr vhJcc32lsKht5d4CTmLEP5wxY2ZOt8kfR8LS5b2q/z7oqlVLaaehHn2QP q2mUD2CXPE/fTMcv2U/4NphPSyEgIA2xzSaHJXu0oTEhUBqDxjjpYtDtD A==; X-CSE-ConnectionGUID: XKBtze2GQmqf39wn1JWOjA== X-CSE-MsgGUID: 6kgt5kFfRHux6fuGpLggag== X-IronPort-AV: E=McAfee;i="6700,10204,11257"; a="31456791" X-IronPort-AV: E=Sophos;i="6.12,157,1728975600"; d="scan'208";a="31456791" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Nov 2024 08:01:34 -0800 X-CSE-ConnectionGUID: E+Y6o2LFRkexG+meLicDNw== X-CSE-MsgGUID: UIjY540hQjKrT7MohApooQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,157,1728975600"; d="scan'208";a="88760656" Received: from kandpal-x299-ud4-pro.iind.intel.com ([10.190.239.10]) by orviesa006.jf.intel.com with ESMTP; 15 Nov 2024 08:01:32 -0800 From: Suraj Kandpal To: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org Cc: vinod.govindapillai@intel.com, jani.nikula@intel.com, Suraj Kandpal Subject: [PATCH 4/6] drm/i915/wm: Use intel_display structure in DPKGC code Date: Fri, 15 Nov 2024 21:31:14 +0530 Message-Id: <20241115160116.1436521-4-suraj.kandpal@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241115160116.1436521-1-suraj.kandpal@intel.com> References: <20241115160116.1436521-1-suraj.kandpal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Use intel_display for DPKGC code wherever we can. While we are at it also use intel_de_rmw instead of intel_uncore_rmw as we really don't need the internal uncore_rmw_function. Signed-off-by: Suraj Kandpal --- drivers/gpu/drm/i915/display/skl_watermark.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c index 9ce3b5580df4..2deb964daed3 100644 --- a/drivers/gpu/drm/i915/display/skl_watermark.c +++ b/drivers/gpu/drm/i915/display/skl_watermark.c @@ -2858,10 +2858,11 @@ static void skl_program_dpkgc_latency(struct drm_i915_private *i915, bool fixed_refresh_rate) { + struct intel_display *display = to_intel_display(&i915->drm); u32 max_latency = LNL_PKG_C_LATENCY_MASK, added_wake_time = 0; u32 clear, val; - if (DISPLAY_VER(i915) < 20) + if (DISPLAY_VER(display) < 20) return; if (fixed_refresh_rate) { @@ -2869,14 +2870,14 @@ skl_program_dpkgc_latency(struct drm_i915_private *i915, if (max_latency == 0) max_latency = LNL_PKG_C_LATENCY_MASK; added_wake_time = DSB_EXE_TIME + - i915->display.sagv.block_time_us; + display->sagv.block_time_us; } clear = LNL_ADDED_WAKE_TIME_MASK | LNL_PKG_C_LATENCY_MASK; val = REG_FIELD_PREP(LNL_PKG_C_LATENCY_MASK, max_latency) | REG_FIELD_PREP(LNL_ADDED_WAKE_TIME_MASK, added_wake_time); - intel_uncore_rmw(&i915->uncore, LNL_PKG_C_LATENCY, clear, val); + intel_de_rmw(display, LNL_PKG_C_LATENCY, clear, val); } static int From patchwork Fri Nov 15 16:01:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kandpal, Suraj" X-Patchwork-Id: 13876527 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8B975D68BCC for ; Fri, 15 Nov 2024 16:01:37 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2615510E89B; Fri, 15 Nov 2024 16:01:37 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="OOED4/ui"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id D5B9410E89B; Fri, 15 Nov 2024 16:01:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1731686496; x=1763222496; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=I9Hu/nGEJRquv7nayy73nEqmqZcXoWDKqrw6xGt5VRk=; b=OOED4/uioK2+24ptwXkiN90a1LATAwhYIAo20ZYEDHiRp5+qC5MntyeN rlylZ5uvzxHFX1p7fij26MDn3u8I+9/TG7WIQG6J1OGMtx2KYbyO9RPfR oyn4ezQeYBQQTBkS4gGtmjtZXPWPCNYkra/RRF40kS8Ethe3Kvcsi5PCM dpiLYsjmHNHfRFCySkS9fillJfbXbtazppQaAUozirf9eTrRdoMlXWAYa OLfaqeAcBZAlnciPCh2Kev+y98cbnxrN385OXa8SZ/8ps4pUpnqnazRkU Q2F7RQ6mm73p1XsbA1I2ygDLFibFdJ+y+6ZuSieG0W0GSp3qxfbg80fqF A==; X-CSE-ConnectionGUID: RF2+KRaaT+eVKkc6/i88yg== X-CSE-MsgGUID: dRPj2AI6TqeZiftoN8B4Hg== X-IronPort-AV: E=McAfee;i="6700,10204,11257"; a="31456795" X-IronPort-AV: E=Sophos;i="6.12,157,1728975600"; d="scan'208";a="31456795" Received: from orviesa006.jf.intel.com ([10.64.159.146]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Nov 2024 08:01:36 -0800 X-CSE-ConnectionGUID: auNY6muGSeWp1Jgu7mv0AQ== X-CSE-MsgGUID: r6G4Xd+/RryCsv/XePl84g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,157,1728975600"; d="scan'208";a="88760667" Received: from kandpal-x299-ud4-pro.iind.intel.com ([10.190.239.10]) by orviesa006.jf.intel.com with ESMTP; 15 Nov 2024 08:01:34 -0800 From: Suraj Kandpal To: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org Cc: vinod.govindapillai@intel.com, jani.nikula@intel.com, Suraj Kandpal Subject: [PATCH 5/6] drm/i915/display: Refactor DPKGC code to call it from atomic_commit_tail Date: Fri, 15 Nov 2024 21:31:15 +0530 Message-Id: <20241115160116.1436521-5-suraj.kandpal@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241115160116.1436521-1-suraj.kandpal@intel.com> References: <20241115160116.1436521-1-suraj.kandpal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Refactor the code to check the fixed refresh rate condition in the dpkgc function itself and call it from intel_atomic_commit_tail so that we have all the required values specially linetime which is computed after intel_wm_compute, this will also help implement some WA's which requires linetime. This also avoid writing into any of the registers while we are in compute_config phase. Signed-off-by: Suraj Kandpal --- drivers/gpu/drm/i915/display/intel_display.c | 2 ++ drivers/gpu/drm/i915/display/skl_watermark.c | 27 +++++++++++--------- drivers/gpu/drm/i915/display/skl_watermark.h | 1 + 3 files changed, 18 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index e790a2de5b3d..d1880e0a5d29 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -7826,6 +7826,8 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state) /* Now enable the clocks, plane, pipe, and connectors that we set up. */ dev_priv->display.funcs.display->commit_modeset_enables(state); + intel_program_dpkgc_latency(state); + if (state->modeset) intel_set_cdclk_post_plane_update(state); diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c index 2deb964daed3..0cc843314358 100644 --- a/drivers/gpu/drm/i915/display/skl_watermark.c +++ b/drivers/gpu/drm/i915/display/skl_watermark.c @@ -2854,17 +2854,28 @@ static int skl_wm_add_affected_planes(struct intel_atomic_state *state, * Program DEEP PKG_C_LATENCY Pkg C with all 1's. * Program PKG_C_LATENCY Added Wake Time = 0 */ -static void -skl_program_dpkgc_latency(struct drm_i915_private *i915, - bool fixed_refresh_rate) +void +intel_program_dpkgc_latency(struct intel_atomic_state *state) { - struct intel_display *display = to_intel_display(&i915->drm); + struct intel_display *display = to_intel_display(state); + struct drm_i915_private *i915 = to_i915(display->drm); + struct intel_crtc *crtc; + struct intel_crtc_state *new_crtc_state; u32 max_latency = LNL_PKG_C_LATENCY_MASK, added_wake_time = 0; u32 clear, val; + bool fixed_refresh_rate = false; + int i; if (DISPLAY_VER(display) < 20) return; + for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) { + if (!new_crtc_state->vrr.enable || + (new_crtc_state->vrr.vmin == new_crtc_state->vrr.vmax && + new_crtc_state->vrr.vmin == new_crtc_state->vrr.flipline)) + fixed_refresh_rate = true; + } + if (fixed_refresh_rate) { max_latency = skl_watermark_max_latency(i915, 1); if (max_latency == 0) @@ -2886,7 +2897,6 @@ skl_compute_wm(struct intel_atomic_state *state) struct intel_crtc *crtc; struct intel_crtc_state __maybe_unused *new_crtc_state; int ret, i; - bool enable_dpkgc = false; for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) { ret = skl_build_pipe_wm(state, crtc); @@ -2911,15 +2921,8 @@ skl_compute_wm(struct intel_atomic_state *state) ret = skl_wm_add_affected_planes(state, crtc); if (ret) return ret; - - if ((new_crtc_state->vrr.vmin == new_crtc_state->vrr.vmax && - new_crtc_state->vrr.vmin == new_crtc_state->vrr.flipline) || - !new_crtc_state->vrr.enable) - enable_dpkgc = true; } - skl_program_dpkgc_latency(to_i915(state->base.dev), enable_dpkgc); - skl_print_wm_changes(state); return 0; diff --git a/drivers/gpu/drm/i915/display/skl_watermark.h b/drivers/gpu/drm/i915/display/skl_watermark.h index e73baec94873..35a1df7336e8 100644 --- a/drivers/gpu/drm/i915/display/skl_watermark.h +++ b/drivers/gpu/drm/i915/display/skl_watermark.h @@ -87,6 +87,7 @@ void intel_dbuf_mdclk_cdclk_ratio_update(struct drm_i915_private *i915, int ratio, bool joined_mbus); void intel_dbuf_mbus_pre_ddb_update(struct intel_atomic_state *state); void intel_dbuf_mbus_post_ddb_update(struct intel_atomic_state *state); +void intel_program_dpkgc_latency(struct intel_atomic_state *state); #endif /* __SKL_WATERMARK_H__ */ From patchwork Fri Nov 15 16:01:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kandpal, Suraj" X-Patchwork-Id: 13876528 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A89A0D68BCD for ; Fri, 15 Nov 2024 16:01:38 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 511BA10E89C; Fri, 15 Nov 2024 16:01:38 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="USDPnuAi"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id E586210E89C; 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15 Nov 2024 08:01:38 -0800 X-CSE-ConnectionGUID: lTh8SKypRm6xPJgEiELbWA== X-CSE-MsgGUID: //Q4MuYkSY+uWT5lDk+cIw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,157,1728975600"; d="scan'208";a="88760685" Received: from kandpal-x299-ud4-pro.iind.intel.com ([10.190.239.10]) by orviesa006.jf.intel.com with ESMTP; 15 Nov 2024 08:01:36 -0800 From: Suraj Kandpal To: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org Cc: vinod.govindapillai@intel.com, jani.nikula@intel.com, Suraj Kandpal Subject: [PATCH 6/6] drm/i915/wm: Modify latency programmed into PKG_C_LATENCY Date: Fri, 15 Nov 2024 21:31:16 +0530 Message-Id: <20241115160116.1436521-6-suraj.kandpal@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241115160116.1436521-1-suraj.kandpal@intel.com> References: <20241115160116.1436521-1-suraj.kandpal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Increase the latency programmed into PKG_C_LATENCY latency to be a multiple of line time which is written into WM_LINETIME. --v2 -Fix commit subject line [Sai Teja] -Use individual DISPLAY_VER checks instead of range [Sai Teja] -Initialize max_linetime [Sai Teja] --v3 -take into account the scenario when adjusted_latency is 0 [Vinod] --v4 -rename adjusted_latency to latency [Mitul] -fix the condition in which dpkgc is disabled [Vinod] --v5 -Add check to see if max_linetime is 0 [Vinod] WA: 22020299601 Signed-off-by: Suraj Kandpal --- drivers/gpu/drm/i915/display/skl_watermark.c | 20 +++++++++++++++----- 1 file changed, 15 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c index 0cc843314358..e9a60d54afef 100644 --- a/drivers/gpu/drm/i915/display/skl_watermark.c +++ b/drivers/gpu/drm/i915/display/skl_watermark.c @@ -2861,7 +2861,7 @@ intel_program_dpkgc_latency(struct intel_atomic_state *state) struct drm_i915_private *i915 = to_i915(display->drm); struct intel_crtc *crtc; struct intel_crtc_state *new_crtc_state; - u32 max_latency = LNL_PKG_C_LATENCY_MASK, added_wake_time = 0; + u32 latency = LNL_PKG_C_LATENCY_MASK, added_wake_time = 0, max_linetime = 0; u32 clear, val; bool fixed_refresh_rate = false; int i; @@ -2874,18 +2874,28 @@ intel_program_dpkgc_latency(struct intel_atomic_state *state) (new_crtc_state->vrr.vmin == new_crtc_state->vrr.vmax && new_crtc_state->vrr.vmin == new_crtc_state->vrr.flipline)) fixed_refresh_rate = true; + + max_linetime = max(new_crtc_state->linetime, max_linetime); } if (fixed_refresh_rate) { - max_latency = skl_watermark_max_latency(i915, 1); - if (max_latency == 0) - max_latency = LNL_PKG_C_LATENCY_MASK; + latency = skl_watermark_max_latency(i915, 1); + /* Wa_22020299601 */ + if (latency) { + if ((DISPLAY_VER(display) == 20 || DISPLAY_VER(display) == 30) && + max_linetime) + latency = max_linetime * + DIV_ROUND_UP(latency, max_linetime); + } else { + latency = LNL_PKG_C_LATENCY_MASK; + } + added_wake_time = DSB_EXE_TIME + display->sagv.block_time_us; } clear = LNL_ADDED_WAKE_TIME_MASK | LNL_PKG_C_LATENCY_MASK; - val = REG_FIELD_PREP(LNL_PKG_C_LATENCY_MASK, max_latency) | + val = REG_FIELD_PREP(LNL_PKG_C_LATENCY_MASK, latency) | REG_FIELD_PREP(LNL_ADDED_WAKE_TIME_MASK, added_wake_time); intel_de_rmw(display, LNL_PKG_C_LATENCY, clear, val);