From patchwork Fri Nov 15 18:40:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ira Weiny X-Patchwork-Id: 13876681 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9373C1D47A0 for ; Fri, 15 Nov 2024 18:40:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.19 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731696050; cv=none; b=Syq6wOKewrV/trBa/hlfo7tphmg4PFHq8QIP1wBo95IPI9E9go3Xz8gciTrWRLvMqcaYDMTpaVu5qdOacEpUngeIS5xyhuuuW4XOmWY8pS+ZqKLbl9bZ7k8rCbpZPES2nHaXm9c1tZVMAGxtKK2W7okEV6pc9gCS15PyNz0jvZk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731696050; c=relaxed/simple; bh=wD+XIhKFNUIAbTLMKPo9wsnzKTJTpx4Wre2NG4iL7dw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=AAvFJnSShsFfXmNZN5059Ybhxj+EqjNxiqc5XIR1+oRxj7TmVW3sceZ+n/x1Y0H1F6g4KnGjdCrLSpDSEhxMwVD6ajpjdJCvYjtOdff/Sfrq9hd6n5sk3rJbhiV4aR8t0mvS3hWFzG7fqmiD7ZHZkhLLBa9goskDSwZlsXc4Kl0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=as06cAup; arc=none smtp.client-ip=192.198.163.19 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="as06cAup" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1731696048; x=1763232048; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=wD+XIhKFNUIAbTLMKPo9wsnzKTJTpx4Wre2NG4iL7dw=; b=as06cAupiJhBLSh/eO163zQn9T+i8zp398obTFb4Bai3Jadtv2qMi3sp KW1tj/lTvx6/cVBh5u+7lPMe8G/ei81gIU37Hlx+mpI+gEdzi4HXBXsRW ndoJSvX7jyi4IVXp96gLM4bvjJKL2tsPpM6Due3tmFLYrNShZBPMvomaD mh5EL7VFe19AcGQvMJD4QYnsUm855kgjBlTNinHEXee3ajsjT22p75xzy VO3XhGEx0xBUSSM8OD3KTqty6Cby2yC7ffSrX7YmJCbGHlThm+jzQZHDP 6GquSRCdkYhtXfdLW3hTvUHZU8ZcHkCWWeedhflGPW4Mcd2qwr/1L7j0O w==; X-CSE-ConnectionGUID: LC4arCmSQD+LMqc5NCteiQ== X-CSE-MsgGUID: AO7vYlalTkOcbhrIOYvVUA== X-IronPort-AV: E=McAfee;i="6700,10204,11257"; a="31127881" X-IronPort-AV: E=Sophos;i="6.12,157,1728975600"; d="scan'208";a="31127881" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by fmvoesa113.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Nov 2024 10:40:38 -0800 X-CSE-ConnectionGUID: NGhgHLS8SbeQGBg5NjRW2A== X-CSE-MsgGUID: UiAMGmC3ScCQOdmnacoc3Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,157,1728975600"; d="scan'208";a="88522607" Received: from ehanks-mobl1.amr.corp.intel.com (HELO localhost) ([10.125.108.112]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Nov 2024 10:40:38 -0800 From: Ira Weiny Date: Fri, 15 Nov 2024 12:40:34 -0600 Subject: [ndctl PATCH v3 1/9] ndctl/cxl-events: Don't fail test until event counts are reported Precedence: bulk X-Mailing-List: linux-cxl@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241115-dcd-region2-v3-1-326cd4e34dcd@intel.com> References: <20241115-dcd-region2-v3-0-326cd4e34dcd@intel.com> In-Reply-To: <20241115-dcd-region2-v3-0-326cd4e34dcd@intel.com> To: Alison Schofield Cc: Vishal Verma , Jonathan Cameron , Fan Ni , Navneet Singh , Dan Williams , Dave Jiang , linux-cxl@vger.kernel.org, nvdimm@lists.linux.dev, Ira Weiny X-Mailer: b4 0.15-dev-2a633 X-Developer-Signature: v=1; a=ed25519-sha256; t=1731696034; l=1494; i=ira.weiny@intel.com; s=20221211; h=from:subject:message-id; bh=wD+XIhKFNUIAbTLMKPo9wsnzKTJTpx4Wre2NG4iL7dw=; b=pZbc8695CQScCgXAju+hnBt8dbNXI8x56/nXhIcoXDTbU5r/I6uqlvyHyrLGuul/znuSUh0hM gsgOaam6IJQBCReA/QBioTZ96GR8cfjoHwYz3GQRu3Jgs/IbNLwCqar X-Developer-Key: i=ira.weiny@intel.com; a=ed25519; pk=noldbkG+Wp1qXRrrkfY1QJpDf7QsOEthbOT7vm0PqsE= In testing DCD event modifications a failed cxl-event test lacked details on the event counts. This was because the greps were failing the test rather than the check against the counts. Suppress the grep failure and rely on event count checks for pass/fail of the test. Reviewed-by: Dave Jiang Signed-off-by: Ira Weiny --- test/cxl-events.sh | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/test/cxl-events.sh b/test/cxl-events.sh index ff4f3fdff1d8f6fd80f093126a27bf14b52d167f..c216d6aa9148c938a649cb22656127b3df440039 100644 --- a/test/cxl-events.sh +++ b/test/cxl-events.sh @@ -71,10 +71,10 @@ echo 0 > /sys/kernel/tracing/tracing_on echo "TEST: Events seen" trace_out=$(cat /sys/kernel/tracing/trace) -num_overflow=$(grep -c "cxl_overflow" <<< "${trace_out}") -num_fatal=$(grep -c "log=Fatal" <<< "${trace_out}") -num_failure=$(grep -c "log=Failure" <<< "${trace_out}") -num_info=$(grep -c "log=Informational" <<< "${trace_out}") +num_overflow=$(grep -c "cxl_overflow" <<< "${trace_out}" || true) +num_fatal=$(grep -c "log=Fatal" <<< "${trace_out}" || true) +num_failure=$(grep -c "log=Failure" <<< "${trace_out}" || true) +num_info=$(grep -c "log=Informational" <<< "${trace_out}" || true) echo " LOG (Expected) : (Found)" echo " overflow ($num_overflow_expected) : $num_overflow" echo " Fatal ($num_fatal_expected) : $num_fatal" From patchwork Fri Nov 15 18:40:35 2024 Content-Type: text/plain; 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15 Nov 2024 10:40:40 -0800 From: Ira Weiny Date: Fri, 15 Nov 2024 12:40:35 -0600 Subject: [ndctl PATCH v3 2/9] ndctl/cxl/region: Report max size for region creation Precedence: bulk X-Mailing-List: linux-cxl@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241115-dcd-region2-v3-2-326cd4e34dcd@intel.com> References: <20241115-dcd-region2-v3-0-326cd4e34dcd@intel.com> In-Reply-To: <20241115-dcd-region2-v3-0-326cd4e34dcd@intel.com> To: Alison Schofield Cc: Vishal Verma , Jonathan Cameron , Fan Ni , Navneet Singh , Dan Williams , Dave Jiang , linux-cxl@vger.kernel.org, nvdimm@lists.linux.dev, Ira Weiny X-Mailer: b4 0.15-dev-2a633 X-Developer-Signature: v=1; a=ed25519-sha256; t=1731696034; l=1059; i=ira.weiny@intel.com; s=20221211; h=from:subject:message-id; bh=YMdKA2RGM+4rycwcwrUUs1tZXNNeH8g15UUiSnncD/0=; b=r8ekWtTXC9pC6cyWm5iaOpiAcxorlil3uwUUOqYRJAeYbxbUXLLyXZV3ngj0dxB8wgUBZ3era z5EIf7ieysuDzdg/6538/1O2/pnmmc0HJsAFTJooXib7ImSv+Qvhbza X-Developer-Key: i=ira.weiny@intel.com; a=ed25519; pk=noldbkG+Wp1qXRrrkfY1QJpDf7QsOEthbOT7vm0PqsE= When creating a region if the size exceeds the max an error is printed. However, the max available space is not reported which makes it harder to determine what is wrong. Add the max size available to the output error. Reviewed-by: Dave Jiang Reviewed-by: Fan Ni Signed-off-by: Ira Weiny --- cxl/region.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/cxl/region.c b/cxl/region.c index 96aa5931d2281c7577679b7f6165218964fa0425..207cf2d003148992255c715f286bc0f38de2ca84 100644 --- a/cxl/region.c +++ b/cxl/region.c @@ -677,8 +677,8 @@ static int create_region(struct cxl_ctx *ctx, int *count, } if (!default_size && size > max_extent) { log_err(&rl, - "%s: region size %#lx exceeds max available space\n", - cxl_decoder_get_devname(p->root_decoder), size); + "%s: region size %#lx exceeds max available space (%#lx)\n", + cxl_decoder_get_devname(p->root_decoder), size, max_extent); return -ENOSPC; } From patchwork Fri Nov 15 18:40:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ira Weiny X-Patchwork-Id: 13876683 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8CF4A1D47A0 for ; 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a="31127891" X-IronPort-AV: E=Sophos;i="6.12,157,1728975600"; d="scan'208";a="31127891" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by fmvoesa113.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Nov 2024 10:40:43 -0800 X-CSE-ConnectionGUID: dAwR9vm+RFeOkHCQBEZi6g== X-CSE-MsgGUID: N1gTmxJ5RDqeo2FeBSoKOQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,157,1728975600"; d="scan'208";a="88522617" Received: from ehanks-mobl1.amr.corp.intel.com (HELO localhost) ([10.125.108.112]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Nov 2024 10:40:42 -0800 From: Ira Weiny Date: Fri, 15 Nov 2024 12:40:36 -0600 Subject: [ndctl PATCH v3 3/9] libcxl: Separate region mode from decoder mode Precedence: bulk X-Mailing-List: linux-cxl@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241115-dcd-region2-v3-3-326cd4e34dcd@intel.com> References: <20241115-dcd-region2-v3-0-326cd4e34dcd@intel.com> In-Reply-To: <20241115-dcd-region2-v3-0-326cd4e34dcd@intel.com> To: Alison Schofield Cc: Vishal Verma , Jonathan Cameron , Fan Ni , Navneet Singh , Dan Williams , Dave Jiang , linux-cxl@vger.kernel.org, nvdimm@lists.linux.dev, Ira Weiny X-Mailer: b4 0.15-dev-2a633 X-Developer-Signature: v=1; a=ed25519-sha256; t=1731696034; l=9745; i=ira.weiny@intel.com; s=20221211; h=from:subject:message-id; bh=nX4+TBmzT/8S/6xSSe7TLFYuuRvqvwN/md0J6OgzWuI=; b=BJMvuXuv3JOZyWsNfYSFz8WNEk/50j06Xziu8Hzs0oUtdWC6pyDxHQTsFYosl6Vih1I+6nL5d Ak3xLAi9sjKBgx3t22R7da1Jqq27qVbgKpzwYH5t8cpctXl0tjxhx+l X-Developer-Key: i=ira.weiny@intel.com; a=ed25519; pk=noldbkG+Wp1qXRrrkfY1QJpDf7QsOEthbOT7vm0PqsE= With the introduction of DCD, region mode and decoder mode no longer remain a 1:1 relation. An interleaved region may be made up of Dynamic Capacity partitions with different indexes on each of the target devices. Introduce a new region mode enumeration and access function to libcxl. To maintain compatibility with existing software the region mode values are defined the same as the current decoder mode. In addition cxl_region_get_mode() is retained. Signed-off-by: Ira Weiny --- Changes: [Alison/iweiny: Ensure correct libcxl symbol export version] [Alison/iweiny: Add new libcxl interfaces to documentation] [iweiny: Add deprecated cxl_region_get_mode() documentation] --- Documentation/cxl/lib/libcxl.txt | 20 ++++++++++++++++++-- cxl/lib/libcxl.c | 25 +++++++++++++++---------- cxl/lib/libcxl.sym | 5 +++++ cxl/lib/private.h | 2 +- cxl/libcxl.h | 35 +++++++++++++++++++++++++++++++++++ 5 files changed, 74 insertions(+), 13 deletions(-) diff --git a/Documentation/cxl/lib/libcxl.txt b/Documentation/cxl/lib/libcxl.txt index 40598a08b9f4840f79e3ab43f62f412d8b2136ed..d5c3558aacecb08d7f5754fdcc77d6e743560601 100644 --- a/Documentation/cxl/lib/libcxl.txt +++ b/Documentation/cxl/lib/libcxl.txt @@ -553,11 +553,20 @@ struct cxl_region *cxl_region_get_next(struct cxl_region *region); ===== REGION: Attributes ---- +enum cxl_region_mode { + CXL_REGION_MODE_NONE = CXL_DECODER_MODE_NONE, + CXL_REGION_MODE_MIXED = CXL_DECODER_MODE_MIXED, + CXL_REGION_MODE_PMEM = CXL_DECODER_MODE_PMEM, + CXL_REGION_MODE_RAM = CXL_DECODER_MODE_RAM, +}; +const char *cxl_region_mode_name(enum cxl_region_mode mode); +enum cxl_region_mode cxl_region_mode_from_ident(const char *ident); +enum cxl_region_mode cxl_region_get_region_mode(struct cxl_region *region); + int cxl_region_get_id(struct cxl_region *region); const char *cxl_region_get_devname(struct cxl_region *region); void cxl_region_get_uuid(struct cxl_region *region, uuid_t uu); unsigned long long cxl_region_get_size(struct cxl_region *region); -enum cxl_decoder_mode cxl_region_get_mode(struct cxl_region *region); unsigned long long cxl_region_get_resource(struct cxl_region *region); unsigned int cxl_region_get_interleave_ways(struct cxl_region *region); unsigned int cxl_region_get_interleave_granularity(struct cxl_region *region); @@ -576,8 +585,12 @@ int cxl_region_clear_all_targets(struct cxl_region *region); int cxl_region_decode_commit(struct cxl_region *region); int cxl_region_decode_reset(struct cxl_region *region); struct daxctl_region *cxl_region_get_daxctl_region(struct cxl_region *region); ----- +DEPRECATED: + +enum cxl_decoder_mode cxl_region_get_mode(struct cxl_region *region); + +---- A region's resource attribute is the Host Physical Address at which the region's address space starts. The region's address space is a subset of the parent root decoder's address space. @@ -601,6 +614,9 @@ where its properties can be interrogated by daxctl. The helper cxl_region_get_daxctl_region() returns an 'struct daxctl_region *' that can be used with other libdaxctl APIs. +Regions now have a mode distinct from decoders. cxl_region_get_mode() is +deprecated in favor of cxl_region_get_region_mode(). + include::../../copyright.txt[] SEE ALSO diff --git a/cxl/lib/libcxl.c b/cxl/lib/libcxl.c index 63aa4ef3acdc2fb3c4ec6c13be5feb802e817d0d..35a40091e8f5813c1b3ef2ffb931c9ec584b02ad 100644 --- a/cxl/lib/libcxl.c +++ b/cxl/lib/libcxl.c @@ -431,10 +431,10 @@ CXL_EXPORT bool cxl_region_qos_class_mismatch(struct cxl_region *region) if (!memdev) continue; - if (region->mode == CXL_DECODER_MODE_RAM) { + if (region->mode == CXL_REGION_MODE_RAM) { if (root_decoder->qos_class != memdev->ram_qos_class) return true; - } else if (region->mode == CXL_DECODER_MODE_PMEM) { + } else if (region->mode == CXL_REGION_MODE_PMEM) { if (root_decoder->qos_class != memdev->pmem_qos_class) return true; } @@ -619,9 +619,9 @@ static void *add_cxl_region(void *parent, int id, const char *cxlregion_base) sprintf(path, "%s/mode", cxlregion_base); if (sysfs_read_attr(ctx, path, buf) < 0) - region->mode = CXL_DECODER_MODE_NONE; + region->mode = CXL_REGION_MODE_NONE; else - region->mode = cxl_decoder_mode_from_ident(buf); + region->mode = cxl_region_mode_from_ident(buf); sprintf(path, "%s/modalias", cxlregion_base); if (sysfs_read_attr(ctx, path, buf) == 0) @@ -748,11 +748,16 @@ CXL_EXPORT unsigned long long cxl_region_get_resource(struct cxl_region *region) return region->start; } -CXL_EXPORT enum cxl_decoder_mode cxl_region_get_mode(struct cxl_region *region) +CXL_EXPORT enum cxl_region_mode cxl_region_get_region_mode(struct cxl_region *region) { return region->mode; } +CXL_EXPORT enum cxl_decoder_mode cxl_region_get_mode(struct cxl_region *region) +{ + return (enum cxl_decoder_mode)cxl_region_get_region_mode(region); +} + CXL_EXPORT unsigned int cxl_region_get_interleave_ways(struct cxl_region *region) { @@ -2700,7 +2705,7 @@ cxl_decoder_get_region(struct cxl_decoder *decoder) } static struct cxl_region *cxl_decoder_create_region(struct cxl_decoder *decoder, - enum cxl_decoder_mode mode) + enum cxl_region_mode mode) { struct cxl_ctx *ctx = cxl_decoder_get_ctx(decoder); char *path = decoder->dev_buf; @@ -2708,9 +2713,9 @@ static struct cxl_region *cxl_decoder_create_region(struct cxl_decoder *decoder, struct cxl_region *region; int rc; - if (mode == CXL_DECODER_MODE_PMEM) + if (mode == CXL_REGION_MODE_PMEM) sprintf(path, "%s/create_pmem_region", decoder->dev_path); - else if (mode == CXL_DECODER_MODE_RAM) + else if (mode == CXL_REGION_MODE_RAM) sprintf(path, "%s/create_ram_region", decoder->dev_path); rc = sysfs_read_attr(ctx, path, buf); @@ -2754,13 +2759,13 @@ static struct cxl_region *cxl_decoder_create_region(struct cxl_decoder *decoder, CXL_EXPORT struct cxl_region * cxl_decoder_create_pmem_region(struct cxl_decoder *decoder) { - return cxl_decoder_create_region(decoder, CXL_DECODER_MODE_PMEM); + return cxl_decoder_create_region(decoder, CXL_REGION_MODE_PMEM); } CXL_EXPORT struct cxl_region * cxl_decoder_create_ram_region(struct cxl_decoder *decoder) { - return cxl_decoder_create_region(decoder, CXL_DECODER_MODE_RAM); + return cxl_decoder_create_region(decoder, CXL_REGION_MODE_RAM); } CXL_EXPORT int cxl_decoder_get_nr_targets(struct cxl_decoder *decoder) diff --git a/cxl/lib/libcxl.sym b/cxl/lib/libcxl.sym index 0c155a40ad4765106f0eab1745281d462af782fe..17a660f508ad1e053af2992824535ccf7ce877b2 100644 --- a/cxl/lib/libcxl.sym +++ b/cxl/lib/libcxl.sym @@ -288,3 +288,8 @@ global: cxl_memdev_trigger_poison_list; cxl_region_trigger_poison_list; } LIBCXL_7; + +LIBCXL_9 { +global: + cxl_region_get_region_mode; +} LIBECXL_8; diff --git a/cxl/lib/private.h b/cxl/lib/private.h index b6cd910e93359b53cac34427acfe84c7abcb78b0..0f45be89b6a00477d13fb6d7f1906213a3073c48 100644 --- a/cxl/lib/private.h +++ b/cxl/lib/private.h @@ -171,7 +171,7 @@ struct cxl_region { unsigned int interleave_ways; unsigned int interleave_granularity; enum cxl_decode_state decode_state; - enum cxl_decoder_mode mode; + enum cxl_region_mode mode; struct daxctl_region *dax_region; struct kmod_module *module; struct list_head mappings; diff --git a/cxl/libcxl.h b/cxl/libcxl.h index 0a5fd0e13cc24e0032d4a83d780278fbe0038d32..06b87a0924faafec6c80eca83ea7551d4e117256 100644 --- a/cxl/libcxl.h +++ b/cxl/libcxl.h @@ -303,6 +303,39 @@ int cxl_memdev_is_enabled(struct cxl_memdev *memdev); for (endpoint = cxl_endpoint_get_first(port); endpoint != NULL; \ endpoint = cxl_endpoint_get_next(endpoint)) +enum cxl_region_mode { + CXL_REGION_MODE_NONE = CXL_DECODER_MODE_NONE, + CXL_REGION_MODE_MIXED = CXL_DECODER_MODE_MIXED, + CXL_REGION_MODE_PMEM = CXL_DECODER_MODE_PMEM, + CXL_REGION_MODE_RAM = CXL_DECODER_MODE_RAM, +}; + +static inline const char *cxl_region_mode_name(enum cxl_region_mode mode) +{ + static const char *names[] = { + [CXL_REGION_MODE_NONE] = "none", + [CXL_REGION_MODE_MIXED] = "mixed", + [CXL_REGION_MODE_PMEM] = "pmem", + [CXL_REGION_MODE_RAM] = "ram", + }; + + if (mode < CXL_REGION_MODE_NONE || mode > CXL_REGION_MODE_RAM) + mode = CXL_REGION_MODE_NONE; + return names[mode]; +} + +static inline enum cxl_region_mode +cxl_region_mode_from_ident(const char *ident) +{ + if (strcmp(ident, "ram") == 0) + return CXL_REGION_MODE_RAM; + else if (strcmp(ident, "volatile") == 0) + return CXL_REGION_MODE_RAM; + else if (strcmp(ident, "pmem") == 0) + return CXL_REGION_MODE_PMEM; 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a="31127900" X-IronPort-AV: E=Sophos;i="6.12,157,1728975600"; d="scan'208";a="31127900" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by fmvoesa113.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Nov 2024 10:40:44 -0800 X-CSE-ConnectionGUID: 43sXkUWkR9+0pdOkHN3LwQ== X-CSE-MsgGUID: O5rn/XxAT36rMzHzCWax0w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,157,1728975600"; d="scan'208";a="88522623" Received: from ehanks-mobl1.amr.corp.intel.com (HELO localhost) ([10.125.108.112]) by orviesa010-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Nov 2024 10:40:43 -0800 From: Ira Weiny Date: Fri, 15 Nov 2024 12:40:37 -0600 Subject: [ndctl PATCH v3 4/9] cxl/region: Use new region mode in cxl-cli Precedence: bulk X-Mailing-List: linux-cxl@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241115-dcd-region2-v3-4-326cd4e34dcd@intel.com> References: <20241115-dcd-region2-v3-0-326cd4e34dcd@intel.com> In-Reply-To: <20241115-dcd-region2-v3-0-326cd4e34dcd@intel.com> To: Alison Schofield Cc: Vishal Verma , Jonathan Cameron , Fan Ni , Navneet Singh , Dan Williams , Dave Jiang , linux-cxl@vger.kernel.org, nvdimm@lists.linux.dev, Ira Weiny X-Mailer: b4 0.15-dev-2a633 X-Developer-Signature: v=1; a=ed25519-sha256; t=1731696034; l=6905; i=ira.weiny@intel.com; s=20221211; h=from:subject:message-id; bh=HgvcFJJlwID2rYxZWQTHetcFY5nTyif5z/Ba07c9JXA=; b=qO/rzPWEGA8Ou489arr08zclwOB50wbT+pcrzOjFVw7iWFmsJ0/SWpSt7yES6jS9eW18bG1n3 2gMulejD6R9A2WFV1szzaG385DOBABs8MWhSBNTC9Npk/Pr7MooYt/h X-Developer-Key: i=ira.weiny@intel.com; a=ed25519; pk=noldbkG+Wp1qXRrrkfY1QJpDf7QsOEthbOT7vm0PqsE= With the introduction of DCD, region mode and decoder mode no longer remain a 1:1 relation. An interleaved region may be made up of Dynamic Capacity partitions with different indexes on each of the target devices. Modify cxl-cli to use the new region mode interface from libcxl. Modify parameter processing and variable name changes for clarity in the future. Functionality remains the same. Signed-off-by: Ira Weiny --- Changes: [Alison: split libcxl and cxl-cli changes] [iweiny: Process region mode based on --type] [iweiny: s/mode/decoder_mode for clarity] --- cxl/json.c | 6 +++--- cxl/region.c | 50 ++++++++++++++++++++++++++++++++------------------ 2 files changed, 35 insertions(+), 21 deletions(-) diff --git a/cxl/json.c b/cxl/json.c index 5066d3bed13f8fcc36ab8f0ea127685c246d94d7..dcd3cc28393faf7e8adf299a857531ecdeaac50a 100644 --- a/cxl/json.c +++ b/cxl/json.c @@ -1147,7 +1147,7 @@ void util_cxl_mappings_append_json(struct json_object *jregion, struct json_object *util_cxl_region_to_json(struct cxl_region *region, unsigned long flags) { - enum cxl_decoder_mode mode = cxl_region_get_mode(region); + enum cxl_region_mode mode = cxl_region_get_region_mode(region); const char *devname = cxl_region_get_devname(region); struct json_object *jregion, *jobj; u64 val; @@ -1174,8 +1174,8 @@ struct json_object *util_cxl_region_to_json(struct cxl_region *region, json_object_object_add(jregion, "size", jobj); } - if (mode != CXL_DECODER_MODE_NONE) { - jobj = json_object_new_string(cxl_decoder_mode_name(mode)); + if (mode != CXL_REGION_MODE_NONE) { + jobj = json_object_new_string(cxl_region_mode_name(mode)); if (jobj) json_object_object_add(jregion, "type", jobj); } diff --git a/cxl/region.c b/cxl/region.c index 207cf2d003148992255c715f286bc0f38de2ca84..527bd6708b162815068a95ddb360fce3914347de 100644 --- a/cxl/region.c +++ b/cxl/region.c @@ -49,7 +49,8 @@ struct parsed_params { int argc; const char **argv; struct cxl_decoder *root_decoder; - enum cxl_decoder_mode mode; + enum cxl_decoder_mode decoder_mode; + enum cxl_region_mode region_mode; bool enforce_qos; }; @@ -301,19 +302,28 @@ static int parse_create_options(struct cxl_ctx *ctx, int count, return -ENXIO; p->num_memdevs = json_object_array_length(p->memdevs); + p->region_mode = CXL_REGION_MODE_NONE; if (param.type) { - p->mode = cxl_decoder_mode_from_ident(param.type); - if (p->mode == CXL_DECODER_MODE_RAM && param.uuid) { + p->region_mode = cxl_region_mode_from_ident(param.type); + if (p->region_mode == CXL_REGION_MODE_RAM && param.uuid) { log_err(&rl, "can't set UUID for ram / volatile regions"); goto err; } - if (p->mode == CXL_DECODER_MODE_NONE) { + if (p->region_mode == CXL_REGION_MODE_NONE) { log_err(&rl, "unsupported type: %s\n", param.type); goto err; } - } else { - p->mode = CXL_DECODER_MODE_PMEM; + } + + switch (p->region_mode) { + case CXL_REGION_MODE_RAM: + p->decoder_mode = CXL_DECODER_MODE_RAM; + break; + case CXL_REGION_MODE_PMEM: + default: + p->decoder_mode = CXL_DECODER_MODE_PMEM; + break; } if (param.size) { @@ -410,7 +420,7 @@ static void collect_minsize(struct cxl_ctx *ctx, struct parsed_params *p) struct cxl_memdev *memdev = json_object_get_userdata(jobj); u64 size = 0; - switch(p->mode) { + switch(p->decoder_mode) { case CXL_DECODER_MODE_RAM: size = cxl_memdev_get_ram_size(memdev); break; @@ -446,7 +456,7 @@ static int create_region_validate_qos_class(struct parsed_params *p) json_object_array_get_idx(p->memdevs, i); struct cxl_memdev *memdev = json_object_get_userdata(jobj); - if (p->mode == CXL_DECODER_MODE_RAM) + if (p->decoder_mode == CXL_DECODER_MODE_RAM) qos_class = cxl_memdev_get_ram_qos_class(memdev); else qos_class = cxl_memdev_get_pmem_qos_class(memdev); @@ -475,7 +485,7 @@ static int validate_decoder(struct cxl_decoder *decoder, const char *devname = cxl_decoder_get_devname(decoder); int rc; - switch(p->mode) { + switch(p->decoder_mode) { case CXL_DECODER_MODE_RAM: if (!cxl_decoder_is_volatile_capable(decoder)) { log_err(&rl, "%s is not volatile capable\n", devname); @@ -512,10 +522,14 @@ static void set_type_from_decoder(struct cxl_ctx *ctx, struct parsed_params *p) * default to pmem if both types are set, otherwise the single * capability dominates. */ - if (cxl_decoder_is_volatile_capable(p->root_decoder)) - p->mode = CXL_DECODER_MODE_RAM; - if (cxl_decoder_is_pmem_capable(p->root_decoder)) - p->mode = CXL_DECODER_MODE_PMEM; + if (cxl_decoder_is_volatile_capable(p->root_decoder)) { + p->decoder_mode = CXL_DECODER_MODE_RAM; + p->region_mode = CXL_REGION_MODE_RAM; + } + if (cxl_decoder_is_pmem_capable(p->root_decoder)) { + p->decoder_mode = CXL_DECODER_MODE_PMEM; + p->region_mode = CXL_REGION_MODE_PMEM; + } } static int create_region_validate_config(struct cxl_ctx *ctx, @@ -685,14 +699,14 @@ static int create_region(struct cxl_ctx *ctx, int *count, if (size > max_extent) size = ALIGN_DOWN(max_extent, SZ_256M * p->ways); - if (p->mode == CXL_DECODER_MODE_PMEM) { + if (p->region_mode == CXL_REGION_MODE_PMEM) { region = cxl_decoder_create_pmem_region(p->root_decoder); if (!region) { log_err(&rl, "failed to create region under %s\n", param.root_decoder); return -ENXIO; } - } else if (p->mode == CXL_DECODER_MODE_RAM) { + } else if (p->region_mode == CXL_REGION_MODE_RAM) { region = cxl_decoder_create_ram_region(p->root_decoder); if (!region) { log_err(&rl, "failed to create region under %s\n", @@ -714,7 +728,7 @@ static int create_region(struct cxl_ctx *ctx, int *count, try(cxl_region, set_interleave_granularity, region, granularity); try(cxl_region, set_interleave_ways, region, p->ways); - if (p->mode == CXL_DECODER_MODE_PMEM) { + if (p->region_mode == CXL_REGION_MODE_PMEM) { if (!param.uuid) uuid_generate(p->uuid); try(cxl_region, set_uuid, region, p->uuid); @@ -732,14 +746,14 @@ static int create_region(struct cxl_ctx *ctx, int *count, rc = -ENXIO; goto out; } - if (cxl_decoder_get_mode(ep_decoder) != p->mode) { + if (cxl_decoder_get_mode(ep_decoder) != p->decoder_mode) { /* * The cxl_memdev_find_decoder() helper returns a free * decoder whose size has been checked for 0. * Thus it is safe to change the mode here if needed. */ try(cxl_decoder, set_dpa_size, ep_decoder, 0); - try(cxl_decoder, set_mode, ep_decoder, p->mode); + try(cxl_decoder, set_mode, ep_decoder, p->decoder_mode); } try(cxl_decoder, set_dpa_size, ep_decoder, size/p->ways); rc = cxl_region_set_target(region, i, ep_decoder);