From patchwork Mon Nov 18 08:04:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lorenzo Bianconi X-Patchwork-Id: 13878230 X-Patchwork-Delegate: kw@linux.com Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1242D14D2BD; Mon, 18 Nov 2024 08:05:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731917123; cv=none; b=UilKwwXS/JjMV60OWKcXYR+2Wmr8bWC1X8pmdchU7jHxP+2NJF2axjOTppKjc3CVrLTC++DMnd60D1jZFxL/kjIjz60v40uF51k4kpFa0A9bUY1RziNTb4SbAELxbB3NNLSa8X9YIfW0Vyq/gZ/0nGS+L4ymNEozM6f6NKQ64Tc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731917123; c=relaxed/simple; bh=hl2S2LZwn2smx9ARAoEF8vIrYGRpQBw8WQAXlixKIJw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=jMW8GF+m8cZS5ErgLb9JmKmNPehhq+Hq2nGoQoMb5l9n9LsUgDY4n6wyLub1X/mnmtkJK9FTJE0cikuhgRaErmjJ0ycnMu0Jqm+iB42QmtJf52vyBqxsvwlehg7+dzoqNj546YIZ6n8XuTHrpgYZQDlNRPZnmbp7+hlylMq90vw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=UTMcp8lb; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="UTMcp8lb" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3EFBFC4CECC; Mon, 18 Nov 2024 08:05:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1731917122; bh=hl2S2LZwn2smx9ARAoEF8vIrYGRpQBw8WQAXlixKIJw=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=UTMcp8lb8VTB7/w5vMKlDp5d3ulNJVMvYpU4tZ7Mp26/ZyvPckbM4WfD7g/xwAbNM cVznwUcfiZF9tJXDP9wA/+JD7JIBiArhPl2l2hos+xznCyADSiV2Dv9l1ccFoWE/kS 3GgZ1K+pmw8acrJkuDsvQ8G1YiRn3QilPFn1+i5LFvqAlxDrczeYvHeAsG4X51NYeY Ol+Ept29Pux5feeZ8cXm6XSoj8nHrKwf4UOZWaWuFEK/wCk3oC/nXtWL/fBnkF/hPW TErv3v1yoC/Orc5wZkxeiIu4cLRC4PFjx4unttj80KVCO5tuJehdHgFoo9Xvh+ALz6 1dKUQgOLLP6gQ== From: Lorenzo Bianconi Date: Mon, 18 Nov 2024 09:04:53 +0100 Subject: [PATCH v4 1/6] PCI: mediatek-gen3: Add missing reset_control_deassert() for mac_rst in mtk_pcie_en7581_power_up() Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241118-pcie-en7581-fixes-v4-1-24bb61703ad7@kernel.org> References: <20241118-pcie-en7581-fixes-v4-0-24bb61703ad7@kernel.org> In-Reply-To: <20241118-pcie-en7581-fixes-v4-0-24bb61703ad7@kernel.org> To: Ryder Lee , Jianjun Wang , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Bjorn Helgaas , Philipp Zabel , Matthias Brugger , AngeloGioacchino Del Regno , Michael Turquette , Stephen Boyd Cc: linux-pci@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, Lorenzo Bianconi X-Mailer: b4 0.14.2 Even if this is not a real issue since Airoha EN7581 SoC does not require the mac reset line, add missing reset_control_deassert() for mac reset line in mtk_pcie_en7581_power_up() callback. Reviewed-by: Manivannan Sadhasivam Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Lorenzo Bianconi --- drivers/pci/controller/pcie-mediatek-gen3.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/pci/controller/pcie-mediatek-gen3.c b/drivers/pci/controller/pcie-mediatek-gen3.c index 64ef8ff71b0357b9bf9ad8484095b7aa60c22271..4d1c797a32c236faf79428eb8a83708e9c4f21d8 100644 --- a/drivers/pci/controller/pcie-mediatek-gen3.c +++ b/drivers/pci/controller/pcie-mediatek-gen3.c @@ -942,6 +942,9 @@ static int mtk_pcie_en7581_power_up(struct mtk_gen3_pcie *pcie) */ mdelay(PCIE_EN7581_RESET_TIME_MS); + /* MAC power on and enable transaction layer clocks */ + reset_control_deassert(pcie->mac_reset); + pm_runtime_enable(dev); pm_runtime_get_sync(dev); @@ -976,6 +979,7 @@ static int mtk_pcie_en7581_power_up(struct mtk_gen3_pcie *pcie) err_clk_prepare: pm_runtime_put_sync(dev); pm_runtime_disable(dev); + reset_control_assert(pcie->mac_reset); reset_control_bulk_assert(pcie->soc->phy_resets.num_resets, pcie->phy_resets); err_phy_deassert: phy_power_off(pcie->phy); From patchwork Mon Nov 18 08:04:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lorenzo Bianconi X-Patchwork-Id: 13878231 X-Patchwork-Delegate: kw@linux.com Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 868ED14D2BD; Mon, 18 Nov 2024 08:05:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731917125; cv=none; b=Qzj/vb2Cm9qhnRU6FYDR/cn+nm5sie0TxSCjdubnq8gvdRAnwKcAWsOC/JhGRpUfZOdp/CVlN8iNdSMK+3TjGkabFCY8V5S3Cxcg4ZgCNKAprfZcPOUXDQwFPBFrDHgxUIHknJaTCxBBNSGdjyaddxQg7rHUXV7iyeaQhobeVn4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731917125; c=relaxed/simple; bh=e1YpwgPease7P3QoEBiAarKX0rKC/e+5uSyT0oTexTI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=eUUHZnzWAtk9ZJWS4LjGMOchhwWLvqKqnpd9aFMbrY+TCTnO7fvWZS5USIeT6W3EpnOhBZSFQaK5pZVghQaqlP6uVjiTGv6hmFsdzQS1COvMfeFRlI/owMqnL6+KFHok5Z1uK/uS4dSkxU4u/bLkbWlTSkimMD8Hqktht80xy1o= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=vGoUTvxz; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="vGoUTvxz" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 1384EC4CECC; Mon, 18 Nov 2024 08:05:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1731917125; bh=e1YpwgPease7P3QoEBiAarKX0rKC/e+5uSyT0oTexTI=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=vGoUTvxz9IGKU3BZk5iDZ7t1++zljRrGDajdtKpOzIPi2A/KGJNcGsZpFxB6fT+PS uPdnMRa76Tw8t4FFED9+4qgmOG099avagGVmWWWiww5Lg6tdPw5RqtfNzzUOf3oKlP JaQ8+mnlLYFHHLVrhLbnb27CvM9sUZ8szKBWPtS0okoRFD89DTrYUXwGIb/llH+6P9 xTpUP9fPyp/PXPbz4E1kAFbrSShbbklq2TxViiN8F8v9AA7tTaCcqh0EWKVZb1exnF mTL6kTqFcQC7Svl6PZWiKlIoXvEVQMh2A7gDhygvsfEIi0vez/Bv4aE455JoJi7V9A fpwV5LljfNUpg== From: Lorenzo Bianconi Date: Mon, 18 Nov 2024 09:04:54 +0100 Subject: [PATCH v4 2/6] PCI: mediatek-gen3: rely on clk_bulk_prepare_enable() in mtk_pcie_en7581_power_up() Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241118-pcie-en7581-fixes-v4-2-24bb61703ad7@kernel.org> References: <20241118-pcie-en7581-fixes-v4-0-24bb61703ad7@kernel.org> In-Reply-To: <20241118-pcie-en7581-fixes-v4-0-24bb61703ad7@kernel.org> To: Ryder Lee , Jianjun Wang , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Bjorn Helgaas , Philipp Zabel , Matthias Brugger , AngeloGioacchino Del Regno , Michael Turquette , Stephen Boyd Cc: linux-pci@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, Lorenzo Bianconi X-Mailer: b4 0.14.2 Replace clk_bulk_prepare() and clk_bulk_enable() with clk_bulk_prepare_enable() in mtk_pcie_en7581_power_up() routine. Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Lorenzo Bianconi --- drivers/pci/controller/pcie-mediatek-gen3.c | 14 +++----------- 1 file changed, 3 insertions(+), 11 deletions(-) diff --git a/drivers/pci/controller/pcie-mediatek-gen3.c b/drivers/pci/controller/pcie-mediatek-gen3.c index 4d1c797a32c236faf79428eb8a83708e9c4f21d8..3cfcb45d31508142d28d338ff213f70de9b4e608 100644 --- a/drivers/pci/controller/pcie-mediatek-gen3.c +++ b/drivers/pci/controller/pcie-mediatek-gen3.c @@ -948,12 +948,6 @@ static int mtk_pcie_en7581_power_up(struct mtk_gen3_pcie *pcie) pm_runtime_enable(dev); pm_runtime_get_sync(dev); - err = clk_bulk_prepare(pcie->num_clks, pcie->clks); - if (err) { - dev_err(dev, "failed to prepare clock\n"); - goto err_clk_prepare; - } - val = FIELD_PREP(PCIE_VAL_LN0_DOWNSTREAM, 0x47) | FIELD_PREP(PCIE_VAL_LN1_DOWNSTREAM, 0x47) | FIELD_PREP(PCIE_VAL_LN0_UPSTREAM, 0x41) | @@ -966,17 +960,15 @@ static int mtk_pcie_en7581_power_up(struct mtk_gen3_pcie *pcie) FIELD_PREP(PCIE_K_FINETUNE_MAX, 0xf); writel_relaxed(val, pcie->base + PCIE_PIPE4_PIE8_REG); - err = clk_bulk_enable(pcie->num_clks, pcie->clks); + err = clk_bulk_prepare_enable(pcie->num_clks, pcie->clks); if (err) { dev_err(dev, "failed to prepare clock\n"); - goto err_clk_enable; + goto err_clk_prepare_enable; } return 0; -err_clk_enable: - clk_bulk_unprepare(pcie->num_clks, pcie->clks); -err_clk_prepare: +err_clk_prepare_enable: pm_runtime_put_sync(dev); pm_runtime_disable(dev); reset_control_assert(pcie->mac_reset); From patchwork Mon Nov 18 08:04:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lorenzo Bianconi X-Patchwork-Id: 13878232 X-Patchwork-Delegate: kw@linux.com Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 53744405FB; Mon, 18 Nov 2024 08:05:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731917128; cv=none; b=Y0ynDFM+ISrx6F5uogZkMG8fsP7sVlIWVAiFuy962rgxQaqFPhKGH7RneFeI1S5HLaonB+qFAOpvgnGwlEwbfpfwUrCkeM+ouXBjBzP4SDgNRtsvxfWQ0f9LV85kVeON72MosWL02ZFcVtRkNT6UhDGzsHZP2qKxYjvg3HmOZ8E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731917128; c=relaxed/simple; bh=NSYtiir0GYQgZALNN95zBChKFKSlrmO+BGhvhKJ5ESw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=kIe3sfIJUzYvlZyH7impao3jSoe9t2DUkNgCv8Yvf0J+FIicWld6PsiGGdY2YWwT+h1GehcBLVs+OIpPypt9K8Cjv8NRCNqg1VVKJ+SkiSHGQ1AXv4pTH9z/aEqs51l9Lbtzk4A6t+4+kx6BQWmEVfBPyXmwfAtnWObPWgWdXvM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=I2iIjGxZ; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="I2iIjGxZ" Received: by smtp.kernel.org (Postfix) with ESMTPSA id D6335C4CECC; Mon, 18 Nov 2024 08:05:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1731917128; bh=NSYtiir0GYQgZALNN95zBChKFKSlrmO+BGhvhKJ5ESw=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=I2iIjGxZbamQlE3RIzW5D1sJT5xbEgm0+vFBYCUAdFk3BGRKBPtyH+pu2VoMdx5XR g1Wtkxnyb3H591wvuKnwOspcjhYJgjk37JObFm34MWCjVNS3lacpFojHmYhaXy0SPo vriyg2LALVOoQhbj5Ada3XOV/cLViy/Qp0a/pBzcH4T9ckjjOKqp+2QgW7jetR7djF rNr5RyNyWnNV91fqR2Mfqk2TWEIWlUFsGtnk1WbWkPMHv/d2wYXMq3cFEX5cYbMBTc ilfmO+n+2IDF0dsJFZTaH4O0Mlj8htVKAA+Y5woF6XZ8elGZpTt+11L1VD2RfHGyQp SLL1XvUj0d7cw== From: Lorenzo Bianconi Date: Mon, 18 Nov 2024 09:04:55 +0100 Subject: [PATCH v4 3/6] PCI: mediatek-gen3: Move reset/assert callbacks in .power_up() Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241118-pcie-en7581-fixes-v4-3-24bb61703ad7@kernel.org> References: <20241118-pcie-en7581-fixes-v4-0-24bb61703ad7@kernel.org> In-Reply-To: <20241118-pcie-en7581-fixes-v4-0-24bb61703ad7@kernel.org> To: Ryder Lee , Jianjun Wang , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Bjorn Helgaas , Philipp Zabel , Matthias Brugger , AngeloGioacchino Del Regno , Michael Turquette , Stephen Boyd Cc: linux-pci@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, Lorenzo Bianconi X-Mailer: b4 0.14.2 In order to make the code more readable, the reset_control_bulk_assert() for PHY reset lines is moved to make it pair with reset_control_bulk_deassert() in mtk_pcie_power_up() and mtk_pcie_en7581_power_up(). The same change is done for reset_control_assert() used to assert MAC reset line. Introduce PCIE_MTK_RESET_TIME_US macro for the time needed to complete PCIe reset on MediaTek controller. Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Lorenzo Bianconi --- drivers/pci/controller/pcie-mediatek-gen3.c | 27 +++++++++++++++++++-------- 1 file changed, 19 insertions(+), 8 deletions(-) diff --git a/drivers/pci/controller/pcie-mediatek-gen3.c b/drivers/pci/controller/pcie-mediatek-gen3.c index 3cfcb45d31508142d28d338ff213f70de9b4e608..2b80edd4462ad4e9f2a5d192db7f99307113eb8a 100644 --- a/drivers/pci/controller/pcie-mediatek-gen3.c +++ b/drivers/pci/controller/pcie-mediatek-gen3.c @@ -125,6 +125,8 @@ #define MAX_NUM_PHY_RESETS 3 +#define PCIE_MTK_RESET_TIME_US 10 + /* Time in ms needed to complete PCIe reset on EN7581 SoC */ #define PCIE_EN7581_RESET_TIME_MS 100 @@ -912,6 +914,14 @@ static int mtk_pcie_en7581_power_up(struct mtk_gen3_pcie *pcie) int err; u32 val; + /* + * The controller may have been left out of reset by the bootloader + * so make sure that we get a clean start by asserting resets here. + */ + reset_control_bulk_assert(pcie->soc->phy_resets.num_resets, + pcie->phy_resets); + reset_control_assert(pcie->mac_reset); + /* * Wait for the time needed to complete the bulk assert in * mtk_pcie_setup for EN7581 SoC. @@ -986,6 +996,15 @@ static int mtk_pcie_power_up(struct mtk_gen3_pcie *pcie) struct device *dev = pcie->dev; int err; + /* + * The controller may have been left out of reset by the bootloader + * so make sure that we get a clean start by asserting resets here. + */ + reset_control_bulk_assert(pcie->soc->phy_resets.num_resets, + pcie->phy_resets); + reset_control_assert(pcie->mac_reset); + usleep_range(PCIE_MTK_RESET_TIME_US, 2 * PCIE_MTK_RESET_TIME_US); + /* PHY power on and enable pipe clock */ err = reset_control_bulk_deassert(pcie->soc->phy_resets.num_resets, pcie->phy_resets); if (err) { @@ -1070,14 +1089,6 @@ static int mtk_pcie_setup(struct mtk_gen3_pcie *pcie) * counter since the bulk is shared. */ reset_control_bulk_deassert(pcie->soc->phy_resets.num_resets, pcie->phy_resets); - /* - * The controller may have been left out of reset by the bootloader - * so make sure that we get a clean start by asserting resets here. - */ - reset_control_bulk_assert(pcie->soc->phy_resets.num_resets, pcie->phy_resets); - - reset_control_assert(pcie->mac_reset); - usleep_range(10, 20); /* Don't touch the hardware registers before power up */ err = pcie->soc->power_up(pcie); From patchwork Mon Nov 18 08:04:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lorenzo Bianconi X-Patchwork-Id: 13878233 X-Patchwork-Delegate: kw@linux.com Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4F380149C6F; Mon, 18 Nov 2024 08:05:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731917133; cv=none; b=FJBB525RfRCc21nIWREfr39OTRp+BEzmXGgzA9aW4BuP0zN/yDsOx0KnzyD2fHpDg7bLshkYE1WLd/+HZALfNCpk9qGJcVCSK4vyk+8K7KbDrsDfcvmrCjR/nCW65cyRBJW4Js6a9ITLdZivSHpn+qn+4Jul0JZ4ft1n7oqmfe8= ARC-Message-Signature: i=1; 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b=K3h+wdqc2+vd8N2fSa+a+STJtPFjVQh8ET/uuysZZoioX45SIGX7eas+bA20tJ40y LsCowysdMznZeGxfI5SesbDrjRb/jSiEgg9kqfUhwtgpzZqxKbBAtMRSVqPNtgJAqF ZJDyFfok9/ASFk4o6O4MrYa3xZXi9OPL0CHbFqBPnSk8v2XYa/g5/ssIgyvuKaPBub S4fkZCeVTFvUs+DATHKl7eMFgZJMIzl4K8iwJIblUWeDkKv5uOeu/cM0X7wYYutQZ8 a0hfjsrbZEGK4H2tPS7ubg5FmCRPtaxhCP/47d8Qc5isk8rv2kJSoniY/vT5h9gzYf 2RjYeW8FaNvPA== From: Lorenzo Bianconi Date: Mon, 18 Nov 2024 09:04:56 +0100 Subject: [PATCH v4 4/6] PCI: mediatek-gen3: Add comment about initialization order in mtk_pcie_en7581_power_up() Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241118-pcie-en7581-fixes-v4-4-24bb61703ad7@kernel.org> References: <20241118-pcie-en7581-fixes-v4-0-24bb61703ad7@kernel.org> In-Reply-To: <20241118-pcie-en7581-fixes-v4-0-24bb61703ad7@kernel.org> To: Ryder Lee , Jianjun Wang , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Bjorn Helgaas , Philipp Zabel , Matthias Brugger , AngeloGioacchino Del Regno , Michael Turquette , Stephen Boyd Cc: linux-pci@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, Lorenzo Bianconi X-Mailer: b4 0.14.2 Add a comment in mtk_pcie_en7581_power_up() to clarify, unlike the other MediaTek Gen3 controllers, the Airoha EN7581 requires PHY initialization and power-on before PHY reset deassert. Reviewed-by: Manivannan Sadhasivam Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Lorenzo Bianconi --- drivers/pci/controller/pcie-mediatek-gen3.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/pci/controller/pcie-mediatek-gen3.c b/drivers/pci/controller/pcie-mediatek-gen3.c index 2b80edd4462ad4e9f2a5d192db7f99307113eb8a..e4f890a73cb8ada7423301fa7a9acc3e177d0cad 100644 --- a/drivers/pci/controller/pcie-mediatek-gen3.c +++ b/drivers/pci/controller/pcie-mediatek-gen3.c @@ -928,6 +928,10 @@ static int mtk_pcie_en7581_power_up(struct mtk_gen3_pcie *pcie) */ mdelay(PCIE_EN7581_RESET_TIME_MS); + /* + * Unlike the other MediaTek Gen3 controllers, the Airoha EN7581 + * requires PHY initialization and power-on before PHY reset deassert. + */ err = phy_init(pcie->phy); if (err) { dev_err(dev, "failed to initialize PHY\n"); From patchwork Mon Nov 18 08:04:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lorenzo Bianconi X-Patchwork-Id: 13878234 X-Patchwork-Delegate: kw@linux.com Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 097A113DDDF; Mon, 18 Nov 2024 08:05:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731917136; cv=none; b=e3+aLoIij8j7b1LIR/VM5OxfRRZ2Z/skLxms4tew5VAwasa0shljNAjzwtZ2sBuW/aJX7i08hMMtAzHenz9MeS9VeWr8r4n528BUrDjkvj2epv1S6N+aV6kezzvTOr1/k6PX1908SJW2FHMfxbqJEaR4IgnXrnb+S3968MUb/6o= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731917136; c=relaxed/simple; bh=DhSJnQhwThCB5J0umXx/t8RzQXQNejO05g1shMYhbU4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Tsi7la1aovCILvIXo+7PpluB5+esRfoUB7qWcE/xp5vFyoBPjUb8yHhU2ohm9Hi3yKam62oObW6+w/SR7kpyEnMApHDWVPYTA5i6yTLbtjA0U7n/n5Hasbo/cX8wMhajVJATsTbCAwT4S+Xi5GUrC4DgPcjSfbwvJO73ecdl/2I= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=e6hpPiY3; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="e6hpPiY3" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 35667C4CECC; Mon, 18 Nov 2024 08:05:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1731917135; bh=DhSJnQhwThCB5J0umXx/t8RzQXQNejO05g1shMYhbU4=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=e6hpPiY3kW6xbiu60te+uoUxs/sfDCh7sWjP/NPeEdoYRpNa1+/JPOjoeCEo202xu Y8C0gLgoGDfoi5hhxlX5h1LPgaS8KKpXN9cMhe+YyOp7bv0761UPhfMM4X2avsr67i h8nFkhJO4yXDhTi1g0uZwaeuiaE000y9qVLfEOhwc8KMREy+pzDfPe5qH8s0h1IEzb 87gkAnyl7wn+IjPYxg0NO0mNXRLOnc5Kb0tZZeIrAxnl8HbAH2JemtZc0IFPEkpYmu R/MGJASMi4lY8jHZtPjJvhiDcFzPs4zDYBXKaL0I8k0ZZUfcNqd4810ggZdK3pehoK k0/7BXsz+CBQA== From: Lorenzo Bianconi Date: Mon, 18 Nov 2024 09:04:57 +0100 Subject: [PATCH v4 5/6] PCI: mediatek-gen3: Add reset delay in mtk_pcie_en7581_power_up() Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241118-pcie-en7581-fixes-v4-5-24bb61703ad7@kernel.org> References: <20241118-pcie-en7581-fixes-v4-0-24bb61703ad7@kernel.org> In-Reply-To: <20241118-pcie-en7581-fixes-v4-0-24bb61703ad7@kernel.org> To: Ryder Lee , Jianjun Wang , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Bjorn Helgaas , Philipp Zabel , Matthias Brugger , AngeloGioacchino Del Regno , Michael Turquette , Stephen Boyd Cc: linux-pci@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, Lorenzo Bianconi X-Mailer: b4 0.14.2 Airoha EN7581 has a hw bug asserting/releasing PCIE_PE_RSTB signal causing occasional PCIe link down issues. In order to overcome the problem, PCIe block is reset using REG_PCI_CONTROL (0x88) and REG_RESET_CONTROL (0x834) registers available in the clock module running clk_bulk_prepare_enable in mtk_pcie_en7581_power_up(). In order to make the code more readable, move the wait for the time needed to complete the PCIe reset from en7581_pci_enable() to mtk_pcie_en7581_power_up(). Reduce reset timeout from 250ms to PCIE_T_PVPERL_MS (100ms). Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Lorenzo Bianconi Acked-by: Stephen Boyd --- drivers/clk/clk-en7523.c | 1 - drivers/pci/controller/pcie-mediatek-gen3.c | 7 +++++++ 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/clk/clk-en7523.c b/drivers/clk/clk-en7523.c index 22fbea61c3dcc05e63f8fa37e203c62b2a6fe79e..bf9d9594bef8a54316e28e56a1642ecb0562377a 100644 --- a/drivers/clk/clk-en7523.c +++ b/drivers/clk/clk-en7523.c @@ -393,7 +393,6 @@ static int en7581_pci_enable(struct clk_hw *hw) REG_PCI_CONTROL_PERSTOUT; val = readl(np_base + REG_PCI_CONTROL); writel(val | mask, np_base + REG_PCI_CONTROL); - msleep(250); return 0; } diff --git a/drivers/pci/controller/pcie-mediatek-gen3.c b/drivers/pci/controller/pcie-mediatek-gen3.c index e4f890a73cb8ada7423301fa7a9acc3e177d0cad..f47c0f2995d94ea99bf41146657bd90b87781a7c 100644 --- a/drivers/pci/controller/pcie-mediatek-gen3.c +++ b/drivers/pci/controller/pcie-mediatek-gen3.c @@ -980,6 +980,13 @@ static int mtk_pcie_en7581_power_up(struct mtk_gen3_pcie *pcie) goto err_clk_prepare_enable; } + /* + * Airoha EN7581 performs PCIe reset via clk callabacks since it has a + * hw issue with PCIE_PE_RSTB signal. Add wait for the time needed to + * complete the PCIe reset. + */ + msleep(PCIE_T_PVPERL_MS); + return 0; err_clk_prepare_enable: From patchwork Mon Nov 18 08:04:58 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lorenzo Bianconi X-Patchwork-Id: 13878235 X-Patchwork-Delegate: kw@linux.com Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 78240145A1C; Mon, 18 Nov 2024 08:05:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731917139; cv=none; b=u4S98qNsFRcT2fO1BvkxHnhQQGEGUsenNRRL30dseVVEBfgAfSNCZdv8hCe4YsQEVV/7es0D9I8XY+g7vfWDwoRZ81Hg/0G8G8ZtFtjNwNytni9f8FSGn89R4r/rquq/4crWRiD7xnjYZq7sT7yFgFTPCHj4p6iE6yrqg/noR6Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731917139; c=relaxed/simple; bh=XIASZdNzk8EQ2wGz5+IUsbi9uVPQANSTHY+c1WkJIfg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=rk0wPEu8vQSZ4sHu62mZ+zl5nz3f/ROCkBzCTvsWB833nhznc3qqjgMF8nS8O9HksObES0fcfp43saRjIanOAp3rEKVIAj7hSZHSoqTYzMXShawiXYWUDiXvuoSTiVdvHVR9U90zP4FSaUlcnRJ+AFu3cHSzAjCBfo6RxOmBHc8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=HlRQZWkZ; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="HlRQZWkZ" Received: by smtp.kernel.org (Postfix) with ESMTPSA id C2B96C4CECC; Mon, 18 Nov 2024 08:05:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1731917138; bh=XIASZdNzk8EQ2wGz5+IUsbi9uVPQANSTHY+c1WkJIfg=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=HlRQZWkZ5tW1FKFLKv99RNFm2Pci8ayxrenK/cYQaBbNEGlilO5hpIAdcmtS0poQE ShIdmToGkqoz8wUUheIkyzOeb8zGzJrloWYpIDhh5CoJhHFqOpmE+2KYquOE/0HtIQ Zg5OwGgEYh7sYMCFfRrGApLZFa3ozXyZ4z5XNIj9bRBCUcc2bvPExSAxJkIcpiRe4/ qtmpKZt9ZeZLcN4KbZKyxfQ9gHMO6hz7wE/udcOvK8gnyXMdWw8uAJJp7f2tEUm/5I ZXFa8tfO+GRmZgv46upsznFW+AMIomU2Mk2Ph2GJbzjRa9Fh/2Ewwsc6MLvae8U4vJ Pi+a4dIg0eeZA== From: Lorenzo Bianconi Date: Mon, 18 Nov 2024 09:04:58 +0100 Subject: [PATCH v4 6/6] PCI: mediatek-gen3: rely on msleep() in mtk_pcie_en7581_power_up() Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241118-pcie-en7581-fixes-v4-6-24bb61703ad7@kernel.org> References: <20241118-pcie-en7581-fixes-v4-0-24bb61703ad7@kernel.org> In-Reply-To: <20241118-pcie-en7581-fixes-v4-0-24bb61703ad7@kernel.org> To: Ryder Lee , Jianjun Wang , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Bjorn Helgaas , Philipp Zabel , Matthias Brugger , AngeloGioacchino Del Regno , Michael Turquette , Stephen Boyd Cc: linux-pci@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, Lorenzo Bianconi X-Mailer: b4 0.14.2 Since mtk_pcie_en7581_power_up() runs in non-atomic context, rely on msleep() routine instead of mdelay(). Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Lorenzo Bianconi --- drivers/pci/controller/pcie-mediatek-gen3.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pci/controller/pcie-mediatek-gen3.c b/drivers/pci/controller/pcie-mediatek-gen3.c index f47c0f2995d94ea99bf41146657bd90b87781a7c..69f3143783686e9ebcc7ce3dff1883fa6c80d0f4 100644 --- a/drivers/pci/controller/pcie-mediatek-gen3.c +++ b/drivers/pci/controller/pcie-mediatek-gen3.c @@ -926,7 +926,7 @@ static int mtk_pcie_en7581_power_up(struct mtk_gen3_pcie *pcie) * Wait for the time needed to complete the bulk assert in * mtk_pcie_setup for EN7581 SoC. */ - mdelay(PCIE_EN7581_RESET_TIME_MS); + msleep(PCIE_EN7581_RESET_TIME_MS); /* * Unlike the other MediaTek Gen3 controllers, the Airoha EN7581 @@ -954,7 +954,7 @@ static int mtk_pcie_en7581_power_up(struct mtk_gen3_pcie *pcie) * Wait for the time needed to complete the bulk de-assert above. * This time is specific for EN7581 SoC. */ - mdelay(PCIE_EN7581_RESET_TIME_MS); + msleep(PCIE_EN7581_RESET_TIME_MS); /* MAC power on and enable transaction layer clocks */ reset_control_deassert(pcie->mac_reset);