From patchwork Mon Nov 18 22:52:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zide Chen X-Patchwork-Id: 13879140 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DE9E61EC01E for ; Mon, 18 Nov 2024 22:54:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.11 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731970481; cv=none; b=e3qzsDZ1968GkACrAPkePCgjWqCk5508XWGyKwKyIlQ6MQLy+FippjNAmsMYK1IN5RDmMABTeeYrfrUjicMn5QIDjamOYJKu/Bo7QHqKdsCPLwDJ5X9SEYu4SmSxFXGFiw0iqqmQVgFHkE1YskeMEQcvWK+U8sRTgFYcrNXaZ3k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731970481; c=relaxed/simple; bh=H4yiDXfMMpv/Z55e9PVMBTH/yEnT82ghVphY/gryc3E=; h=From:To:Cc:Subject:Date:Message-Id:MIME-Version; b=CnG0hCDaxSjpvm/Axi2vH1iopbrrZdJj/356UMUU+dRjcfs7jVHDGcfWO4MkqWIcvfA6jyoXrDf4ydJI5pu7mFAUirDHVa44VD1IskyVPEmEkgBWQki93LeZpx+j3EjatVAB4ltp98B4mogtGWI0ivujzkO00Vv9SmqKBDMRewQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=c70ZJqlA; arc=none smtp.client-ip=192.198.163.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="c70ZJqlA" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1731970480; x=1763506480; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=H4yiDXfMMpv/Z55e9PVMBTH/yEnT82ghVphY/gryc3E=; b=c70ZJqlAFCGZozun4YqKOBP4TWw2dDjJXFmNKmAp28faqJ6IU/U+OMN1 67rxWKEZknDJc154VX+SDBiucBAAgQ/+MksULWwxF6xlAn8Q/6rDsmwPj pb2kmFAoPJRf1Q6NEnF6zDw/XwXmCxiS4pLT7ClnDNs/UUUweI7fATrU4 TIMUNHI298sxAeoL12iSqnCyk73mCOD/2TXkkLwdzvx+yreL953rREAKV uoKfrSP1mqYkdPl+8WbVCH927Q1+U3U0szEwu3XRD2278LLt6lgYSuyDP YsYfFbYagUeFTDGqPaKgYn/9tywbe5FRZaY2b/g46YPy+n6V9MobMSHqz A==; X-CSE-ConnectionGUID: xIGi5u9hSsGdb/RwLNatEg== X-CSE-MsgGUID: YKlXKyYeRzmhduh7O3s71w== X-IronPort-AV: E=McAfee;i="6700,10204,11260"; a="42579574" X-IronPort-AV: E=Sophos;i="6.12,165,1728975600"; d="scan'208";a="42579574" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Nov 2024 14:54:39 -0800 X-CSE-ConnectionGUID: 6sPQ1VqPQQa3+SLKDcuutw== X-CSE-MsgGUID: juMtCHHvRauT9jX563W1eg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,165,1728975600"; d="scan'208";a="89145919" Received: from 9cc2c43eec6b.jf.intel.com ([10.54.77.44]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Nov 2024 14:54:39 -0800 From: Zide Chen To: kvm@vger.kernel.org Cc: Zide Chen , Zhenyu Wang Subject: [kvm-unit-test PATCH 1/3] nVMX: fixed-function performance counters could be not contiguous Date: Mon, 18 Nov 2024 14:52:05 -0800 Message-Id: <20241118225207.16596-1-zide.chen@intel.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The fixed counters may not be contiguous. Intel SDM recommends how to use CPUID.0AH to determine if a Fixed Counter is supported: FxCtr[i]_is_supported := ECX[i] || (EDX[4:0] > i); For example, it's perfectly valid to have CPUID.0AH.EDX[4:0] == 3 and CPUID.0AH.ECX == 0x77, but checking the fixed counter index against CPUID.0AH.EDX[4:0] only, will deem that FxCtr[6:4] are not supported. Additionally, according to the latest Intel SDM, changed the definition of cpuidA_edx and renamed num_counters_fixed to num_contiguous_fixed. Signed-off-by: Zide Chen Reviewed-by: Zhenyu Wang --- x86/vmx_tests.c | 17 ++++++++++++++--- 1 file changed, 14 insertions(+), 3 deletions(-) diff --git a/x86/vmx_tests.c b/x86/vmx_tests.c index ffe7064c9221..5261927ad2a4 100644 --- a/x86/vmx_tests.c +++ b/x86/vmx_tests.c @@ -7332,11 +7332,17 @@ union cpuidA_eax { unsigned int full; }; +union cpuidA_ecx { + unsigned int fixed_mask; +}; + union cpuidA_edx { struct { - unsigned int num_counters_fixed:5; + unsigned int num_contiguous_fixed:5; unsigned int bit_width_fixed:8; - unsigned int reserved:9; + unsigned int reserved1:2; + unsigned int anythread_deprecated:1; + unsigned int reserved2:16; } split; unsigned int full; }; @@ -7345,14 +7351,19 @@ static bool valid_pgc(u64 val) { struct cpuid id; union cpuidA_eax eax; + union cpuidA_ecx ecx; union cpuidA_edx edx; u64 mask; id = cpuid(0xA); eax.full = id.a; + ecx.fixed_mask = id.c; edx.full = id.d; + + /* FxCtr[i]_is_supported := ECX[i] || (EDX[4:0] > i); */ mask = ~(((1ull << eax.split.num_counters_gp) - 1) | - (((1ull << edx.split.num_counters_fixed) - 1) << 32)); + (((1ull << edx.split.num_contiguous_fixed) - 1) << 32) | + ((u64)ecx.fixed_mask << 32)); return !(val & mask); } From patchwork Mon Nov 18 22:52:06 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zide Chen X-Patchwork-Id: 13879141 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4463E1EC003 for ; Mon, 18 Nov 2024 22:54:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.11 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731970482; cv=none; b=C/8OSAKjiKX1SaRhIC7F7+sWXZtVzTuMI0RqSNwvTyRmaBGaS7Hi+rm0mX+Oa7TmqD+ttPZVV36S3i8zmNo8CYQGIQLwMhLKySeYP17EJvXMJ+QmGbRqjGoQjZqa7PY9X//iWtdwuGmxGebb91dt0Juush1lN4EGPjWYxjBCKOI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731970482; c=relaxed/simple; bh=LrIhoRDkl1g5eGLdsoZdxBUgHPnoAOkFcR6YkyMdOy0=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=J3yTrGTdP8iIxRibG4zqe5KnHjYq5zuwFc6jEegd8U3eHMtYBfYqabBcDzyaE761+MSjYWNs0Op6dCNxD7JMRBxeAIqD48AeBuvumHJTVG5kWhcAEw+8aFY1JV0qgxaeb+fp0QqOMeng6NRkxpyGXNjiXGvwy5W1NkgTxYB8EAA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=mz47KisO; arc=none smtp.client-ip=192.198.163.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="mz47KisO" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1731970481; x=1763506481; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=LrIhoRDkl1g5eGLdsoZdxBUgHPnoAOkFcR6YkyMdOy0=; b=mz47KisOkC85cQzQ003BvoxivaWCgCWK8tLsoxk3QvS3RIuLBchWmHi3 /qajZSnqeFGwzv6GxKYnNixaU77IHkblQROHkV+8TadGZ3wH+Va6YAA9R 5tBA+VFW5ht4wblnq0n9Rw8rjhuOHo31eLKBmG1wGyi/I413rTDvA0jHW LZ+ladkE6gJuIIQtk57Nwa11dHEckCNL074Cks0jERx9a2GQr1FR6iAM8 mxhNZ6XkfZOT1SuC7HDsKctbSDTPffDXDaJ9Hbn2zEh9Hlw2ybRw1ebMf 01UYkI2SC+k4/9Y/wS1omx4oHnmBfgxZWi6EJ5km7IE9UPbc81dDkMjTJ g==; X-CSE-ConnectionGUID: rLPDwIulSsWGmej1dcXATw== X-CSE-MsgGUID: 0d7711y1S66m/8LtTPpCog== X-IronPort-AV: E=McAfee;i="6700,10204,11260"; a="42579575" X-IronPort-AV: E=Sophos;i="6.12,165,1728975600"; d="scan'208";a="42579575" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Nov 2024 14:54:40 -0800 X-CSE-ConnectionGUID: e4+zddq+QYWgNmgujs9mSQ== X-CSE-MsgGUID: I/vAUhtnThGO97dYI4ITlg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,165,1728975600"; d="scan'208";a="89145924" Received: from 9cc2c43eec6b.jf.intel.com ([10.54.77.44]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Nov 2024 14:54:40 -0800 From: Zide Chen To: kvm@vger.kernel.org Cc: Zide Chen , Dapeng Mi Subject: [kvm-unit-test PATCH 2/3] x86/pmu: Fixed PEBS basic record parsing issue Date: Mon, 18 Nov 2024 14:52:06 -0800 Message-Id: <20241118225207.16596-2-zide.chen@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241118225207.16596-1-zide.chen@intel.com> References: <20241118225207.16596-1-zide.chen@intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 If adaptive PEBS is supported, to parse the PEBS record_format[47:0], SDM states that "This field indicates which data groups are included in the record. The field is zero if none of the counters that triggered the current PEBS record have their Adaptive_Record bit set. Otherwise it contains the value of MSR_PEBS_DATA_CFG." Without this fix, if neither IA32_PERFEVTSELx.Adaptive_Record[34] nor IA32_FIXED_CTR_CTRL.FCx_Adaptive_Record is set on adaptive PEBS capable systems, test will fail. Fixes: 2cb2af7f53d ("x86/pmu: Test adaptive PEBS without any adaptive counters") Signed-off-by: Zide Chen Reviewed-by: Dapeng Mi --- x86/pmu_pebs.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/x86/pmu_pebs.c b/x86/pmu_pebs.c index 77875c4fee35..6b4a5ed3b91e 100644 --- a/x86/pmu_pebs.c +++ b/x86/pmu_pebs.c @@ -297,6 +297,8 @@ static void check_pebs_records(u64 bitmask, u64 pebs_data_cfg, bool use_adaptive pebs_idx_match = pebs_rec->applicable_counters & bitmask; pebs_size_match = pebs_record_size == get_pebs_record_size(pebs_data_cfg, use_adaptive); data_cfg_match = (pebs_rec->format_size & GENMASK_ULL(47, 0)) == pebs_data_cfg; + data_cfg_match = (pebs_rec->format_size & GENMASK_ULL(47, 0)) == + (use_adaptive ? pebs_data_cfg : 0); expected = pebs_idx_match && pebs_size_match && data_cfg_match; report(expected, "PEBS record (written seq %d) is verified (including size, counters and cfg).", count); From patchwork Mon Nov 18 22:52:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zide Chen X-Patchwork-Id: 13879142 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B57191EE004 for ; Mon, 18 Nov 2024 22:54:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.11 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731970483; cv=none; b=i7KbTL17h7aimjy51m6HG2VgAcyLwyKl2iPiFx1Bjvn3YhGXiHlxAp2prwiJeAbX5eKSzCAFXO4IHwE7/Xgz0xgqxeaU8IO/DGi6hZaK3DTja5TnRGFoRescuG8Mo48BffjeNdZo1kGsgFYfgeGIfwp17XJ2OqShVZHbhFaL2vY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1731970483; c=relaxed/simple; bh=tWtFWXcZQwcoM/P2ECbObjIBGkE/YYzisg8saOY5SuM=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=MAb3nc+cTeN7MINixymO69K4j+VXKIxXzoH7kSrYDHARTdB5eEmp9wGGBRA12wCmOceL0se4jhdh7KOYlOjbnZmPBOkg9tLajfDgM73+17C5bOvXfygFKkwAap/hOXVn6pGbPW8gintS6yBGj4Hj6UBrOHm5jR7ismWw3F4FRto= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=ChpTXHlU; arc=none smtp.client-ip=192.198.163.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="ChpTXHlU" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1731970482; x=1763506482; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=tWtFWXcZQwcoM/P2ECbObjIBGkE/YYzisg8saOY5SuM=; b=ChpTXHlUpGRG6GDAJr4ntlbJtos6h9ibJ+CtqPdjAlCjy/jwfwoilhyG tPX5stHrD7gHUyc4fcqXoBfmbXRA1IiDslrJMQUBw0H3yhVaIgmn3mKiM tPMBZUrvt82LFeUNHJL+YurkO+n5jgaHDG0xqevRLI5KuHiFYdHVA4iQA 7Dlg/yFyNBg9c8WCf2Bff4GrUhfjhU5EdfXivEtahVydgf7AQpyxz/Yo6 b+aCF441yI/JKYCVhQVGHMmB1tQ0RV4bzTQ2Iz8k0wFQWQZ/yqp7HzOZD imGL0M217TYOGvMaORygi/D1ZhU5azbr4So77UR5huuI0IQ5s3nFZusGY A==; X-CSE-ConnectionGUID: PtVozNjRRlWwW3w9H5w4sA== X-CSE-MsgGUID: 8IWt5e/cQImppxpu+3mtrQ== X-IronPort-AV: E=McAfee;i="6700,10204,11260"; a="42579576" X-IronPort-AV: E=Sophos;i="6.12,165,1728975600"; d="scan'208";a="42579576" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Nov 2024 14:54:41 -0800 X-CSE-ConnectionGUID: Zr/oP45iRSO2eLmx80F/jQ== X-CSE-MsgGUID: SWIL9fmfSoO43eV+kCTrlA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,165,1728975600"; d="scan'208";a="89145931" Received: from 9cc2c43eec6b.jf.intel.com ([10.54.77.44]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Nov 2024 14:54:41 -0800 From: Zide Chen To: kvm@vger.kernel.org Cc: Zide Chen , Dapeng Mi Subject: [kvm-unit-test PATCH 3/3] x86/pmu: Execute PEBS test only if PEBSRecordFormat >= 4 Date: Mon, 18 Nov 2024 14:52:07 -0800 Message-Id: <20241118225207.16596-3-zide.chen@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241118225207.16596-1-zide.chen@intel.com> References: <20241118225207.16596-1-zide.chen@intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Before adaptive PEBS v4, the PEBS record format is not determined by MSR_PEBS_DATA_CFG, but by IA32_PERF_CAPABILITIES.PEBS_FMT[11:8] (< 4), which is not covered by this unit test. We don't want additional implementation to support such legacy platforms, instead, we can exclude them from the test to avoid test failures. Technically, it seems checking IA32_PERF_CAPABILITIES.PEBS_BASELINE[14] is more reasonable. But this bit is not exposed to the guest in the current KVM emulated vPMU implementation, and if we use it as a filter, it will filter out all platforms. Signed-off-by: Zide Chen Signed-off-by: Dapeng Mi Reviewed-by: Dapeng Mi --- x86/pmu_pebs.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/x86/pmu_pebs.c b/x86/pmu_pebs.c index 6b4a5ed3b91e..6396d51c6b49 100644 --- a/x86/pmu_pebs.c +++ b/x86/pmu_pebs.c @@ -404,8 +404,8 @@ int main(int ac, char **av) } else if (!pmu_has_pebs()) { report_skip("PEBS required PMU version 2, reported version is %d", pmu.version); return report_summary(); - } else if (!pmu_pebs_format()) { - report_skip("PEBS not enumerated in PERF_CAPABILITIES"); + } else if (pmu_pebs_format() < 4) { + report_skip("This test supports PEBS_Record_Format >= 4 only"); return report_summary(); } else if (rdmsr(MSR_IA32_MISC_ENABLE) & MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL) { report_skip("PEBS unavailable according to MISC_ENABLE");