From patchwork Wed Nov 20 06:36:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Friday Yang X-Patchwork-Id: 13880727 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3A709D6E2C9 for ; Wed, 20 Nov 2024 06:38:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=+gMs/diYXN4X9z9nI+JN/RNmvVcQKJVNx8MA0OWmObQ=; b=ttnuJYnYMskKxfecLE7oPCCaHh zQ311F2/OuabVq0gOA2vXfzAqNGFGm4MQpQNoJknXAMtj76i1xaFvaFpG2U8yTH8scg8fsxk+z59F bkyOp6JOcU3tQf9lDI/2ahbuCO7jLqEbVPLWJm4Uf0GZY5iJ0g2/T2Kp0a+BlOENi4rJZ+py8cyDJ i5SzyK7Th9p35ODA4mlsb2GhoPFE4qLyDWIx16+1KWwJiD8DBxXitjuVAEEj6/vsOx5VzUTK6PoOC Ci76gMueNCl0Fd2nNbVB2eB5Zrb7pa6zlbKnF9HHiDCN4AksqCfBOx2XR3WmQsuz5PdZxYsGkFxSK 8Xc8RTdQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tDeLr-0000000EWNq-1nFQ; Wed, 20 Nov 2024 06:38:11 +0000 Received: from mailgw01.mediatek.com ([216.200.240.184]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tDeKs-0000000EVrw-3iJq; Wed, 20 Nov 2024 06:37:12 +0000 X-UUID: dd18d9a2a70911ef82ff63e91e7eb18c-20241119 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=+gMs/diYXN4X9z9nI+JN/RNmvVcQKJVNx8MA0OWmObQ=; b=LuwcqE0yZnCObFpVMBJA8S++6g0pofeAwsubYTTtM9isJwZClk+w0hDPm8Lx7IONFnDayQsMhU3o+ji5ApHE0uilklMdtz6q51yUROElZ+MT4IQDPCphEIVRI2X07dNkDsT9eFXoHAuOKj7/tZyfcM+WoQAxaWVNOwKGe5Vx7wY=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.44,REQID:83ba943b-29b0-4413-a8fd-65ed0d0247f9,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:464815b,CLOUDID:04f218b9-596a-4e31-81f2-cae532fa1b81,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:81|82|102,TC:nil,Content:0,EDM:-3,IP :nil,URL:0,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0, LES:1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-UUID: dd18d9a2a70911ef82ff63e91e7eb18c-20241119 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 347994005; Tue, 19 Nov 2024 23:37:07 -0700 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs13n2.mediatek.inc (172.21.101.108) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Wed, 20 Nov 2024 14:37:04 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Wed, 20 Nov 2024 14:37:04 +0800 From: Friday Yang To: Yong Wu , Krzysztof Kozlowski , Rob Herring , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Philipp Zabel CC: , , , , , Friday Yang Subject: [PATCH v2 1/2] dt-bindings: memory: mediatek: Add SMI reset and clamp related property Date: Wed, 20 Nov 2024 14:36:38 +0800 Message-ID: <20241120063701.8194-2-friday.yang@mediatek.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20241120063701.8194-1-friday.yang@mediatek.com> References: <20241120063701.8194-1-friday.yang@mediatek.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241119_223710_927645_1AD0E4C0 X-CRM114-Status: GOOD ( 17.09 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org On the MediaTek platform, some SMI LARBs are directly linked to SMI Common. While some SMI LARBs are linked to SMI Sub Common, then SMI Sub Common is linked to SMI Common. The hardware block diagram could be described as below. Add 'resets' and 'reset-names' for SMI LARBs to support SMI reset and clamp operation. The SMI reset driver could get the reset signal through the two properties. SMI-Common(Smart Multimedia Interface Common) | +----------------+------------------+ | | | | | | | | | | | | | | | larb0 SMI-Sub-Common0 SMI-Sub-Common1 | | | | | larb1 larb2 larb3 larb7 larb9 Signed-off-by: Friday Yang --- Although this can pass the dtbs_check, maybe there is a better way to describe the requirements for 'resets' and 'reset-names' in bindings. But I don't find a better way to describe it that only SMI larbs located in camera and image subsys requires the 'resets' and 'reset-names'. I would appreciate it if you could give some suggestions. .../mediatek,smi-common.yaml | 2 + .../memory-controllers/mediatek,smi-larb.yaml | 53 +++++++++++++++---- 2 files changed, 44 insertions(+), 11 deletions(-) -- 2.46.0 diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml index 2f36ac23604c..4392d349878c 100644 --- a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml @@ -39,6 +39,7 @@ properties: - mediatek,mt8186-smi-common - mediatek,mt8188-smi-common-vdo - mediatek,mt8188-smi-common-vpp + - mediatek,mt8188-smi-sub-common - mediatek,mt8192-smi-common - mediatek,mt8195-smi-common-vdo - mediatek,mt8195-smi-common-vpp @@ -107,6 +108,7 @@ allOf: compatible: contains: enum: + - mediatek,mt8188-smi-sub-common - mediatek,mt8195-smi-sub-common then: required: diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml index 2381660b324c..302c0f93b49d 100644 --- a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml @@ -69,6 +69,18 @@ properties: description: the hardware id of this larb. It's only required when this hardware id is not consecutive from its M4U point of view. + resets: + maxItems: 1 + description: This contains a phandle to the reset controller node and an index + to a reset signal. SMI larbs need to get the reset controller by the node. + SMI could get the reset signal by the index number defined in the header + include/dt-bindings/reset/mt8188-resets.h. + + reset-names: + const: larb + description: The name of reset controller. SMI driver need to obtain the + reset controller based on this. + required: - compatible - reg @@ -125,19 +137,38 @@ allOf: required: - mediatek,larb-id + - if: # only for camera and image subsys + properties: + mediatek,smi: + contains: + enum: + - smi_sub_common_img0_4x1 + - smi_sub_common_img1_4x1 + - smi_sub_common_cam_5x1 + - smi_sub_common_cam_8x1 + + then: + required: + - resets + - reset-names + additionalProperties: false examples: - |+ - #include - #include - - larb1: larb@16010000 { - compatible = "mediatek,mt8173-smi-larb"; - reg = <0x16010000 0x1000>; - mediatek,smi = <&smi_common>; - power-domains = <&scpsys MT8173_POWER_DOMAIN_VDEC>; - clocks = <&vdecsys CLK_VDEC_CKEN>, - <&vdecsys CLK_VDEC_LARB_CKEN>; - clock-names = "apb", "smi"; + #include + #include + #include + + larb10: smi@15120000 { + compatible = "mediatek,mt8188-smi-larb"; + reg = <0 0x15120000 0 0x1000>; + clocks = <&imgsys CLK_IMGSYS_MAIN_DIP0>, + <&imgsys1_dip_top CLK_IMGSYS1_DIP_TOP_LARB10>; + clock-names = "apb", "smi"; + power-domains = <&spm MT8188_POWER_DOMAIN_DIP>; + resets = <&imgsys1_dip_nr_rst MT8188_SMI_RST_LARB10>; + reset-names = "larb"; + mediatek,larb-id = <10>; + mediatek,smi = <&smi_sub_common_img0_4x1>; }; From patchwork Wed Nov 20 06:36:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Friday Yang X-Patchwork-Id: 13880744 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 34C3AD6E2CA for ; Wed, 20 Nov 2024 06:40:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; 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Tue, 19 Nov 2024 23:37:09 -0700 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs11n2.mediatek.inc (172.21.101.187) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Wed, 20 Nov 2024 14:37:06 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Wed, 20 Nov 2024 14:37:05 +0800 From: Friday Yang To: Yong Wu , Krzysztof Kozlowski , Rob Herring , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Philipp Zabel CC: , , , , , Friday Yang Subject: [PATCH v2 2/2] memory: mtk-smi: mt8188: Add SMI clamp function Date: Wed, 20 Nov 2024 14:36:39 +0800 Message-ID: <20241120063701.8194-3-friday.yang@mediatek.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20241120063701.8194-1-friday.yang@mediatek.com> References: <20241120063701.8194-1-friday.yang@mediatek.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241119_223715_388673_669C2C45 X-CRM114-Status: GOOD ( 23.89 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org In order to avoid handling glitch signal when MTCMOS on/off, SMI need clamp and reset operation. Parse power reset settings for LARBs which need to reset. Register genpd callback for SMI LARBs and apply reset operations in the callback. Signed-off-by: Friday Yang --- drivers/memory/mtk-smi.c | 175 ++++++++++++++++++++++++++++++++++++++- 1 file changed, 171 insertions(+), 4 deletions(-) diff --git a/drivers/memory/mtk-smi.c b/drivers/memory/mtk-smi.c index 2bc034dff691..c7119f655350 100644 --- a/drivers/memory/mtk-smi.c +++ b/drivers/memory/mtk-smi.c @@ -10,15 +10,21 @@ #include #include #include +#include #include #include #include #include +#include #include +#include +#include +#include #include #include #include #include +#include /* SMI COMMON */ #define SMI_L1LEN 0x100 @@ -36,6 +42,13 @@ #define SMI_DCM 0x300 #define SMI_DUMMY 0x444 +#define SMI_COMMON_CLAMP_EN 0x3c0 +#define SMI_COMMON_CLAMP_EN_SET 0x3c4 +#define SMI_COMMON_CLAMP_EN_CLR 0x3c8 +#define SMI_COMMON_CLAMP_MASK(inport) BIT(inport) + +#define SMI_SUB_COMM_INPORT_NR (8) + /* SMI LARB */ #define SMI_LARB_SLP_CON 0xc #define SLP_PROT_EN BIT(0) @@ -134,6 +147,7 @@ struct mtk_smi_larb_gen { unsigned int larb_direct_to_common_mask; unsigned int flags_general; const u8 (*ostd)[SMI_LARB_PORT_NR_MAX]; + const u8 *clamp_port; }; struct mtk_smi { @@ -150,6 +164,7 @@ struct mtk_smi { }; struct mtk_smi_larb { /* larb: local arbiter */ + struct device *dev; struct mtk_smi smi; void __iomem *base; struct device *smi_common_dev; /* common or sub-common dev */ @@ -157,6 +172,10 @@ struct mtk_smi_larb { /* larb: local arbiter */ int larbid; u32 *mmu; unsigned char *bank; + struct regmap *sub_comm_syscon; + u8 sub_comm_inport; + struct notifier_block nb; + struct reset_control *rst_con; }; static int @@ -377,6 +396,19 @@ static const u8 mtk_smi_larb_mt8195_ostd[][SMI_LARB_PORT_NR_MAX] = { [28] = {0x1a, 0x0e, 0x0a, 0x0a, 0x0c, 0x0e, 0x10,}, }; +static const u8 mtk_smi_larb_clamp_port_mt8188[] = { + [MT8188_SMI_RST_LARB10] = 1, + [MT8188_SMI_RST_LARB11A] = 2, + [MT8188_SMI_RST_LARB11C] = 3, + [MT8188_SMI_RST_LARB12] = 0, + [MT8188_SMI_RST_LARB11B] = 2, + [MT8188_SMI_RST_LARB15] = 1, + [MT8188_SMI_RST_LARB16B] = 2, + [MT8188_SMI_RST_LARB17B] = 3, + [MT8188_SMI_RST_LARB16A] = 2, + [MT8188_SMI_RST_LARB17A] = 3, +}; + static const struct mtk_smi_larb_gen mtk_smi_larb_mt2701 = { .port_in_larb = { LARB0_PORT_OFFSET, LARB1_PORT_OFFSET, @@ -423,6 +455,7 @@ static const struct mtk_smi_larb_gen mtk_smi_larb_mt8188 = { .flags_general = MTK_SMI_FLAG_THRT_UPDATE | MTK_SMI_FLAG_SW_FLAG | MTK_SMI_FLAG_SLEEP_CTL | MTK_SMI_FLAG_CFG_PORT_SEC_CTL, .ostd = mtk_smi_larb_mt8188_ostd, + .clamp_port = mtk_smi_larb_clamp_port_mt8188, }; static const struct mtk_smi_larb_gen mtk_smi_larb_mt8192 = { @@ -472,6 +505,60 @@ static void mtk_smi_larb_sleep_ctrl_disable(struct mtk_smi_larb *larb) writel_relaxed(0, larb->base + SMI_LARB_SLP_CON); } +static int mtk_smi_larb_clamp_protect_enable(struct device *dev) +{ + struct mtk_smi_larb *larb = dev_get_drvdata(dev); + int ret; + + /* sub_comm_syscon could be NULL if larb directly linked to SMI common */ + if (!larb->sub_comm_syscon) + return -EINVAL; + + ret = regmap_write(larb->sub_comm_syscon, SMI_COMMON_CLAMP_EN_SET, + SMI_COMMON_CLAMP_MASK(larb->sub_comm_inport)); + if (ret) + dev_err(dev, "Unable to enable clamp, inport %d, ret %d\n", + larb->sub_comm_inport, ret); + + return ret; +} + +static int mtk_smi_larb_clamp_protect_disble(struct device *dev) +{ + struct mtk_smi_larb *larb = dev_get_drvdata(dev); + int ret; + + /* sub_comm_syscon could be NULL if larb directly linked to SMI common */ + if (!larb->sub_comm_syscon) + return -EINVAL; + + ret = regmap_write(larb->sub_comm_syscon, SMI_COMMON_CLAMP_EN_CLR, + SMI_COMMON_CLAMP_MASK(larb->sub_comm_inport)); + if (ret) + dev_err(dev, "Unable to disable clamp, inport %d, ret %d\n", + larb->sub_comm_inport, ret); + + return ret; +} + +static int mtk_smi_genpd_callback(struct notifier_block *nb, + unsigned long flags, void *data) +{ + struct mtk_smi_larb *larb = container_of(nb, struct mtk_smi_larb, nb); + struct device *dev = larb->dev; + + if (flags == GENPD_NOTIFY_PRE_ON || flags == GENPD_NOTIFY_PRE_OFF) { + /* disable related SMI sub-common port */ + mtk_smi_larb_clamp_protect_enable(dev); + } else if (flags == GENPD_NOTIFY_ON) { + /* enable related SMI sub-common port */ + reset_control_reset(larb->rst_con); + mtk_smi_larb_clamp_protect_disble(dev); + } + + return NOTIFY_OK; +} + static int mtk_smi_device_link_common(struct device *dev, struct device **com_dev) { struct platform_device *smi_com_pdev; @@ -528,6 +615,66 @@ static int mtk_smi_dts_clk_init(struct device *dev, struct mtk_smi *smi, return ret; } +static int mtk_smi_larb_parse_clamp_info(struct mtk_smi_larb *larb) +{ + struct device *dev = larb->dev; + const struct mtk_smi_larb_gen *larb_gen = larb->larb_gen; + struct device_node *smi_node; + struct of_phandle_args args; + int ret, index; + + /* Only SMI LARBs located in camera and image subsys need to + * apply clamp and reset operation, others can be skipped. + */ + ret = of_parse_phandle_with_fixed_args(dev->of_node, + "resets", 1, 0, &args); + if (ret) + return 0; + + smi_node = of_parse_phandle(dev->of_node, "mediatek,smi", 0); + if (!smi_node) + return -EINVAL; + + index = args.args[0]; + larb->sub_comm_inport = larb_gen->clamp_port[index]; + larb->sub_comm_syscon = device_node_to_regmap(smi_node); + of_node_put(smi_node); + + if (IS_ERR(larb->sub_comm_syscon) || + larb->sub_comm_inport >= SMI_SUB_COMM_INPORT_NR) { + larb->sub_comm_syscon = NULL; + return -EINVAL; + } + + return 0; +} + +static int mtk_smi_larb_parse_reset_info(struct mtk_smi_larb *larb) +{ + struct device *dev = larb->dev; + int ret; + + /* Only SMI LARBs located in camera and image subsys need to + * apply clamp and reset operation, others can be skipped. + */ + if (!of_find_property(dev->of_node, "resets", NULL)) + return 0; + + larb->rst_con = devm_reset_control_get(dev, "larb"); + if (IS_ERR(larb->rst_con)) + return dev_err_probe(dev, PTR_ERR(larb->rst_con), + "Can not get larb reset controller\n"); + + larb->nb.notifier_call = mtk_smi_genpd_callback; + ret = dev_pm_genpd_add_notifier(dev, &larb->nb); + if (ret) { + dev_err(dev, "Failed to add genpd callback %d\n", ret); + return -EINVAL; + } + + return 0; +} + static int mtk_smi_larb_probe(struct platform_device *pdev) { struct mtk_smi_larb *larb; @@ -538,6 +685,7 @@ static int mtk_smi_larb_probe(struct platform_device *pdev) if (!larb) return -ENOMEM; + larb->dev = dev; larb->larb_gen = of_device_get_match_data(dev); larb->base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(larb->base)) @@ -554,15 +702,29 @@ static int mtk_smi_larb_probe(struct platform_device *pdev) if (ret < 0) return ret; - pm_runtime_enable(dev); + /* find sub common to clamp larb for ISP software reset */ + ret = mtk_smi_larb_parse_clamp_info(larb); + if (ret) { + dev_err(dev, "Failed to get clamp setting for larb\n"); + goto err_link_remove; + } + + ret = mtk_smi_larb_parse_reset_info(larb); + if (ret) { + dev_err(dev, "Failed to get power setting for larb\n"); + goto err_link_remove; + } + platform_set_drvdata(pdev, larb); ret = component_add(dev, &mtk_smi_larb_component_ops); if (ret) - goto err_pm_disable; + goto err_link_remove; + + pm_runtime_enable(dev); + return 0; -err_pm_disable: - pm_runtime_disable(dev); +err_link_remove: device_link_remove(dev, larb->smi_common_dev); return ret; } @@ -686,6 +848,10 @@ static const struct mtk_smi_common_plat mtk_smi_common_mt8188_vpp = { .init = mtk_smi_common_mt8195_init, }; +static const struct mtk_smi_common_plat mtk_smi_sub_common_mt8188 = { + .type = MTK_SMI_GEN2_SUB_COMM, +}; + static const struct mtk_smi_common_plat mtk_smi_common_mt8192 = { .type = MTK_SMI_GEN2, .has_gals = true, @@ -729,6 +895,7 @@ static const struct of_device_id mtk_smi_common_of_ids[] = { {.compatible = "mediatek,mt8186-smi-common", .data = &mtk_smi_common_mt8186}, {.compatible = "mediatek,mt8188-smi-common-vdo", .data = &mtk_smi_common_mt8188_vdo}, {.compatible = "mediatek,mt8188-smi-common-vpp", .data = &mtk_smi_common_mt8188_vpp}, + {.compatible = "mediatek,mt8188-smi-sub-common", .data = &mtk_smi_sub_common_mt8188}, {.compatible = "mediatek,mt8192-smi-common", .data = &mtk_smi_common_mt8192}, {.compatible = "mediatek,mt8195-smi-common-vdo", .data = &mtk_smi_common_mt8195_vdo}, {.compatible = "mediatek,mt8195-smi-common-vpp", .data = &mtk_smi_common_mt8195_vpp},