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Signed-off-by: Antoniu Miclaus --- .../devicetree/bindings/iio/frequency/adf4371.yaml | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/Documentation/devicetree/bindings/iio/frequency/adf4371.yaml b/Documentation/devicetree/bindings/iio/frequency/adf4371.yaml index 1cb2adaf66f9..ef241c38520c 100644 --- a/Documentation/devicetree/bindings/iio/frequency/adf4371.yaml +++ b/Documentation/devicetree/bindings/iio/frequency/adf4371.yaml @@ -40,6 +40,17 @@ properties: output stage will shut down until the ADF4371/ADF4372 achieves lock as measured by the digital lock detect circuitry. + adi,reference-doubler-enable: + type: boolean + description: + If this property is present, the reference doubler block is enabled. + + adi,adi,reference-div2-enable: + type: boolean + description: + If this property is present, the reference divide by 2 clock is enabled. + This feature can be used to provide a 50% duty cycle signal to the PFD. + required: - compatible - reg From patchwork Fri Nov 22 11:32:14 2024 Content-Type: text/plain; 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Fri, 22 Nov 2024 06:32:51 -0500 Received: from zeus.spd.analog.com (10.66.68.11) by ashbmbx8.ad.analog.com (10.64.17.5) with Microsoft SMTP Server id 15.2.986.14 via Frontend Transport; Fri, 22 Nov 2024 06:32:51 -0500 Received: from amiclaus-VirtualBox.ad.analog.com (AMICLAUS-L02.ad.analog.com [10.48.65.168]) by zeus.spd.analog.com (8.15.1/8.15.1) with ESMTP id 4AMBWhjI011707; Fri, 22 Nov 2024 06:32:48 -0500 From: Antoniu Miclaus To: , , , , , , CC: Antoniu Miclaus Subject: [PATCH 2/2] iio: frequency: adf4371: add ref doubler and div2 Date: Fri, 22 Nov 2024 13:32:14 +0200 Message-ID: <20241122113226.49346-2-antoniu.miclaus@analog.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241122113226.49346-1-antoniu.miclaus@analog.com> References: <20241122113226.49346-1-antoniu.miclaus@analog.com> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ADIRuleOP-NewSCL: Rule Triggered X-Proofpoint-GUID: HeTr84pVKyRpMuzmIc7ZHKwNy-0ul_SA X-Proofpoint-ORIG-GUID: HeTr84pVKyRpMuzmIc7ZHKwNy-0ul_SA X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 mlxscore=0 bulkscore=0 spamscore=0 phishscore=0 mlxlogscore=999 adultscore=0 clxscore=1015 malwarescore=0 lowpriorityscore=0 impostorscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2411220098 Add support for the reference doubler and the reference divide by 2 clock. Signed-off-by: Antoniu Miclaus --- drivers/iio/frequency/adf4371.c | 37 +++++++++++++++++++++++++++++++-- 1 file changed, 35 insertions(+), 2 deletions(-) diff --git a/drivers/iio/frequency/adf4371.c b/drivers/iio/frequency/adf4371.c index b27088464826..02d42652dfdd 100644 --- a/drivers/iio/frequency/adf4371.c +++ b/drivers/iio/frequency/adf4371.c @@ -41,6 +41,12 @@ #define ADF4371_MOD2WORD_MSK GENMASK(5, 0) #define ADF4371_MOD2WORD(x) FIELD_PREP(ADF4371_MOD2WORD_MSK, x) +/* ADF4371_REG22 */ +#define ADF4371_REF_DOUB_MASK BIT(5) +#define ADF4371_REF_DOUB(x) FIELD_PREP(ADF4371_REF_DOUB_MASK, x) +#define ADF4371_RDIV2_MASK BIT(4) +#define ADF4371_RDIV2(x) FIELD_PREP(ADF4371_RDIV2_MASK, x) + /* ADF4371_REG24 */ #define ADF4371_RF_DIV_SEL_MSK GENMASK(6, 4) #define ADF4371_RF_DIV_SEL(x) FIELD_PREP(ADF4371_RF_DIV_SEL_MSK, x) @@ -70,6 +76,9 @@ #define ADF4371_MAX_FREQ_PFD 250000000UL /* Hz */ #define ADF4371_MAX_FREQ_REFIN 600000000UL /* Hz */ +#define ADF4371_MIN_CLKIN_DOUB_FREQ 10000000ULL /* Hz */ +#define ADF4371_MAX_CLKIN_DOUB_FREQ 125000000ULL /* Hz */ + /* MOD1 is a 24-bit primary modulus with fixed value of 2^25 */ #define ADF4371_MODULUS1 33554432ULL /* MOD2 is the programmable, 14-bit auxiliary fractional modulus */ @@ -175,6 +184,8 @@ struct adf4371_state { unsigned int mod2; unsigned int rf_div_sel; unsigned int ref_div_factor; + bool ref_doubler_en; + bool ref_div2_en; u8 buf[10] __aligned(IIO_DMA_MINALIGN); }; @@ -497,22 +508,44 @@ static int adf4371_setup(struct adf4371_state *st) return ret; } + if (device_property_read_bool(&st->spi->dev, + "adi,reference-doubler-enable")) + st->ref_doubler_en = true; + + if (device_property_read_bool(&st->spi->dev, + "adi,reference-div2-enable")) + st->ref_div2_en = true; + /* Set address in ascending order, so the bulk_write() will work */ ret = regmap_update_bits(st->regmap, ADF4371_REG(0x0), ADF4371_ADDR_ASC_MSK | ADF4371_ADDR_ASC_R_MSK, ADF4371_ADDR_ASC(1) | ADF4371_ADDR_ASC_R(1)); if (ret < 0) return ret; + + if (st->ref_doubler_en && + (st->clkin_freq > ADF4371_MAX_CLKIN_DOUB_FREQ || + st->clkin_freq < ADF4371_MIN_CLKIN_DOUB_FREQ)) + st->ref_doubler_en = false; + + ret = regmap_update_bits(st->regmap, ADF4371_REG(0x22), + ADF4371_REF_DOUB_MASK | + ADF4371_RDIV2_MASK, + ADF4371_REF_DOUB(st->ref_doubler_en) | + ADF4371_RDIV2(st->ref_div2_en)); + if (ret < 0) + return ret; + /* * Calculate and maximize PFD frequency * fPFD = REFIN × ((1 + D)/(R × (1 + T))) * Where D is the REFIN doubler bit, T is the reference divide by 2, * R is the reference division factor - * TODO: it is assumed D and T equal 0. */ do { st->ref_div_factor++; - st->fpfd = st->clkin_freq / st->ref_div_factor; + st->fpfd = (st->clkin_freq * (st->ref_doubler_en ? 2 : 1)) / + (st->ref_div_factor * (st->ref_div2_en ? 2 : 1)); } while (st->fpfd > ADF4371_MAX_FREQ_PFD); /* Calculate Timeouts */