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[80.145.89.241]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3825fbedf63sm2151095f8f.102.2024.11.22.03.33.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Nov 2024 03:33:57 -0800 (PST) From: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= To: Jonathan Cameron , Lars-Peter Clausen , Michael Hennerich Cc: Alexandru Ardelean , Alisa-Dariana Roman , Andy Shevchenko , Conor Dooley , David Lechner , Dumitru Ceclan , Krzysztof Kozlowski , Nuno Sa , Rob Herring , devicetree@vger.kernel.org, linux-iio@vger.kernel.org Subject: [PATCH v3 01/10] iio: adc: ad7124: Don't create more channels than the driver can handle Date: Fri, 22 Nov 2024 12:33:20 +0100 Message-ID: <20241122113322.242875-13-u.kleine-koenig@baylibre.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241122113322.242875-12-u.kleine-koenig@baylibre.com> References: <20241122113322.242875-12-u.kleine-koenig@baylibre.com> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1454; i=u.kleine-koenig@baylibre.com; h=from:subject; bh=zn8zvV9Mo4O2rpc8Z3avU2Iyc7Z00tacRFBEl6WqSmQ=; b=owEBbQGS/pANAwAKAY+A+1h9Ev5OAcsmYgBnQGwFdZucAX2c0f4j3lwLFQfEx4Ynwm9Zsma60 WqCqNIV1u+JATMEAAEKAB0WIQQ/gaxpOnoeWYmt/tOPgPtYfRL+TgUCZ0BsBQAKCRCPgPtYfRL+ TqowB/92c27FdrHVsaMkzSVvM/75ogPI76TKY+Fck42/nyak/0MB5xhqAVN2YJMG0FokNJV9MzY SEDtU7+h1v5z9i9ZBQLDLpbD6AdyipPFBY4Gi6GzjWP/vO/4i7E2m+EcWu188GqwiF1CxD6bu/B TZeRtUjhE4OdiIeDm7iywuJIiWOYsbVco0+qZAVMogRxEeJvL+4uLu1g7TERZg2KUc1YRPLCw8B tGIyVJrK7SKkBPXxrbsTzOAJN2q63JiOPJtd/pAzjp+1OWg4zozDSo2z/T/0/R3feqDevh6ZgKW YuA75Hz1LXj1PJ8cxwlGhul91KZSiXpiflNmGuto6S+c8b9P X-Developer-Key: i=u.kleine-koenig@baylibre.com; a=openpgp; fpr=0D2511F322BFAB1C1580266BE2DCDD9132669BD6 The ad7124-4 and ad7124-8 both support 16 channel registers and assigns each channel defined in dt statically such a register. While the driver could be a bit more clever about this, it currently isn't and specifying more than 16 channels yields broken behaviour. So just refuse to bind in this situation. Fixes: b3af341bbd96 ("iio: adc: Add ad7124 support") Signed-off-by: Uwe Kleine-König --- drivers/iio/adc/ad7124.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/iio/adc/ad7124.c b/drivers/iio/adc/ad7124.c index 8d94bc2b1cac..5352b26bb391 100644 --- a/drivers/iio/adc/ad7124.c +++ b/drivers/iio/adc/ad7124.c @@ -821,6 +821,16 @@ static int ad7124_parse_channel_config(struct iio_dev *indio_dev, if (!st->num_channels) return dev_err_probe(dev, -ENODEV, "no channel children\n"); + /* + * The driver assigns each logical channel defined in the device tree + * statically one channel register. So only accept 16 such logical + * channels to not treat CONFIG_0 (i.e. the register following + * CHANNEL_15) as an additional channel register. The driver could be + * improved to lift this limitation. + */ + if (st->num_channels > AD7124_MAX_CHANNELS) + return dev_err_probe(dev, -EINVAL, "Too many channels defined\n"); + chan = devm_kcalloc(indio_dev->dev.parent, st->num_channels, sizeof(*chan), GFP_KERNEL); if (!chan) From patchwork Fri Nov 22 11:33:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= X-Patchwork-Id: 13883105 Received: from mail-lf1-f52.google.com (mail-lf1-f52.google.com [209.85.167.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 12ECC1DE2D2 for ; Fri, 22 Nov 2024 11:34:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.52 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732275243; cv=none; b=B2AQ8/i0jTJTmm5z8iKuf4KVzDBwZ0NGNSW3TJpjmcT+B48dSidoznIHNpi4ScE39EqexcNwDlqxkFzjc489/IEs2lvJzOXPTT/w/3DONq0X1Qf9oPnfSGLNTiXcs8nJxDoxD9dqkY6ykK1t4CxPtkWviEETHecAI0s3+dwGuGI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732275243; c=relaxed/simple; bh=UpCDFbHiLoBrphP0ZQ6Ni+CRtV5VYT4LknAceCYNRfw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=X/g18OSmvU0jfD7pie2gmLzfOLwgoFr631UTRO0qu/e/i2SEqKtY/Unq9SlJTLMgvCBh/+XM2IiBtZLnanErnGDXkKwdkihyPr8z6gIfaGGMWFy1RD5j3RDU9+xFMuBkUo5VLHYodTNVapG2Cyr+YYLxjwCKx8K6wyCtlhkqtwk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com; spf=pass smtp.mailfrom=baylibre.com; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b=YGBMnUyr; arc=none smtp.client-ip=209.85.167.52 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=baylibre.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=baylibre.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=baylibre-com.20230601.gappssmtp.com header.i=@baylibre-com.20230601.gappssmtp.com header.b="YGBMnUyr" Received: by mail-lf1-f52.google.com with SMTP id 2adb3069b0e04-53a007743e7so2246624e87.1 for ; Fri, 22 Nov 2024 03:34:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1732275239; x=1732880039; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=RITSuX/h//gaahWszdW0fpwFRnABn01F981JW4yCXNU=; b=YGBMnUyrP+1gw90WRkl279Kwbo27y98bVjfyMD7kR9B73C+vbxlNEkQLdZCekFnfyr 2JIzgdWik/38Elt168Sm19Cbd00ygu5Sgshsn6H6gip1Jxv+rus3yFIGPHqpbwB3a9cV ROORz2oDoAnPqSha3n58Fa9myno4Y6Y6bB7d2oCI0ZsKUQgxuo1gy5jel9jEqxp/x7kW oVVpPATVatuxxXMU8Y+1ZYs2LZTkfOkRU4n7tJM/EIx+YcHCDYbjGs+qen6chJc4dq4x gJxMEE4JYrG5DyPcvOUqbjIOb1o4iFNj8dx/XLgHW9mAABGYSn9lopxJs9fXXeHDGwRm 4OuA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1732275239; x=1732880039; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=RITSuX/h//gaahWszdW0fpwFRnABn01F981JW4yCXNU=; b=YZM/TZhmuTmVrx15oGcUwXTTy9E6LPSVh/+nCkYgzMEmKU8/Zapyu3fg+hhCtYv959 98Etl9MXetgbloK8KLetpGSzuRksLn/YRVAdBdrxT1ad3na5UTAqMbDdPxee0cfcIApY rcmxUfYXxlcT2dixDDUbao186jxLQrX6aMuc7NScU7GDHHI5S/IPtqPBU1fS/+dO2OBa d2QEymx3yNuzrnjPtx8f/eXLYKFIISutu3FoPECQMzck2nuG2WunNuKZhmfgUfMWpmKu jTkL79CRis7qAMW9g8BMvCpemlra4wADtUKekdSnD8dx7ZzymVHNZlmGnyugaZ/zvQ2D AbcA== X-Forwarded-Encrypted: i=1; AJvYcCX1rmqF+OBu9UfTnH3boWZ7yUmuscvfhxhR7imvlyanJl0UM6kRuPgoRXVlMTO1xn8GpuefWxtC3xo=@vger.kernel.org X-Gm-Message-State: AOJu0YwX6uIBcnYISmv/W37sO3zBiQTYaJ6dauZwWy9zmfEsKIyw4Hvm RiN7oc00tDjX6YZK1ODIqQ/ZHy/Y6q3i11mXAYGT5o/y84kPBc3Q1VBCAusb3JM= X-Gm-Gg: ASbGnctGdfkxKBJ5wy+IHB5hgpfKFYvR5zxpvDol3hJfo/WelxRgse7I3y8iyoYgJ7L Ju7ur51JzQ2UR5Xfzc/e3sixwhneVE6O+pNmxj1GwVKnEVLjgt8GsQgHBWe3gLHq4OOpVLEcR6e Xr2A9eSksFBDwe04ux2GmQlrkQeqU0AwsWUiyfsFYbGp3GVhbUplxM2SnRxD0dgHnM/91D381kL PfBZExSM6M1o/ZZ5LP/WaigT28JZjNQ3F4620SkFPo9mUl+muV4kwtRNENJdf5dDJak0VlaqG1A x9k= X-Google-Smtp-Source: AGHT+IFuJlxu5HJfwHL/G0HKYtzazTpe1NMfuln7ItQncr5JbRlzXCpYYyf6DYgRhYgcBMftOMdt0Q== X-Received: by 2002:a05:6512:b81:b0:539:ddf1:ac6f with SMTP id 2adb3069b0e04-53dd39a4c7dmr1223377e87.46.1732275239075; Fri, 22 Nov 2024 03:33:59 -0800 (PST) Received: from localhost (p509159f1.dip0.t-ipconnect.de. [80.145.89.241]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-433cde9800fsm24416405e9.40.2024.11.22.03.33.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Nov 2024 03:33:58 -0800 (PST) From: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= To: Jonathan Cameron , Lars-Peter Clausen , Michael Hennerich Cc: Alexandru Ardelean , Alisa-Dariana Roman , Andy Shevchenko , Conor Dooley , David Lechner , Dumitru Ceclan , Krzysztof Kozlowski , Nuno Sa , Rob Herring , devicetree@vger.kernel.org, linux-iio@vger.kernel.org Subject: [PATCH v3 02/10] iio: adc: ad7124: Refuse invalid input specifiers Date: Fri, 22 Nov 2024 12:33:21 +0100 Message-ID: <20241122113322.242875-14-u.kleine-koenig@baylibre.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241122113322.242875-12-u.kleine-koenig@baylibre.com> References: <20241122113322.242875-12-u.kleine-koenig@baylibre.com> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2144; i=u.kleine-koenig@baylibre.com; h=from:subject; bh=UpCDFbHiLoBrphP0ZQ6Ni+CRtV5VYT4LknAceCYNRfw=; b=owEBbQGS/pANAwAKAY+A+1h9Ev5OAcsmYgBnQGwH+1KZ5UiwNQ58Q3K97bSFf9BrVCEAt6t2k PM5wp0FvtGJATMEAAEKAB0WIQQ/gaxpOnoeWYmt/tOPgPtYfRL+TgUCZ0BsBwAKCRCPgPtYfRL+ TiUaB/4gYCNz94dKkWDcW0KKqFeOXvfsVUzt5cxSiRjARESlRrGbLd/24tMnF2r/tweF8QefAyn Q8eL0bowPaRpgKTQiNizArUA2g2PYxidP8ECNMVLw3y+FDabYZ+3m4JyI/htn20q5T/v9e22Rs0 y5i6nhXoK4xyieeuZOeubKPKPrQKjhi/YHN3MXcQadAV9WSDdwfjDFLNkMJiy+e0YKM9GE+lLEC cmEtaczQc9lV8kc3xlrwf1TLVvWVCy8AwwfMv9HS8PAGDIcQiCKBava15JfC+Mx7CSXuOvBg64V HgYGh53ihBgzqjiEijuCD/hEQwGXCPYIIIpCqiDrs140+/oR X-Developer-Key: i=u.kleine-koenig@baylibre.com; a=openpgp; fpr=0D2511F322BFAB1C1580266BE2DCDD9132669BD6 The ad7124-4 has 8 analog inputs; the input select values 8 to 15 are reserved and not to be used. These are fine for ad7124-8. For both ad7124-4 and ad7124-8 values bigger than 15 are internal channels that might appear as inputs in the channels specified in the device description according to the description of commit f1794fd7bdf7 ("iio: adc: ad7124: Remove input number limitation"), values bigger than 31 don't fit into the respective register bit field and the driver masked them to smaller values. Check for these invalid input specifiers and fail to probe if one is found. Fixes: f1794fd7bdf7 ("iio: adc: ad7124: Remove input number limitation") Signed-off-by: Uwe Kleine-König --- drivers/iio/adc/ad7124.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/iio/adc/ad7124.c b/drivers/iio/adc/ad7124.c index 5352b26bb391..1f3342373f1c 100644 --- a/drivers/iio/adc/ad7124.c +++ b/drivers/iio/adc/ad7124.c @@ -807,6 +807,19 @@ static int ad7124_check_chip_id(struct ad7124_state *st) return 0; } +/* + * Input specifiers 8 - 15 are explicitly reserved for ad7124-4 + * while they are fine for ad7124-8. Values above 31 don't fit + * into the register field and so are invalid for sure. + */ +static bool ad7124_valid_input_select(unsigned int ain, const struct ad7124_chip_info *info) +{ + if (ain >= info->num_inputs && ain < 16) + return false; + + return ain <= FIELD_MAX(AD7124_CHANNEL_AINM_MSK); +} + static int ad7124_parse_channel_config(struct iio_dev *indio_dev, struct device *dev) { @@ -859,6 +872,11 @@ static int ad7124_parse_channel_config(struct iio_dev *indio_dev, if (ret) return ret; + if (!ad7124_valid_input_select(ain[0], st->chip_info) || + !ad7124_valid_input_select(ain[1], st->chip_info)) + return dev_err_probe(dev, -EINVAL, + "diff-channels property of %pfwP contains invalid data\n", child); + st->channels[channel].nr = channel; st->channels[channel].ain = AD7124_CHANNEL_AINP(ain[0]) | AD7124_CHANNEL_AINM(ain[1]); From patchwork Fri Nov 22 11:33:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= X-Patchwork-Id: 13883107 Received: from mail-lf1-f53.google.com (mail-lf1-f53.google.com [209.85.167.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8FCC91DE4EB for ; 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[80.145.89.241]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3825fb30bfdsm2157536f8f.56.2024.11.22.03.34.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Nov 2024 03:34:00 -0800 (PST) From: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= To: Jonathan Cameron , Lars-Peter Clausen , Michael Hennerich Cc: Alexandru Ardelean , Alisa-Dariana Roman , Andy Shevchenko , Conor Dooley , David Lechner , Dumitru Ceclan , Krzysztof Kozlowski , Nuno Sa , Rob Herring , devicetree@vger.kernel.org, linux-iio@vger.kernel.org Subject: [PATCH v3 03/10] dt-bindings: iio: adc: adi,ad7124: Allow specifications of a gpio for irq line Date: Fri, 22 Nov 2024 12:33:22 +0100 Message-ID: <20241122113322.242875-15-u.kleine-koenig@baylibre.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241122113322.242875-12-u.kleine-koenig@baylibre.com> References: <20241122113322.242875-12-u.kleine-koenig@baylibre.com> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1905; i=u.kleine-koenig@baylibre.com; h=from:subject; bh=LR5pHXckvZl5Tv7d1tyrP9QH9OzPMit0Fd60NybG8t8=; b=owEBbQGS/pANAwAKAY+A+1h9Ev5OAcsmYgBnQGwK3n0rFUM30pvMNf0ReBZRIcrNLiAQoOy/d bLmRqnRrsKJATMEAAEKAB0WIQQ/gaxpOnoeWYmt/tOPgPtYfRL+TgUCZ0BsCgAKCRCPgPtYfRL+ TnR+CACN4VPCHsuSilSXsvvasA4WJ1MsIkTRD4pl2WLgcQO4UVd2c+rgE3f8GcTEJJPEJ7hHlyp GCCwJG8VnTiXDwhy/tTgThdp+0jispOOYSd0IInnPhkXoPCldh8mMSXZ/TbtPLQbvEnvvpbhBCy xtgbFzSQijGhKeZlyFe3+2itLaNw6pldUMhzAbTw3c+x9/n20FbGunCfBqSZtksGGZwYv8kdIDB sPCzZE2szpxkrerQsxV1foDGtccVlw0qPXNu0hfm9vZxSzKLT7PPxMFIPBldkKFiuKC+j2zX8Hk NROdSun/Cg9oC5Abjw4CEWRbVDNOTJCGzW8hDZrQ5scU1Rlf X-Developer-Key: i=u.kleine-koenig@baylibre.com; a=openpgp; fpr=0D2511F322BFAB1C1580266BE2DCDD9132669BD6 For the AD7124 chip the logical irq line (̅R̅D̅Y) is physically on the same pin as the spi MISO output (DOUT) and so reading a register might trigger an interrupt. For correct operation it's critical that the actual state of the pin can be read to judge if an interrupt event is a real one or just a spurious one triggered by toggling the line in its MISO mode. Allow specification of an "rdy-gpios" property that references a GPIO that can be used for that purpose. While this is typically the same GPIO also used (implicitly) as interrupt source, it is still supposed that the interrupt is specified as before and usual. Signed-off-by: Uwe Kleine-König --- Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml index 35ed04350e28..ebe77cbe87ff 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml @@ -37,6 +37,12 @@ properties: description: IRQ line for the ADC maxItems: 1 + rdy-gpios: + description: | + GPIO reading the ̅R̅D̅Y line. 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[80.145.89.241]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3825fbc42d4sm2186558f8f.85.2024.11.22.03.34.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Nov 2024 03:34:01 -0800 (PST) From: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= To: Jonathan Cameron , Lars-Peter Clausen , Michael Hennerich Cc: Alexandru Ardelean , Alisa-Dariana Roman , Andy Shevchenko , Conor Dooley , David Lechner , Dumitru Ceclan , Krzysztof Kozlowski , Nuno Sa , Rob Herring , devicetree@vger.kernel.org, linux-iio@vger.kernel.org Subject: [PATCH v3 04/10] iio: adc: ad_sigma_delta: Add support for reading irq status using a GPIO Date: Fri, 22 Nov 2024 12:33:23 +0100 Message-ID: <20241122113322.242875-16-u.kleine-koenig@baylibre.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241122113322.242875-12-u.kleine-koenig@baylibre.com> References: <20241122113322.242875-12-u.kleine-koenig@baylibre.com> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=3790; i=u.kleine-koenig@baylibre.com; h=from:subject; bh=sUW8vIxfv4BfM2wnxDmei7rYENfZBPESOqgmgidvtHE=; b=owEBbQGS/pANAwAKAY+A+1h9Ev5OAcsmYgBnQGwMkeVRPlBCDIXN05q38+9ftBM2B8Nxh7jYa KUjbePFP9yJATMEAAEKAB0WIQQ/gaxpOnoeWYmt/tOPgPtYfRL+TgUCZ0BsDAAKCRCPgPtYfRL+ Tl94B/9wAwfVq1gfejPKim6bMzkJepByvnAStoHY1yUe1K9TLbw6n2S9DractZ76kpYX/OTy8EH CkypjR5ftqznGM5gddWo+5rFrFAZ/HTA7RKM+Zk+Ff3HHZt2jGKSs8Gagy6DsfGSt6GZIvrKj6C apJHEp3GQxvDWWfE75yfX0f8P+EmIEdmAEDEoVB6KK7Kj8jxn//Wx9O0oSnAb1Xa4i1fYtU3dOE c3aH/dHk/ORGpB7ZjJ0gt6cD7o0UcmE/3nRfMDoxi3q0XL6a1cXlWITjGnAaCyi7OAqniJRmC/o Hi7zzG49WD2iFwa6fSGiK7Kh/k4fSWyP4SM9SIEzUGifH3Ov X-Developer-Key: i=u.kleine-koenig@baylibre.com; a=openpgp; fpr=0D2511F322BFAB1C1580266BE2DCDD9132669BD6 Some of the ADCs by Analog signal their irq condition on the MISO line. So typically that line is connected to an SPI controller and a GPIO. The GPIO is used as input and the respective interrupt is enabled when the last SPI transfer is completed. Depending on the GPIO controller the toggling MISO line might make the interrupt pending even while it's masked. In that case the irq handler is called immediately after irq_enable() and so before the device actually pulls that line low which results in non-sense values being reported to the upper layers. The only way to find out if the line was actually pulled low is to read the GPIO. (There is a flag in AD7124's status register that also signals if an interrupt was asserted, but reading that register toggles the MISO line and so might trigger another spurious interrupt.) Add the possibility to specify an interrupt GPIO in the machine description in addition to the plain interrupt. This GPIO is used then to check if the irq line is actually active in the irq handler. Signed-off-by: Uwe Kleine-König --- drivers/iio/adc/ad_sigma_delta.c | 35 ++++++++++++++++++++++---- include/linux/iio/adc/ad_sigma_delta.h | 1 + 2 files changed, 31 insertions(+), 5 deletions(-) diff --git a/drivers/iio/adc/ad_sigma_delta.c b/drivers/iio/adc/ad_sigma_delta.c index ea4aabd3960a..4c8d986b6609 100644 --- a/drivers/iio/adc/ad_sigma_delta.c +++ b/drivers/iio/adc/ad_sigma_delta.c @@ -539,12 +539,29 @@ static irqreturn_t ad_sd_data_rdy_trig_poll(int irq, void *private) { struct ad_sigma_delta *sigma_delta = private; - complete(&sigma_delta->completion); - disable_irq_nosync(irq); - sigma_delta->irq_dis = true; - iio_trigger_poll(sigma_delta->trig); + /* + * AD7124 and a few others use the same physical line for interrupt + * reporting (nRDY) and MISO. + * As MISO toggles when reading a register, this likely results in a + * pending interrupt. This has two consequences: a) The irq might + * trigger immediately after it's enabled even though the conversion + * isn't done yet; and b) checking the STATUS register's nRDY flag is + * off-limits as reading that would trigger another irq event. + * + * So read the MOSI line as GPIO (if available) and only trigger the irq + * if the line is active. + */ - return IRQ_HANDLED; + if (!sigma_delta->rdy_gpiod || gpiod_get_value(sigma_delta->rdy_gpiod)) { + complete(&sigma_delta->completion); + disable_irq_nosync(irq); + sigma_delta->irq_dis = true; + iio_trigger_poll(sigma_delta->trig); + + return IRQ_HANDLED; + } else { + return IRQ_NONE; + } } /** @@ -679,6 +696,14 @@ int ad_sd_init(struct ad_sigma_delta *sigma_delta, struct iio_dev *indio_dev, else sigma_delta->irq_line = spi->irq; + sigma_delta->rdy_gpiod = devm_gpiod_get_optional(&spi->dev, "rdy", GPIOD_IN); + if (IS_ERR(sigma_delta->rdy_gpiod)) + return dev_err_probe(&spi->dev, PTR_ERR(sigma_delta->rdy_gpiod), + "Failed to find rdy gpio\n"); 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[80.145.89.241]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3825fbc3531sm2196400f8f.80.2024.11.22.03.34.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Nov 2024 03:34:03 -0800 (PST) From: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= To: Jonathan Cameron , Lars-Peter Clausen , Michael Hennerich Cc: Alexandru Ardelean , Alisa-Dariana Roman , Andy Shevchenko , Conor Dooley , David Lechner , Dumitru Ceclan , Krzysztof Kozlowski , Nuno Sa , Rob Herring , devicetree@vger.kernel.org, linux-iio@vger.kernel.org Subject: [PATCH v3 05/10] iio: adc: ad_sigma_delta: Handle CS assertion as intended in ad_sd_read_reg_raw() Date: Fri, 22 Nov 2024 12:33:24 +0100 Message-ID: <20241122113322.242875-17-u.kleine-koenig@baylibre.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241122113322.242875-12-u.kleine-koenig@baylibre.com> References: <20241122113322.242875-12-u.kleine-koenig@baylibre.com> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=900; i=u.kleine-koenig@baylibre.com; h=from:subject; bh=Fwu9pQaKK4bs27HnVW7THTQBGwD2l8i0eSmDYU2vXCo=; b=owEBbQGS/pANAwAKAY+A+1h9Ev5OAcsmYgBnQGwP+uX3MtJEWS+RfPimNiqvazuzBpl/Y/8il dAOidMUjOCJATMEAAEKAB0WIQQ/gaxpOnoeWYmt/tOPgPtYfRL+TgUCZ0BsDwAKCRCPgPtYfRL+ TtQeCACfyQe6khjGWPIs1NVzkex84kRh0k98KqeDcKOtxhCaZH9NuGYdsMLcAbk9ZqX6bPkvO5m bXHALbVMq1mIo8nyfqd3FXsnNOgAstiP27UHFEoZYoX8delxVGSXFpu9wrXDNN6P/ckZbgIngHy fm5nhBvhEYYaH4ZaFGmVzxQ5MrXQL9I/mBlJQZCuJSqn8cuWM0+2gmrkHPEkeBgQxeF42CYU9Rk Ge5koPf9IR1VdKGlTxomJy2Zl3cawmaHIMJkxEaAl/Gz8vTlY7IdP/aUikBK9nssZn6iTncyAcb Cm60Ob3X+v++8+50hE/as31pef+RAyTSP1Aw5mGy+6D/i/BT X-Developer-Key: i=u.kleine-koenig@baylibre.com; a=openpgp; fpr=0D2511F322BFAB1C1580266BE2DCDD9132669BD6 When struct ad_sigma_delta::keep_cs_asserted was introduced only register writing was adapted to honor this new flag. Also respect it when reading a register. Fixes: df1d80aee963 ("iio: ad_sigma_delta: Properly handle SPI bus locking vs CS assertion") Signed-off-by: Uwe Kleine-König Reviewed-by: Trevor Gamblin --- drivers/iio/adc/ad_sigma_delta.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iio/adc/ad_sigma_delta.c b/drivers/iio/adc/ad_sigma_delta.c index 4c8d986b6609..5e7e5cb908d8 100644 --- a/drivers/iio/adc/ad_sigma_delta.c +++ b/drivers/iio/adc/ad_sigma_delta.c @@ -109,7 +109,7 @@ static int ad_sd_read_reg_raw(struct ad_sigma_delta *sigma_delta, }, { .rx_buf = val, .len = size, - .cs_change = sigma_delta->bus_locked, + .cs_change = sigma_delta->keep_cs_asserted, }, }; struct spi_message m; From patchwork Fri Nov 22 11:33:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= X-Patchwork-Id: 13883110 Received: from mail-wr1-f42.google.com (mail-wr1-f42.google.com [209.85.221.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 34C7B1DED78 for ; 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[80.145.89.241]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3825fbe91a6sm2178755f8f.86.2024.11.22.03.34.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Nov 2024 03:34:05 -0800 (PST) From: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= To: Jonathan Cameron , Lars-Peter Clausen , Michael Hennerich Cc: Alexandru Ardelean , Alisa-Dariana Roman , Andy Shevchenko , Conor Dooley , David Lechner , Dumitru Ceclan , Krzysztof Kozlowski , Nuno Sa , Rob Herring , devicetree@vger.kernel.org, linux-iio@vger.kernel.org Subject: [PATCH v3 06/10] iio: adc: ad_sigma_delta: Fix a race condition Date: Fri, 22 Nov 2024 12:33:25 +0100 Message-ID: <20241122113322.242875-18-u.kleine-koenig@baylibre.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241122113322.242875-12-u.kleine-koenig@baylibre.com> References: <20241122113322.242875-12-u.kleine-koenig@baylibre.com> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=5522; i=u.kleine-koenig@baylibre.com; h=from:subject; bh=48hHZ3ITVE+qUGX+Ga935RVOjvTMw3NoTRENrWrh6/E=; b=owEBbQGS/pANAwAKAY+A+1h9Ev5OAcsmYgBnQGwRaiSQuzz2pfzW8/2nunBfhnszmeW9rcEvK 9W5iiWoWH+JATMEAAEKAB0WIQQ/gaxpOnoeWYmt/tOPgPtYfRL+TgUCZ0BsEQAKCRCPgPtYfRL+ ToC6B/9LAt0lzH4PQkywNBOU+eav3Ic0JjMmL3dstfjgSzfQtG98c/RFzPSuc301O1uNi298Tpd xMKFNPmsKegqLQPWpGHL/VZdlQhW9pQcnOS+lZhrKn5/g07Am5AU3pGkk65eMNM0gt6HlaQOQVO AHJlY/2LOVv4kWQbiRwbcDx5a8AMRgHcMS0ct1DbE4VszFCFbum/Kgo1E7iX6TxlScqNknC9U+C Zk5w1MG8Uu1FE2f8rPCMLPJMDN8k6n5KCNVPUMUz09VLxGTX7FT7hIUTsCd7KuOpQRob0djLbuZ HuXUDbw6ZOHluWrUzxzAO5+E+PfmqCGQvXrCmllUr2a1FT8C X-Developer-Key: i=u.kleine-koenig@baylibre.com; a=openpgp; fpr=0D2511F322BFAB1C1580266BE2DCDD9132669BD6 The ad_sigma_delta driver helper uses irq_disable_nosync(). With that one it is possible that the irq handler still runs after the irq_disable_nosync() function call returns. Also to properly synchronize irq disabling in the different threads proper locking is needed and because it's unclear if the irq handler's irq_disable_nosync() call comes first or the one in the enabler's error path, all code locations that disable the irq must check for .irq_dis first to ensure there is exactly one disable per enable. So add a spinlock to the struct ad_sigma_delta and use it to synchronize irq enabling and disabling. Also only act in the irq handler if the irq is still enabled. Fixes: af3008485ea0 ("iio:adc: Add common code for ADI Sigma Delta devices") Signed-off-by: Uwe Kleine-König --- drivers/iio/adc/ad_sigma_delta.c | 57 ++++++++++++++++---------- include/linux/iio/adc/ad_sigma_delta.h | 1 + 2 files changed, 36 insertions(+), 22 deletions(-) diff --git a/drivers/iio/adc/ad_sigma_delta.c b/drivers/iio/adc/ad_sigma_delta.c index 5e7e5cb908d8..fd3560beb56b 100644 --- a/drivers/iio/adc/ad_sigma_delta.c +++ b/drivers/iio/adc/ad_sigma_delta.c @@ -202,6 +202,27 @@ int ad_sd_reset(struct ad_sigma_delta *sigma_delta, } EXPORT_SYMBOL_NS_GPL(ad_sd_reset, IIO_AD_SIGMA_DELTA); +static bool ad_sd_disable_irq(struct ad_sigma_delta *sigma_delta) +{ + guard(spinlock_irqsave)(&sigma_delta->irq_lock); + + if (!sigma_delta->irq_dis) { + sigma_delta->irq_dis = true; + disable_irq_nosync(sigma_delta->irq_line); + return true; + } else { + return false; + } +} + +static void ad_sd_enable_irq(struct ad_sigma_delta *sigma_delta) +{ + guard(spinlock_irqsave)(&sigma_delta->irq_lock); + + sigma_delta->irq_dis = false; + enable_irq(sigma_delta->irq_line); +} + int ad_sd_calibrate(struct ad_sigma_delta *sigma_delta, unsigned int mode, unsigned int channel) { @@ -221,12 +242,10 @@ int ad_sd_calibrate(struct ad_sigma_delta *sigma_delta, if (ret < 0) goto out; - sigma_delta->irq_dis = false; - enable_irq(sigma_delta->irq_line); + ad_sd_enable_irq(sigma_delta); time_left = wait_for_completion_timeout(&sigma_delta->completion, 2 * HZ); if (time_left == 0) { - sigma_delta->irq_dis = true; - disable_irq_nosync(sigma_delta->irq_line); + ad_sd_disable_irq(sigma_delta); ret = -EIO; } else { ret = 0; @@ -294,8 +313,7 @@ int ad_sigma_delta_single_conversion(struct iio_dev *indio_dev, ad_sigma_delta_set_mode(sigma_delta, AD_SD_MODE_SINGLE); - sigma_delta->irq_dis = false; - enable_irq(sigma_delta->irq_line); + ad_sd_enable_irq(sigma_delta); ret = wait_for_completion_interruptible_timeout( &sigma_delta->completion, HZ); @@ -314,10 +332,7 @@ int ad_sigma_delta_single_conversion(struct iio_dev *indio_dev, &raw_sample); out: - if (!sigma_delta->irq_dis) { - disable_irq_nosync(sigma_delta->irq_line); - sigma_delta->irq_dis = true; - } + ad_sd_disable_irq(sigma_delta); sigma_delta->keep_cs_asserted = false; ad_sigma_delta_set_mode(sigma_delta, AD_SD_MODE_IDLE); @@ -396,8 +411,7 @@ static int ad_sd_buffer_postenable(struct iio_dev *indio_dev) if (ret) goto err_unlock; - sigma_delta->irq_dis = false; - enable_irq(sigma_delta->irq_line); + ad_sd_enable_irq(sigma_delta); return 0; @@ -414,10 +428,7 @@ static int ad_sd_buffer_postdisable(struct iio_dev *indio_dev) reinit_completion(&sigma_delta->completion); wait_for_completion_timeout(&sigma_delta->completion, HZ); - if (!sigma_delta->irq_dis) { - disable_irq_nosync(sigma_delta->irq_line); - sigma_delta->irq_dis = true; - } + ad_sd_disable_irq(sigma_delta); sigma_delta->keep_cs_asserted = false; ad_sigma_delta_set_mode(sigma_delta, AD_SD_MODE_IDLE); @@ -516,8 +527,7 @@ static irqreturn_t ad_sd_trigger_handler(int irq, void *p) irq_handled: iio_trigger_notify_done(indio_dev->trig); - sigma_delta->irq_dis = false; - enable_irq(sigma_delta->irq_line); + ad_sd_enable_irq(sigma_delta); return IRQ_HANDLED; } @@ -550,12 +560,13 @@ static irqreturn_t ad_sd_data_rdy_trig_poll(int irq, void *private) * * So read the MOSI line as GPIO (if available) and only trigger the irq * if the line is active. + * + * Also as only disable_irq_nosync() is used to disable the irq, only + * act if the irq wasn't disabled before. */ - - if (!sigma_delta->rdy_gpiod || gpiod_get_value(sigma_delta->rdy_gpiod)) { + if ((!sigma_delta->rdy_gpiod || gpiod_get_value(sigma_delta->rdy_gpiod)) && + ad_sd_disable_irq(sigma_delta)) { complete(&sigma_delta->completion); - disable_irq_nosync(irq); - sigma_delta->irq_dis = true; iio_trigger_poll(sigma_delta->trig); return IRQ_HANDLED; @@ -691,6 +702,8 @@ int ad_sd_init(struct ad_sigma_delta *sigma_delta, struct iio_dev *indio_dev, } } + spin_lock_init(&sigma_delta->irq_lock); + if (info->irq_line) sigma_delta->irq_line = info->irq_line; else diff --git a/include/linux/iio/adc/ad_sigma_delta.h b/include/linux/iio/adc/ad_sigma_delta.h index 866b4c21794b..b3e4d89f2d06 100644 --- a/include/linux/iio/adc/ad_sigma_delta.h +++ b/include/linux/iio/adc/ad_sigma_delta.h @@ -85,6 +85,7 @@ struct ad_sigma_delta { /* private: */ struct completion completion; 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[80.145.89.241]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-433cde0db3csm24366755e9.10.2024.11.22.03.34.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Nov 2024 03:34:06 -0800 (PST) From: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= To: Jonathan Cameron , Lars-Peter Clausen , Michael Hennerich Cc: Alexandru Ardelean , Alisa-Dariana Roman , Andy Shevchenko , Conor Dooley , David Lechner , Dumitru Ceclan , Krzysztof Kozlowski , Nuno Sa , Rob Herring , devicetree@vger.kernel.org, linux-iio@vger.kernel.org Subject: [PATCH v3 07/10] iio: adc: ad_sigma_delta: Store information about reset sequence length Date: Fri, 22 Nov 2024 12:33:26 +0100 Message-ID: <20241122113322.242875-19-u.kleine-koenig@baylibre.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241122113322.242875-12-u.kleine-koenig@baylibre.com> References: <20241122113322.242875-12-u.kleine-koenig@baylibre.com> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=6454; i=u.kleine-koenig@baylibre.com; h=from:subject; bh=3ouC6J8jpQ6T3v2X4y2oAYZtCrMvewc3DweIK6uwMcQ=; b=owEBbQGS/pANAwAKAY+A+1h9Ev5OAcsmYgBnQGwUT0QNl9RCzqLhsvPaC1sJMvPjbfgJBMENb gVwGgwTFjiJATMEAAEKAB0WIQQ/gaxpOnoeWYmt/tOPgPtYfRL+TgUCZ0BsFAAKCRCPgPtYfRL+ TpqPB/0dx9cIU3Dd3gLnlRnE0IGx7IdbKgBO7WN1iFtCJQsTMaSVGneTEZZDx2jtDfTBKrcTA51 nf64S3u7ukJGfRhXE7z81abDotwYEKey0sbK/9yW9AefhOnRyThx4nhB/6CWyr+EMhGRJ6xPMzC xDI6vuTKg6zXHbfvexVFpIxImcCD06/xIU1+4bB2ZH7yQ2v3DSCuvF7R3RrkRUByluAYOBSI1jT xQcB8VDhSCyQ0ma9MIR2+JjbPEDZm+cX7q4oByxIE3igwrFZHTlthaA86rNgPbmZoq7g6D2+NxO iyie+ao+0/jjKHVtnDd2fHZ31nn2+8TUPp4URpixTw8+EFBI X-Developer-Key: i=u.kleine-koenig@baylibre.com; a=openpgp; fpr=0D2511F322BFAB1C1580266BE2DCDD9132669BD6 The various chips can be reset using a sequence of SPI transfers with MOSI = 1. The length of such a sequence varies from chip to chip. Store that length in struct ad_sigma_delta_info and replace the respective parameter to ad_sd_reset() with it. Note the ad7192 used to pass 48 as length but the documentation specifies 40 as the required length. Assuming the latter is right. (Using a too long sequence doesn't hurt apart from using a longer spi transfer than necessary, so this is no relevant fix.) The motivation for storing this information is that this is useful to clear a pending RDY signal in the next change. Signed-off-by: Uwe Kleine-König --- drivers/iio/adc/ad7124.c | 3 ++- drivers/iio/adc/ad7173.c | 1 + drivers/iio/adc/ad7192.c | 4 +++- drivers/iio/adc/ad7791.c | 1 + drivers/iio/adc/ad7793.c | 3 ++- drivers/iio/adc/ad_sigma_delta.c | 7 +++---- include/linux/iio/adc/ad_sigma_delta.h | 5 +++-- 7 files changed, 15 insertions(+), 9 deletions(-) diff --git a/drivers/iio/adc/ad7124.c b/drivers/iio/adc/ad7124.c index 1f3342373f1c..b17c3dbeaeba 100644 --- a/drivers/iio/adc/ad7124.c +++ b/drivers/iio/adc/ad7124.c @@ -571,6 +571,7 @@ static const struct ad_sigma_delta_info ad7124_sigma_delta_info = { .data_reg = AD7124_DATA, .num_slots = 8, .irq_flags = IRQF_TRIGGER_FALLING, + .num_resetclks = 64, }; static int ad7124_read_raw(struct iio_dev *indio_dev, @@ -756,7 +757,7 @@ static int ad7124_soft_reset(struct ad7124_state *st) unsigned int readval, timeout; int ret; - ret = ad_sd_reset(&st->sd, 64); + ret = ad_sd_reset(&st->sd); if (ret < 0) return ret; diff --git a/drivers/iio/adc/ad7173.c b/drivers/iio/adc/ad7173.c index 0702ec71aa29..2550194efee8 100644 --- a/drivers/iio/adc/ad7173.c +++ b/drivers/iio/adc/ad7173.c @@ -744,6 +744,7 @@ static struct ad_sigma_delta_info ad7173_sigma_delta_info = { .read_mask = BIT(6), .status_ch_mask = GENMASK(3, 0), .data_reg = AD7173_REG_DATA, + .num_resetclks = 64, }; static int ad7173_setup(struct iio_dev *indio_dev) diff --git a/drivers/iio/adc/ad7192.c b/drivers/iio/adc/ad7192.c index 7042ddfdfc03..c4dd48edd8d9 100644 --- a/drivers/iio/adc/ad7192.c +++ b/drivers/iio/adc/ad7192.c @@ -361,6 +361,7 @@ static const struct ad_sigma_delta_info ad7192_sigma_delta_info = { .status_ch_mask = GENMASK(3, 0), .num_slots = 4, .irq_flags = IRQF_TRIGGER_FALLING, + .num_resetclks = 40, }; static const struct ad_sigma_delta_info ad7194_sigma_delta_info = { @@ -373,6 +374,7 @@ static const struct ad_sigma_delta_info ad7194_sigma_delta_info = { .read_mask = BIT(6), .status_ch_mask = GENMASK(3, 0), .irq_flags = IRQF_TRIGGER_FALLING, + .num_resetclks = 40, }; static const struct ad_sd_calib_data ad7192_calib_arr[8] = { @@ -565,7 +567,7 @@ static int ad7192_setup(struct iio_dev *indio_dev, struct device *dev) int i, ret, id; /* reset the serial interface */ - ret = ad_sd_reset(&st->sd, 48); + ret = ad_sd_reset(&st->sd); if (ret < 0) return ret; usleep_range(500, 1000); /* Wait for at least 500us */ diff --git a/drivers/iio/adc/ad7791.c b/drivers/iio/adc/ad7791.c index 86effe8501b4..c7509b911835 100644 --- a/drivers/iio/adc/ad7791.c +++ b/drivers/iio/adc/ad7791.c @@ -254,6 +254,7 @@ static const struct ad_sigma_delta_info ad7791_sigma_delta_info = { .addr_shift = 4, .read_mask = BIT(3), .irq_flags = IRQF_TRIGGER_FALLING, + .num_resetclks = 32, }; static int ad7791_read_raw(struct iio_dev *indio_dev, diff --git a/drivers/iio/adc/ad7793.c b/drivers/iio/adc/ad7793.c index abebd519cafa..0767c56bb442 100644 --- a/drivers/iio/adc/ad7793.c +++ b/drivers/iio/adc/ad7793.c @@ -206,6 +206,7 @@ static const struct ad_sigma_delta_info ad7793_sigma_delta_info = { .addr_shift = 3, .read_mask = BIT(6), .irq_flags = IRQF_TRIGGER_FALLING, + .num_resetclks = 32, }; static const struct ad_sd_calib_data ad7793_calib_arr[6] = { @@ -265,7 +266,7 @@ static int ad7793_setup(struct iio_dev *indio_dev, return ret; /* reset the serial interface */ - ret = ad_sd_reset(&st->sd, 32); + ret = ad_sd_reset(&st->sd); if (ret < 0) goto out; usleep_range(500, 2000); /* Wait for at least 500us */ diff --git a/drivers/iio/adc/ad_sigma_delta.c b/drivers/iio/adc/ad_sigma_delta.c index fd3560beb56b..19cb9b7b62c6 100644 --- a/drivers/iio/adc/ad_sigma_delta.c +++ b/drivers/iio/adc/ad_sigma_delta.c @@ -182,14 +182,13 @@ EXPORT_SYMBOL_NS_GPL(ad_sd_read_reg, IIO_AD_SIGMA_DELTA); * * Returns 0 on success, an error code otherwise. **/ -int ad_sd_reset(struct ad_sigma_delta *sigma_delta, - unsigned int reset_length) +int ad_sd_reset(struct ad_sigma_delta *sigma_delta) { + unsigned int reset_length = sigma_delta->info->num_resetclks; + unsigned int size = DIV_ROUND_UP(reset_length, 8); uint8_t *buf; - unsigned int size; int ret; - size = DIV_ROUND_UP(reset_length, 8); buf = kcalloc(size, sizeof(*buf), GFP_KERNEL); if (!buf) return -ENOMEM; diff --git a/include/linux/iio/adc/ad_sigma_delta.h b/include/linux/iio/adc/ad_sigma_delta.h index b3e4d89f2d06..39bb3a6dd9cd 100644 --- a/include/linux/iio/adc/ad_sigma_delta.h +++ b/include/linux/iio/adc/ad_sigma_delta.h @@ -53,6 +53,7 @@ struct iio_dev; * @irq_flags: flags for the interrupt used by the triggered buffer * @num_slots: Number of sequencer slots * @irq_line: IRQ for reading conversions. If 0, spi->irq will be used + * @num_resetclks: Number of SPI clk cycles with MOSI=1 to reset the chip. */ struct ad_sigma_delta_info { int (*set_channel)(struct ad_sigma_delta *, unsigned int channel); @@ -69,6 +70,7 @@ struct ad_sigma_delta_info { unsigned long irq_flags; unsigned int num_slots; int irq_line; + unsigned int num_resetclks; }; /** @@ -180,8 +182,7 @@ int ad_sd_write_reg(struct ad_sigma_delta *sigma_delta, unsigned int reg, int ad_sd_read_reg(struct ad_sigma_delta *sigma_delta, unsigned int reg, unsigned int size, unsigned int *val); -int ad_sd_reset(struct ad_sigma_delta *sigma_delta, - unsigned int reset_length); +int ad_sd_reset(struct ad_sigma_delta *sigma_delta); int ad_sigma_delta_single_conversion(struct iio_dev *indio_dev, const struct iio_chan_spec *chan, int *val); From patchwork Fri Nov 22 11:33:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= X-Patchwork-Id: 13883112 Received: from mail-wr1-f45.google.com (mail-wr1-f45.google.com [209.85.221.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4684F1DE2D2 for ; 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[80.145.89.241]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3825fbed99dsm2111241f8f.94.2024.11.22.03.34.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Nov 2024 03:34:08 -0800 (PST) From: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= To: Jonathan Cameron , Lars-Peter Clausen , Michael Hennerich Cc: Alexandru Ardelean , Alisa-Dariana Roman , Andy Shevchenko , Conor Dooley , David Lechner , Dumitru Ceclan , Krzysztof Kozlowski , Nuno Sa , Rob Herring , devicetree@vger.kernel.org, linux-iio@vger.kernel.org Subject: [PATCH v3 08/10] iio: adc: ad_sigma_delta: Check for previous ready signals Date: Fri, 22 Nov 2024 12:33:27 +0100 Message-ID: <20241122113322.242875-20-u.kleine-koenig@baylibre.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241122113322.242875-12-u.kleine-koenig@baylibre.com> References: <20241122113322.242875-12-u.kleine-koenig@baylibre.com> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=4698; i=u.kleine-koenig@baylibre.com; h=from:subject; bh=SBgp/ABTYxk+qV+nwz/VSGkPh5JOuikR+B/LV0eJ0E8=; b=owEBbQGS/pANAwAKAY+A+1h9Ev5OAcsmYgBnQGwWTMKLY4vNh0+ORZ+7HMixLfb6SjqViRpX4 zllCNwdf7OJATMEAAEKAB0WIQQ/gaxpOnoeWYmt/tOPgPtYfRL+TgUCZ0BsFgAKCRCPgPtYfRL+ TtHeCACeSvHzlotmyz7yTcDdyUfB0wDhMWapQsRukaKDm/ZyUuzc+BfW2iIjlNM9ZEu6Q0lLOYV Lm0vbuFYbJvmPC1CVpagU1/tRXUdgx0e2iTPrLq8bn2edVqyBICTrZmy84yrjte08txX2MK9Ywf G3S5uLv0TrVSsLng2H257ncRXOsofkTTCCjGodPTLhvd4MLZE4LxRw2atlUzHwuIxz8b2cv3NVf Pu9xRxbp2o52TPmDOcR8wCsUBQA01yZocsjHgPGcqA/9XrhI4fsd4+gSLC7LzFO7JC3W0zWQeZ9 ofeOFDXymM2ovJFVe43684ufVV1Rx8tDWVHB529Z8WbUfWAL X-Developer-Key: i=u.kleine-koenig@baylibre.com; a=openpgp; fpr=0D2511F322BFAB1C1580266BE2DCDD9132669BD6 It can happen if a previous conversion was aborted the ADC pulls down the ̅R̅D̅Y line but the event wasn't handled before. In that case enabling the irq might immediatly fire (depending on the irq controller's capabilities) and even with a rdy-gpio isn't identified as an unrelated one. To cure that problem check for a pending event before the measurement is started and clear it if needed. Signed-off-by: Uwe Kleine-König --- drivers/iio/adc/ad_sigma_delta.c | 91 ++++++++++++++++++++++++++++++++ 1 file changed, 91 insertions(+) diff --git a/drivers/iio/adc/ad_sigma_delta.c b/drivers/iio/adc/ad_sigma_delta.c index 19cb9b7b62c6..8bc652b71019 100644 --- a/drivers/iio/adc/ad_sigma_delta.c +++ b/drivers/iio/adc/ad_sigma_delta.c @@ -29,8 +29,11 @@ #define AD_SD_COMM_CHAN_MASK 0x3 #define AD_SD_REG_COMM 0x00 +#define AD_SD_REG_STATUS 0x00 #define AD_SD_REG_DATA 0x03 +#define AD_SD_REG_STATUS_RDY 0x80 + /** * ad_sd_set_comm() - Set communications register * @@ -222,6 +225,82 @@ static void ad_sd_enable_irq(struct ad_sigma_delta *sigma_delta) enable_irq(sigma_delta->irq_line); } +/* Called with `sigma_delta->bus_locked == true` only. */ +static int ad_sigma_delta_clear_pending_event(struct ad_sigma_delta *sigma_delta) +{ + int ret = 0; + bool pending_event; + + /* + * read RDY pin (if possible) or status register to check if there is an + * old event. + */ + if (sigma_delta->rdy_gpiod) { + pending_event = gpiod_get_value(sigma_delta->rdy_gpiod); + } else { + unsigned status_reg; + + ret = ad_sd_read_reg(sigma_delta, AD_SD_REG_STATUS, 1, &status_reg); + if (ret) + return ret; + + pending_event = !(status_reg & AD_SD_REG_STATUS_RDY); + } + + if (pending_event) { + /* + * In general the size of the data register is unknown. It + * varies from device to device, might be one byte longer if + * CONTROL.DATA_STATUS is set and even varies on some devices + * depending on which input is selected. So send one byte to + * start reading the data register and then just clock for some + * bytes with DIN (aka MOSI) high to not confuse the register + * access state machine after the data register was completely + * read. Note however that the sequence length must be shorter + * than the reset procedure. + */ + unsigned int data_read_len = DIV_ROUND_UP(sigma_delta->info->num_resetclks, 8); + uint8_t data[9]; + struct spi_transfer t[] = { + { + .tx_buf = data, + .len = 1, + }, { + .tx_buf = data + 1, + .len = data_read_len, + } + }; + struct spi_message m; + + /* Oh, back out instead of overflowing data[] */ + if (data_read_len > sizeof(data) - 1) + return -EINVAL; + + spi_message_init(&m); + if (sigma_delta->info->has_registers) { + unsigned int data_reg = sigma_delta->info->data_reg ?: AD_SD_REG_DATA; + + data[0] = data_reg << sigma_delta->info->addr_shift; + data[0] |= sigma_delta->info->read_mask; + data[0] |= sigma_delta->comm; + spi_message_add_tail(&t[0], &m); + } + + /* + * The first transferred byte is part of the real data register, + * so this doesn't need to be 0xff. In the remaining + * `data_read_len - 1` bytes are less than $num_resetclks ones. + */ + data[1] = 0x00; + memset(data + 2, 0xff, data_read_len - 1); + spi_message_add_tail(&t[1], &m); + + ret = spi_sync_locked(sigma_delta->spi, &m); + } + + return ret; +} + int ad_sd_calibrate(struct ad_sigma_delta *sigma_delta, unsigned int mode, unsigned int channel) { @@ -237,6 +316,10 @@ int ad_sd_calibrate(struct ad_sigma_delta *sigma_delta, sigma_delta->keep_cs_asserted = true; reinit_completion(&sigma_delta->completion); + ret = ad_sigma_delta_clear_pending_event(sigma_delta); + if (ret) + return ret; + ret = ad_sigma_delta_set_mode(sigma_delta, mode); if (ret < 0) goto out; @@ -310,6 +393,10 @@ int ad_sigma_delta_single_conversion(struct iio_dev *indio_dev, sigma_delta->keep_cs_asserted = true; reinit_completion(&sigma_delta->completion); + ret = ad_sigma_delta_clear_pending_event(sigma_delta); + if (ret) + return ret; + ad_sigma_delta_set_mode(sigma_delta, AD_SD_MODE_SINGLE); ad_sd_enable_irq(sigma_delta); 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[80.145.89.241]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3825fb264cdsm2175392f8f.49.2024.11.22.03.34.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Nov 2024 03:34:09 -0800 (PST) From: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= To: Jonathan Cameron , Lars-Peter Clausen , Michael Hennerich Cc: Alexandru Ardelean , Alisa-Dariana Roman , Andy Shevchenko , Conor Dooley , David Lechner , Dumitru Ceclan , Krzysztof Kozlowski , Nuno Sa , Rob Herring , devicetree@vger.kernel.org, linux-iio@vger.kernel.org Subject: [PATCH v3 09/10] iio: adc: ad7124: Add error reporting during probe Date: Fri, 22 Nov 2024 12:33:28 +0100 Message-ID: <20241122113322.242875-21-u.kleine-koenig@baylibre.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241122113322.242875-12-u.kleine-koenig@baylibre.com> References: <20241122113322.242875-12-u.kleine-koenig@baylibre.com> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=7778; i=u.kleine-koenig@baylibre.com; h=from:subject; bh=qCxgBxDixx+y8W8lK/MrUMri31nDKcjFNuZWUz++lzg=; b=owEBbQGS/pANAwAKAY+A+1h9Ev5OAcsmYgBnQGwZNAPzt5O6mPx4+5+TJ79e1jLHjpFwPDOiu WZ2FuooQX6JATMEAAEKAB0WIQQ/gaxpOnoeWYmt/tOPgPtYfRL+TgUCZ0BsGQAKCRCPgPtYfRL+ ToacCACuSFXKAh8doGeDRWHNZrj2ioMYJI1vneDBabW3J8IRRG/UsVFzZg+nDRFjmSHfVkA2qB1 zhyXskkUdoQD1cLeVCyWlKBHfj48GdRYLfCVI+JZyArqaZzg4OetkwGWuzDK32uQsgJG89Wo1cM XXMFyajf3dX4m0fFVTux7OBPEuSUv2DKbN9Ty80gvyDfYISUL77oIEYCE8LoRHuHFoWvreqlh+B g6qbcV/hxMk6nnn8t3s81FY4y0vzLvNUJvJduEAJXWlWN7aqUM0Y1O0TOiw6840xhRkAVbdL/lq NATT3oTJt4zpFvlg8t+zHd/osf3WADkDO8DcHSctoEMHjU60 X-Developer-Key: i=u.kleine-koenig@baylibre.com; a=openpgp; fpr=0D2511F322BFAB1C1580266BE2DCDD9132669BD6 A driver that silently fails to probe is annoying and hard to debug. So add messages in the error paths of the probe function. Signed-off-by: Uwe Kleine-König Reviewed-by: Trevor Gamblin --- drivers/iio/adc/ad7124.c | 78 +++++++++++++++++++++------------------- 1 file changed, 42 insertions(+), 36 deletions(-) diff --git a/drivers/iio/adc/ad7124.c b/drivers/iio/adc/ad7124.c index b17c3dbeaeba..fdbe2806bf11 100644 --- a/drivers/iio/adc/ad7124.c +++ b/drivers/iio/adc/ad7124.c @@ -360,20 +360,21 @@ static int ad7124_find_free_config_slot(struct ad7124_state *st) return free_cfg_slot; } +/* Only called during probe, so dev_err_probe() can be used */ static int ad7124_init_config_vref(struct ad7124_state *st, struct ad7124_channel_config *cfg) { unsigned int refsel = cfg->refsel; + struct device *dev = &st->sd.spi->dev; switch (refsel) { case AD7124_REFIN1: case AD7124_REFIN2: case AD7124_AVDD_REF: - if (IS_ERR(st->vref[refsel])) { - dev_err(&st->sd.spi->dev, - "Error, trying to use external voltage reference without a %s regulator.\n", - ad7124_ref_names[refsel]); - return PTR_ERR(st->vref[refsel]); - } + if (IS_ERR(st->vref[refsel])) + return dev_err_probe(dev, PTR_ERR(st->vref[refsel]), + "Error, trying to use external voltage reference without a %s regulator.\n", + ad7124_ref_names[refsel]); + cfg->vref_mv = regulator_get_voltage(st->vref[refsel]); /* Conversion from uV to mV */ cfg->vref_mv /= 1000; @@ -384,8 +385,7 @@ static int ad7124_init_config_vref(struct ad7124_state *st, struct ad7124_channe st->adc_control |= AD7124_ADC_CTRL_REF_EN(1); return 0; default: - dev_err(&st->sd.spi->dev, "Invalid reference %d\n", refsel); - return -EINVAL; + return dev_err_probe(dev, -EINVAL, "Invalid reference %d\n", refsel); } } @@ -752,6 +752,7 @@ static const struct iio_info ad7124_info = { .attrs = &ad7124_attrs_group, }; +/* Only called during probe, so dev_err_probe() can be used */ static int ad7124_soft_reset(struct ad7124_state *st) { unsigned int readval, timeout; @@ -766,7 +767,7 @@ static int ad7124_soft_reset(struct ad7124_state *st) do { ret = ad_sd_read_reg(&st->sd, AD7124_STATUS, 1, &readval); if (ret < 0) - return ret; + return dev_err_probe(&st->sd.spi->dev, ret, "Error reading status register\n"); if (!(readval & AD7124_STATUS_POR_FLAG_MSK)) return 0; @@ -775,9 +776,7 @@ static int ad7124_soft_reset(struct ad7124_state *st) usleep_range(100, 2000); } while (--timeout); - dev_err(&st->sd.spi->dev, "Soft reset failed\n"); - - return -EIO; + return dev_err_probe(&st->sd.spi->dev, -EIO, "Soft reset failed\n"); } static int ad7124_check_chip_id(struct ad7124_state *st) @@ -787,23 +786,20 @@ static int ad7124_check_chip_id(struct ad7124_state *st) ret = ad_sd_read_reg(&st->sd, AD7124_ID, 1, &readval); if (ret < 0) - return ret; + return dev_err_probe(&st->sd.spi->dev, ret, + "Failure to read ID register\n"); chip_id = AD7124_DEVICE_ID_GET(readval); silicon_rev = AD7124_SILICON_REV_GET(readval); - if (chip_id != st->chip_info->chip_id) { - dev_err(&st->sd.spi->dev, - "Chip ID mismatch: expected %u, got %u\n", - st->chip_info->chip_id, chip_id); - return -ENODEV; - } + if (chip_id != st->chip_info->chip_id) + return dev_err_probe(&st->sd.spi->dev, -ENODEV, + "Chip ID mismatch: expected %u, got %u\n", + st->chip_info->chip_id, chip_id); - if (silicon_rev == 0) { - dev_err(&st->sd.spi->dev, - "Silicon revision empty. Chip may not be present\n"); - return -ENODEV; - } + if (silicon_rev == 0) + return dev_err_probe(&st->sd.spi->dev, -ENODEV, + "Silicon revision empty. Chip may not be present\n"); return 0; } @@ -862,16 +858,18 @@ static int ad7124_parse_channel_config(struct iio_dev *indio_dev, device_for_each_child_node_scoped(dev, child) { ret = fwnode_property_read_u32(child, "reg", &channel); if (ret) - return ret; + return dev_err_probe(dev, ret, + "Failed to parse reg property of %pfwP\n", child); if (channel >= indio_dev->num_channels) return dev_err_probe(dev, -EINVAL, - "Channel index >= number of channels\n"); + "Channel index >= number of channels in %pfwP\n", child); ret = fwnode_property_read_u32_array(child, "diff-channels", ain, 2); if (ret) - return ret; + return dev_err_probe(dev, ret, + "Failed to parse diff-channels property of %pfwP\n", child); if (!ad7124_valid_input_select(ain[0], st->chip_info) || !ad7124_valid_input_select(ain[1], st->chip_info)) @@ -909,11 +907,12 @@ static int ad7124_parse_channel_config(struct iio_dev *indio_dev, static int ad7124_setup(struct ad7124_state *st) { unsigned int fclk, power_mode; + struct device *dev = &st->sd.spi->dev; int i, ret; fclk = clk_get_rate(st->mclk); if (!fclk) - return -EINVAL; + return dev_err_probe(dev, -EINVAL, "Failed to get mclk rate\n"); /* The power mode changes the master clock frequency */ power_mode = ad7124_find_closest_match(ad7124_master_clk_freq_hz, @@ -922,7 +921,7 @@ static int ad7124_setup(struct ad7124_state *st) if (fclk != ad7124_master_clk_freq_hz[power_mode]) { ret = clk_set_rate(st->mclk, fclk); if (ret) - return ret; + return dev_err_probe(dev, ret, "Failed to set mclk rate\n"); } /* Set the power mode */ @@ -953,7 +952,7 @@ static int ad7124_setup(struct ad7124_state *st) ret = ad_sd_write_reg(&st->sd, AD7124_ADC_CONTROL, 2, st->adc_control); if (ret < 0) - return ret; + return dev_err_probe(dev, ret, "Failed to setup CONTROL register\n"); return ret; } @@ -968,11 +967,12 @@ static int ad7124_probe(struct spi_device *spi) const struct ad7124_chip_info *info; struct ad7124_state *st; struct iio_dev *indio_dev; + struct device *dev = &spi->dev; int i, ret; info = spi_get_device_match_data(spi); if (!info) - return -ENODEV; + return dev_err_probe(dev, -ENODEV, "Failed to get match data\n"); indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); if (!indio_dev) @@ -1007,36 +1007,42 @@ static int ad7124_probe(struct spi_device *spi) ret = regulator_enable(st->vref[i]); if (ret) - return ret; + return dev_err_probe(dev, ret, "Failed to enable regulator #%d\n", i); ret = devm_add_action_or_reset(&spi->dev, ad7124_reg_disable, st->vref[i]); if (ret) - return ret; + return dev_err_probe(dev, ret, "Failed to register disable handler for regulator #%d\n", i); } st->mclk = devm_clk_get_enabled(&spi->dev, "mclk"); if (IS_ERR(st->mclk)) - return PTR_ERR(st->mclk); + return dev_err_probe(dev, PTR_ERR(st->mclk), "Failed to get mclk\n"); ret = ad7124_soft_reset(st); if (ret < 0) + /* ad7124_soft_reset() already emitted an error message */ return ret; ret = ad7124_check_chip_id(st); if (ret) + /* ad7124_check_chip_id() already emitted an error message */ return ret; ret = ad7124_setup(st); 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[80.145.89.241]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-433b01e117bsm91858495e9.8.2024.11.22.03.34.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 22 Nov 2024 03:34:11 -0800 (PST) From: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= To: Jonathan Cameron , Lars-Peter Clausen , Michael Hennerich Cc: Alexandru Ardelean , Alisa-Dariana Roman , Andy Shevchenko , Conor Dooley , David Lechner , Dumitru Ceclan , Krzysztof Kozlowski , Nuno Sa , Rob Herring , devicetree@vger.kernel.org, linux-iio@vger.kernel.org Subject: [PATCH v3 10/10] iio: adc: ad7124: Implement temperature measurement Date: Fri, 22 Nov 2024 12:33:29 +0100 Message-ID: <20241122113322.242875-22-u.kleine-koenig@baylibre.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241122113322.242875-12-u.kleine-koenig@baylibre.com> References: <20241122113322.242875-12-u.kleine-koenig@baylibre.com> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=6041; i=u.kleine-koenig@baylibre.com; h=from:subject; bh=PI4yG6hlMtn0hGT5tdLHdWzfD1TnQ5AET3d93n7IC0Q=; b=owEBbQGS/pANAwAKAY+A+1h9Ev5OAcsmYgBnQGwcygvvHUQoY2gIX3Lsj1HCS5QV6OXd/RTPZ Z3EnW8IbfyJATMEAAEKAB0WIQQ/gaxpOnoeWYmt/tOPgPtYfRL+TgUCZ0BsHAAKCRCPgPtYfRL+ Tt+6CACFtALW3JPtRrnnVLi1m0reiUzmHrypibIP3qZUq65zb4S4HQkXa4MoL/1QoTem8D7vLuJ 1sPab9hWaC+Z+9OyGsHlz7wd/S+cjqWkuEhEVHeHv7tygU7qE1AEUCZ1ZoA2i/gIWqwTavMYSGP OZyrFERagsFc+qcp4+Dhwc2vOTS+MGuFpdVgA4/wz8xIK28ERlx8DnYdbk++mL6fmqZ6W1ZwcRq v5SpxpngrMRV7ZAHnLokh+Fukjuk7otdbtxAXpsr+2RC5OVGmeiVgGAXNiDOdBODBInGK4Xo0/G fnGXLVlFkbCHz1r3u0Ao2bPwsINXp8SL37qJcrgKQ6CkKbiN X-Developer-Key: i=u.kleine-koenig@baylibre.com; a=openpgp; fpr=0D2511F322BFAB1C1580266BE2DCDD9132669BD6 If the maximal count of channels the driver supports isn't fully utilized, add an attribute providing the internal temperature. Signed-off-by: Uwe Kleine-König --- drivers/iio/adc/ad7124.c | 112 +++++++++++++++++++++++++++++++-------- 1 file changed, 91 insertions(+), 21 deletions(-) diff --git a/drivers/iio/adc/ad7124.c b/drivers/iio/adc/ad7124.c index fdbe2806bf11..3eff156b9c00 100644 --- a/drivers/iio/adc/ad7124.c +++ b/drivers/iio/adc/ad7124.c @@ -95,6 +95,10 @@ #define AD7124_MAX_CONFIGS 8 #define AD7124_MAX_CHANNELS 16 +/* AD7124 input sources */ +#define AD7124_INPUT_TEMPSENSOR 16 +#define AD7124_INPUT_AVSS 17 + enum ad7124_ids { ID_AD7124_4, ID_AD7124_8, @@ -588,39 +592,75 @@ static int ad7124_read_raw(struct iio_dev *indio_dev, return ret; return IIO_VAL_INT; + case IIO_CHAN_INFO_SCALE: - mutex_lock(&st->cfgs_lock); + switch (chan->type) { + case IIO_VOLTAGE: + mutex_lock(&st->cfgs_lock); - idx = st->channels[chan->address].cfg.pga_bits; - *val = st->channels[chan->address].cfg.vref_mv; - if (st->channels[chan->address].cfg.bipolar) - *val2 = chan->scan_type.realbits - 1 + idx; - else - *val2 = chan->scan_type.realbits + idx; + idx = st->channels[chan->address].cfg.pga_bits; + *val = st->channels[chan->address].cfg.vref_mv; + if (st->channels[chan->address].cfg.bipolar) + *val2 = chan->scan_type.realbits - 1 + idx; + else + *val2 = chan->scan_type.realbits + idx; + + mutex_unlock(&st->cfgs_lock); + return IIO_VAL_FRACTIONAL_LOG2; + + case IIO_TEMP: + /* + * According to the data sheet + * Temperature (°C) + * = ((Conversion − 0x800000)/13584) − 272.5 + * = (Conversion − 0x800000 - 13584 * 272.5) / 13584 + * = (Conversion − 12090248) / 13584 + * So scale with 1000/13584 to yield °mC. Reduce by 8 to + * 125/1698. + */ + *val = 125; + *val2 = 1698; + return IIO_VAL_FRACTIONAL; + + default: + return -EINVAL; + } - mutex_unlock(&st->cfgs_lock); - return IIO_VAL_FRACTIONAL_LOG2; case IIO_CHAN_INFO_OFFSET: - mutex_lock(&st->cfgs_lock); - if (st->channels[chan->address].cfg.bipolar) - *val = -(1 << (chan->scan_type.realbits - 1)); - else - *val = 0; + switch (chan->type) { + case IIO_VOLTAGE: + mutex_lock(&st->cfgs_lock); + if (st->channels[chan->address].cfg.bipolar) + *val = -(1 << (chan->scan_type.realbits - 1)); + else + *val = 0; + + mutex_unlock(&st->cfgs_lock); + return IIO_VAL_INT; + + case IIO_TEMP: + /* see calculation above */ + *val = -12090248; + return IIO_VAL_INT; + + default: + return -EINVAL; + } - mutex_unlock(&st->cfgs_lock); - return IIO_VAL_INT; case IIO_CHAN_INFO_SAMP_FREQ: mutex_lock(&st->cfgs_lock); *val = st->channels[chan->address].cfg.odr; mutex_unlock(&st->cfgs_lock); return IIO_VAL_INT; + case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY: mutex_lock(&st->cfgs_lock); *val = ad7124_get_3db_filter_freq(st, chan->scan_index); mutex_unlock(&st->cfgs_lock); return IIO_VAL_INT; + default: return -EINVAL; } @@ -645,6 +685,7 @@ static int ad7124_write_raw(struct iio_dev *indio_dev, ad7124_set_channel_odr(st, chan->address, val); break; + case IIO_CHAN_INFO_SCALE: if (val != 0) { ret = -EINVAL; @@ -666,6 +707,7 @@ static int ad7124_write_raw(struct iio_dev *indio_dev, st->channels[chan->address].cfg.pga_bits = res; break; + case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY: if (val2 != 0) { ret = -EINVAL; @@ -825,11 +867,10 @@ static int ad7124_parse_channel_config(struct iio_dev *indio_dev, struct ad7124_channel *channels; struct iio_chan_spec *chan; unsigned int ain[2], channel = 0, tmp; + unsigned int num_channels; int ret; - st->num_channels = device_get_child_node_count(dev); - if (!st->num_channels) - return dev_err_probe(dev, -ENODEV, "no channel children\n"); + num_channels = device_get_child_node_count(dev); /* * The driver assigns each logical channel defined in the device tree @@ -838,9 +879,12 @@ static int ad7124_parse_channel_config(struct iio_dev *indio_dev, * CHANNEL_15) as an additional channel register. The driver could be * improved to lift this limitation. */ - if (st->num_channels > AD7124_MAX_CHANNELS) + if (num_channels > AD7124_MAX_CHANNELS) return dev_err_probe(dev, -EINVAL, "Too many channels defined\n"); + /* Add one for temperature */ + st->num_channels = min(num_channels + 1, AD7124_MAX_CHANNELS); + chan = devm_kcalloc(indio_dev->dev.parent, st->num_channels, sizeof(*chan), GFP_KERNEL); if (!chan) @@ -861,7 +905,7 @@ static int ad7124_parse_channel_config(struct iio_dev *indio_dev, return dev_err_probe(dev, ret, "Failed to parse reg property of %pfwP\n", child); - if (channel >= indio_dev->num_channels) + if (channel >= num_channels) return dev_err_probe(dev, -EINVAL, "Channel index >= number of channels in %pfwP\n", child); @@ -901,6 +945,32 @@ static int ad7124_parse_channel_config(struct iio_dev *indio_dev, chan[channel].channel2 = ain[1]; } + if (num_channels < AD7124_MAX_CHANNELS) { + st->channels[num_channels] = (struct ad7124_channel) { + .nr = num_channels, + .ain = AD7124_CHANNEL_AINP(AD7124_INPUT_TEMPSENSOR) | + AD7124_CHANNEL_AINM(AD7124_INPUT_AVSS), + .cfg = { + .bipolar = true, + }, + }; + + chan[num_channels] = (struct iio_chan_spec) { + .type = IIO_TEMP, + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | + BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_OFFSET) | + BIT(IIO_CHAN_INFO_SAMP_FREQ), + .scan_type = { + .sign = 'u', + .realbits = 24, + .storagebits = 32, + .endianness = IIO_BE, + }, + .address = num_channels, + .scan_index = num_channels, + }; + }; + return 0; }