From patchwork Tue Nov 26 13:59:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13886042 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 45E71D3B98B for ; Tue, 26 Nov 2024 14:02:30 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tFw7P-0002i8-7f; Tue, 26 Nov 2024 09:00:43 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tFw7E-0002gq-CV for qemu-devel@nongnu.org; Tue, 26 Nov 2024 09:00:32 -0500 Received: from mail-ed1-x52a.google.com ([2a00:1450:4864:20::52a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tFw75-00057r-QE for qemu-devel@nongnu.org; Tue, 26 Nov 2024 09:00:26 -0500 Received: by mail-ed1-x52a.google.com with SMTP id 4fb4d7f45d1cf-5cf6f804233so6515538a12.2 for ; Tue, 26 Nov 2024 06:00:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1732629621; x=1733234421; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=t1Jxtp13mmLrRw+IUS8eEqglrbhhv+f8+zgRopmtS3I=; b=J7VcZv3iShRz3EXvz8i2tlh3f8rV+Tcpl9LSpSKsEQCkngzHSsP3iLYzitPDDwuGmI 581vVw5kLTUivY0Gw4+TkrJ+xZ+YdC25e8mTnVxHTTCvDLGbUspKEV+N3riSLrA+hOSI j5GPa6BCYF/SVmnhkftEV4FZbluwP+S+l60tZfovmEHUzMYbcyE70M9oUALTaJX40G4N ttmaiAzGqtmnEgNib3MnfksTCVM4LaV4CVIBD85zwTMv1a/xg7iPAzZbI/ccHLLjGDPz ArG56RylkxSKHBbik3TxEMkGYancfbPHHW76D/zncee2AW5j48hucP1VLV/K0pDRO8W1 R20Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1732629621; x=1733234421; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=t1Jxtp13mmLrRw+IUS8eEqglrbhhv+f8+zgRopmtS3I=; b=tcovDMzYMxSxvi10rWqdPIZIQ9rpblAs6x8ZAR8Cd6Z4hPDAMbyxHOlHPJY3d51q51 yOWdK+VEXoifgaC+NkOYlYIg/BYu9NJbeML0BN31ZRZU92PKYUVmkdkuEtPz4QrKOmNS ofBhMWl/4crAsWOLpgTBGSr/teyjntCQt+F68afKvpJ9Ci/Q1h9iFXAWuMLAIsrtmbTH ORu5NNRGMxraiN+/p5ZqQLtJnJt+FmesNubtNC0sKBdgdJ5IM2ijQpJtvOj9U8C2HVHk phpX4i13Ktplp17i5iaSTlkHBuMpVeKFnqmAOsbQVdjMssei7hz4B8vDLmBc4Kg8yN9L Y7pA== X-Gm-Message-State: AOJu0YwozIeP6aYNWWbwmwqnSmJYzApwFW3em0SSqPyQtHK6Y4d+whwY 67fwpxPxzZLO8jnRxFysN7a9Cd2mu/31Nym1/VMwzjIhloli/3eXGju+jsN4MeCx04T7pIdcX4B R X-Gm-Gg: ASbGncuCknQ427wFmhvX9ed7Ox6m2tFxFlJWSI+q9XPq54C1wU7KRreRgHIs3yDXCYp 1wiB1K3CKAfDCWGmEQVd5/elfsQFqUn8AaO47h9kFFSKH+ZAEGO1nTDEhlM/Kr78OPUnvqWx+Xs n79Yot1RX3srIVjC6eHR8SyT6FMtEgTyf8IYaZM6Zr/4rcaEWbvMUYS9sPJ9duvnfwt6lQ5R3tb cDgbaLNAqzMbgSlN83+llhWH2j6LDnJp+4bdDldQccc9gULb318UzlTTNgUw3Jiu1nDkbOVfCag mA== X-Google-Smtp-Source: AGHT+IFMqHUZn0kMYd+iRaYcEWq0aKBjr92CeApZBO26KlyJ2Zl20oDhECg2BQ4JGhw5z3TMgFwwDA== X-Received: by 2002:a05:600c:4691:b0:42c:b187:bde9 with SMTP id 5b1f17b1804b1-433ce4ac22cmr159337905e9.30.1732629611339; Tue, 26 Nov 2024 06:00:11 -0800 (PST) Received: from localhost.localdomain ([176.176.143.205]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3825fbc42d4sm13722095f8f.85.2024.11.26.06.00.10 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 26 Nov 2024 06:00:10 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , Aleksandar Rikalo , Richard Henderson , Jiaxun Yang Subject: [PATCH v3 01/16] target/mips: Extract gen_base_index_addr() helper Date: Tue, 26 Nov 2024 14:59:47 +0100 Message-ID: <20241126140003.74871-2-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241126140003.74871-1-philmd@linaro.org> References: <20241126140003.74871-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::52a; envelope-from=philmd@linaro.org; helo=mail-ed1-x52a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Factor out gen_base_index_addr() which is used twice but we'll use it more. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20241111222936.59869-2-philmd@linaro.org> --- target/mips/tcg/translate.h | 1 + target/mips/tcg/translate.c | 27 +++++++++++++-------------- 2 files changed, 14 insertions(+), 14 deletions(-) diff --git a/target/mips/tcg/translate.h b/target/mips/tcg/translate.h index 1bf153d1838..ed69ba15e58 100644 --- a/target/mips/tcg/translate.h +++ b/target/mips/tcg/translate.h @@ -153,6 +153,7 @@ void check_cp1_registers(DisasContext *ctx, int regs); void check_cop1x(DisasContext *ctx); void gen_base_offset_addr(DisasContext *ctx, TCGv addr, int base, int offset); +void gen_base_index_addr(DisasContext *ctx, TCGv addr, int base, int index); void gen_move_low32(TCGv ret, TCGv_i64 arg); void gen_move_high32(TCGv ret, TCGv_i64 arg); void gen_load_gpr(TCGv t, int reg); diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c index de7045874dd..7152f5418e1 100644 --- a/target/mips/tcg/translate.c +++ b/target/mips/tcg/translate.c @@ -1956,6 +1956,17 @@ void gen_base_offset_addr(DisasContext *ctx, TCGv addr, int base, int offset) } } +void gen_base_index_addr(DisasContext *ctx, TCGv addr, int base, int index) +{ + if (base == 0) { + gen_load_gpr(addr, index); + } else if (index == 0) { + gen_load_gpr(addr, base); + } else { + gen_op_addr_add(ctx, addr, cpu_gpr[base], cpu_gpr[index]); + } +} + static target_ulong pc_relative_pc(DisasContext *ctx) { target_ulong pc = ctx->base.pc_next; @@ -10545,13 +10556,7 @@ static void gen_flt3_ldst(DisasContext *ctx, uint32_t opc, { TCGv t0 = tcg_temp_new(); - if (base == 0) { - gen_load_gpr(t0, index); - } else if (index == 0) { - gen_load_gpr(t0, base); - } else { - gen_op_addr_add(ctx, t0, cpu_gpr[base], cpu_gpr[index]); - } + gen_base_index_addr(ctx, t0, base, index); /* * Don't do NOP if destination is zero: we must perform the actual * memory access. @@ -11333,13 +11338,7 @@ static void gen_mips_lx(DisasContext *ctx, uint32_t opc, } t0 = tcg_temp_new(); - if (base == 0) { - gen_load_gpr(t0, offset); - } else if (offset == 0) { - gen_load_gpr(t0, base); - } else { - gen_op_addr_add(ctx, t0, cpu_gpr[base], cpu_gpr[offset]); - } + gen_base_index_addr(ctx, t0, base, offset); switch (opc) { case OPC_LBUX: From patchwork Tue Nov 26 13:59:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13886036 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 40444D3B990 for ; Tue, 26 Nov 2024 14:00:47 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tFw7E-0002ge-Ss; Tue, 26 Nov 2024 09:00:32 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tFw73-0002fj-7L for qemu-devel@nongnu.org; Tue, 26 Nov 2024 09:00:23 -0500 Received: from mail-wr1-x42c.google.com ([2a00:1450:4864:20::42c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tFw70-00056f-VA for qemu-devel@nongnu.org; Tue, 26 Nov 2024 09:00:20 -0500 Received: by mail-wr1-x42c.google.com with SMTP id ffacd0b85a97d-3823e45339bso4137159f8f.0 for ; Tue, 26 Nov 2024 06:00:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1732629617; x=1733234417; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=6ujfkvO8LZuywqD2+o/XmPcEkRI4UkLalyohmosFyZI=; b=Mn1R0YQBC1GkE3GCaNs/CtSy2YkdtfUjUncTopAJ/Z3jzWC3aO76zUUE3I3/rU6C4A 8wwtOR0bgldcml2xl6Td7YLXcxuSxamuiePWuJnz6e4Fx/sWPXAMv9l4sHvMN5jpVps4 VcaUYvrxy07JCsopx2EKwmv3oGqSda7yevbYUehxH8+d5P3HIkd6cyB5l6S4nwxJoahI NRVZhuW8Ov+OabhqOePRaNioKciYX2LJHNskm4mhycuFlfb03SctfMX+Ywa2M+R3Qb7X DQFar1mH9TGZeLXdG1Hwf09yJUi5+Hh9B3pEJw2mJnn4zmmBVXYk8546BfOksotK1yyw p4dQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1732629617; x=1733234417; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=6ujfkvO8LZuywqD2+o/XmPcEkRI4UkLalyohmosFyZI=; b=GPsyrHO2KZ7goeJ4O7FA45xvacBoFRLPg1gDUd21T6b7UIbKcx2DNryJQmOt3HVmbC suvWIQnzUApNKHc6mdMQN9lCpk6tRn0Sb7uxm6URVXX+E6Ph32i7qRP6dBHLTzP4sHDR ogryPfZ9TILUcg1KIS8bhulhUgt4h7b4KGJnKke2TLyjKsDPY6+8dqLc2Rpy2n8f09VB XpTzcCTUvPTblmtjIV4CEKw+CwYamA0flIph6p/FXzbWe3WyEo5wQqe67ZVNy+jD1OSx Js/hKgQUX2VTWbM/GdfyHZFHeNjvRRUeKktRw8T4geGR0TIFoGMOMJijKOQ6HaGcw6ss 016g== X-Gm-Message-State: AOJu0Yy5NNDe+VJ4a/Wh9/bMaYITFxpO9BNgUU5QuTrFVH3C5z94eR9p SuIuWG5xyJ4e/PE7lU+KIH9zQvK/SypYdfuQ+xS1YojUmI1VEIG/tYXGFW5lDGpyBM2llwTEQu5 I X-Gm-Gg: ASbGncuWnyoaNX1k3nAogJon+//vb5uY7YRTxzlK/7X2bq5lTAZDSw4oX1xWnjdq8Zt JgmFla2TSUZvze/4ICiX21fzaRL2lgYd+7+zqML0/BQnR0kFRld47scXhEXqZueG7YzYveNdYYF /krc/bUULakpZKXzqQ+LBZu6mXEzWcOxJJ2vn74VEkzBagsRvr68e+mYqZmAdxwI+ZxPYitwJpB R0ZXFZJzLVKKV9LejK3k5UicXV7uwVvl3ag1zpvA3CkgkZ2A7nBQj+iOmecPvKySrP8W79IbWM8 tQ== X-Google-Smtp-Source: AGHT+IG/Po5xF2SRvZV9/HyACVwnn/9kaWLClUntF4IDQqJ4L1LNWUnMOuBVoL+Y5YK88PrLkpT+6g== X-Received: by 2002:a05:6000:178b:b0:382:488d:dfd1 with SMTP id ffacd0b85a97d-38260bcb8e6mr15573760f8f.44.1732629616998; Tue, 26 Nov 2024 06:00:16 -0800 (PST) Received: from localhost.localdomain ([176.176.143.205]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3825fad641fsm13368600f8f.20.2024.11.26.06.00.15 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 26 Nov 2024 06:00:16 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , Aleksandar Rikalo , Richard Henderson , Jiaxun Yang Subject: [PATCH v3 02/16] target/mips: Extract generic gen_lx() helper Date: Tue, 26 Nov 2024 14:59:48 +0100 Message-ID: <20241126140003.74871-3-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241126140003.74871-1-philmd@linaro.org> References: <20241126140003.74871-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42c; envelope-from=philmd@linaro.org; helo=mail-wr1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Extract gen_lx() from gen_mips_lx(); inline the Octeon check in decode_opc_special3_legacy(). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20241111222936.59869-3-philmd@linaro.org> --- target/mips/tcg/translate.h | 1 + target/mips/tcg/translate.c | 55 +++++++++++++------------------------ 2 files changed, 20 insertions(+), 36 deletions(-) diff --git a/target/mips/tcg/translate.h b/target/mips/tcg/translate.h index ed69ba15e58..a65ab4a747c 100644 --- a/target/mips/tcg/translate.h +++ b/target/mips/tcg/translate.h @@ -168,6 +168,7 @@ void gen_store_fpr32(DisasContext *ctx, TCGv_i32 t, int reg); void gen_store_fpr64(DisasContext *ctx, TCGv_i64 t, int reg); int get_fp_bit(int cc); +void gen_lx(DisasContext *ctx, int rd, int base, int index, MemOp mop); void gen_ldxs(DisasContext *ctx, int base, int index, int rd); void gen_align(DisasContext *ctx, int wordsz, int rd, int rs, int rt, int bp); void gen_addiupc(DisasContext *ctx, int rx, int imm, diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c index 7152f5418e1..acadd3d8919 100644 --- a/target/mips/tcg/translate.c +++ b/target/mips/tcg/translate.c @@ -2035,6 +2035,15 @@ static void gen_lxr(DisasContext *ctx, TCGv reg, TCGv addr, tcg_gen_or_tl(reg, t0, t1); } +void gen_lx(DisasContext *ctx, int rd, int base, int index, MemOp mop) +{ + TCGv t0 = tcg_temp_new(); + + gen_base_index_addr(ctx, t0, base, index); + tcg_gen_qemu_ld_tl(t0, t0, ctx->mem_idx, mo_endian(ctx) | mop); + gen_store_gpr(t0, rd); +} + /* Load */ static void gen_ld(DisasContext *ctx, uint32_t opc, int rt, int base, int offset) @@ -11327,41 +11336,6 @@ enum { /* MIPSDSP functions. */ -/* Indexed load is not for DSP only */ -static void gen_mips_lx(DisasContext *ctx, uint32_t opc, - int rd, int base, int offset) -{ - TCGv t0; - - if (!(ctx->insn_flags & INSN_OCTEON)) { - check_dsp(ctx); - } - t0 = tcg_temp_new(); - - gen_base_index_addr(ctx, t0, base, offset); - - switch (opc) { - case OPC_LBUX: - tcg_gen_qemu_ld_tl(t0, t0, ctx->mem_idx, MO_UB); - gen_store_gpr(t0, rd); - break; - case OPC_LHX: - tcg_gen_qemu_ld_tl(t0, t0, ctx->mem_idx, mo_endian(ctx) | MO_SW); - gen_store_gpr(t0, rd); - break; - case OPC_LWX: - tcg_gen_qemu_ld_tl(t0, t0, ctx->mem_idx, mo_endian(ctx) | MO_SL); - gen_store_gpr(t0, rd); - break; -#if defined(TARGET_MIPS64) - case OPC_LDX: - tcg_gen_qemu_ld_tl(t0, t0, ctx->mem_idx, mo_endian(ctx) | MO_UQ); - gen_store_gpr(t0, rd); - break; -#endif - } -} - static void gen_mipsdsp_arith(DisasContext *ctx, uint32_t op1, uint32_t op2, int ret, int v1, int v2) { @@ -13609,15 +13583,24 @@ static void decode_opc_special3_legacy(CPUMIPSState *env, DisasContext *ctx) } break; case OPC_LX_DSP: + if (!(ctx->insn_flags & INSN_OCTEON)) { + check_dsp(ctx); + } op2 = MASK_LX(ctx->opcode); switch (op2) { #if defined(TARGET_MIPS64) case OPC_LDX: + gen_lx(ctx, rd, rs, rt, MO_UQ); + break; #endif case OPC_LBUX: + gen_lx(ctx, rd, rs, rt, MO_UB); + break; case OPC_LHX: + gen_lx(ctx, rd, rs, rt, MO_SW); + break; case OPC_LWX: - gen_mips_lx(ctx, op2, rd, rs, rt); + gen_lx(ctx, rd, rs, rt, MO_SL); break; default: /* Invalid */ MIPS_INVAL("MASK LX"); From patchwork Tue Nov 26 13:59:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13886039 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 16753D3B98F for ; Tue, 26 Nov 2024 14:01:57 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tFw7R-0002ij-0h; Tue, 26 Nov 2024 09:00:45 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tFw7G-0002hC-GH for qemu-devel@nongnu.org; Tue, 26 Nov 2024 09:00:34 -0500 Received: from mail-wm1-x331.google.com ([2a00:1450:4864:20::331]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tFw7C-000589-F9 for qemu-devel@nongnu.org; Tue, 26 Nov 2024 09:00:33 -0500 Received: by mail-wm1-x331.google.com with SMTP id 5b1f17b1804b1-4315e9e9642so52115735e9.0 for ; Tue, 26 Nov 2024 06:00:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1732629625; x=1733234425; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=SgT7974TBaSnVy5uBFRbu9gIDuhkpzf7gv8ciPR3e+w=; b=pYGQChg+B6egG69qNWs5lQso1scGxol9tmIFSRHYWVrTbPkZiXuzd0xChefc4AIt74 M3uJliH6LaMTzu/qT5fuXyph3+ZEe8cP10jMsB7aAZwdZqoJmFjHP5HJ5Q1yqYgqTpxC daom26GnSmySSXU+rW5TClqwAz51h6fXkfBJ5jF+aySwbBrtWPG5ONriTtH2b2YmlkWS FjLgU0mWtLonQKZiFi2Jvmlck4YQHiNtE0fI0QbvTMSc/GKj3oX38iRldw6z/qDMRR3I qL6AeFKpQ+oLlU1EUCvWGPYcFeNDzdxg3VAtjPXcaKVYe5hTzld2wRBl2/Nay0S52qOo UkRQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1732629625; x=1733234425; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=SgT7974TBaSnVy5uBFRbu9gIDuhkpzf7gv8ciPR3e+w=; b=AortOnc+y0nKpa5rZPZtoO4RNJ+GhAEZl7ZtMimYkDU5FmLsrpA5i6zOX6E2T3Xqhl NhlJ2TbDDk9Um5NwL5Tn5XLsLuwoav2ugTfxHxcQpt3yWYzzGODyJoOghTvnPskMQJtt TXyXx0HB8eU3OZJu2Me5t4lLWKNGbU0qmjhdNqw7b6iM0UKsNkgypN0VVHgr0bnCa9oz PPpk0BbN1BoWwPmuHLa3vv7SrFnZYRlOcchDtV4laHzq09tayPwV86pxdMTFnrRUpo/O mC5Gahvv5hlvRHJOv7zdW7MrQKkIWARn4C08K3JlHkmfVmw16h7Q4glnnCvTTJt1kM+R fv3Q== X-Gm-Message-State: AOJu0Yx6BY12KNvMuMrjRb0VsIBc0DK0BrpDTFiGmD4/k5khcS4ESLOR 4DJtz9+gu5lJ/VMKkdWrDqVoF4YwfaCfXp3920lJdoo9I69QRiOMniydiHEP8zBF/9aSMq80iJ5 / X-Gm-Gg: ASbGncsW0LXSfyVgqVw5j9j647iLmb4HkYez+D+cxGuwxuEIRLivfXU+wB5f4wdvwVY ulu06ujqPbsLHfnMdYrK/Gq+HB7dDF0ffTk65lkcdZUUWqV65qHJvXGe1t+/zejtOuWolvaLkRh 9w02KjW2Ot6WFF4HQ178MprjMsJ6VFVK8LH7ZJkf2cKyVwwpXExglUWAfE5RofGrf47h2Vjpe+7 NRpW2VkDVzAubeoMSTc9Q2oQS6U5cbjCKy8iLAxQpTh1m1IV53c9n3cVzDT8ACXFCQs2NIGnVYc tQ== X-Google-Smtp-Source: AGHT+IHOHgJ0coNubj+24r+96yTdONaN/gsorOmJGolLH+QOccSj4A0bDX5whV8CyWwTTpwfOJy7Qg== X-Received: by 2002:a05:600c:1c95:b0:434:a802:e99a with SMTP id 5b1f17b1804b1-434a802eb8fmr14892965e9.4.1732629624605; Tue, 26 Nov 2024 06:00:24 -0800 (PST) Received: from localhost.localdomain ([176.176.143.205]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-433b46430f1sm229389415e9.43.2024.11.26.06.00.21 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 26 Nov 2024 06:00:23 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , Aleksandar Rikalo , Richard Henderson , Jiaxun Yang , Pavel Dovgalyuk Subject: [PATCH v3 03/16] target/mips: Convert Octeon LX instructions to decodetree Date: Tue, 26 Nov 2024 14:59:49 +0100 Message-ID: <20241126140003.74871-4-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241126140003.74871-1-philmd@linaro.org> References: <20241126140003.74871-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::331; envelope-from=philmd@linaro.org; helo=mail-wm1-x331.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Use Octeon decodetree to call gen_lx() for the LX instructions. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Pavel Dovgalyuk Reviewed-by: Richard Henderson Message-Id: <20241111222936.59869-4-philmd@linaro.org> --- target/mips/tcg/octeon.decode | 8 ++++++++ target/mips/tcg/octeon_translate.c | 12 ++++++++++++ target/mips/tcg/translate.c | 4 +--- 3 files changed, 21 insertions(+), 3 deletions(-) diff --git a/target/mips/tcg/octeon.decode b/target/mips/tcg/octeon.decode index 0c787cb498c..102a05860df 100644 --- a/target/mips/tcg/octeon.decode +++ b/target/mips/tcg/octeon.decode @@ -1,6 +1,7 @@ # Octeon Architecture Module instruction set # # Copyright (C) 2022 Pavel Dovgalyuk +# Copyright (C) 2024 Philippe Mathieu-Daudé # # SPDX-License-Identifier: LGPL-2.1-or-later # @@ -39,3 +40,10 @@ CINS 011100 ..... ..... ..... ..... 11001 . @bitfield POP 011100 rs:5 00000 rd:5 00000 10110 dw:1 SEQNE 011100 rs:5 rt:5 rd:5 00000 10101 ne:1 SEQNEI 011100 rs:5 rt:5 imm:s10 10111 ne:1 + +&lx base index rd +@lx ...... base:5 index:5 rd:5 ...... ..... &lx +LWX 011111 ..... ..... ..... 00000 001010 @lx +LHX 011111 ..... ..... ..... 00100 001010 @lx +LBUX 011111 ..... ..... ..... 00110 001010 @lx +LDX 011111 ..... ..... ..... 01000 001010 @lx diff --git a/target/mips/tcg/octeon_translate.c b/target/mips/tcg/octeon_translate.c index e25c4cbaa06..0e0b00303a7 100644 --- a/target/mips/tcg/octeon_translate.c +++ b/target/mips/tcg/octeon_translate.c @@ -174,3 +174,15 @@ static bool trans_SEQNEI(DisasContext *ctx, arg_SEQNEI *a) } return true; } + +static bool trans_lx(DisasContext *ctx, arg_lx *a, MemOp mop) +{ + gen_lx(ctx, a->rd, a->base, a->index, mop); + + return true; +} + +TRANS(LBUX, trans_lx, MO_UB); +TRANS(LHX, trans_lx, MO_SW); +TRANS(LWX, trans_lx, MO_SL); +TRANS(LDX, trans_lx, MO_UQ); diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c index acadd3d8919..6fd5462a24f 100644 --- a/target/mips/tcg/translate.c +++ b/target/mips/tcg/translate.c @@ -13583,9 +13583,7 @@ static void decode_opc_special3_legacy(CPUMIPSState *env, DisasContext *ctx) } break; case OPC_LX_DSP: - if (!(ctx->insn_flags & INSN_OCTEON)) { - check_dsp(ctx); - } + check_dsp(ctx); op2 = MASK_LX(ctx->opcode); switch (op2) { #if defined(TARGET_MIPS64) From patchwork Tue Nov 26 13:59:50 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13886043 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C7672D3B98F for ; Tue, 26 Nov 2024 14:02:31 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tFw7e-0002ou-LO; Tue, 26 Nov 2024 09:00:59 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tFw7J-0002hd-M0 for qemu-devel@nongnu.org; Tue, 26 Nov 2024 09:00:41 -0500 Received: from mail-wm1-x32c.google.com ([2a00:1450:4864:20::32c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tFw7G-00058n-83 for qemu-devel@nongnu.org; Tue, 26 Nov 2024 09:00:37 -0500 Received: by mail-wm1-x32c.google.com with SMTP id 5b1f17b1804b1-434a099ba95so17280325e9.0 for ; Tue, 26 Nov 2024 06:00:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1732629631; x=1733234431; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=dBBHCx9PUnnDkPAs2eAZXUzo+YrGmCMQRcywZOpNLGo=; b=UtMR9rkE3fQZvsKhitt0m9azRM/9LJV4RojnA4jCLia+ke43VuSSMZwr7j1eJE96Za C8lVwlTUBd3SmJin8zbpHJ9oQfR0b59Bnn3IpPIfVjap3w7ipeHucuqNLY7z/7PVbLk0 WeF4oTFRR9BYCcURjDqraMKvtpiLZSQWkK4BVg6qs1dl1Untx65lzhsb2Gdsru0rtO8Q QjZNGqyia2OPXfDTxDb7HNkoP3HcmC/65VQkqQlo/URbVx6TylxpM+XrUB7qPXg0y/dM 1tSpuJH5xBHkfmuAL930bnu4k3qFkNEoeL8pYuKQdszLM7DWfyyUvUhDF5yD1tFaGeja C5wg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1732629631; x=1733234431; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=dBBHCx9PUnnDkPAs2eAZXUzo+YrGmCMQRcywZOpNLGo=; b=EGxIbutvbs/S4hgEACY9iGyXnJs0i/wsBw53/RexL29UV45xmD7kFU4DwCQtpRnY55 jI1K1uJgjhwCWeVEVhmDvxLs/3yZrAuwmPjcNp6ym9OFS3kAnJ3DCxmpXVjsgOAjD3Qd QbQWbGFMyq74VwwYpX4q4d1uwPfq3ZZHMe3GUjpvkMSY31DO4MsTbBmtTCbmKcAB9apl bYSyJh2n2LychwZvSCG38yzVl1AA8I229Yxzo3TIlZ8K6+oafGD0QrUDYPCa+td54Yup ePYkFdSJZ5FS5IXCyH0n+H4rQ9VSv05WfD3/V+fDVZARIbWauFNghwonqwDHGB1kbDW0 nwmw== X-Gm-Message-State: AOJu0YxPaEe2DwD2JoeeWcNugJyA0Bw4SG6lFIH411BobgVV9GL6v8qu xT4lR/I91MHyei3/yy/4B4EfBWa5Re+Jq4GXB//1ksYz9gQS4mbvLc11KbRzNHCyKrUjVFF90MW 0 X-Gm-Gg: ASbGncu5XmPdsYS7c8fZC/G3BcHzvT35KlpWBwOIIxgM4j0c+L+dlz6oDBWEm/gdWlQ gDbWtv1uqi89Q7Oypp+DImxQZP94R0PSedvoEH0dCgWbAtKwYHEDh75NcZYUhk+DujUK93N5Qq+ q629hkpSFoPfU3LTl5l3nmdaJPdbvhLHK+l8PJ+ggVgoXYZCfHwblCqCheFDe1AOMDZIKvLHgD3 sE3hAKbnF89YMUBzrMhcr9RKbDvZx/1aGf/3moSF7oJ0124KhShljZsicZf2nGFnfBJcvj0hkpY zg== X-Google-Smtp-Source: AGHT+IH8xLWQb58rDXd3zqZXchXnYgj1aOb3wzzKQoheV6zap4VZEknB9Fc4g2bruEuw25S3KuHtKA== X-Received: by 2002:a5d:5849:0:b0:382:2f62:bd4b with SMTP id ffacd0b85a97d-38260b86b74mr14326525f8f.33.1732629630785; Tue, 26 Nov 2024 06:00:30 -0800 (PST) Received: from localhost.localdomain ([176.176.143.205]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3825fafe831sm13525611f8f.40.2024.11.26.06.00.29 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 26 Nov 2024 06:00:29 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , Aleksandar Rikalo , Richard Henderson , Jiaxun Yang Subject: [PATCH v3 04/16] target/mips: Call translator_ld() in translate_insn() callees Date: Tue, 26 Nov 2024 14:59:50 +0100 Message-ID: <20241126140003.74871-5-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241126140003.74871-1-philmd@linaro.org> References: <20241126140003.74871-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=philmd@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Historically we were only calling decode_opc() from the MIPS translate_insn() handler. Then variable instruction length ISAs were added, we kept using the same pattern but call yet more translator_ld() in the callees when necessary. This is cumbersome and bug prone, so better move all translator_ld() calls to the callees where it is more logical. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/mips/tcg/translate.c | 6 ++---- target/mips/tcg/micromips_translate.c.inc | 3 +++ target/mips/tcg/mips16e_translate.c.inc | 5 +++-- target/mips/tcg/nanomips_translate.c.inc | 12 +++++++++--- 4 files changed, 17 insertions(+), 9 deletions(-) diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c index 6fd5462a24f..0495fbe1dc6 100644 --- a/target/mips/tcg/translate.c +++ b/target/mips/tcg/translate.c @@ -15000,6 +15000,8 @@ static void decode_opc(CPUMIPSState *env, DisasContext *ctx) gen_set_label(l1); } + ctx->opcode = translator_ldl(env, &ctx->base, ctx->base.pc_next); + /* Transition to the auto-generated decoder. */ /* Vendor specific extensions */ @@ -15120,17 +15122,13 @@ static void mips_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) is_slot = ctx->hflags & MIPS_HFLAG_BMASK; if (ctx->insn_flags & ISA_NANOMIPS32) { - ctx->opcode = translator_lduw(env, &ctx->base, ctx->base.pc_next); insn_bytes = decode_isa_nanomips(env, ctx); } else if (!(ctx->hflags & MIPS_HFLAG_M16)) { - ctx->opcode = translator_ldl(env, &ctx->base, ctx->base.pc_next); insn_bytes = 4; decode_opc(env, ctx); } else if (ctx->insn_flags & ASE_MICROMIPS) { - ctx->opcode = translator_lduw(env, &ctx->base, ctx->base.pc_next); insn_bytes = decode_isa_micromips(env, ctx); } else if (ctx->insn_flags & ASE_MIPS16) { - ctx->opcode = translator_lduw(env, &ctx->base, ctx->base.pc_next); insn_bytes = decode_ase_mips16e(env, ctx); } else { gen_reserved_instruction(ctx); diff --git a/target/mips/tcg/micromips_translate.c.inc b/target/mips/tcg/micromips_translate.c.inc index c479bec1081..98a00125520 100644 --- a/target/mips/tcg/micromips_translate.c.inc +++ b/target/mips/tcg/micromips_translate.c.inc @@ -2973,6 +2973,7 @@ static void decode_micromips32_opc(CPUMIPSState *env, DisasContext *ctx) static int decode_isa_micromips(CPUMIPSState *env, DisasContext *ctx) { + uint32_t opcode; uint32_t op; /* make sure instructions are on a halfword boundary */ @@ -2982,6 +2983,8 @@ static int decode_isa_micromips(CPUMIPSState *env, DisasContext *ctx) return 2; } + opcode = translator_lduw(env, &ctx->base, ctx->base.pc_next); + ctx->opcode = opcode; op = (ctx->opcode >> 10) & 0x3f; /* Enforce properly-sized instructions in a delay slot */ if (ctx->hflags & MIPS_HFLAG_BDS_STRICT) { diff --git a/target/mips/tcg/mips16e_translate.c.inc b/target/mips/tcg/mips16e_translate.c.inc index a9af8f1e74a..defef3ce559 100644 --- a/target/mips/tcg/mips16e_translate.c.inc +++ b/target/mips/tcg/mips16e_translate.c.inc @@ -453,11 +453,9 @@ static void decode_i64_mips16(DisasContext *ctx, static int decode_extended_mips16_opc(CPUMIPSState *env, DisasContext *ctx) { - int extend = translator_lduw(env, &ctx->base, ctx->base.pc_next + 2); int op, rx, ry, funct, sa; int16_t imm, offset; - ctx->opcode = (ctx->opcode << 16) | extend; op = (ctx->opcode >> 11) & 0x1f; sa = (ctx->opcode >> 22) & 0x1f; funct = (ctx->opcode >> 8) & 0x7; @@ -658,6 +656,7 @@ static int decode_ase_mips16e(CPUMIPSState *env, DisasContext *ctx) int funct; int n_bytes; + ctx->opcode = translator_lduw(env, &ctx->base, ctx->base.pc_next); op = (ctx->opcode >> 11) & 0x1f; sa = (ctx->opcode >> 2) & 0x7; sa = sa == 0 ? 8 : sa; @@ -1103,6 +1102,8 @@ static int decode_ase_mips16e(CPUMIPSState *env, DisasContext *ctx) } break; case M16_OPC_EXTEND: + ctx->opcode <<= 16; + ctx->opcode |= translator_lduw(env, &ctx->base, ctx->base.pc_next + 2); decode_extended_mips16_opc(env, ctx); n_bytes = 4; break; diff --git a/target/mips/tcg/nanomips_translate.c.inc b/target/mips/tcg/nanomips_translate.c.inc index 1e274143bbd..6ee0c4fca3b 100644 --- a/target/mips/tcg/nanomips_translate.c.inc +++ b/target/mips/tcg/nanomips_translate.c.inc @@ -4467,10 +4467,11 @@ static int decode_nanomips_32_48_opc(CPUMIPSState *env, DisasContext *ctx) static int decode_isa_nanomips(CPUMIPSState *env, DisasContext *ctx) { + uint64_t opcode; uint32_t op; - int rt = decode_gpr_gpr3(NANOMIPS_EXTRACT_RT3(ctx->opcode)); - int rs = decode_gpr_gpr3(NANOMIPS_EXTRACT_RS3(ctx->opcode)); - int rd = decode_gpr_gpr3(NANOMIPS_EXTRACT_RD3(ctx->opcode)); + int rt; + int rs; + int rd; int offset; int imm; @@ -4482,6 +4483,11 @@ static int decode_isa_nanomips(CPUMIPSState *env, DisasContext *ctx) return 2; } + opcode = translator_lduw(env, &ctx->base, ctx->base.pc_next); + ctx->opcode = opcode; + rt = decode_gpr_gpr3(NANOMIPS_EXTRACT_RT3(ctx->opcode)); + rs = decode_gpr_gpr3(NANOMIPS_EXTRACT_RS3(ctx->opcode)); + rd = decode_gpr_gpr3(NANOMIPS_EXTRACT_RD3(ctx->opcode)); op = extract32(ctx->opcode, 10, 6); switch (op) { case NM_P16_MV: From patchwork Tue Nov 26 13:59:51 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13886037 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C26CED3B98F for ; Tue, 26 Nov 2024 14:01:25 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tFw7W-0002kW-Ao; Tue, 26 Nov 2024 09:00:50 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tFw7M-0002hv-Ui for qemu-devel@nongnu.org; Tue, 26 Nov 2024 09:00:42 -0500 Received: from mail-wr1-x430.google.com ([2a00:1450:4864:20::430]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tFw7L-0005A0-3O for qemu-devel@nongnu.org; Tue, 26 Nov 2024 09:00:40 -0500 Received: by mail-wr1-x430.google.com with SMTP id ffacd0b85a97d-38248b810ffso4296064f8f.0 for ; Tue, 26 Nov 2024 06:00:38 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1732629637; x=1733234437; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=kF7mSY0O5qPkOg956lvsP5sIb9mfyEZh01tqlgPBlGA=; b=joXi0HUUj9ymuxWCtB/d2OIr7sr3AoXcNtCaqLpaDs0N8mtRBA06ksKfhQcOHaa9A5 4gpCjZwrlvSA5pSv+lLmUEt+cF8OoELbnhhXWHX5rM7mDwqlvDFb6s7Rp2QaZY+tsji9 WdFGotHFrBdXrZhK0ZCxRQMsM2aci8RO5bKrD1i7w7CzCst0rLForC0nmvLsFfdNTQQR Ho8sMdWB9aXvJaDGQ+hvSM+UdKDkJDlzeMPcul8xkSQSvA0/lpVHtVRDey6vphigbmKs JILLS/o5GWPkakNwgvF5So5skQuv3ZoI13Hksa9leoYJ9oFbyYVzvcma56jxx8gvYqye vmdw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1732629637; x=1733234437; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=kF7mSY0O5qPkOg956lvsP5sIb9mfyEZh01tqlgPBlGA=; b=wuXVz2Az4CzdzdV5p/cMHW0Y+q50sRcYOSbQqjHrSzpgkdsQsEgKNAWf9UGV6T80uu KltqS+702ocMRQ6utDaroy6U6GzzIV7TDnpgRr7vn85TnrneiAoM80Ht11tqZvjvRUk0 MxLxnizPVJmxgjACR2GRbe/AXpNecsUGoM16BoFKMZWhkLhwBCou2ccX65bRSpY9y2Ra TBp6hBjX39pzhYTwCRkGX6ckg2iPADHrnht8WTJ+t8Xr6qDbM+dR5LIlVfSamdy/qU3Z bjPsu1wKokXarJPiESkPijjxO4rxE0PyLAZbIfI8Av/xj6wp2zQB4p5XwB7bEP5ZQLY3 OS8w== X-Gm-Message-State: AOJu0YxOxc5NuEk3bcG9Qw1ctti2YlE1nlEKZwo4ee0GiUDlKb1qfSDi lAbHlyPT04XfRXwV4nrJE3p40KBmSspGnX2ZE0F0ix3nLelayzMmqz18nhS8AOspuwHG9EAl7aH U X-Gm-Gg: ASbGnctTDDEaoMSfhOa4YQim2tpC+rsW6K5Ji0h1jHGjC0aWeDzGuKCOgsOvTBqoRpi qPky0WrRGTObBqhaAcGxThaV3W9xkKP/aX4ngD1sm9sy7vrmrQtZEUK0fhoS93wduWBJiNdQbZB bG9igNvacT83YfA8PDXvb2Jnm2jjX3FVHXE8Aw3KZ94KP8+rv7qDTCINI+HLCjKWODoYsBar4/1 SFstJGjFhoIRu6W79lSPM/9fCWn3He7d4UsPrZXMv+X3XviAdUoirnASBlE8m0Ogqy1vo8HPNa7 OA== X-Google-Smtp-Source: AGHT+IFm/IDoGEGKvaso/ogCqBYs5W0ZwhEdK9UiVokaHapcYooc8g8vHBNaNk5zkVgwloIipGA3pw== X-Received: by 2002:a5d:6d08:0:b0:382:4a66:f517 with SMTP id ffacd0b85a97d-38260b452e2mr13627856f8f.4.1732629637050; Tue, 26 Nov 2024 06:00:37 -0800 (PST) Received: from localhost.localdomain ([176.176.143.205]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434a6459f0dsm24286725e9.23.2024.11.26.06.00.35 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 26 Nov 2024 06:00:36 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , Aleksandar Rikalo , Richard Henderson , Jiaxun Yang Subject: [PATCH v3 05/16] target/mips: Have gen_[d]lsa() callers add 1 to shift amount argument Date: Tue, 26 Nov 2024 14:59:51 +0100 Message-ID: <20241126140003.74871-6-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241126140003.74871-1-philmd@linaro.org> References: <20241126140003.74871-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=philmd@linaro.org; helo=mail-wr1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Having the callee add 1 to shift amount is misleading (see the NM_LSA case in decode_nanomips_32_48_opc() where we have to manually substract 1). Rather have the callers pass a modified $sa. Suggested-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20241112172022.88348-4-philmd@linaro.org> --- target/mips/tcg/msa_translate.c | 4 ++-- target/mips/tcg/rel6_translate.c | 4 ++-- target/mips/tcg/translate_addr_const.c | 4 ++-- target/mips/tcg/micromips_translate.c.inc | 2 +- target/mips/tcg/nanomips_translate.c.inc | 7 +------ 5 files changed, 8 insertions(+), 13 deletions(-) diff --git a/target/mips/tcg/msa_translate.c b/target/mips/tcg/msa_translate.c index 75cf80a20ed..82b149922fa 100644 --- a/target/mips/tcg/msa_translate.c +++ b/target/mips/tcg/msa_translate.c @@ -780,7 +780,7 @@ TRANS_DF_iv(ST, trans_msa_ldst, gen_helper_msa_st); static bool trans_LSA(DisasContext *ctx, arg_r *a) { - return gen_lsa(ctx, a->rd, a->rt, a->rs, a->sa); + return gen_lsa(ctx, a->rd, a->rt, a->rs, a->sa + 1); } static bool trans_DLSA(DisasContext *ctx, arg_r *a) @@ -788,5 +788,5 @@ static bool trans_DLSA(DisasContext *ctx, arg_r *a) if (TARGET_LONG_BITS != 64) { return false; } - return gen_dlsa(ctx, a->rd, a->rt, a->rs, a->sa); + return gen_dlsa(ctx, a->rd, a->rt, a->rs, a->sa + 1); } diff --git a/target/mips/tcg/rel6_translate.c b/target/mips/tcg/rel6_translate.c index 59f237ba3ba..363bc864912 100644 --- a/target/mips/tcg/rel6_translate.c +++ b/target/mips/tcg/rel6_translate.c @@ -23,7 +23,7 @@ bool trans_REMOVED(DisasContext *ctx, arg_REMOVED *a) static bool trans_LSA(DisasContext *ctx, arg_r *a) { - return gen_lsa(ctx, a->rd, a->rt, a->rs, a->sa); + return gen_lsa(ctx, a->rd, a->rt, a->rs, a->sa + 1); } static bool trans_DLSA(DisasContext *ctx, arg_r *a) @@ -31,5 +31,5 @@ static bool trans_DLSA(DisasContext *ctx, arg_r *a) if (TARGET_LONG_BITS != 64) { return false; } - return gen_dlsa(ctx, a->rd, a->rt, a->rs, a->sa); + return gen_dlsa(ctx, a->rd, a->rt, a->rs, a->sa + 1); } diff --git a/target/mips/tcg/translate_addr_const.c b/target/mips/tcg/translate_addr_const.c index 6f4b39f715b..1d140e918da 100644 --- a/target/mips/tcg/translate_addr_const.c +++ b/target/mips/tcg/translate_addr_const.c @@ -26,7 +26,7 @@ bool gen_lsa(DisasContext *ctx, int rd, int rt, int rs, int sa) t1 = tcg_temp_new(); gen_load_gpr(t0, rs); gen_load_gpr(t1, rt); - tcg_gen_shli_tl(t0, t0, sa + 1); + tcg_gen_shli_tl(t0, t0, sa); tcg_gen_add_tl(cpu_gpr[rd], t0, t1); tcg_gen_ext32s_tl(cpu_gpr[rd], cpu_gpr[rd]); return true; @@ -47,7 +47,7 @@ bool gen_dlsa(DisasContext *ctx, int rd, int rt, int rs, int sa) t1 = tcg_temp_new(); gen_load_gpr(t0, rs); gen_load_gpr(t1, rt); - tcg_gen_shli_tl(t0, t0, sa + 1); + tcg_gen_shli_tl(t0, t0, sa); tcg_gen_add_tl(cpu_gpr[rd], t0, t1); return true; } diff --git a/target/mips/tcg/micromips_translate.c.inc b/target/mips/tcg/micromips_translate.c.inc index 98a00125520..26006f84df7 100644 --- a/target/mips/tcg/micromips_translate.c.inc +++ b/target/mips/tcg/micromips_translate.c.inc @@ -1795,7 +1795,7 @@ static void decode_micromips32_opc(CPUMIPSState *env, DisasContext *ctx) return; case LSA: check_insn(ctx, ISA_MIPS_R6); - gen_lsa(ctx, rd, rt, rs, extract32(ctx->opcode, 9, 2)); + gen_lsa(ctx, rd, rt, rs, extract32(ctx->opcode, 9, 2) + 1); break; case ALIGN: check_insn(ctx, ISA_MIPS_R6); diff --git a/target/mips/tcg/nanomips_translate.c.inc b/target/mips/tcg/nanomips_translate.c.inc index 6ee0c4fca3b..e0a920bdb3a 100644 --- a/target/mips/tcg/nanomips_translate.c.inc +++ b/target/mips/tcg/nanomips_translate.c.inc @@ -3626,12 +3626,7 @@ static int decode_nanomips_32_48_opc(CPUMIPSState *env, DisasContext *ctx) gen_p_lsx(ctx, rd, rs, rt); break; case NM_LSA: - /* - * In nanoMIPS, the shift field directly encodes the shift - * amount, meaning that the supported shift values are in - * the range 0 to 3 (instead of 1 to 4 in MIPSR6). - */ - gen_lsa(ctx, rd, rt, rs, extract32(ctx->opcode, 9, 2) - 1); + gen_lsa(ctx, rd, rt, rs, extract32(ctx->opcode, 9, 2)); break; case NM_EXTW: gen_ext(ctx, 32, rd, rs, rt, extract32(ctx->opcode, 6, 5)); From patchwork Tue Nov 26 13:59:52 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13886048 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8A69AD3B98F for ; Tue, 26 Nov 2024 14:04:01 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tFw7i-00037b-KY; Tue, 26 Nov 2024 09:01:02 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tFw7T-0002mI-52 for qemu-devel@nongnu.org; Tue, 26 Nov 2024 09:00:49 -0500 Received: from mail-wr1-x435.google.com ([2a00:1450:4864:20::435]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tFw7R-0005BV-5U for qemu-devel@nongnu.org; Tue, 26 Nov 2024 09:00:46 -0500 Received: by mail-wr1-x435.google.com with SMTP id ffacd0b85a97d-382456c6597so3971856f8f.2 for ; Tue, 26 Nov 2024 06:00:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1732629643; x=1733234443; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=cEVLJev568HOMNbO3XAojoNPEMi8j/7b1TkH5RlPnXI=; b=xBaU9O9T1pjvMBCmbPDIl6k3A+4buPKUl541txwOo2TV0zjlXz/cXGB0Y6a1BsrzDV fXjcm/wVs18SJiEQKmIWs5yw83splQEl5a+7V71S4mFMdR8TdM/nSpOl5jqNVb6Dkmeu w++1oQO2Ml2aHfdHtNb129NOQMBSIev24dS6T0SseAgbq8qQU0o0bwvkwFZfeIFrxQeo p/kkhXVRBI/e26/k02P1SzmlqjUrZCsJ2+uFsFIJ2uO+Y0La8yqxvY4TEWMyKAu8VvpB bHVjeaxYIx0A91wcPR7yICMClqGs3zWLDh3s+DAwdE5HqkYaAXpEwILJAPF6f+RndlDR WFLg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1732629643; x=1733234443; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=cEVLJev568HOMNbO3XAojoNPEMi8j/7b1TkH5RlPnXI=; b=FZs+t8oQoOn1xxtGRXpj693yeI5dwjK4QcYV3+ZYpWT0WowEMgXPFqYxP/WYJ8nep6 1WgVsp7lARuCaIf2ihuwMSPPdDrL+yc31enG1/mpIfhkWqo+e5qJCdQPIaaPcRJ4trDV oLvz3t6c0UrpXIP3/WrgsuQaH/A4EOpmzmLgp/W0xrRMkMwLi2TfedfT+TXOvpyzuSTl pCujUGFiKTE50zJBUXNRd8RCHrGVGRe8yFkKEX58M8WiNGicT81/BpIz01K2Ybbq8a/K wmn6iaqGo1c4uYpjvsJtzhhtYK7i6tsbkjSFCfodBvJNLSFdHeDlofdYa98jLAnwQHZg 4udw== X-Gm-Message-State: AOJu0YwRkxQf1NVp5NTWji+MC4NSnPlUSHct7/yAKN3G4LkcJx+2EoKk robWpWJaFFCN5hp23jdN958RdQIZR8h7ICvNexIzy3+YErJ1WDl34wHIpFsXKKJhm5OSw32BMRu D X-Gm-Gg: ASbGncvjP5lZBqQ3yUK3cjJDP1XH5t6QOzJta2aX0kh3qPTpPwDJmO/4c/LOGBBK03X a7/DkAWUfnifE2I100j7dB01Nwe6u5DW7s0V7g/eLFWJI53kKG2ZhM+pSCicAPnSapCQpKZQC2W 7mUFyDc7aRrhj38zbBNgbr4xmpwFKFKZ+2mWIkGlScXxMPa4+O2Rsoro3XDqFeLhzQlieZodhPz mwxzV90ojMgx/VetidabtvfjyPSZRO2La6BkB0WwqjeMkn684jddhZFXVypyCeE9TFA6UvQeCT7 og== X-Google-Smtp-Source: AGHT+IF8kFTTl5rAY6Enfwr2U4H6BNvLR5rSMmDb36mA4IbkheUHfbNNYqSg0upLKcd+EMvMoeOCog== X-Received: by 2002:a05:6000:2ce:b0:37d:446a:4142 with SMTP id ffacd0b85a97d-38260b867a5mr13129310f8f.32.1732629643128; Tue, 26 Nov 2024 06:00:43 -0800 (PST) Received: from localhost.localdomain ([176.176.143.205]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3825fafe98asm13274224f8f.39.2024.11.26.06.00.41 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 26 Nov 2024 06:00:42 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , Aleksandar Rikalo , Richard Henderson , Jiaxun Yang Subject: [PATCH v3 06/16] target/mips: Decode LSA shift amount using decodetree function Date: Tue, 26 Nov 2024 14:59:52 +0100 Message-ID: <20241126140003.74871-7-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241126140003.74871-1-philmd@linaro.org> References: <20241126140003.74871-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=philmd@linaro.org; helo=mail-wr1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20241112172022.88348-5-philmd@linaro.org> --- target/mips/tcg/msa.decode | 3 ++- target/mips/tcg/rel6.decode | 4 +++- target/mips/tcg/msa_translate.c | 4 ++-- target/mips/tcg/rel6_translate.c | 9 +++++++-- 4 files changed, 14 insertions(+), 6 deletions(-) diff --git a/target/mips/tcg/msa.decode b/target/mips/tcg/msa.decode index 4410e2a02e1..798e8c401ab 100644 --- a/target/mips/tcg/msa.decode +++ b/target/mips/tcg/msa.decode @@ -21,6 +21,7 @@ &msa_elm_df df wd ws n &msa_elm wd ws +%lsa_sa 6:2 !function=plus_1 %elm_df 16:6 !function=elm_df %elm_n 16:6 !function=elm_n %bit_df 16:7 !function=bit_df @@ -29,7 +30,7 @@ %3r_df_h 21:1 !function=plus_1 %3r_df_w 21:1 !function=plus_2 -@lsa ...... rs:5 rt:5 rd:5 ... sa:2 ...... &r +@lsa ...... rs:5 rt:5 rd:5 ... .. ...... &r sa=%lsa_sa @ldst ...... sa:s10 ws:5 wd:5 .... df:2 &msa_i @bz_v ...... ... .. wt:5 sa:s16 &msa_bz df=3 @bz ...... ... df:2 wt:5 sa:s16 &msa_bz diff --git a/target/mips/tcg/rel6.decode b/target/mips/tcg/rel6.decode index d6989cf56e8..a9031171b54 100644 --- a/target/mips/tcg/rel6.decode +++ b/target/mips/tcg/rel6.decode @@ -16,7 +16,9 @@ &r rs rt rd sa -@lsa ...... rs:5 rt:5 rd:5 ... sa:2 ...... &r +%lsa_sa 6:2 !function=plus_1 + +@lsa ...... rs:5 rt:5 rd:5 ... .. ...... &r sa=%lsa_sa LSA 000000 ..... ..... ..... 000 .. 000101 @lsa DLSA 000000 ..... ..... ..... 000 .. 010101 @lsa diff --git a/target/mips/tcg/msa_translate.c b/target/mips/tcg/msa_translate.c index 82b149922fa..75cf80a20ed 100644 --- a/target/mips/tcg/msa_translate.c +++ b/target/mips/tcg/msa_translate.c @@ -780,7 +780,7 @@ TRANS_DF_iv(ST, trans_msa_ldst, gen_helper_msa_st); static bool trans_LSA(DisasContext *ctx, arg_r *a) { - return gen_lsa(ctx, a->rd, a->rt, a->rs, a->sa + 1); + return gen_lsa(ctx, a->rd, a->rt, a->rs, a->sa); } static bool trans_DLSA(DisasContext *ctx, arg_r *a) @@ -788,5 +788,5 @@ static bool trans_DLSA(DisasContext *ctx, arg_r *a) if (TARGET_LONG_BITS != 64) { return false; } - return gen_dlsa(ctx, a->rd, a->rt, a->rs, a->sa + 1); + return gen_dlsa(ctx, a->rd, a->rt, a->rs, a->sa); } diff --git a/target/mips/tcg/rel6_translate.c b/target/mips/tcg/rel6_translate.c index 363bc864912..2522ecae2ba 100644 --- a/target/mips/tcg/rel6_translate.c +++ b/target/mips/tcg/rel6_translate.c @@ -11,6 +11,11 @@ #include "qemu/osdep.h" #include "translate.h" +static inline int plus_1(DisasContext *ctx, int x) +{ + return x + 1; +} + /* Include the auto-generated decoders. */ #include "decode-rel6.c.inc" @@ -23,7 +28,7 @@ bool trans_REMOVED(DisasContext *ctx, arg_REMOVED *a) static bool trans_LSA(DisasContext *ctx, arg_r *a) { - return gen_lsa(ctx, a->rd, a->rt, a->rs, a->sa + 1); + return gen_lsa(ctx, a->rd, a->rt, a->rs, a->sa); } static bool trans_DLSA(DisasContext *ctx, arg_r *a) @@ -31,5 +36,5 @@ static bool trans_DLSA(DisasContext *ctx, arg_r *a) if (TARGET_LONG_BITS != 64) { return false; } - return gen_dlsa(ctx, a->rd, a->rt, a->rs, a->sa + 1); + return gen_dlsa(ctx, a->rd, a->rt, a->rs, a->sa); } From patchwork Tue Nov 26 13:59:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13886038 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 182DAD3B98F for ; Tue, 26 Nov 2024 14:01:34 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tFw7k-0003ER-MQ; Tue, 26 Nov 2024 09:01:04 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tFw7e-0002wm-Pq for qemu-devel@nongnu.org; Tue, 26 Nov 2024 09:00:59 -0500 Received: from mail-wr1-x436.google.com ([2a00:1450:4864:20::436]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tFw7b-0005FH-EF for qemu-devel@nongnu.org; Tue, 26 Nov 2024 09:00:57 -0500 Received: by mail-wr1-x436.google.com with SMTP id ffacd0b85a97d-382610c7116so3004433f8f.0 for ; Tue, 26 Nov 2024 06:00:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1732629653; x=1733234453; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=e6jveqDxIgi93N+jXqdSQZa/NGDVOMeV1ydXtJqSLpU=; b=MDWAlgmoJZhkCYg/Gv1MXoF7yBGhh+DMiqUeqsZTkyObedh5rElDx4SFrhvm/QknWV vDQ5OJVHcZ/WbvPf0/nYZbyUr2VuHhXELKoMexYOKh01AemPj5XjCBbj4DpaHNeagSKn Pd1+FLM17Hh45KaQAlSvJzf5ZpT9qzEPVTWZZ/r1Ykp9Qj3rC6py4rwUXkEwaJjC20Ni WhK0V9dbe9yNYnTP3CGFkre+I4V4LLnT5PY03T0dMICPgHPk1ypGj3qVMW88sy5DoycK odgrTo5Tr6T4rbhMF0w0W9bJIG/7YlE95unQfs1TUXNTj8bEwMmMzdTmLA0eUqAkW2E9 DDKA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1732629653; x=1733234453; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=e6jveqDxIgi93N+jXqdSQZa/NGDVOMeV1ydXtJqSLpU=; b=n/AB6LQxia8bbpRa2Y5ROFhymleTbduPSL4xDaCyylsPWK31vu/O+e/TigQ/EeOmKS 73OevNl6V3kh8hvf8JXRyLgkuaj/zRXX8biBougVZ7aHDojTxU2E6ICvSHgVJHI1OsAq 3fw3l5DcMZFtFxVbho1lrYYQ0Xs0QiOX5rOBLRGhD2BBGiodQCQLXX31+7E6BO1+Nj9H y0N8crJ2vYkfguBXoNRKoTUvB8RjkI/fOpd36y3VdKLA3hq2vzzGWfejNcrSnGWv05GA YBp6Qu5Tj8uvqv5nxj5EUNvgfiifELzgVtiRebzsZzL2tEP2DSi6w7jkPv9SyxuSj/Hm 7/iw== X-Gm-Message-State: AOJu0YzouGHxzWE8vdOiV7pFqZwE/MKIJWkmviAalyJJjHtJZ2GCoQI4 sKmaBiESykSKnZ4iFBi6p6j1h/qKKgpJal0+phKqtKkjUU/vg790ahLLwAqFg+ZepnxVCcZZw6Y 0 X-Gm-Gg: ASbGncuNuhF5JqsAttiznUO+3feiUujeF3UkxcbCtbQTxDhibh1d2y1E4hq61MA1Wk0 eyW1JQ1UrQM2TxjrZlO+tFQ5/UC7LkWdc+hbh5r8BOUQQpABIpfASgLxUtiB7l9p+DOOIVQf6ab dehyL3CEAQR8SVNeNA0hli7HjbgSW5HxEze6DJDDqXTTOSE4iMEoiHeerKqalWcVY2+2B1ZcPxr fKWfjEC71DRYPQWrb8iTkyegCnVKiGudr80ZLKmXRIw2/WmjWmgsOksBtsS4b8tFCvwgebv X-Google-Smtp-Source: AGHT+IE5UW4DKVIAJJCiER1hTYjtOanYuptPrD72i1uF3fBBLwchRd2Dy/JX93NZeWo+EpkFJ5Qk3w== X-Received: by 2002:a05:6000:1449:b0:37c:d569:97b with SMTP id ffacd0b85a97d-38260b60008mr14060733f8f.19.1732629650662; Tue, 26 Nov 2024 06:00:50 -0800 (PST) Received: from localhost.localdomain ([176.176.143.205]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3825fafeceesm13407142f8f.37.2024.11.26.06.00.47 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 26 Nov 2024 06:00:48 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , Aleksandar Rikalo , Richard Henderson , Jiaxun Yang Subject: [PATCH v3 07/16] target/mips: Introduce decode tree bindings for MIPS16e ASE Date: Tue, 26 Nov 2024 14:59:53 +0100 Message-ID: <20241126140003.74871-8-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241126140003.74871-1-philmd@linaro.org> References: <20241126140003.74871-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::436; envelope-from=philmd@linaro.org; helo=mail-wr1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Introduce the MIPS16e decodetree configs for the 16-bit and 32-bit instructions. Signed-off-by: Philippe Mathieu-Daudé --- target/mips/tcg/translate.h | 2 ++ target/mips/tcg/mips16e_16.decode | 9 +++++++++ target/mips/tcg/mips16e_32.decode | 9 +++++++++ target/mips/tcg/mips16e_translate.c | 14 ++++++++++++++ target/mips/tcg/mips16e_translate.c.inc | 8 ++++++++ target/mips/tcg/meson.build | 3 +++ 6 files changed, 45 insertions(+) create mode 100644 target/mips/tcg/mips16e_16.decode create mode 100644 target/mips/tcg/mips16e_32.decode create mode 100644 target/mips/tcg/mips16e_translate.c diff --git a/target/mips/tcg/translate.h b/target/mips/tcg/translate.h index a65ab4a747c..d1aa811cfa1 100644 --- a/target/mips/tcg/translate.h +++ b/target/mips/tcg/translate.h @@ -223,6 +223,8 @@ bool decode_64bit_enabled(DisasContext *ctx); /* decodetree generated */ bool decode_isa_rel6(DisasContext *ctx, uint32_t insn); +bool decode_ase_mips16e_16(DisasContext *ctx, uint16_t insn); +bool decode_ase_mips16e_32(DisasContext *ctx, uint32_t insn); bool decode_ase_msa(DisasContext *ctx, uint32_t insn); bool decode_ext_txx9(DisasContext *ctx, uint32_t insn); bool decode_ext_loongson(DisasContext *ctx, uint32_t insn); diff --git a/target/mips/tcg/mips16e_16.decode b/target/mips/tcg/mips16e_16.decode new file mode 100644 index 00000000000..82586493f68 --- /dev/null +++ b/target/mips/tcg/mips16e_16.decode @@ -0,0 +1,9 @@ +# MIPS16e 16-bit instruction set extensions +# +# Copyright (C) 2021 Philippe Mathieu-Daudé +# +# SPDX-License-Identifier: LGPL-2.1-or-later +# +# Reference: MIPS Architecture for Programmers, Volume IV-a +# The MIPS16e Application Specific Extension +# (Document Number: MD00076) diff --git a/target/mips/tcg/mips16e_32.decode b/target/mips/tcg/mips16e_32.decode new file mode 100644 index 00000000000..fc429049e18 --- /dev/null +++ b/target/mips/tcg/mips16e_32.decode @@ -0,0 +1,9 @@ +# MIPS16e 32-bit instruction set extensions +# +# Copyright (C) 2021 Philippe Mathieu-Daudé +# +# SPDX-License-Identifier: LGPL-2.1-or-later +# +# Reference: MIPS Architecture for Programmers, Volume IV-a +# The MIPS16e Application Specific Extension +# (Document Number: MD00076) diff --git a/target/mips/tcg/mips16e_translate.c b/target/mips/tcg/mips16e_translate.c new file mode 100644 index 00000000000..6de9928b37e --- /dev/null +++ b/target/mips/tcg/mips16e_translate.c @@ -0,0 +1,14 @@ +/* + * MIPS emulation for QEMU - MIPS16e translation routines + * + * Copyright (c) 2021 Philippe Mathieu-Daudé + * + * SPDX-License-Identifier: LGPL-2.1-or-later + */ + +#include "qemu/osdep.h" +#include "translate.h" + +/* Include the auto-generated decoders. */ +#include "decode-mips16e_16.c.inc" +#include "decode-mips16e_32.c.inc" diff --git a/target/mips/tcg/mips16e_translate.c.inc b/target/mips/tcg/mips16e_translate.c.inc index defef3ce559..a57ae4e95b1 100644 --- a/target/mips/tcg/mips16e_translate.c.inc +++ b/target/mips/tcg/mips16e_translate.c.inc @@ -657,6 +657,14 @@ static int decode_ase_mips16e(CPUMIPSState *env, DisasContext *ctx) int n_bytes; ctx->opcode = translator_lduw(env, &ctx->base, ctx->base.pc_next); + + if (decode_ase_mips16e_16(ctx, ctx->opcode)) { + return 2; + } + if (decode_ase_mips16e_32(ctx, ctx->opcode)) { + return 4; + } + op = (ctx->opcode >> 11) & 0x1f; sa = (ctx->opcode >> 2) & 0x7; sa = sa == 0 ? 8 : sa; diff --git a/target/mips/tcg/meson.build b/target/mips/tcg/meson.build index 7b18e6c4c8b..bcb64368be8 100644 --- a/target/mips/tcg/meson.build +++ b/target/mips/tcg/meson.build @@ -1,4 +1,6 @@ gen = [ + decodetree.process('mips16e_16.decode', extra_args: ['--decode=decode_ase_mips16e_16', '--insnwidth=16']), + decodetree.process('mips16e_32.decode', extra_args: ['--decode=decode_ase_mips16e_32']), decodetree.process('rel6.decode', extra_args: ['--decode=decode_isa_rel6']), decodetree.process('msa.decode', extra_args: '--decode=decode_ase_msa'), decodetree.process('tx79.decode', extra_args: '--static-decode=decode_tx79'), @@ -16,6 +18,7 @@ mips_ss.add(files( 'fpu_helper.c', 'ldst_helper.c', 'lmmi_helper.c', + 'mips16e_translate.c', 'msa_helper.c', 'msa_translate.c', 'op_helper.c', From patchwork Tue Nov 26 13:59:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13886044 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E076DD3B98F for ; Tue, 26 Nov 2024 14:02:53 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tFw7o-0003Rc-OO; Tue, 26 Nov 2024 09:01:08 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tFw7i-00038u-Je for qemu-devel@nongnu.org; Tue, 26 Nov 2024 09:01:02 -0500 Received: from mail-wr1-x42c.google.com ([2a00:1450:4864:20::42c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tFw7f-0005Gp-Vl for qemu-devel@nongnu.org; Tue, 26 Nov 2024 09:01:02 -0500 Received: by mail-wr1-x42c.google.com with SMTP id ffacd0b85a97d-38246333e12so5606248f8f.1 for ; Tue, 26 Nov 2024 06:00:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1732629658; x=1733234458; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=5m5TqC/cPItfIOCXyMZ2ph3/Vk5sDUqZ5fGYzbXuOek=; b=ltDAh/S/qcE/ixGO3Tp0Zto9mnB/jVp0Os6HiaWy8J/prTVgfyG7dOeuTiCugDLgAh ZKqT6ymvqQvf/n1JSf+8wP9kCwduaVJJqwFRJ9YYSHJC+yWdbI4BJQfmA2xTCemZU5y8 j5MeXYLt4uwkGHMbKy857UUXEuDxOku/Zd8NcaetdBtYz0Z9S/Gfe0Nywxruq3KDeG01 xjfVFxkzHx+Aa+I3U2Z7qVzaOBqsziieq7hQ35IeQ8Q0n7pIY2iEqmyB/U/G9QDSQnmm tSwS3dsP5we/D57bm2OsEEp84wGtzgpp6B5RERS0RCaAX9KeH6YSj3qD8Pu0S8RWJQKu 4Hjw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1732629658; x=1733234458; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=5m5TqC/cPItfIOCXyMZ2ph3/Vk5sDUqZ5fGYzbXuOek=; b=ZTCoPD0UZiWMtTouGwRnYljGdYG83QusedU0dsXVldMOu6N9wruKg4jbTGxc2sudIu I/LLymtctjj7S7PS9Q2KD7BZwQjmCdT+6Ed39QIR6yrdhmyy5P+Kb6w/gUEWZ+tw3aCr dXnm396CQ7RmEcRiCcZHNmV/5zmEVDa7nYRZleMpQaK541YHm/c8dnWsUZFmWjpcFKiU /DHcCJA8HQknLMiEvEmGEwq1yTKwg/gKm529AEqhQ9J/vI4ddlP3viIukKXEsv7eOwlr m5S9/z1uQYksEtsF/KTv7Ql3zTDfyANMUiwxFOsZ3uwXfWUbMmiILVxtDHj52lilQwvD PQww== X-Gm-Message-State: AOJu0YxyPLzZ5P8yNYL4YzzTGWFJrFE8uns9W19i0bFAFxqJ5RPhgUbV 9ycF2EqLMu64Bv1WBZoS9UavB1zjZDJHL5Fs9Mv0gWpg7XX5MLGya4piYnljGEQ5vUhSNUG0hRA S X-Gm-Gg: ASbGncuxmUTB2fC6UccFsu0w5dcfJchD3iqGxkHOakWns5q+ldTEpgR9Wxv5wOZ9dX5 oL15MnznYJPLg8Q8B9sJSWFoeacojb9FzKmLdxX0hxQrjUUd8cK7bpAbyt24t1pHbP6XYuQd/sP FGV2tUsY5XGPTAlX8JYRGoZF+Jst5TsToriQQt3AiA1CQObiukIJacFRZ1F9g2EMbYiHU2lBu22 pT45a+I58RNQWcHs4RwEfGj+KZNe4fH4xlTgeo12IP170PgEMV2AK0FmdSuK08mz1J2XcfD X-Google-Smtp-Source: AGHT+IFwHUwdzfZSMqYqBQ6sV2wcMmRVicnWNeF8M/S+UPW6E96sLgD5rmzwGIrqS9GkyLyQ20ZV/g== X-Received: by 2002:a05:6000:790:b0:385:bc53:b2af with SMTP id ffacd0b85a97d-385bc53b2camr6857946f8f.42.1732629657668; Tue, 26 Nov 2024 06:00:57 -0800 (PST) Received: from localhost.localdomain ([176.176.143.205]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3825fad6270sm13318459f8f.14.2024.11.26.06.00.55 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 26 Nov 2024 06:00:56 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , Aleksandar Rikalo , Richard Henderson , Jiaxun Yang , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH v3 08/16] target/mips: Introduce decode tree bindings for microMIPS ISA Date: Tue, 26 Nov 2024 14:59:54 +0100 Message-ID: <20241126140003.74871-9-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241126140003.74871-1-philmd@linaro.org> References: <20241126140003.74871-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42c; envelope-from=philmd@linaro.org; helo=mail-wr1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Philippe Mathieu-Daudé Introduce the microMIPS decodetree configs for the 16-bit and 32-bit instructions. Signed-off-by: Philippe Mathieu-Daudé --- target/mips/tcg/translate.h | 2 ++ target/mips/tcg/micromips16.decode | 11 +++++++++++ target/mips/tcg/micromips32.decode | 11 +++++++++++ target/mips/tcg/micromips_translate.c | 14 ++++++++++++++ target/mips/tcg/micromips_translate.c.inc | 9 +++++++++ target/mips/tcg/meson.build | 3 +++ 6 files changed, 50 insertions(+) create mode 100644 target/mips/tcg/micromips16.decode create mode 100644 target/mips/tcg/micromips32.decode create mode 100644 target/mips/tcg/micromips_translate.c diff --git a/target/mips/tcg/translate.h b/target/mips/tcg/translate.h index d1aa811cfa1..2a079cb28d9 100644 --- a/target/mips/tcg/translate.h +++ b/target/mips/tcg/translate.h @@ -222,6 +222,8 @@ bool decode_ase_mxu(DisasContext *ctx, uint32_t insn); bool decode_64bit_enabled(DisasContext *ctx); /* decodetree generated */ +bool decode_isa_micromips16(DisasContext *ctx, uint16_t insn); +bool decode_isa_micromips32(DisasContext *ctx, uint32_t insn); bool decode_isa_rel6(DisasContext *ctx, uint32_t insn); bool decode_ase_mips16e_16(DisasContext *ctx, uint16_t insn); bool decode_ase_mips16e_32(DisasContext *ctx, uint32_t insn); diff --git a/target/mips/tcg/micromips16.decode b/target/mips/tcg/micromips16.decode new file mode 100644 index 00000000000..d341da16b04 --- /dev/null +++ b/target/mips/tcg/micromips16.decode @@ -0,0 +1,11 @@ +# microMIPS32 16-bit instruction set extensions +# +# Copyright (C) 2021 Philippe Mathieu-Daudé +# +# SPDX-License-Identifier: LGPL-2.1-or-later +# +# Reference: MIPS Architecture for Programmers, Volume II-B +# microMIPS32 Instruction Set +# (Document Number: MD00582) +# microMIPS64 Instruction Set +# (Document Number: MD00594) diff --git a/target/mips/tcg/micromips32.decode b/target/mips/tcg/micromips32.decode new file mode 100644 index 00000000000..333ab0969ca --- /dev/null +++ b/target/mips/tcg/micromips32.decode @@ -0,0 +1,11 @@ +# microMIPS32 32-bit instruction set extensions +# +# Copyright (C) 2021 Philippe Mathieu-Daudé +# +# SPDX-License-Identifier: LGPL-2.1-or-later +# +# Reference: MIPS Architecture for Programmers, Volume II-B +# microMIPS32 Instruction Set +# (Document Number: MD00582) +# microMIPS64 Instruction Set +# (Document Number: MD00594) diff --git a/target/mips/tcg/micromips_translate.c b/target/mips/tcg/micromips_translate.c new file mode 100644 index 00000000000..49e90e7eca2 --- /dev/null +++ b/target/mips/tcg/micromips_translate.c @@ -0,0 +1,14 @@ +/* + * MIPS emulation for QEMU - microMIPS translation routines + * + * Copyright (c) 2021 Philippe Mathieu-Daudé + * + * SPDX-License-Identifier: LGPL-2.1-or-later + */ + +#include "qemu/osdep.h" +#include "translate.h" + +/* Include the auto-generated decoders. */ +#include "decode-micromips16.c.inc" +#include "decode-micromips32.c.inc" diff --git a/target/mips/tcg/micromips_translate.c.inc b/target/mips/tcg/micromips_translate.c.inc index 26006f84df7..7a884222eed 100644 --- a/target/mips/tcg/micromips_translate.c.inc +++ b/target/mips/tcg/micromips_translate.c.inc @@ -3018,6 +3018,15 @@ static int decode_isa_micromips(CPUMIPSState *env, DisasContext *ctx) } } + if (decode_isa_micromips16(ctx, opcode)) { + return 2; + } + opcode <<= 16; + opcode |= translator_lduw(env, &ctx->base, ctx->base.pc_next + 2); + if (decode_isa_micromips32(ctx, opcode)) { + return 4; + } + switch (op) { case POOL16A: { diff --git a/target/mips/tcg/meson.build b/target/mips/tcg/meson.build index bcb64368be8..ca70769912c 100644 --- a/target/mips/tcg/meson.build +++ b/target/mips/tcg/meson.build @@ -1,6 +1,8 @@ gen = [ decodetree.process('mips16e_16.decode', extra_args: ['--decode=decode_ase_mips16e_16', '--insnwidth=16']), decodetree.process('mips16e_32.decode', extra_args: ['--decode=decode_ase_mips16e_32']), + decodetree.process('micromips16.decode', extra_args: ['--decode=decode_isa_micromips16', '--insnwidth=16']), + decodetree.process('micromips32.decode', extra_args: ['--decode=decode_isa_micromips32']), decodetree.process('rel6.decode', extra_args: ['--decode=decode_isa_rel6']), decodetree.process('msa.decode', extra_args: '--decode=decode_ase_msa'), decodetree.process('tx79.decode', extra_args: '--static-decode=decode_tx79'), @@ -18,6 +20,7 @@ mips_ss.add(files( 'fpu_helper.c', 'ldst_helper.c', 'lmmi_helper.c', + 'micromips_translate.c', 'mips16e_translate.c', 'msa_helper.c', 'msa_translate.c', From patchwork Tue Nov 26 13:59:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13886040 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0385AD3B98B for ; Tue, 26 Nov 2024 14:01:56 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tFw7s-0003fV-Os; Tue, 26 Nov 2024 09:01:12 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tFw7n-0003My-SH for qemu-devel@nongnu.org; Tue, 26 Nov 2024 09:01:07 -0500 Received: from mail-wm1-x336.google.com ([2a00:1450:4864:20::336]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tFw7m-0005J4-14 for qemu-devel@nongnu.org; Tue, 26 Nov 2024 09:01:07 -0500 Received: by mail-wm1-x336.google.com with SMTP id 5b1f17b1804b1-43497839b80so23793205e9.2 for ; Tue, 26 Nov 2024 06:01:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1732629664; x=1733234464; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=tardOrbKTYXoxRnABs7gTXmCmfB9GEPw0cdGe0ErewQ=; b=EcAGGetuA5u+FyCq6ph+9WYIzg3PcsxzXHxprvoO/AO9yCcBDY9tibY2LpAuy/7E76 MZinY/Q5NJePHoY7Z4LZBJuFSGlu/oL6LbbAuALmxacUnZzbjzkRiUmP22LqWPQqkzrm ZZmx+shku9Ev3tewnJJCOxd7grdLRXpyG98rnCKmk9BhLmDL6RVgKQhrG2AOL/K/SQfb kVphWf8tONMkOiX1Qae8TqNPSPT/OeIZuj3xe/yI5ITk4hfcw9gU7Dl+imIrOj92wUxt dfYk86F+IqsdIPIj9rRRO6P4ZAcwS6BnZ6adaQIuwUAjKoTPOctPHD9Pco0r6qHd+9F+ 8f/Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1732629664; x=1733234464; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=tardOrbKTYXoxRnABs7gTXmCmfB9GEPw0cdGe0ErewQ=; b=ei4VZFEkr7FbhlIhnql983HZDJFzDltlkVh1g7NB5zLpsdFQq6sLPGMiXjxKZg0KhD bU/+oWYWC7zJF8oyCywUYFZ6gK2T5SXxo2eXkqM55hcrsRYLyyci2f5xPDG8Ay4WC2Mm BVM1SxjrebG3QReoOl/soroBlnUqxxYeXDUa1O1yfSp3fkS8HkBXsBA4pCyX9sBbtMj6 DIXqRpd9Jn4x0Z09zRlGUQP3HInBUzjLbsdgqDQ/xy8Liyxbn716/EdPK2mFDZ74W0w1 P3kUh0aBGdfr3LwxVGzmhfjhDEG9iOkmIASYrkvYu2GHOVZYBjuH5zstLEufs51JgepC 9DEw== X-Gm-Message-State: AOJu0YxkGVrHGoPcwyWgwc8gLwYUEvpWPMRx4ZGS/j2+mwkCncgPk3ki vrZqN+5/TtaJMl9/4iZTJj7F7ZHW3OU5KRhrta4PZwxxKQ7gLK68htsxUPgyQzntyQ1s6GMal1i R X-Gm-Gg: ASbGncuR8a3oQ40qinYaQIiUgo8/dtXTu8nb6nLZo+KKWOWER3YeHHnIYJlmb+VW5hZ lPTR4q6n91RccwUXZKfRKuvmeyg8pnR0Uvk7USyijK11r7f8h3eHYUYXSeJqsDCrOxZ6wELkDNk kknaawYs9iHaiYdZ+OgES7qLWLGROGsgEsyOJptBcxhBMLU0JWZP3c2s539fT0m2itqh8Iu4YiY 0h2kwR1PPLXzfJuuzAbJHeqUSErirmS6YtnNRFATWNpcNGjHakMXGY6q0UOPhk20egEMRb7 X-Google-Smtp-Source: AGHT+IEKpTpLGorfWPGdjBVdLylZK75l9mVp8elZDwaEcA+TS2DHsdl5qRAdr+EBzhnv+0CTsU9yyQ== X-Received: by 2002:a05:600c:3509:b0:431:5187:28dd with SMTP id 5b1f17b1804b1-433ce4d3e48mr121677815e9.28.1732629663782; Tue, 26 Nov 2024 06:01:03 -0800 (PST) Received: from localhost.localdomain ([176.176.143.205]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-433b45d4dd6sm236632255e9.24.2024.11.26.06.01.02 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 26 Nov 2024 06:01:03 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , Aleksandar Rikalo , Richard Henderson , Jiaxun Yang Subject: [PATCH v3 09/16] scripts/decodetree: Add support for 48-bit instructions Date: Tue, 26 Nov 2024 14:59:55 +0100 Message-ID: <20241126140003.74871-10-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241126140003.74871-1-philmd@linaro.org> References: <20241126140003.74871-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::336; envelope-from=philmd@linaro.org; helo=mail-wm1-x336.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Some nanoMIPS instructions are encoded using 48-bit. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- scripts/decodetree.py | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/scripts/decodetree.py b/scripts/decodetree.py index e8b72da3a97..88cd476d2d3 100644 --- a/scripts/decodetree.py +++ b/scripts/decodetree.py @@ -1543,6 +1543,10 @@ def main(): insntype = 'uint64_t' insnmask = 0xffffffffffffffff bitop_width = 64 + elif insnwidth == 48: + insntype = 'uint64_t' + insnmask = 0xffffffffffff + bitop_width = 64 elif insnwidth != 32: error(0, 'cannot handle insns of width', insnwidth) elif o == '--test-for-error': From patchwork Tue Nov 26 13:59:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13886051 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C0524D3B98F for ; Tue, 26 Nov 2024 14:04:31 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tFw7u-0003pz-JP; Tue, 26 Nov 2024 09:01:14 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tFw7t-0003jG-Bj for qemu-devel@nongnu.org; Tue, 26 Nov 2024 09:01:13 -0500 Received: from mail-wr1-x435.google.com ([2a00:1450:4864:20::435]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tFw7r-0005KZ-Ix for qemu-devel@nongnu.org; Tue, 26 Nov 2024 09:01:13 -0500 Received: by mail-wr1-x435.google.com with SMTP id ffacd0b85a97d-3823cae4be1so3478021f8f.3 for ; Tue, 26 Nov 2024 06:01:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1732629670; x=1733234470; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=1bE2bl0QDf3Rqlq5KlIMVIIKrO5fdUWdjBNe4ZEiQiI=; b=J+HOUGdJM0mGnWsz21sa09izLeln3PntqcWhOu1ayLqLmwl9cFQJi8CoqoZHlUEbbt U4rxvHRU4WIEtyuNUXYk3fet284TepZUVh5a7Vf/TayGt8lE0RnCrBHMz4gWb9vRCquE rKHPR1bGX/CD/NZFlP2ncIIX+cJlax6pibsjbJLdtwmgaVDoRr8kcARUousgenxyMwqj cRyIRKZ46PctRoLpgiA41nWsKdm9mBMqoeNrCVF8MhV0a3oiUutJdBXsqWTzY7JJQ/E/ Dnru0ukdlBOjhF4stxgxqa+XxkXGHjpHyPjrv7E614c+Z49EV9DS+82xXTgmYoeicE+m Pb7A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1732629670; x=1733234470; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=1bE2bl0QDf3Rqlq5KlIMVIIKrO5fdUWdjBNe4ZEiQiI=; b=nF0h9jUdk5Uf91+QeQVkZJ3b7rCC4d6gGIDy42ExwpeMbKt5onpz5LG/GxBkoDaLeX VYBhQhA7frDMgM2v2AzYscR7X0gGnwMf8hMCc+8Sa6dHW1ey/archywUqQV5PcKopaJ/ KJso2ePwdGJRMGzFz+s6y2aH5tfgOhV9gu/+qEWbq86XXtg4Zt3l/AgZ7247Mg/Ml3c+ aiEeTFNXfJHZ20Md+iycRoBxCN1gJRK8CLPQ4EPgZ87Lekmkas79vzcHWqC1OWCSNMW0 XW8tlw4bp7VRyfsctQxp4kHd6r56SJa2aQB0NvViml3kksTtqPg4Tk9h2kfj5zcofBRj cXAQ== X-Gm-Message-State: AOJu0YzL3li07YLYfRCYvrFP4O9cGIqSNLkrXhjSqAxS1gJsKFJAbseo iVCMiSQS1ntL5ZdgjlEPQRIXSDsA+WopE/2psU5/Wc+tyuWjm/3aPwn/OrugV9SLQvFurZaE/zj H X-Gm-Gg: ASbGncuuTv71CzRglclo5SeegJvq/SkFFx7pt3V6bjk+USKjI2CAStzBtldtRCs+TyA 4BS4g2v/aZI6ttZRm4EnUqtRCU/XRtB5SQOFnThPaXJStjvRyGJDM6mfjFs/Drw3K7A+62ZqzCL 5l2ub7lZlgTB38XgAQzvcsSCdGr8c3Wz8mGH3COEDZBuapki8S+5ajBuAl5vwoZXT5zp1IPaK4b 4FgFMbdfOeMSfJ2vkKOA5iInFIyXkJdJzug4Zbg32tcpgI7soSDnlHpCgJaSXogKiVM0KYY X-Google-Smtp-Source: AGHT+IHF9lcoMohsww7OZUAgW01vlBeU7tbq6w6E90DbENBzkfrbiSQeFbU3SzCNXPSiXhjUhqLDyg== X-Received: by 2002:a05:6000:1866:b0:382:488d:dfc5 with SMTP id ffacd0b85a97d-382608a394fmr14984584f8f.0.1732629669688; Tue, 26 Nov 2024 06:01:09 -0800 (PST) Received: from localhost.localdomain ([176.176.143.205]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3825fbedebfsm13436096f8f.100.2024.11.26.06.01.08 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 26 Nov 2024 06:01:09 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , Aleksandar Rikalo , Richard Henderson , Jiaxun Yang Subject: [PATCH v3 10/16] target/mips: Introduce decode tree bindings for nanoMIPS ISA Date: Tue, 26 Nov 2024 14:59:56 +0100 Message-ID: <20241126140003.74871-11-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241126140003.74871-1-philmd@linaro.org> References: <20241126140003.74871-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=philmd@linaro.org; helo=mail-wr1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Introduce the nanoMIPS decodetree configs for the 16-bit, 32-bit and 48-bit instructions. Signed-off-by: Philippe Mathieu-Daudé --- target/mips/tcg/translate.h | 3 +++ target/mips/tcg/nanomips16.decode | 8 ++++++++ target/mips/tcg/nanomips32.decode | 8 ++++++++ target/mips/tcg/nanomips48.decode | 8 ++++++++ target/mips/tcg/nanomips_translate.c | 15 +++++++++++++++ target/mips/tcg/nanomips_translate.c.inc | 16 ++++++++++++++++ target/mips/tcg/meson.build | 4 ++++ 7 files changed, 62 insertions(+) create mode 100644 target/mips/tcg/nanomips16.decode create mode 100644 target/mips/tcg/nanomips32.decode create mode 100644 target/mips/tcg/nanomips48.decode create mode 100644 target/mips/tcg/nanomips_translate.c diff --git a/target/mips/tcg/translate.h b/target/mips/tcg/translate.h index 2a079cb28d9..7fe34a1d891 100644 --- a/target/mips/tcg/translate.h +++ b/target/mips/tcg/translate.h @@ -224,6 +224,9 @@ bool decode_64bit_enabled(DisasContext *ctx); /* decodetree generated */ bool decode_isa_micromips16(DisasContext *ctx, uint16_t insn); bool decode_isa_micromips32(DisasContext *ctx, uint32_t insn); +bool decode_isa_nanomips16(DisasContext *ctx, uint16_t insn); +bool decode_isa_nanomips32(DisasContext *ctx, uint32_t insn); +bool decode_isa_nanomips48(DisasContext *ctx, uint64_t insn); bool decode_isa_rel6(DisasContext *ctx, uint32_t insn); bool decode_ase_mips16e_16(DisasContext *ctx, uint16_t insn); bool decode_ase_mips16e_32(DisasContext *ctx, uint32_t insn); diff --git a/target/mips/tcg/nanomips16.decode b/target/mips/tcg/nanomips16.decode new file mode 100644 index 00000000000..81fdc68e98b --- /dev/null +++ b/target/mips/tcg/nanomips16.decode @@ -0,0 +1,8 @@ +# nanoMIPS32 16-bit instruction set extensions +# +# Copyright (C) 2021 Philippe Mathieu-Daudé +# +# SPDX-License-Identifier: LGPL-2.1-or-later +# +# Reference: nanoMIPS32 Instruction Set Technical Reference Manual +# (Document Number: MD01247) diff --git a/target/mips/tcg/nanomips32.decode b/target/mips/tcg/nanomips32.decode new file mode 100644 index 00000000000..9cecf1e13d3 --- /dev/null +++ b/target/mips/tcg/nanomips32.decode @@ -0,0 +1,8 @@ +# nanoMIPS32 32-bit instruction set extensions +# +# Copyright (C) 2021 Philippe Mathieu-Daudé +# +# SPDX-License-Identifier: LGPL-2.1-or-later +# +# Reference: nanoMIPS32 Instruction Set Technical Reference Manual +# (Document Number: MD01247) diff --git a/target/mips/tcg/nanomips48.decode b/target/mips/tcg/nanomips48.decode new file mode 100644 index 00000000000..696cc15607a --- /dev/null +++ b/target/mips/tcg/nanomips48.decode @@ -0,0 +1,8 @@ +# nanoMIPS32 48-bit instruction set extensions +# +# Copyright (C) 2021 Philippe Mathieu-Daudé +# +# SPDX-License-Identifier: LGPL-2.1-or-later +# +# Reference: nanoMIPS32 Instruction Set Technical Reference Manual +# (Document Number: MD01247) diff --git a/target/mips/tcg/nanomips_translate.c b/target/mips/tcg/nanomips_translate.c new file mode 100644 index 00000000000..335a32845ed --- /dev/null +++ b/target/mips/tcg/nanomips_translate.c @@ -0,0 +1,15 @@ +/* + * MIPS emulation for QEMU - nanoMIPS translation routines + * + * Copyright (c) 2021 Philippe Mathieu-Daudé + * + * SPDX-License-Identifier: LGPL-2.1-or-later + */ + +#include "qemu/osdep.h" +#include "translate.h" + +/* Include the auto-generated decoders. */ +#include "decode-nanomips16.c.inc" +#include "decode-nanomips32.c.inc" +#include "decode-nanomips48.c.inc" diff --git a/target/mips/tcg/nanomips_translate.c.inc b/target/mips/tcg/nanomips_translate.c.inc index e0a920bdb3a..5d021f01128 100644 --- a/target/mips/tcg/nanomips_translate.c.inc +++ b/target/mips/tcg/nanomips_translate.c.inc @@ -4480,6 +4480,22 @@ static int decode_isa_nanomips(CPUMIPSState *env, DisasContext *ctx) opcode = translator_lduw(env, &ctx->base, ctx->base.pc_next); ctx->opcode = opcode; + if (decode_isa_nanomips16(ctx, opcode)) { + return 2; + } + + opcode <<= 16; + opcode |= translator_lduw(env, &ctx->base, ctx->base.pc_next + 2); + if (decode_isa_nanomips32(ctx, opcode)) { + return 4; + } + + opcode <<= 16; + opcode |= translator_lduw(env, &ctx->base, ctx->base.pc_next + 4); + if (decode_isa_nanomips48(ctx, opcode)) { + return 6; + } + rt = decode_gpr_gpr3(NANOMIPS_EXTRACT_RT3(ctx->opcode)); rs = decode_gpr_gpr3(NANOMIPS_EXTRACT_RS3(ctx->opcode)); rd = decode_gpr_gpr3(NANOMIPS_EXTRACT_RD3(ctx->opcode)); diff --git a/target/mips/tcg/meson.build b/target/mips/tcg/meson.build index ca70769912c..f674819e6a8 100644 --- a/target/mips/tcg/meson.build +++ b/target/mips/tcg/meson.build @@ -4,6 +4,9 @@ gen = [ decodetree.process('micromips16.decode', extra_args: ['--decode=decode_isa_micromips16', '--insnwidth=16']), decodetree.process('micromips32.decode', extra_args: ['--decode=decode_isa_micromips32']), decodetree.process('rel6.decode', extra_args: ['--decode=decode_isa_rel6']), + decodetree.process('nanomips16.decode', extra_args: ['--decode=decode_isa_nanomips16', '--insnwidth=16']), + decodetree.process('nanomips32.decode', extra_args: ['--decode=decode_isa_nanomips32']), + decodetree.process('nanomips48.decode', extra_args: ['--decode=decode_isa_nanomips48', '--insnwidth=48']), decodetree.process('msa.decode', extra_args: '--decode=decode_ase_msa'), decodetree.process('tx79.decode', extra_args: '--static-decode=decode_tx79'), decodetree.process('vr54xx.decode', extra_args: '--decode=decode_ext_vr54xx'), @@ -24,6 +27,7 @@ mips_ss.add(files( 'mips16e_translate.c', 'msa_helper.c', 'msa_translate.c', + 'nanomips_translate.c', 'op_helper.c', 'rel6_translate.c', 'translate.c', From patchwork Tue Nov 26 13:59:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13886050 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C2CE4D3B98B for ; Tue, 26 Nov 2024 14:04:19 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tFw8d-0004Na-Hx; Tue, 26 Nov 2024 09:02:02 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tFw85-00045e-VN for qemu-devel@nongnu.org; Tue, 26 Nov 2024 09:01:28 -0500 Received: from mail-wm1-x32f.google.com ([2a00:1450:4864:20::32f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tFw7y-0005LZ-NW for qemu-devel@nongnu.org; Tue, 26 Nov 2024 09:01:22 -0500 Received: by mail-wm1-x32f.google.com with SMTP id 5b1f17b1804b1-434a2033562so13724065e9.1 for ; Tue, 26 Nov 2024 06:01:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1732629676; x=1733234476; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=wepwirTTKAkbkaqkKDm3s9XDxGH9yJr/3hirBKFikkk=; b=WbC1tg066i3VfwUg3rls+5301Dw3QE6IiXqxSmZSl2Xt+QBm4TINZIJJrurgmMCQoy G6fvMUm98xZATRZazg3GcIJYOgVuvLVdUKlJwKE/BrUI1uBYTqZs+D5GYW502U/kOnLD PKHsuzA6LfdxhAsBk+QUYesqK3MJwVhKYasKxy2I2kzgxrvmTcsTTmL+bSCLZN4WSTqh LVwKhs/QBqNe90s7gMcI+Os++FNd8PMfRmirWDn85IAFkNO5qhET7hVHPyuBzjctRud4 x/2bn+m8sfa0QVUX5drQO8Mflf7hPqsqCMlQmcGsATFHZFD/rLM7mUQq3czugR9vrTf4 X2dA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1732629676; x=1733234476; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=wepwirTTKAkbkaqkKDm3s9XDxGH9yJr/3hirBKFikkk=; b=Y/knYNbW7dOhF3A8EFJk6cHFX8Qm5IKo9fBAJ5vo+Hx1TEx3Mv/AkesMgJzJpSoahM v4XJL55W1nybPClY4q/W10lM8AftcP7Yc6c+SY32aaLppRHwsgU7hfmkDZKAwZaT6Lu1 cXNG6yQ2DVae71fG4IQqIMQG5tDjok/TgdQmMrAhFpMaZGKydFycMzp1vQyGDRFRNYFL 3Xw+nd50yZ0CYL5nJFjAbFde+f4dCdV2a5rTKL5/zgt5zq3w5Sj3/IiFdwgVn2kuXalX PTe3UvvDpB/VO8I1eBpDxp9HvETtrtBKx4Sb36Ctkn7elDr6jTgn1om7gabv2KVKjU1E 6fsQ== X-Gm-Message-State: AOJu0YxBMFTJ6lg4uGKa4NsUj4oOFHUWGspmeNtLya+ykV85Ni7ci5Wm TygXSrW/ncXRo9niP17IR3zeKusCzh5y7wcIaHXSzFOaSTYqc2OekLkd+HY3T4smdKSzejJWH9x C X-Gm-Gg: ASbGncttdPp1myQQ8UStZOi7JwQpVx6MeBLFgHsMjl6gAwhtelKeVLPl+3ID3uEIpbV 6+9ytbuO7Le+dSNdNVQfokt4Emhxj5qC9oNkDaFA6rk3kUFTHV+LYbk2pJ+6YPigy25Y+z4gXAM eDnn/Oc/eo7QvPYA3VZH1Bw3rUDoknfK957w/VcypRcC6ZaZCG8ocNflGLHCpJhu1bPSybZaMqh 2fCBHDVFosJUL+CuDGJasyiXlqM6UOhONUvtpmXva/iA9NlqdnNRVh2SP77Vl8IDdHxEtKi X-Google-Smtp-Source: AGHT+IGLio/vnx/9ma2+bHFN9ZvLd0Vk/musqrbwkwV3ZMdk+QwAc+/Xpl4/Uc2GxtvDdpZhIt8Pag== X-Received: by 2002:a05:600c:1f88:b0:431:60d0:9088 with SMTP id 5b1f17b1804b1-433ce426feamr161069205e9.13.1732629676552; Tue, 26 Nov 2024 06:01:16 -0800 (PST) Received: from localhost.localdomain ([176.176.143.205]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-433b463abb4sm236443155e9.31.2024.11.26.06.01.15 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 26 Nov 2024 06:01:16 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , Aleksandar Rikalo , Richard Henderson , Jiaxun Yang Subject: [PATCH v3 11/16] target/mips: Convert microMIPS LSA opcode to decodetree Date: Tue, 26 Nov 2024 14:59:57 +0100 Message-ID: <20241126140003.74871-12-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241126140003.74871-1-philmd@linaro.org> References: <20241126140003.74871-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=philmd@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Simply call the generic gen_lsa(), using the plus_1() helper to add 1 to the shift amount. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20241112172022.88348-6-philmd@linaro.org> --- target/mips/tcg/micromips32.decode | 8 ++++++++ target/mips/tcg/micromips_translate.c | 10 ++++++++++ target/mips/tcg/micromips_translate.c.inc | 5 ----- 3 files changed, 18 insertions(+), 5 deletions(-) diff --git a/target/mips/tcg/micromips32.decode b/target/mips/tcg/micromips32.decode index 333ab0969ca..0df9f0c59ff 100644 --- a/target/mips/tcg/micromips32.decode +++ b/target/mips/tcg/micromips32.decode @@ -9,3 +9,11 @@ # (Document Number: MD00582) # microMIPS64 Instruction Set # (Document Number: MD00594) + +&r rs rt rd sa + +%lsa_sa 9:2 !function=plus_1 + +@lsa ...... rt:5 rs:5 rd:5 .. ... ...... &r sa=%lsa_sa + +LSA 000000 ..... ..... ..... .. 000 001111 @lsa diff --git a/target/mips/tcg/micromips_translate.c b/target/mips/tcg/micromips_translate.c index 49e90e7eca2..f0b5dbf655d 100644 --- a/target/mips/tcg/micromips_translate.c +++ b/target/mips/tcg/micromips_translate.c @@ -9,6 +9,16 @@ #include "qemu/osdep.h" #include "translate.h" +static inline int plus_1(DisasContext *ctx, int x) +{ + return x + 1; +} + /* Include the auto-generated decoders. */ #include "decode-micromips16.c.inc" #include "decode-micromips32.c.inc" + +static bool trans_LSA(DisasContext *ctx, arg_r *a) +{ + return gen_lsa(ctx, a->rd, a->rt, a->rs, a->sa); +} diff --git a/target/mips/tcg/micromips_translate.c.inc b/target/mips/tcg/micromips_translate.c.inc index 7a884222eed..73394554509 100644 --- a/target/mips/tcg/micromips_translate.c.inc +++ b/target/mips/tcg/micromips_translate.c.inc @@ -191,7 +191,6 @@ enum { /* The following can be distinguished by their lower 6 bits. */ BREAK32 = 0x07, INS = 0x0c, - LSA = 0x0f, ALIGN = 0x1f, EXT = 0x2c, POOL32AXF = 0x3c, @@ -1793,10 +1792,6 @@ static void decode_micromips32_opc(CPUMIPSState *env, DisasContext *ctx) case INS: gen_bitops(ctx, OPC_INS, rt, rs, rr, rd); return; - case LSA: - check_insn(ctx, ISA_MIPS_R6); - gen_lsa(ctx, rd, rt, rs, extract32(ctx->opcode, 9, 2) + 1); - break; case ALIGN: check_insn(ctx, ISA_MIPS_R6); gen_align(ctx, 32, rd, rs, rt, extract32(ctx->opcode, 9, 2)); From patchwork Tue Nov 26 13:59:58 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13886047 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3392ED3B991 for ; Tue, 26 Nov 2024 14:03:57 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tFw98-0005jy-Lu; Tue, 26 Nov 2024 09:02:30 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tFw8A-00048N-NM for qemu-devel@nongnu.org; Tue, 26 Nov 2024 09:01:30 -0500 Received: from mail-wm1-x32b.google.com ([2a00:1450:4864:20::32b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tFw88-0005NC-UK for qemu-devel@nongnu.org; Tue, 26 Nov 2024 09:01:30 -0500 Received: by mail-wm1-x32b.google.com with SMTP id 5b1f17b1804b1-434a752140eso5170135e9.3 for ; Tue, 26 Nov 2024 06:01:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1732629686; x=1733234486; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=xmJIkkEIvmi/80J4VnVDxpxMJ00cktUfgcfyhqXGEpo=; b=nOvYQPfBNr6CSSd3bMB+phMYsF0t/pPJi4pUmME2pikbSCQQmq43LuArvZdERghqG9 UA7PDyTZTSl5S8WC4bNudqjwrZhKdimyfiERO2AdgRLbnWEpJEJg/l3DZRKHJm94zZAe d01nbyqc6NE+BPssW2+BKcvwtI14JIxiHXAIuyyYg7rWgxrB4JuIM0ysVFG0ANNFIhmD FeouKaVg5yBSIr3Ij0tsar8iJXMfAFCDVVYz8pG+BSrAtEOCK4UXFEpYnkO6X178WPBE o1bLlBNWBYkwqvSaUUyqEih5xss1ZnJFHjPQrb7cg+slOGOJW0Asz9o8XrIhI6rAXzQ/ K8HA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1732629686; x=1733234486; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=xmJIkkEIvmi/80J4VnVDxpxMJ00cktUfgcfyhqXGEpo=; b=A7942hauqPCJavPQx4HMFFUdfIbYm+LF9cP05vQqJPs42nyH+rhmYhJsvHoq2zxrza Na3pYDce7G35U8a54QuAdVqKdILNk8Y3b2VOsINRqlWJHY8ib63O5NkXjou8Kg07t65B AZV2JeBcWpD5BJ93JtOaMonDU5oWfYdJq8AA4aKdwNAsD+Tmi5klVvoHDEBbyf3vwGU6 cmSZTGb/KqRWXOm0m0PnfRJVCJcT2XQ/PqlFTmsLLoiIc1gQNJwh026BhFZLn8GqfvUH fXt+/Y8mEO+34FhV3XNivR4uZaz4HoJy+8nEHjx4Qo520oNWSmzcCbyPaHhgUlwuQDNT t9Dw== X-Gm-Message-State: AOJu0YzOSISiBnKaQcbzc5qmpiRaf7/7lYm5Ci1kPTV7rjgs63JuWIN7 zShkDqIcIGRKDm5WtedcprE6qrxY8RxgId3ztWo0V4VflHjo6ZQo4nRLAJNT4orbGgR0MJ9skj+ e X-Gm-Gg: ASbGncsREjHp+8bTHfh649zFcsuTzffQRS7alNDB9FR6RGAaJlzFW3/70I4gUH3gmrb Kyk9Jl8UNmWCaqP4uZ22SwBSO77ZpO3X3c0gwQFHDgtq3rZj4PLzkLbusFj1KMG3x2H0SG5VH7M AIuBBV7nTIJ+0epusuxkyf4oYEVM7HkNj23NNnOSlRtGxMZqD19woldbGUTDUzael4YbKJRf6ZV 1wIgyYWt8nKZNoEsdbIRoUSjQnBFwSzpBwOQHRx0ii9k103M+3pyrvo8gHM0ryHbAvYhDQS X-Google-Smtp-Source: AGHT+IEj1mgAzVefGexJPhmguytu//Kjh1j0/LPXWuRDqFfTXG8JoU9INksPB82Gt/NdyjxjEwPOXw== X-Received: by 2002:a05:600c:35cf:b0:434:a4fe:cd71 with SMTP id 5b1f17b1804b1-434a4fecfd2mr33483975e9.12.1732629684096; Tue, 26 Nov 2024 06:01:24 -0800 (PST) Received: from localhost.localdomain ([176.176.143.205]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434a4d41fb4sm31646165e9.14.2024.11.26.06.01.22 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 26 Nov 2024 06:01:23 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , Aleksandar Rikalo , Richard Henderson , Jiaxun Yang , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH v3 12/16] target/mips: Convert nanoMIPS LSA opcode to decodetree Date: Tue, 26 Nov 2024 14:59:58 +0100 Message-ID: <20241126140003.74871-13-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241126140003.74871-1-philmd@linaro.org> References: <20241126140003.74871-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32b; envelope-from=philmd@linaro.org; helo=mail-wm1-x32b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Philippe Mathieu-Daudé Simply call the generic gen_lsa() helper. Signed-off-by: Philippe Mathieu-Daudé Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20241112172022.88348-7-philmd@linaro.org> --- target/mips/tcg/nanomips32.decode | 6 ++++++ target/mips/tcg/nanomips_translate.c | 7 +++++++ target/mips/tcg/nanomips_translate.c.inc | 4 ---- 3 files changed, 13 insertions(+), 4 deletions(-) diff --git a/target/mips/tcg/nanomips32.decode b/target/mips/tcg/nanomips32.decode index 9cecf1e13d3..96d2299bfb0 100644 --- a/target/mips/tcg/nanomips32.decode +++ b/target/mips/tcg/nanomips32.decode @@ -6,3 +6,9 @@ # # Reference: nanoMIPS32 Instruction Set Technical Reference Manual # (Document Number: MD01247) + +&r rs rt rd sa + +@lsa ...... rt:5 rs:5 rd:5 sa:2 --- ... ... &r + +LSA 001000 ..... ..... ..... .. ... 001 111 @lsa diff --git a/target/mips/tcg/nanomips_translate.c b/target/mips/tcg/nanomips_translate.c index 335a32845ed..3e77fcd23d3 100644 --- a/target/mips/tcg/nanomips_translate.c +++ b/target/mips/tcg/nanomips_translate.c @@ -13,3 +13,10 @@ #include "decode-nanomips16.c.inc" #include "decode-nanomips32.c.inc" #include "decode-nanomips48.c.inc" + +static bool trans_LSA(DisasContext *ctx, arg_r *a) +{ + gen_lsa(ctx, a->rd, a->rt, a->rs, a->sa); + + return true; +} diff --git a/target/mips/tcg/nanomips_translate.c.inc b/target/mips/tcg/nanomips_translate.c.inc index 5d021f01128..0627f01c19e 100644 --- a/target/mips/tcg/nanomips_translate.c.inc +++ b/target/mips/tcg/nanomips_translate.c.inc @@ -399,7 +399,6 @@ enum { /* POOL32A7 instruction pool */ enum { NM_P_LSX = 0x00, - NM_LSA = 0x01, NM_EXTW = 0x03, NM_POOL32AXF = 0x07, }; @@ -3625,9 +3624,6 @@ static int decode_nanomips_32_48_opc(CPUMIPSState *env, DisasContext *ctx) case NM_P_LSX: gen_p_lsx(ctx, rd, rs, rt); break; - case NM_LSA: - gen_lsa(ctx, rd, rt, rs, extract32(ctx->opcode, 9, 2)); - break; case NM_EXTW: gen_ext(ctx, 32, rd, rs, rt, extract32(ctx->opcode, 6, 5)); break; From patchwork Tue Nov 26 13:59:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13886041 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 11872D3B98B for ; Tue, 26 Nov 2024 14:02:14 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tFw8k-0004i9-GC; Tue, 26 Nov 2024 09:02:07 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tFw8H-0004Jz-Nq for qemu-devel@nongnu.org; Tue, 26 Nov 2024 09:01:43 -0500 Received: from mail-wm1-x336.google.com ([2a00:1450:4864:20::336]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tFw8F-0005OT-Ip for qemu-devel@nongnu.org; Tue, 26 Nov 2024 09:01:36 -0500 Received: by mail-wm1-x336.google.com with SMTP id 5b1f17b1804b1-434a8b94fb5so2285565e9.0 for ; Tue, 26 Nov 2024 06:01:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1732629693; x=1733234493; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=EsJ6Yh+YQIX9fCAehh/cKi7Uu1GgsUp/kUVg81Uxhdg=; b=kf8v+yLVGQWlo/z3JPyKpiJu6ZPQ/jlJwKo4a9eYavl44BcOAIxjeBZbG6y8KYTosl iUpvRndZs3C/Ao7tqyDPobSg1DIDsSL+ViIJDKPGz8oY6MC+Evr7aI8kcaFBmFDlplj/ Q3u1WVwzDEH3AJr5SELw1h0uocALIDFKB8AfnDUw/TSpVaAckxnWG5cO+l2ouaIPc4fs zbxgBlKKeyWL1cnzrCagRYbfmbSiXa2oTGL8SBC7FO7KBtKSDl1xOqdUN64ddto52mE6 tN4YzjpHv8AWdF/2EgUGfROqgaA4h/cz5Hg+EkDVEapA6omEuMqZLuafvkVhFB/M/4bs BdLQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1732629693; x=1733234493; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=EsJ6Yh+YQIX9fCAehh/cKi7Uu1GgsUp/kUVg81Uxhdg=; b=W4KNCxqGYKK+GpLJaushuPDZbmyDzG91Aj+7aUiYQIyoeOGcXd4BUV5taKZXZPpz8d 22vZVThS1FayMv9BstrIi5nHt/H0vy5OVsTKK8Xc+7umEJI5u91jr/IdWJHjVPXiVgFO JZgXfIJNPSdCt0oP0riC/INkzQ9oZbITrI5FSUW43srlMGZ16J7d8vuFfbqFQAjBjvCx ZP4He14tMCXNQashpQmJSUgTNvbzAm6AT3dth6YeQhRlCtSmsiRKi0agdQiSqSZ/fyg5 BYpteY1nYxQjsnOQyvMwFigxZluVFn4BhNKnwkN4lM7kCV4OXYL1iexloiTBH6TL6DVG J35Q== X-Gm-Message-State: AOJu0YwWSVLjf80lsJP2Vf421bNQwwGLkg8u6rJUI9CqfEWzWEpKPI4m uZVSJ1tmh+LtlMNWXesVMSmoJrHZPLVoogeJ7NsHudMDT7d1rae3t7n8bz9qEpJPKnm8a1exiGH b X-Gm-Gg: ASbGncsC7BgFxCrsORs7WSXHl5w8g43nd2p54PSz6Z35Ohk8U815ejCaVFStzW28yMB XxyK7+dLUsaUGD923+/Uvhml+kTdJJxX3ES0JQf4ZlvFG7A4LCt/lJYlzR0yCatL9UZCwGW/Cr+ 9ha0knJDZs9LGAI2vMrmVpVSS++fyuWwRoNDNxdlkACuVFO1DM2bwQKtz1bKRDepcndLN7H5ILK wliWxV1qbSgQej/KyvG9eh48xURe4/P6nu84FLU9un4bvpeN7snu0BaW6tMI0VaLMTskFNC X-Google-Smtp-Source: AGHT+IFIwqEJXvc2BnadJkv+2gzjVm44SF+kLfXTwJtmoiMo3ofxQoj6Dgum4UJV7AuPKOJsC59lTQ== X-Received: by 2002:a05:600c:b51:b0:431:416e:2603 with SMTP id 5b1f17b1804b1-434a4e56412mr29545955e9.3.1732629693209; Tue, 26 Nov 2024 06:01:33 -0800 (PST) Received: from localhost.localdomain ([176.176.143.205]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4349f2e1b3bsm78086625e9.25.2024.11.26.06.01.30 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 26 Nov 2024 06:01:31 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , Aleksandar Rikalo , Richard Henderson , Jiaxun Yang Subject: [PATCH v3 13/16] target/mips: Add gen_li() helper Date: Tue, 26 Nov 2024 14:59:59 +0100 Message-ID: <20241126140003.74871-14-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241126140003.74871-1-philmd@linaro.org> References: <20241126140003.74871-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::336; envelope-from=philmd@linaro.org; helo=mail-wm1-x336.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org gen_li() is the trivial 'Load Immediate' instruction. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/mips/tcg/translate.h | 1 + target/mips/tcg/comput_translate.c | 21 +++++++++++++++++++++ target/mips/tcg/meson.build | 1 + 3 files changed, 23 insertions(+) create mode 100644 target/mips/tcg/comput_translate.c diff --git a/target/mips/tcg/translate.h b/target/mips/tcg/translate.h index 7fe34a1d891..222fa9e1e8b 100644 --- a/target/mips/tcg/translate.h +++ b/target/mips/tcg/translate.h @@ -168,6 +168,7 @@ void gen_store_fpr32(DisasContext *ctx, TCGv_i32 t, int reg); void gen_store_fpr64(DisasContext *ctx, TCGv_i64 t, int reg); int get_fp_bit(int cc); +void gen_li(DisasContext *ctx, int rd, int imm); void gen_lx(DisasContext *ctx, int rd, int base, int index, MemOp mop); void gen_ldxs(DisasContext *ctx, int base, int index, int rd); void gen_align(DisasContext *ctx, int wordsz, int rd, int rs, int rt, int bp); diff --git a/target/mips/tcg/comput_translate.c b/target/mips/tcg/comput_translate.c new file mode 100644 index 00000000000..3414cc079af --- /dev/null +++ b/target/mips/tcg/comput_translate.c @@ -0,0 +1,21 @@ +/* + * MIPS emulation for QEMU - computational translation routines + * + * Copyright (c) 2021 Philippe Mathieu-Daudé + * + * SPDX-License-Identifier: LGPL-2.1-or-later + */ + +#include "qemu/osdep.h" +#include "translate.h" + +/* logical instructions */ + +void gen_li(DisasContext *ctx, int rd, int imm) +{ + if (rd == 0) { + /* Treat as NOP. */ + return; + } + tcg_gen_movi_tl(cpu_gpr[rd], imm); +} diff --git a/target/mips/tcg/meson.build b/target/mips/tcg/meson.build index f674819e6a8..a46c13f3e75 100644 --- a/target/mips/tcg/meson.build +++ b/target/mips/tcg/meson.build @@ -18,6 +18,7 @@ gen = [ mips_ss.add(gen) mips_ss.add(files( + 'comput_translate.c', 'dsp_helper.c', 'exception.c', 'fpu_helper.c', From patchwork Tue Nov 26 14:00:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13886049 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 869B0D3B98F for ; Tue, 26 Nov 2024 14:04:18 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tFw92-00056f-Kp; Tue, 26 Nov 2024 09:02:25 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tFw8P-0004LS-QR for qemu-devel@nongnu.org; Tue, 26 Nov 2024 09:01:49 -0500 Received: from mail-wr1-x433.google.com ([2a00:1450:4864:20::433]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tFw8O-0005PV-5i for qemu-devel@nongnu.org; Tue, 26 Nov 2024 09:01:45 -0500 Received: by mail-wr1-x433.google.com with SMTP id ffacd0b85a97d-382376fcc4fso3349469f8f.2 for ; Tue, 26 Nov 2024 06:01:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1732629702; x=1733234502; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=JJyAj6665biaVaFql3kvNaD085ICHYFrXjshxoAYeg8=; b=SXF5GR2pcnVfuhxiil4c0ArauzpsYCRtkUxR281zx9269pym+2KxMQVJuUibGqQwOL lofLvHy0rD5zdIiBTJ2dJISg6lHlJtHrxvfWQyQyPIHAEOv653d+Ah2kpXDGt0bU5w8I ghYbau5wJSgeU/mBqnKl0t6/U/QomC9jah8B6yIKP0oREuCmhGIeFkpsfhIiUY5NkB4X phDLdJpUdlSJV3GVN6yw1PVSV0iQZdAT2QaBxQtT1Hm4+qrULswMNT9jD+hJsuBhf+hQ 7B2nU650cVGZN5jX9evaDSofA1VlR+MMJ4xj467/xdWVf/xzcnJBJSAg2ufTyChZDNXX j6hg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1732629702; x=1733234502; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=JJyAj6665biaVaFql3kvNaD085ICHYFrXjshxoAYeg8=; b=X1YeZufouUAb4P5SjDyn59LYJifktECsnb2hbNewDENT2Bxo75fsgy56UhWHqjNJZr XgzjpYgi3y1YwjBQelbQn41Yq5BoDWTbC/MhwvOv6NBFU/+reYiJNLpjj3jg2E+rE2Vj kOQUOcBJr48abtO/WpXiQHYd9wTZrk9Br7pA9unFrtxw2DEGTD5sbiVd5nGjK0niJLfF GPBsl3JoEGfF884GeP/ZUFCnhqp7a95VMO50J3je/GseVYa6Juy97fTl28FvsMPLLCb/ HLcFeIktxc/Xajl4Qoa5NF4banNbYiduJ+IndUeJfp2blO4Ikjq0fp86olK9JEhvKN+4 rlrg== X-Gm-Message-State: AOJu0Ywvy+TfBg4OHxpDQFr7NoRJG3m9iNb1K0bo5//NBTKoipDs02iL 2aumBlMX+bztTmP+fHx0n2aisPXgO4dDmPLRzzwEMeOkcVvPFJCKNhBz2QCVpnzhtKeWNPzQs9X q X-Gm-Gg: ASbGncsft8ehc44/t6JTAfvWcjm6z+e9Ge2t3bVxSJj0SujuU5ptGGk5z/5RV03Jcw+ 5RFldTWrUmjauV1BO/GESuA7Y+xnXAkR8TGX2K8GwcukrbD9oJCPacvTlgpqLVGiXwXZ88qMsqB JLJ3ulwLiHyXPsDYebAlKc8WGB7gLZEZCa35+eCHBPXTrzt7NxvrXFO8yRerSuamdIx3Urw4BXx 52lSu5gq9592opDAh6Diq9/lV/Q0LGiRmZ8CjZJ1Qy1kiPKtdwx05LtS//SWgjwGkvyK0h6 X-Google-Smtp-Source: AGHT+IG9gTXzrDLmB8y5DM4XWydRv7uACSUAzvJv3tDQC+y6SB3PsrepnWJIPB4mQt2Jqbjq/6dFdg== X-Received: by 2002:a5d:64ec:0:b0:382:5129:9f2a with SMTP id ffacd0b85a97d-38260b4d621mr13805896f8f.2.1732629699807; Tue, 26 Nov 2024 06:01:39 -0800 (PST) Received: from localhost.localdomain ([176.176.143.205]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3825fbc3a3asm13310362f8f.66.2024.11.26.06.01.38 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 26 Nov 2024 06:01:39 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , Aleksandar Rikalo , Richard Henderson , Jiaxun Yang Subject: [PATCH v3 14/16] target/mips: Convert microMIPS LI opcode to decodetree Date: Tue, 26 Nov 2024 15:00:00 +0100 Message-ID: <20241126140003.74871-15-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241126140003.74871-1-philmd@linaro.org> References: <20241126140003.74871-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::433; envelope-from=philmd@linaro.org; helo=mail-wr1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Once the xlat() and simm7() helpers are added, the decoding is trivial. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/mips/tcg/micromips16.decode | 9 +++++++++ target/mips/tcg/micromips_translate.c | 19 +++++++++++++++++++ target/mips/tcg/micromips_translate.c.inc | 12 +----------- 3 files changed, 29 insertions(+), 11 deletions(-) diff --git a/target/mips/tcg/micromips16.decode b/target/mips/tcg/micromips16.decode index d341da16b04..fdc3b131c9c 100644 --- a/target/mips/tcg/micromips16.decode +++ b/target/mips/tcg/micromips16.decode @@ -9,3 +9,12 @@ # (Document Number: MD00582) # microMIPS64 Instruction Set # (Document Number: MD00594) + +&rd_imm rd imm + +%xlat_rd 7:3 !function=xlat +%simm7 0:7 !function=simm7 + +@rd_imm7 ...... ... ....... &rd_imm rd=%xlat_rd imm=%simm7 + +LI 111011 ... ....... @rd_imm7 # LI16 diff --git a/target/mips/tcg/micromips_translate.c b/target/mips/tcg/micromips_translate.c index f0b5dbf655d..198eb466057 100644 --- a/target/mips/tcg/micromips_translate.c +++ b/target/mips/tcg/micromips_translate.c @@ -9,11 +9,23 @@ #include "qemu/osdep.h" #include "translate.h" +static int xlat(DisasContext *ctx, int x) +{ + static const int map[] = { 16, 17, 2, 3, 4, 5, 6, 7 }; + + return map[x]; +} + static inline int plus_1(DisasContext *ctx, int x) { return x + 1; } +static inline int simm7(DisasContext *ctx, int x) +{ + return x == 0x7f ? -1 : x; +} + /* Include the auto-generated decoders. */ #include "decode-micromips16.c.inc" #include "decode-micromips32.c.inc" @@ -22,3 +34,10 @@ static bool trans_LSA(DisasContext *ctx, arg_r *a) { return gen_lsa(ctx, a->rd, a->rt, a->rs, a->sa); } + +static bool trans_LI(DisasContext *ctx, arg_rd_imm *a) +{ + gen_li(ctx, a->rd, a->imm); + + return true; +} diff --git a/target/mips/tcg/micromips_translate.c.inc b/target/mips/tcg/micromips_translate.c.inc index 73394554509..cb98d6af7e4 100644 --- a/target/mips/tcg/micromips_translate.c.inc +++ b/target/mips/tcg/micromips_translate.c.inc @@ -113,7 +113,6 @@ enum { BLTZALC = 0x38, BLTUC = 0x38, SW16 = 0x3a, - LI16 = 0x3b, JALX32 = 0x3c, JAL32 = 0x3d, BLEZC = 0x3d, @@ -3004,7 +3003,7 @@ static int decode_isa_micromips(CPUMIPSState *env, DisasContext *ctx) case 2: /* LBU16, LHU16, LWSP16, LW16, SB16, SH16, SWSP16, SW16 */ case 3: - /* MOVE16, ANDI16, POOL16D, POOL16E, BEQZ16, BNEZ16, B16, LI16 */ + /* MOVE16, ANDI16, POOL16D, POOL16E, BEQZ16, BNEZ16, B16 */ if (ctx->hflags & MIPS_HFLAG_BDS32) { gen_reserved_instruction(ctx); return 2; @@ -3214,15 +3213,6 @@ static int decode_isa_micromips(CPUMIPSState *env, DisasContext *ctx) (ctx->insn_flags & ISA_MIPS_R6) ? 0 : 4); break; - case LI16: - { - int reg = mmreg(uMIPS_RD(ctx->opcode)); - int imm = ZIMM(ctx->opcode, 0, 7); - - imm = (imm == 0x7f ? -1 : imm); - tcg_gen_movi_tl(cpu_gpr[reg], imm); - } - break; case RES_29: case RES_31: case RES_39: From patchwork Tue Nov 26 14:00:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13886045 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DAC4DD3B98F for ; Tue, 26 Nov 2024 14:03:00 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tFw96-0005QV-QZ; Tue, 26 Nov 2024 09:02:29 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tFw8Z-0004P7-HS for qemu-devel@nongnu.org; Tue, 26 Nov 2024 09:01:57 -0500 Received: from mail-wr1-x434.google.com ([2a00:1450:4864:20::434]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tFw8X-0005S7-7W for qemu-devel@nongnu.org; Tue, 26 Nov 2024 09:01:55 -0500 Received: by mail-wr1-x434.google.com with SMTP id ffacd0b85a97d-3824446d2bcso5019777f8f.2 for ; Tue, 26 Nov 2024 06:01:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1732629711; x=1733234511; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=3fOe9GoFLYt+HQ4wA9ZmjXBnKqHxlAaym1zhWSkKtJ8=; b=YWIILNZgbCqifq/W4ZXc2h0oWDrvOHOAAaOOLd92wgVmRTCoSUp/Mx2vQpJOieURfC /k8WF0hm91+I9dcKGDni0ekJxgFPXXOUMx5fa5yNPk80/viUmv5jPmHJh+nHQiIW+ep1 WHE+MHcoLjtGc9Lfp/n/N/syu5SAGHJ26b6GscVEelYdfLvU1Wn0DvwHJmA788gqvnfn rzv9SLKnf8Y4fYlMMvZXJIbsG4uhg9j9DOgbxGZQeuqERxW1C9XKK0M1Zbzp/g2NNd5P ChmF2Vg4cluk8vg7ls4m59kJqofoARpQALLOc9VLEGDvc5inINaIoTBcuwf1zgf3qiUx fuMw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1732629711; x=1733234511; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=3fOe9GoFLYt+HQ4wA9ZmjXBnKqHxlAaym1zhWSkKtJ8=; b=nCEkrm8u+BKNm10cuRRS+5V4m5RR3jbkGDZePc1rdIrgbE9LckVt5akyA5fX+dwAAp lp4BCMLycd5XK/yrtmUwsNsZpk1rhMsNxGSeho0NAIWgO3ljPBqB1ZBNywXF5dT4crMd lTx9cg6Uq73dgGJ4L0Mx4UEWAQ62GLHrdsDArbH+/hAe7yV5apcManlb42aYOW6A/JSZ wj1pLscCrR2nLyrXsMZCNHdGlLrwh8ei2ZF3eysshiukckX7D54aVGSx5zzp3CMZcJW3 qG7bOQET/Eq/3+xEH7JVP+PG33FOL5MTkXeK5L/RsyhZQi9rMPEJ0MKWMJiZySe11CcW GyoA== X-Gm-Message-State: AOJu0YyxPvKKmW3VO54CADrPASVyga8qLOHz6etOP28uC8tc14qbEtPn P0SLFQFrgskPPkHOYc2NFWoyO7BiN0S92L2zI824L6RmblK529wJxGy4JryQHLEyDSXI92tAEnL i X-Gm-Gg: ASbGnct19TcyxvQM3pekdq31EtMhK/Tyd0opZOPXbQxtcNCIHqVn+M+49wFfUfvnRJs z1gJKkZqfq/wDEiEuWfB1OfDN0Vgmcjb0NZWHo/2Q3D5D8WJBoqADnbcdNDJEfwNATo9/5OVfco uKN/J4yd64RE2GvKyTXpq5Y0URZYxjIDm2STxF0z1Eiz7jXJFr3X/1wNoae4XB7UwEuzroPU2j2 laPZH+LgH8csw99vDgnrnKM4t5uszcUA34YAhbXbU9Lq9G6TwhB+TLS4znINKcZybdyItCi X-Google-Smtp-Source: AGHT+IFmxZqo1TagrKfzLiCQauCNGTlVVBBvGSi7Nstc+sWljnw+LpWDb+OtkrqitwvQzWIGzlME8w== X-Received: by 2002:a05:6000:184d:b0:382:465f:336d with SMTP id ffacd0b85a97d-38260b3cabbmr19463595f8f.1.1732629708695; Tue, 26 Nov 2024 06:01:48 -0800 (PST) Received: from localhost.localdomain ([176.176.143.205]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3825fbedfccsm13310438f8f.101.2024.11.26.06.01.45 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 26 Nov 2024 06:01:46 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , Aleksandar Rikalo , Richard Henderson , Jiaxun Yang Subject: [PATCH v3 15/16] target/mips: Convert MIPS16e LI opcodes to decodetree Date: Tue, 26 Nov 2024 15:00:01 +0100 Message-ID: <20241126140003.74871-16-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241126140003.74871-1-philmd@linaro.org> References: <20241126140003.74871-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::434; envelope-from=philmd@linaro.org; helo=mail-wr1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Decode the destination register using the xlat() helper. Signed-off-by: Philippe Mathieu-Daudé --- target/mips/tcg/mips16e_16.decode | 8 ++++++++ target/mips/tcg/mips16e_32.decode | 9 +++++++++ target/mips/tcg/mips16e_translate.c | 14 ++++++++++++++ target/mips/tcg/mips16e_translate.c.inc | 11 ----------- 4 files changed, 31 insertions(+), 11 deletions(-) diff --git a/target/mips/tcg/mips16e_16.decode b/target/mips/tcg/mips16e_16.decode index 82586493f68..bae7bfbb522 100644 --- a/target/mips/tcg/mips16e_16.decode +++ b/target/mips/tcg/mips16e_16.decode @@ -7,3 +7,11 @@ # Reference: MIPS Architecture for Programmers, Volume IV-a # The MIPS16e Application Specific Extension # (Document Number: MD00076) + +&rd_imm rd imm + +%xlat_rx8 8:3 !function=xlat + +@ri ..... ... imm:8 &rd_imm rd=%xlat_rx8 + +LI 01101 ... ........ @ri diff --git a/target/mips/tcg/mips16e_32.decode b/target/mips/tcg/mips16e_32.decode index fc429049e18..248ee95706d 100644 --- a/target/mips/tcg/mips16e_32.decode +++ b/target/mips/tcg/mips16e_32.decode @@ -7,3 +7,12 @@ # Reference: MIPS Architecture for Programmers, Volume IV-a # The MIPS16e Application Specific Extension # (Document Number: MD00076) + +&rd_imm rd imm !extern + +%immx 0:5 21:6 16:5 +%xlat_rx8 8:3 !function=xlat + +@ri ..... ...... ..... ..... ... ... ..... &rd_imm rd=%xlat_rx8 imm=%immx + +LI 11110 ...... ..... 01101 ... 000 ..... @ri diff --git a/target/mips/tcg/mips16e_translate.c b/target/mips/tcg/mips16e_translate.c index 6de9928b37e..a66f49fe8ed 100644 --- a/target/mips/tcg/mips16e_translate.c +++ b/target/mips/tcg/mips16e_translate.c @@ -9,6 +9,20 @@ #include "qemu/osdep.h" #include "translate.h" +static inline int xlat(DisasContext *ctx, int x) +{ + static const int map[8] = { 16, 17, 2, 3, 4, 5, 6, 7 }; + + return map[x]; +} + /* Include the auto-generated decoders. */ #include "decode-mips16e_16.c.inc" #include "decode-mips16e_32.c.inc" + +static bool trans_LI(DisasContext *ctx, arg_rd_imm *a) +{ + gen_li(ctx, a->rd, a->imm); + + return true; +} diff --git a/target/mips/tcg/mips16e_translate.c.inc b/target/mips/tcg/mips16e_translate.c.inc index a57ae4e95b1..f3f09b164ae 100644 --- a/target/mips/tcg/mips16e_translate.c.inc +++ b/target/mips/tcg/mips16e_translate.c.inc @@ -24,7 +24,6 @@ enum { M16_OPC_SLTI = 0x0a, M16_OPC_SLTIU = 0x0b, M16_OPC_I8 = 0x0c, - M16_OPC_LI = 0x0d, M16_OPC_CMPI = 0x0e, M16_OPC_SD = 0x0f, M16_OPC_LB = 0x10, @@ -582,9 +581,6 @@ static int decode_extended_mips16_opc(CPUMIPSState *env, DisasContext *ctx) break; } break; - case M16_OPC_LI: - tcg_gen_movi_tl(cpu_gpr[rx], (uint16_t) imm); - break; case M16_OPC_CMPI: tcg_gen_xori_tl(cpu_gpr[24], cpu_gpr[rx], (uint16_t) imm); break; @@ -839,13 +835,6 @@ static int decode_ase_mips16e(CPUMIPSState *env, DisasContext *ctx) } } break; - case M16_OPC_LI: - { - int16_t imm = (uint8_t) ctx->opcode; - - gen_arith_imm(ctx, OPC_ADDIU, rx, 0, imm); - } - break; case M16_OPC_CMPI: { int16_t imm = (uint8_t) ctx->opcode; From patchwork Tue Nov 26 14:00:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13886046 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 31BB7D3B98F for ; Tue, 26 Nov 2024 14:03:55 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tFw92-00056t-KH; Tue, 26 Nov 2024 09:02:25 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tFw8f-0004VW-EG for qemu-devel@nongnu.org; Tue, 26 Nov 2024 09:02:02 -0500 Received: from mail-wm1-x32f.google.com ([2a00:1450:4864:20::32f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tFw8d-0005Sv-HZ for qemu-devel@nongnu.org; Tue, 26 Nov 2024 09:02:01 -0500 Received: by mail-wm1-x32f.google.com with SMTP id 5b1f17b1804b1-4314c4cb752so51592115e9.2 for ; Tue, 26 Nov 2024 06:01:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1732629718; x=1733234518; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=wZmg9SSUqn3wbgNzVxeGD6yfR8lfnz4sEk/idUsaPpE=; b=a9DGS45LqeFnIcFVThE/qF54yt9pEPfBg+96JgtTtup5TzwRLNjPxGn0T5lqs692R3 xweDaCdy8UFwy/QTxRpx25Lv6Xm/9OH2eiptKyUPsdSpiUrbihw1yDBvFvw8CcYZPgvN /9JhbF1+h2RK+fg7u9wt164WnaqOWcTW4+8czj/uIA332V/qIdge7JKo6LyLqkEdBK3o 9pdEAQobKYQBjBot7tpToefM9H+8xMYp2r9eriLBxtpLJvMCQAMoBJvoKjHbV4xbPIsR BLZXRntofDWnDiK2BSJeCJ0o3Q+a5R93ixCm5sQQgd9oBc4eYGg/LNWfWBI6bFn9Kov4 xdLg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1732629718; x=1733234518; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=wZmg9SSUqn3wbgNzVxeGD6yfR8lfnz4sEk/idUsaPpE=; b=DlH8pOFKwfC3QhXKoUDk6zZQ0JX4PTJWZhyFeohUQW8TZFo6UVB9AAQnwqMXi3iCPD OkAnMYtY/8sHREAHEiEEdsPC/1i1H6z7BgAsNLR0sK6REk88KBTdKu8JVKFLw2MQX7y7 kr4RuyBTlNmvL0HBrJRgIt6OnJP6FrFGviR/gp6DWDBDqciagaY4rKHaE754tvizLZM6 uDG1KLuFzQudbeJljjr+rClElDwrf7IcCYpANP58GUjJlAwfKQdoqpFwyJlNV+zJ+GAl e9RA8d0kj1tY/feIU3No2AveVtWJehaSrP5uLbvBg7XaBGp3w4Fu3Km81oH5+WFr8mJi 8qXw== X-Gm-Message-State: AOJu0YwgWwzSqjdKfJM4xsZyjXAcoOfU63C1qgTyUaQ2w/rmRwvopNYM HtgsFfWw3zOq4DQw9kt/bcrGTgUxHM+18k7okUTtE6BhRGpKZFbczLujlmeelCwPsV21YkWRr3o a X-Gm-Gg: ASbGnctXFyIDzwxrEm4QY/ugQOU7grKfLXQ8hR7JbBB+9K4SCgdzxjtk50/JZoSgL7V VlBTMSWTxa1icEpJmSaM/KUXxllgIzLcCtS0JRKx4yhOokIGDfssHznfGjneqGnah+5pVtAkIp0 lR+AuTWOcmHiDMWIqrueQI/GZpOEXpfk4QF5ELDw+lf98fatgZmuW0FqfD27IcT3RX557ZqyAGF 2NoCubBkKhImE1mV9xxDwGvjhcyeQ3Bbgjr5P7+Yg6fH5xsvHGCWXVk4Xug1bH4VRL7/N9I X-Google-Smtp-Source: AGHT+IFt7klQSqx4waeWCLInBxUQrAZ6ibuWpq8od+WhP7tPY0O/ted7r6zeXcresii6h7RjbdTJ5A== X-Received: by 2002:a05:600c:5643:b0:430:5887:c238 with SMTP id 5b1f17b1804b1-434872f5942mr136434485e9.11.1732629716784; Tue, 26 Nov 2024 06:01:56 -0800 (PST) Received: from localhost.localdomain ([176.176.143.205]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-433b01e1046sm234743975e9.4.2024.11.26.06.01.55 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 26 Nov 2024 06:01:55 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , Aleksandar Rikalo , Richard Henderson , Jiaxun Yang Subject: [PATCH v3 16/16] target/mips: Convert nanoMIPS LI opcodes to decodetree Date: Tue, 26 Nov 2024 15:00:02 +0100 Message-ID: <20241126140003.74871-17-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241126140003.74871-1-philmd@linaro.org> References: <20241126140003.74871-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=philmd@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé --- target/mips/tcg/nanomips16.decode | 8 ++++++++ target/mips/tcg/nanomips48.decode | 8 ++++++++ target/mips/tcg/nanomips_translate.c | 21 +++++++++++++++++++++ target/mips/tcg/nanomips_translate.c.inc | 17 ----------------- 4 files changed, 37 insertions(+), 17 deletions(-) diff --git a/target/mips/tcg/nanomips16.decode b/target/mips/tcg/nanomips16.decode index 81fdc68e98b..12815161d9c 100644 --- a/target/mips/tcg/nanomips16.decode +++ b/target/mips/tcg/nanomips16.decode @@ -6,3 +6,11 @@ # # Reference: nanoMIPS32 Instruction Set Technical Reference Manual # (Document Number: MD01247) + +&rd_imm rd imm not_in_nms + +%s_eu 0:s7 !function=s_eu + +@rt3_s ...... rd:3 ....... &rd_imm imm=%s_eu + +LI 110100 ... ....... @rt3_s not_in_nms=0 # LI[16] diff --git a/target/mips/tcg/nanomips48.decode b/target/mips/tcg/nanomips48.decode index 696cc15607a..778bff4ec06 100644 --- a/target/mips/tcg/nanomips48.decode +++ b/target/mips/tcg/nanomips48.decode @@ -6,3 +6,11 @@ # # Reference: nanoMIPS32 Instruction Set Technical Reference Manual # (Document Number: MD01247) + +&rd_imm rd imm not_in_nms !extern + +%imm 16:16 0:s16 + +@rd_imm ...... rd:5 ..... ................ ................ &rd_imm imm=%imm + +LI 011000 ..... 00000 ................ ................ @rd_imm not_in_nms=1 diff --git a/target/mips/tcg/nanomips_translate.c b/target/mips/tcg/nanomips_translate.c index 3e77fcd23d3..aee0606e4d4 100644 --- a/target/mips/tcg/nanomips_translate.c +++ b/target/mips/tcg/nanomips_translate.c @@ -9,14 +9,35 @@ #include "qemu/osdep.h" #include "translate.h" +static inline int s_eu(DisasContext *ctx, int x) +{ + return x == 0x7f ? -1 : x; +} + /* Include the auto-generated decoders. */ #include "decode-nanomips16.c.inc" #include "decode-nanomips32.c.inc" #include "decode-nanomips48.c.inc" +static inline void check_nms(DisasContext *ctx, bool not_in_nms) +{ + if (not_in_nms && unlikely(ctx->CP0_Config5 & (1 << CP0C5_NMS))) { + gen_reserved_instruction(ctx); + } +} + static bool trans_LSA(DisasContext *ctx, arg_r *a) { gen_lsa(ctx, a->rd, a->rt, a->rs, a->sa); return true; } + +static bool trans_LI(DisasContext *ctx, arg_rd_imm *a) +{ + check_nms(ctx, a->not_in_nms); + + gen_li(ctx, a->rd, a->imm); + + return true; +} diff --git a/target/mips/tcg/nanomips_translate.c.inc b/target/mips/tcg/nanomips_translate.c.inc index 0627f01c19e..e3d81d9e15b 100644 --- a/target/mips/tcg/nanomips_translate.c.inc +++ b/target/mips/tcg/nanomips_translate.c.inc @@ -57,7 +57,6 @@ enum { NM_POOL32S = 0x30, NM_P_BRI = 0x32, - NM_LI16 = 0x34, NM_SWGP16 = 0x35, NM_P16_BR = 0x36, @@ -86,7 +85,6 @@ enum { /* P48I instruction pool */ enum { - NM_LI48 = 0x00, NM_ADDIU48 = 0x01, NM_ADDIUGP48 = 0x02, NM_ADDIUPC48 = 0x03, @@ -3664,12 +3662,6 @@ static int decode_nanomips_32_48_opc(CPUMIPSState *env, DisasContext *ctx) insn = translator_lduw(env, &ctx->base, ctx->base.pc_next + 4); target_long addr_off = extract32(ctx->opcode, 0, 16) | insn << 16; switch (extract32(ctx->opcode, 16, 5)) { - case NM_LI48: - check_nms(ctx); - if (rt != 0) { - tcg_gen_movi_tl(cpu_gpr[rt], addr_off); - } - break; case NM_ADDIU48: check_nms(ctx); if (rt != 0) { @@ -4620,15 +4612,6 @@ static int decode_isa_nanomips(CPUMIPSState *env, DisasContext *ctx) break; } break; - case NM_LI16: - { - imm = extract32(ctx->opcode, 0, 7); - imm = (imm == 0x7f ? -1 : imm); - if (rt != 0) { - tcg_gen_movi_tl(cpu_gpr[rt], imm); - } - } - break; case NM_ANDI16: { uint32_t u = extract32(ctx->opcode, 0, 4);