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Mon, 02 Dec 2024 23:19:12 -0800 (PST) From: Zhiyuan Wan To: andrew@lunn.ch Cc: hkallweit1@gmail.com, linux@armlinux.org.uk, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, willy.liu@realtek.com, Zhiyuan Wan , Yuki Lee Subject: [PATCH net-next 1/2] net: phy: realtek: disable broadcast address feature of rtl8211f Date: Tue, 3 Dec 2024 15:18:53 +0800 Message-Id: <20241203071853.2067014-1-kmlinuxm@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <7a322deb-e20e-4b32-9fef-d4a48bf0c128@gmail.com> References: <7a322deb-e20e-4b32-9fef-d4a48bf0c128@gmail.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org This feature is enabled defaultly after a reset of this transceiver. When this feature is enabled, the phy not only responds to the configuration PHY address by pin states on board, but also responds to address 0, the optional broadcast address of the MDIO bus. But some MDIO device like mt7530 switch chip (integrated in mt7621 SoC), also use address 0 to configure a specific port, when use mt7530 and rtl8211f together, it usually causes address conflict, leads to the port of RTL8211FS stops working. This patch disables broadcast address feature of rtl8211f, and returns -ENODEV if using broadcast address (0) as phy address. Reviewed-by: Yuki Lee Signed-off-by: Zhiyuan Wan --- drivers/net/phy/realtek.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c index f65d7f1f3..8a38b02ad 100644 --- a/drivers/net/phy/realtek.c +++ b/drivers/net/phy/realtek.c @@ -31,6 +31,7 @@ #define RTL8211F_PHYCR1 0x18 #define RTL8211F_PHYCR2 0x19 #define RTL8211F_INSR 0x1d +#define RTL8211F_PHYAD0_EN BIT(13) #define RTL8211F_LEDCR 0x10 #define RTL8211F_LEDCR_MODE BIT(15) @@ -139,6 +140,17 @@ static int rtl821x_probe(struct phy_device *phydev) return dev_err_probe(dev, PTR_ERR(priv->clk), "failed to get phy clock\n"); + dev_dbg(dev, "disabling MDIO address 0 for this phy"); + ret = phy_modify_paged_changed(phydev, 0xa43, RTL8211F_PHYCR1, + RTL8211F_PHYAD0_EN, 0); + if (ret < 0) { + dev_err(dev, "disabling MDIO address 0 failed: %pe\n", + ERR_PTR(ret)); + } + /* Don't allow using broadcast address as PHY address */ + if (phydev->mdio.addr == 0) + return -ENODEV; + ret = phy_read_paged(phydev, 0xa43, RTL8211F_PHYCR1); if (ret < 0) return ret;