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Tue, 3 Dec 2024 04:31:00 -0500 (EST) From: Celeste Liu Date: Tue, 03 Dec 2024 17:30:04 +0800 Subject: [PATCH v2 1/2] riscv/ptrace: add new regset to access original a0 register MIME-Version: 1.0 Message-Id: <20241203-riscv-new-regset-v2-1-d37da8c0cba6@coelacanthus.name> References: <20241203-riscv-new-regset-v2-0-d37da8c0cba6@coelacanthus.name> In-Reply-To: <20241203-riscv-new-regset-v2-0-d37da8c0cba6@coelacanthus.name> To: Oleg Nesterov , Paul Walmsley , Palmer Dabbelt , Albert Ou , Eric Biederman , Kees Cook , Shuah Khan Cc: Alexandre Ghiti , "Dmitry V. Levin" , Andrea Bolognani , =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= , Thomas Gleixner , Ron Economos , Charlie Jenkins , Quan Zhou , Felix Yan , Ruizhe Pan , Shiqi Zhang , Guo Ren , Yao Zi , Han Gao , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mm@kvack.org, stable@vger.kernel.org, linux-kselftest@vger.kernel.org, Celeste Liu X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=3101; i=uwu@coelacanthus.name; h=from:subject:message-id; bh=iHUx8lM5PnkP98ImrmiiCww6XfAXRjB9rUvZRyb0f/s=; b=owJ4nJvAy8zAJeafov85RWVtBeNptSSGdL/zxx+VZ1W++qB1xHHrzGuKjCUyRVsbOk4XJ6j3t P8637ea93lHKQuDGBeDrJgiS14Jy0/OS2e793Zs74KZw8oEMoSBi1MAJpIlxvBXIir8ozx/i+Hu n96HPuu7y38t+lPppzX/Sd3a/dZl165MZvhflsT2YfmBIot11vqGDz/vTrwuKxEnvE7p/x3Gimm Lku35ARL3TDc= X-Developer-Key: i=uwu@coelacanthus.name; a=openpgp; fpr=892EBC7DC392DFF9C9C03F1D15F4180E73787863 X-Rspamd-Queue-Id: 7AD1D80016 X-Stat-Signature: ymo1yy8bcwze9dndc6jxgi4da6bf5psc X-Rspam-User: X-Rspamd-Server: rspam09 X-HE-Tag: 1733218239-300661 X-HE-Meta: U2FsdGVkX1/NjUlLktNd0dj1LRFqUxjEKmiEpVVwcjuDqNZLX712YkTggjM9HRDmBj+INcR+gcqGhwp9X/KqDPdaZQQL2Yb0/90jsVZg/Eyrm5+n3S3gQANZ6OWxJkem0OnK5MJpPoaUj79UdFg27s4+CxbS1JGsHOKskGN+OVpD++3FtO5T9xEst2YYR+TI5faskXKhxJQPxx7IA0Sy8jQVVGwvtX6WRxyxMQyYpG2ipVCwcbasbaB/nNIMcIoEdLqX9yYFVYKLoh5SmGko9Fse6rpRv/9TttFGxB0i5b/C5Jof3lOQT/ELSxJqBi/sOYWqHRRca1Bj/azKvnJTkCHeyGlxwfrBepGNaMvdN7aFp0GCgmUoi841wA34/AzmF2AHulE9OSMRL6ADC6pOMTFNqoZy4KAbwXujBAwty3RYtwgK/7qs8ILP7KvDd0h94qEnXFnEH5heNygguvOrnEI+sYPuyVpa2Qf94Cr70SQGOYizd/pibqV0VoSnN0DutOj+qe9iVT7OHvHEFPGoOPQG0gfF5lpbtKWxEniQ3l+Ce324bZpngUlAfiHylAliPkWLQMxxbRJvHCPafmUUDGmg/4YKIfQdZnriMS2EXi2tC/H67YKZEp39QqapzeGd5OU/bB9XogcgUIV2S11FDqwzyhGIyxxSnBsLctyjKOUQ0AkMFGtH18USD5wbhkd3LP/TyKkOZklAEhQCz9OVKhY71aG7tt6fuNSqLZCL3xtyqBK8ckQWiQ5fgyJtZKbhA61FbOFz24JQxtuluB5/Ka2VEO6nMB/W7Tt4udmvivtmwI3PMerIpljyQAyR6IA+YsH3pb6aNEDhl1H2E80r8EcbS74GqRdhDJNep7BQVmCzB6777vD3VsuKVnb/4uk3RH2Tt65pOaeT6sl+HxrRh9c5PkX/kbpFucBFNqtEyztcncnhVtG9vr7diX/ThEG2GqMIK9u6VuuM42Xp67R GNVRrb6D JDp9hs8JzyohV17Xa0wemGM32Ps5OO6XcVw4HgTNV9Aq/mZvcYNevJmGBhYpVNWtayzcf/jVwl3raHO/pyLrnZJWF9N+EmyBVpv66pEAHPHhxiuScVQmDFkbYOHe7qufpng3t1MxFnHXoE1C4knIvv5YK5oLRm20eUf4M+0lsY7eOmfYlMY0/ud9kT73oaESRKW6PPa44ndKLVAXbqnACoF9Ou7/1BWhxPuDkf55g52/4Z2/jQQBxka8vYhwwrHTsV2vU0quGWVMFfRxdA8Hk6k5QFpL6NXisfbbaNprnLh8Cj+B6hmv2eLPCyUTO7iBxpajQsj82C2YWTQne9ozUXyM29FXLNSPviuTJL4EmVqgFYCgxFktmqHnqRUB6VoIK35T0Nvdw+MbB3sw3BhGDeuHPISM4H6NnqUANxzDKgDSXh0c30fYWsCHOC2aUVHiEYJY34AokjIBb/9yQG7zK7eKPFnc1CBMavrisKU/9XdaXkUJbWU+yvLbqYyE7dy5EhE2CBdMQgzd3fjs= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: The orig_a0 is missing in struct user_regs_struct of riscv, and there is no way to add it without breaking UAPI. (See Link tag below) Like NT_ARM_SYSTEM_CALL do, we add a new regset name NT_RISCV_ORIG_A0 to access original a0 register from userspace via ptrace API. Link: https://lore.kernel.org/all/59505464-c84a-403d-972f-d4b2055eeaac@gmail.com/ Cc: stable@vger.kernel.org Signed-off-by: Celeste Liu Reviewed-by: Björn Töpel --- arch/riscv/kernel/ptrace.c | 32 ++++++++++++++++++++++++++++++++ include/uapi/linux/elf.h | 1 + 2 files changed, 33 insertions(+) diff --git a/arch/riscv/kernel/ptrace.c b/arch/riscv/kernel/ptrace.c index ea67e9fb7a583683b922fe2c017ea61f3bc848db..18ce07ffb27bb1180667769eed800f6fdf96c083 100644 --- a/arch/riscv/kernel/ptrace.c +++ b/arch/riscv/kernel/ptrace.c @@ -31,6 +31,7 @@ enum riscv_regset { #ifdef CONFIG_RISCV_ISA_SUPM REGSET_TAGGED_ADDR_CTRL, #endif + REGSET_ORIG_A0, }; static int riscv_gpr_get(struct task_struct *target, @@ -184,6 +185,29 @@ static int tagged_addr_ctrl_set(struct task_struct *target, } #endif +static int riscv_orig_a0_get(struct task_struct *target, + const struct user_regset *regset, + struct membuf to) +{ + return membuf_store(&to, task_pt_regs(target)->orig_a0); +} + +static int riscv_orig_a0_set(struct task_struct *target, + const struct user_regset *regset, + unsigned int pos, unsigned int count, + const void *kbuf, const void __user *ubuf) +{ + unsigned long orig_a0 = task_pt_regs(target)->orig_a0; + int ret; + + ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &orig_a0, 0, -1); + if (ret) + return ret; + + task_pt_regs(target)->orig_a0 = orig_a0; + return ret; +} + static const struct user_regset riscv_user_regset[] = { [REGSET_X] = { .core_note_type = NT_PRSTATUS, @@ -224,6 +248,14 @@ static const struct user_regset riscv_user_regset[] = { .set = tagged_addr_ctrl_set, }, #endif + [REGSET_ORIG_A0] = { + .core_note_type = NT_RISCV_ORIG_A0, + .n = 1, + .size = sizeof(elf_greg_t), + .align = sizeof(elf_greg_t), + .regset_get = riscv_orig_a0_get, + .set = riscv_orig_a0_set, + }, }; static const struct user_regset_view riscv_user_native_view = { diff --git a/include/uapi/linux/elf.h b/include/uapi/linux/elf.h index b44069d29cecc0f9de90ee66bfffd2137f4275a8..390060229601631da2fb27030d9fa2142e676c14 100644 --- a/include/uapi/linux/elf.h +++ b/include/uapi/linux/elf.h @@ -452,6 +452,7 @@ typedef struct elf64_shdr { #define NT_RISCV_CSR 0x900 /* RISC-V Control and Status Registers */ #define NT_RISCV_VECTOR 0x901 /* RISC-V vector registers */ #define NT_RISCV_TAGGED_ADDR_CTRL 0x902 /* RISC-V tagged address control (prctl()) */ +#define NT_RISCV_ORIG_A0 0x903 /* RISC-V original a0 register */ #define NT_LOONGARCH_CPUCFG 0xa00 /* LoongArch CPU config registers */ #define NT_LOONGARCH_CSR 0xa01 /* LoongArch control and status registers */ #define NT_LOONGARCH_LSX 0xa02 /* LoongArch Loongson SIMD Extension registers */ From patchwork Tue Dec 3 09:30:05 2024 Content-Type: text/plain; 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Tue, 3 Dec 2024 04:31:05 -0500 (EST) From: Celeste Liu Date: Tue, 03 Dec 2024 17:30:05 +0800 Subject: [PATCH v2 2/2] riscv: selftests: Add a ptrace test to verify syscall parameter modification MIME-Version: 1.0 Message-Id: <20241203-riscv-new-regset-v2-2-d37da8c0cba6@coelacanthus.name> References: <20241203-riscv-new-regset-v2-0-d37da8c0cba6@coelacanthus.name> In-Reply-To: <20241203-riscv-new-regset-v2-0-d37da8c0cba6@coelacanthus.name> To: Oleg Nesterov , Paul Walmsley , Palmer Dabbelt , Albert Ou , Eric Biederman , Kees Cook , Shuah Khan Cc: Alexandre Ghiti , "Dmitry V. Levin" , Andrea Bolognani , =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= , Thomas Gleixner , Ron Economos , Charlie Jenkins , Quan Zhou , Felix Yan , Ruizhe Pan , Shiqi Zhang , Guo Ren , Yao Zi , Han Gao , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mm@kvack.org, stable@vger.kernel.org, linux-kselftest@vger.kernel.org, Celeste Liu X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=5295; i=uwu@coelacanthus.name; h=from:subject:message-id; bh=RyjBj4yqY/cnYg3J7doc5uv1ZKvB6VdgX8fYxV3Chig=; b=owJ4nJvAy8zAJeafov85RWVtBeNptSSGdL/zJ9qO8P6x3TXF5oxE8YH8p38CcwSX8i+8s9py0 fsfT7r3XYnvKGVhEONikBVTZMkrYfnJeels996O7V0wc1iZQIYwcHEKwESO9zH8z768W5XxtXWQ Vd3MvL6tb6X6EhZWSzZ/OSGQZm/0+n7LI4Z/umbeB/ZzX/4WulioQH3HUSZFxvjP+l+UCuMusYl khdnxAQC3SUvH X-Developer-Key: i=uwu@coelacanthus.name; a=openpgp; fpr=892EBC7DC392DFF9C9C03F1D15F4180E73787863 X-Rspamd-Queue-Id: CD57040007 X-Stat-Signature: jswp9te3tcf3yzdy9wdd13shk688f7ua X-Rspam-User: X-Rspamd-Server: rspam11 X-HE-Tag: 1733218259-158839 X-HE-Meta: U2FsdGVkX19FXG+PEidVuRsq3li+zY1QXBNAmu5UbnaMSTThwupSm23t9oQm7OjxAaUAtmr+ylnA0+CFQzkXcqWuLKMMhOwwpCFJ3UKy+ouVTyoHSyNHyIIAd9AugHPf7Q7fxvc9WRzxlzWScTOwEgBJiJfPZIRQn9Vnqf/mjOVpJ93YaZJD52LcMGpV1lHX5w5m0u7IkSnrxs8Xmh7v/nft/6lpevPXR2JsL008+8uP3CPxlfxQSHp3FYgdtRjjmbQPocbPtNvSpOKmtKxNjFHU/E6TcbJ4qOzdFXxTv/9ZFUapmPWjLSoyUP4lP80LxAoDY/KHTyt7M0GJ6hp3rw44qUGEYSg/ENKAitmvidY5ixdTpGAJ/U8yhPLjfxF7Is6ZVGjK46h6BM6YQM3kdgfhyjgzcvP0ohMHIMdvohB6UjHyDirU5MVjn8qSn4HiVZFNZXN8WrcMk86gt+20YBBWCAgGvv4YAzH9hjA+LVfJiN1BH4QyEaduCMhiweNW9BJyrDdLFjSkmcjAV4yfBMJOX2Ru/h9qrvZni9uxTtkhrqRpJxEJnjvudVrKR9NBsMSSBXAfABxWJtvCvlTcrsEbQtNKa1V8aBQg0RwE9g6+juf8VG1mesGEVO8okqVd/TlpmHnmCJx1UiHLrBO8K5fSxxCrQNP9WrXEIKjKxzRQbDdiZJ2HxMpiZxRF/Bd1c/ZkeDwnpn//z+/G57+UKjr9cEHvIbTYAARMgfx92mVDKFGNB3hve/g6Yo0BIVFDL22BOVUOTENvMYBXvJBMidRI4nVButM/8bUmNSJzWxJn5wSKPMZC5+ixyW6PUZm3dPIi7ifTXqEPf7C4ERW+su1JQ44JYwflLKgSULZZbBQa1MX6paK44CXr62YvvZafuDaVcjgmpW+JO8PV0F6w1Pf6ydqqivczNictAsPmm/XWfplz1iCubmPYx2heMUhRVWGqKpViiYl5a/JjqDp htLdvKAF YFmFuAupGbk+bss4rdW/0s3QFy4RUU1u6Ac9m8Utw7Rh6iIwxtJHyv71rsmCRv8yJgvcpXosI81ZzKGsYJqK5SctsnUnHqweWBSeBrY9ZXNqbSW1ARELVICcNGZ8DHzq75APxN1rfl04XQEBp4LRpB1aUCGvPL5DIwV+ARIOQ+62M8T+5L1Jtm+atpzzF8kbSSbIlA92HelVucN8zWuHw5WwiQO8FAEeS80FAj0c31fiPcKkLWfgW3dlV3gjaLbrZN4AsZ9j7dIlscdIiFo7sVkcwQq4noDCOviRBFQs8d32xy1qh1bxfzbaEtPJ+0FefTgSMKNuYUSxUuzJzwQlVr69fM90VevI7kpwPtdCJVHCr3kbfMxxoZ4HpM8EN/EVE7y/ldhH7BRa3l1Umi5m83CUg/CD3bu6Lq2LvXeUMazuJJwZ3mxZSJ4dRwlxqDTuPuOZMHmu7G1zaXazZmwybcc7Ram3sP2lFtjgZkmhjIgfUrqKLNeHsbWtrrAm4ugOdUm0CQv2kBSJKJhOu2faY1v6wDw== X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: From: Charlie Jenkins This test checks that orig_a0 allows a syscall argument to be modified, and that changing a0 does not change the syscall argument. Cc: stable@vger.kernel.org Co-developed-by: Quan Zhou Signed-off-by: Quan Zhou Co-developed-by: Celeste Liu Signed-off-by: Celeste Liu Signed-off-by: Charlie Jenkins Reviewed-by: Björn Töpel --- tools/testing/selftests/riscv/abi/.gitignore | 1 + tools/testing/selftests/riscv/abi/Makefile | 5 +- tools/testing/selftests/riscv/abi/ptrace.c | 134 +++++++++++++++++++++++++++ 3 files changed, 139 insertions(+), 1 deletion(-) diff --git a/tools/testing/selftests/riscv/abi/.gitignore b/tools/testing/selftests/riscv/abi/.gitignore index b38358f91c4d2240ae64892871d9ca98bda1ae58..378c605919a3b3d58eec2701eb7af430cfe315d6 100644 --- a/tools/testing/selftests/riscv/abi/.gitignore +++ b/tools/testing/selftests/riscv/abi/.gitignore @@ -1 +1,2 @@ pointer_masking +ptrace diff --git a/tools/testing/selftests/riscv/abi/Makefile b/tools/testing/selftests/riscv/abi/Makefile index ed82ff9c664e7eb3f760cbab81fb957ff72579c5..3f74d059dfdcbce4d45d8ff618781ccea1419061 100644 --- a/tools/testing/selftests/riscv/abi/Makefile +++ b/tools/testing/selftests/riscv/abi/Makefile @@ -2,9 +2,12 @@ CFLAGS += -I$(top_srcdir)/tools/include -TEST_GEN_PROGS := pointer_masking +TEST_GEN_PROGS := pointer_masking ptrace include ../../lib.mk $(OUTPUT)/pointer_masking: pointer_masking.c $(CC) -static -o$@ $(CFLAGS) $(LDFLAGS) $^ + +$(OUTPUT)/ptrace: ptrace.c + $(CC) -static -o$@ $(CFLAGS) $(LDFLAGS) $^ diff --git a/tools/testing/selftests/riscv/abi/ptrace.c b/tools/testing/selftests/riscv/abi/ptrace.c new file mode 100644 index 0000000000000000000000000000000000000000..d192764b428d1f1c442f3957c6fedeb01a48d556 --- /dev/null +++ b/tools/testing/selftests/riscv/abi/ptrace.c @@ -0,0 +1,134 @@ +// SPDX-License-Identifier: GPL-2.0-only +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "../../kselftest_harness.h" + +#define ORIG_A0_MODIFY 0x01 +#define A0_MODIFY 0x02 +#define A0_OLD 0x03 +#define A0_NEW 0x04 + +#define perr_and_exit(fmt, ...) \ + ({ \ + char buf[256]; \ + snprintf(buf, sizeof(buf), "%s:%d:" fmt ": %m\n", \ + __func__, __LINE__, ##__VA_ARGS__); \ + perror(buf); \ + exit(-1); \ + }) + +static inline void resume_and_wait_tracee(pid_t pid, int flag) +{ + int status; + + if (ptrace(flag, pid, 0, 0)) + perr_and_exit("failed to resume the tracee %d\n", pid); + + if (waitpid(pid, &status, 0) != pid) + perr_and_exit("failed to wait for the tracee %d\n", pid); +} + +static void ptrace_test(int opt, int *result) +{ + int status; + pid_t pid; + struct user_regs_struct regs; + struct iovec iov = { + .iov_base = ®s, + .iov_len = sizeof(regs), + }; + + unsigned long orig_a0; + struct iovec a0_iov = { + .iov_base = &orig_a0, + .iov_len = sizeof(orig_a0), + }; + + pid = fork(); + if (pid == 0) { + /* Mark oneself being traced */ + long val = ptrace(PTRACE_TRACEME, 0, 0, 0); + + if (val) + perr_and_exit("failed to request for tracer to trace me: %ld\n", val); + + kill(getpid(), SIGSTOP); + + /* Perform exit syscall that will be intercepted */ + exit(A0_OLD); + } + + if (pid < 0) + exit(1); + + if (waitpid(pid, &status, 0) != pid) + perr_and_exit("failed to wait for the tracee %d\n", pid); + + /* Stop at the entry point of the syscall */ + resume_and_wait_tracee(pid, PTRACE_SYSCALL); + + /* Check tracee regs before the syscall */ + if (ptrace(PTRACE_GETREGSET, pid, NT_PRSTATUS, &iov)) + perr_and_exit("failed to get tracee registers\n"); + if (ptrace(PTRACE_GETREGSET, pid, NT_RISCV_ORIG_A0, &a0_iov)) + perr_and_exit("failed to get tracee registers\n"); + if (orig_a0 != A0_OLD) + perr_and_exit("unexpected orig_a0: 0x%lx\n", orig_a0); + + /* Modify a0/orig_a0 for the syscall */ + switch (opt) { + case A0_MODIFY: + regs.a0 = A0_NEW; + break; + case ORIG_A0_MODIFY: + orig_a0 = A0_NEW; + break; + } + + if (ptrace(PTRACE_SETREGSET, pid, NT_RISCV_ORIG_A0, &a0_iov)) + perr_and_exit("failed to set tracee registers\n"); + + /* Resume the tracee */ + ptrace(PTRACE_CONT, pid, 0, 0); + if (waitpid(pid, &status, 0) != pid) + perr_and_exit("failed to wait for the tracee\n"); + + *result = WEXITSTATUS(status); +} + +TEST(ptrace_modify_a0) +{ + int result; + + ptrace_test(A0_MODIFY, &result); + + /* The modification of a0 cannot affect the first argument of the syscall */ + EXPECT_EQ(A0_OLD, result); +} + +TEST(ptrace_modify_orig_a0) +{ + int result; + + ptrace_test(ORIG_A0_MODIFY, &result); + + /* Only modify orig_a0 to change the first argument of the syscall */ + EXPECT_EQ(A0_NEW, result); +} + +TEST_HARNESS_MAIN