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Tue, 17 Dec 2024 16:16:28 -0800 (PST) From: Prabhakar X-Google-Original-From: Prabhakar To: Chris Brandt , Andi Shyti , Philipp Zabel , Wolfram Sang , Geert Uytterhoeven Cc: linux-renesas-soc@vger.kernel.org, linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org, Prabhakar , Biju Das , Fabrizio Castro , Lad Prabhakar Subject: [PATCH v2 1/9] i2c: riic: Replace dev_err with dev_err_probe in probe function Date: Wed, 18 Dec 2024 00:16:10 +0000 Message-ID: <20241218001618.488946-2-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241218001618.488946-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20241218001618.488946-1-prabhakar.mahadev-lad.rj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Lad Prabhakar Refactor error handling in the riic_i2c_probe() function by replacing multiple dev_err() calls with dev_err_probe(). Signed-off-by: Lad Prabhakar Reviewed-by: Geert Uytterhoeven --- v1->v2 - Collected RB tag from Geert --- drivers/i2c/busses/i2c-riic.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/drivers/i2c/busses/i2c-riic.c b/drivers/i2c/busses/i2c-riic.c index 9264adc97ca9..bfaa2d728a76 100644 --- a/drivers/i2c/busses/i2c-riic.c +++ b/drivers/i2c/busses/i2c-riic.c @@ -445,10 +445,9 @@ static int riic_i2c_probe(struct platform_device *pdev) return PTR_ERR(riic->base); riic->clk = devm_clk_get(dev, NULL); - if (IS_ERR(riic->clk)) { - dev_err(dev, "missing controller clock"); - return PTR_ERR(riic->clk); - } + if (IS_ERR(riic->clk)) + return dev_err_probe(dev, PTR_ERR(riic->clk), + "missing controller clock"); riic->rstc = devm_reset_control_get_optional_exclusive(dev, NULL); if (IS_ERR(riic->rstc)) @@ -470,10 +469,9 @@ static int riic_i2c_probe(struct platform_device *pdev) ret = devm_request_irq(dev, ret, riic_irqs[i].isr, 0, riic_irqs[i].name, riic); - if (ret) { - dev_err(dev, "failed to request irq %s\n", riic_irqs[i].name); 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Tue, 17 Dec 2024 16:16:30 -0800 (PST) Received: from prasmi.Home ([2a06:5906:61b:2d00:ca61:1d3a:8af0:1c5a]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43656b1f638sm2135495e9.37.2024.12.17.16.16.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 Dec 2024 16:16:30 -0800 (PST) From: Prabhakar X-Google-Original-From: Prabhakar To: Chris Brandt , Andi Shyti , Philipp Zabel , Wolfram Sang , Geert Uytterhoeven Cc: linux-renesas-soc@vger.kernel.org, linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org, Prabhakar , Biju Das , Fabrizio Castro , Lad Prabhakar Subject: [PATCH v2 2/9] i2c: riic: Use local `dev` pointer in `dev_err_probe()` Date: Wed, 18 Dec 2024 00:16:11 +0000 Message-ID: <20241218001618.488946-3-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241218001618.488946-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20241218001618.488946-1-prabhakar.mahadev-lad.rj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Lad Prabhakar Update the `riic_init_hw()` function to use the local `dev` pointer in calls to `dev_err_probe()`. Previously, `riic_init_hw()` used `riic->adapter.dev` in error reporting. Since this function is invoked during the probe phase, the I2C adapter is not yet initialized, leading to `(null) ...` being printed in error messages. This patch fixes the issue by consistently using the local `dev` pointer, which points to `riic->adapter.dev.parent`. Additionally, replace `dev_err()` with `dev_err_probe()` throughout `riic_init_hw()` for consistency. Fixes: d982d66514192 ("i2c: riic: remove clock and frequency restrictions") Fixes: 71dacb2565ed (i2c: riic: Simplify unsupported bus speed handling") Signed-off-by: Lad Prabhakar Reviewed-by: Geert Uytterhoeven --- v1->v2 - Collected RB tag from Geert --- drivers/i2c/busses/i2c-riic.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/drivers/i2c/busses/i2c-riic.c b/drivers/i2c/busses/i2c-riic.c index bfaa2d728a76..01195ffd4c07 100644 --- a/drivers/i2c/busses/i2c-riic.c +++ b/drivers/i2c/busses/i2c-riic.c @@ -320,7 +320,7 @@ static int riic_init_hw(struct riic_dev *riic) : I2C_MAX_FAST_MODE_FREQ; if (t->bus_freq_hz > max_freq) - return dev_err_probe(&riic->adapter.dev, -EINVAL, + return dev_err_probe(dev, -EINVAL, "unsupported bus speed %uHz (%u max)\n", t->bus_freq_hz, max_freq); @@ -356,11 +356,9 @@ static int riic_init_hw(struct riic_dev *riic) rate /= 2; } - if (brl > (0x1F + 3)) { - dev_err(&riic->adapter.dev, "invalid speed (%lu). Too slow.\n", - (unsigned long)t->bus_freq_hz); - return -EINVAL; - } + if (brl > (0x1F + 3)) + return dev_err_probe(dev, -EINVAL, "invalid speed (%lu). Too slow.\n", + (unsigned long)t->bus_freq_hz); brh = total_ticks - brl; From patchwork Wed Dec 18 00:16:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Prabhakar X-Patchwork-Id: 13912744 X-Patchwork-Delegate: geert@linux-m68k.org Received: from mail-wm1-f42.google.com (mail-wm1-f42.google.com [209.85.128.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 844F519BBC; Wed, 18 Dec 2024 00:16:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.42 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1734480997; cv=none; b=kSUju4vaIBHt1UzYjlLlYN1sLPCf/HDMhi/3lTsJspB0G9xCMoD+rcuGbjZLbT4o2dF1s2tkOEC0cDr555pS0psb/NzDoORaZIKKLBwG4J3NQjuidCDs2SCSUsACDU0t65Q+jXJXwWpnfi2QLv2bHItVmOdsM+//1ZOFaqqZd0o= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; 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Tue, 17 Dec 2024 16:16:32 -0800 (PST) Received: from prasmi.Home ([2a06:5906:61b:2d00:ca61:1d3a:8af0:1c5a]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43656b1f638sm2135495e9.37.2024.12.17.16.16.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 Dec 2024 16:16:31 -0800 (PST) From: Prabhakar X-Google-Original-From: Prabhakar To: Chris Brandt , Andi Shyti , Philipp Zabel , Wolfram Sang , Geert Uytterhoeven Cc: linux-renesas-soc@vger.kernel.org, linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org, Prabhakar , Biju Das , Fabrizio Castro , Lad Prabhakar Subject: [PATCH v2 3/9] i2c: riic: Use BIT macro consistently Date: Wed, 18 Dec 2024 00:16:12 +0000 Message-ID: <20241218001618.488946-4-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241218001618.488946-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20241218001618.488946-1-prabhakar.mahadev-lad.rj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Lad Prabhakar Easier to read and ensures proper types. Signed-off-by: Lad Prabhakar Reviewed-by: Geert Uytterhoeven --- v1->v2 - Collected RB tag from Geert --- drivers/i2c/busses/i2c-riic.c | 36 +++++++++++++++++------------------ 1 file changed, 18 insertions(+), 18 deletions(-) diff --git a/drivers/i2c/busses/i2c-riic.c b/drivers/i2c/busses/i2c-riic.c index 01195ffd4c07..954e066d61a8 100644 --- a/drivers/i2c/busses/i2c-riic.c +++ b/drivers/i2c/busses/i2c-riic.c @@ -46,32 +46,32 @@ #include #include -#define ICCR1_ICE 0x80 -#define ICCR1_IICRST 0x40 -#define ICCR1_SOWP 0x10 +#define ICCR1_ICE BIT(7) +#define ICCR1_IICRST BIT(6) +#define ICCR1_SOWP BIT(4) -#define ICCR2_BBSY 0x80 -#define ICCR2_SP 0x08 -#define ICCR2_RS 0x04 -#define ICCR2_ST 0x02 +#define ICCR2_BBSY BIT(7) +#define ICCR2_SP BIT(3) +#define ICCR2_RS BIT(2) +#define ICCR2_ST BIT(1) #define ICMR1_CKS_MASK 0x70 -#define ICMR1_BCWP 0x08 +#define ICMR1_BCWP BIT(3) #define ICMR1_CKS(_x) ((((_x) << 4) & ICMR1_CKS_MASK) | ICMR1_BCWP) -#define ICMR3_RDRFS 0x20 -#define ICMR3_ACKWP 0x10 -#define ICMR3_ACKBT 0x08 +#define ICMR3_RDRFS BIT(5) +#define ICMR3_ACKWP BIT(4) +#define ICMR3_ACKBT BIT(3) -#define ICFER_FMPE 0x80 +#define ICFER_FMPE BIT(7) -#define ICIER_TIE 0x80 -#define ICIER_TEIE 0x40 -#define ICIER_RIE 0x20 -#define ICIER_NAKIE 0x10 -#define ICIER_SPIE 0x08 +#define ICIER_TIE BIT(7) +#define ICIER_TEIE BIT(6) +#define ICIER_RIE BIT(5) +#define ICIER_NAKIE BIT(4) +#define ICIER_SPIE BIT(3) -#define ICSR2_NACKF 0x10 +#define ICSR2_NACKF BIT(4) #define ICBR_RESERVED 0xe0 /* Should be 1 on writes */ From patchwork Wed Dec 18 00:16:13 2024 Content-Type: text/plain; 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Tue, 17 Dec 2024 16:16:33 -0800 (PST) From: Prabhakar X-Google-Original-From: Prabhakar To: Chris Brandt , Andi Shyti , Philipp Zabel , Wolfram Sang , Geert Uytterhoeven Cc: linux-renesas-soc@vger.kernel.org, linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org, Prabhakar , Biju Das , Fabrizio Castro , Lad Prabhakar Subject: [PATCH v2 4/9] i2c: riic: Use GENMASK() macro for bitmask definitions Date: Wed, 18 Dec 2024 00:16:13 +0000 Message-ID: <20241218001618.488946-5-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241218001618.488946-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20241218001618.488946-1-prabhakar.mahadev-lad.rj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Lad Prabhakar Replace raw bitmask values with the `GENMASK()` macro in the `i2c-riic` driver to improve readability and maintain consistency. Signed-off-by: Lad Prabhakar Reviewed-by: Geert Uytterhoeven --- v1->v2 - Collected RB tag from Geert --- drivers/i2c/busses/i2c-riic.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/i2c/busses/i2c-riic.c b/drivers/i2c/busses/i2c-riic.c index 954e066d61a8..ddae4b74a86b 100644 --- a/drivers/i2c/busses/i2c-riic.c +++ b/drivers/i2c/busses/i2c-riic.c @@ -55,7 +55,7 @@ #define ICCR2_RS BIT(2) #define ICCR2_ST BIT(1) -#define ICMR1_CKS_MASK 0x70 +#define ICMR1_CKS_MASK GENMASK(6, 4) #define ICMR1_BCWP BIT(3) #define ICMR1_CKS(_x) ((((_x) << 4) & ICMR1_CKS_MASK) | ICMR1_BCWP) @@ -73,7 +73,7 @@ #define ICSR2_NACKF BIT(4) -#define ICBR_RESERVED 0xe0 /* Should be 1 on writes */ +#define ICBR_RESERVED GENMASK(7, 5) /* Should be 1 on writes */ #define RIIC_INIT_MSG -1 From patchwork Wed Dec 18 00:16:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Prabhakar X-Patchwork-Id: 13912745 X-Patchwork-Delegate: geert@linux-m68k.org Received: from mail-wm1-f53.google.com (mail-wm1-f53.google.com [209.85.128.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1CA9B3597E; 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Tue, 17 Dec 2024 16:16:36 -0800 (PST) Received: from prasmi.Home ([2a06:5906:61b:2d00:ca61:1d3a:8af0:1c5a]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43656b1f638sm2135495e9.37.2024.12.17.16.16.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 Dec 2024 16:16:35 -0800 (PST) From: Prabhakar X-Google-Original-From: Prabhakar To: Chris Brandt , Andi Shyti , Philipp Zabel , Wolfram Sang , Geert Uytterhoeven Cc: linux-renesas-soc@vger.kernel.org, linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org, Prabhakar , Biju Das , Fabrizio Castro , Lad Prabhakar Subject: [PATCH v2 5/9] i2c: riic: Make use of devres helper to request deasserted reset line Date: Wed, 18 Dec 2024 00:16:14 +0000 Message-ID: <20241218001618.488946-6-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241218001618.488946-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20241218001618.488946-1-prabhakar.mahadev-lad.rj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Lad Prabhakar Simplify the `riic_i2c_probe()` function by using the `devm_reset_control_get_optional_exclusive_deasserted()` API to request a deasserted reset line. This eliminates the need to manually deassert the reset control and the additional cleanup. Signed-off-by: Lad Prabhakar --- v1->v2 - Updated error message --- drivers/i2c/busses/i2c-riic.c | 17 ++--------------- 1 file changed, 2 insertions(+), 15 deletions(-) diff --git a/drivers/i2c/busses/i2c-riic.c b/drivers/i2c/busses/i2c-riic.c index ddae4b74a86b..edf2212e96ea 100644 --- a/drivers/i2c/busses/i2c-riic.c +++ b/drivers/i2c/busses/i2c-riic.c @@ -422,11 +422,6 @@ static struct riic_irq_desc riic_irqs[] = { { .res_num = 5, .isr = riic_tend_isr, .name = "riic-nack" }, }; -static void riic_reset_control_assert(void *data) -{ - reset_control_assert(data); -} - static int riic_i2c_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -447,18 +442,10 @@ static int riic_i2c_probe(struct platform_device *pdev) return dev_err_probe(dev, PTR_ERR(riic->clk), "missing controller clock"); - riic->rstc = devm_reset_control_get_optional_exclusive(dev, NULL); + riic->rstc = devm_reset_control_get_optional_exclusive_deasserted(dev, NULL); if (IS_ERR(riic->rstc)) return dev_err_probe(dev, PTR_ERR(riic->rstc), - "Error: missing reset ctrl\n"); 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Tue, 17 Dec 2024 16:16:37 -0800 (PST) Received: from prasmi.Home ([2a06:5906:61b:2d00:ca61:1d3a:8af0:1c5a]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43656b1f638sm2135495e9.37.2024.12.17.16.16.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 Dec 2024 16:16:36 -0800 (PST) From: Prabhakar X-Google-Original-From: Prabhakar To: Chris Brandt , Andi Shyti , Philipp Zabel , Wolfram Sang , Geert Uytterhoeven Cc: linux-renesas-soc@vger.kernel.org, linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org, Prabhakar , Biju Das , Fabrizio Castro , Lad Prabhakar Subject: [PATCH v2 6/9] i2c: riic: Mark riic_irqs array as const Date: Wed, 18 Dec 2024 00:16:15 +0000 Message-ID: <20241218001618.488946-7-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241218001618.488946-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20241218001618.488946-1-prabhakar.mahadev-lad.rj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Lad Prabhakar The riic_irqs array describes the supported IRQs by the RIIC driver and does not change at runtime. Signed-off-by: Lad Prabhakar Reviewed-by: Geert Uytterhoeven --- v1->v2 - Collected RB tag from Geert --- drivers/i2c/busses/i2c-riic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/i2c/busses/i2c-riic.c b/drivers/i2c/busses/i2c-riic.c index edf2212e96ea..378887b133a5 100644 --- a/drivers/i2c/busses/i2c-riic.c +++ b/drivers/i2c/busses/i2c-riic.c @@ -414,7 +414,7 @@ static int riic_init_hw(struct riic_dev *riic) return 0; } -static struct riic_irq_desc riic_irqs[] = { +static const struct riic_irq_desc riic_irqs[] = { { .res_num = 0, .isr = riic_tend_isr, .name = "riic-tend" }, { .res_num = 1, .isr = riic_rdrf_isr, .name = "riic-rdrf" }, { .res_num = 2, .isr = riic_tdre_isr, .name = "riic-tdre" }, From patchwork Wed Dec 18 00:16:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Prabhakar X-Patchwork-Id: 13912747 X-Patchwork-Delegate: geert@linux-m68k.org Received: from mail-wm1-f43.google.com (mail-wm1-f43.google.com [209.85.128.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 756117080D; 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Tue, 17 Dec 2024 16:16:38 -0800 (PST) Received: from prasmi.Home ([2a06:5906:61b:2d00:ca61:1d3a:8af0:1c5a]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43656b1f638sm2135495e9.37.2024.12.17.16.16.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 Dec 2024 16:16:37 -0800 (PST) From: Prabhakar X-Google-Original-From: Prabhakar To: Chris Brandt , Andi Shyti , Philipp Zabel , Wolfram Sang , Geert Uytterhoeven Cc: linux-renesas-soc@vger.kernel.org, linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org, Prabhakar , Biju Das , Fabrizio Castro , Lad Prabhakar Subject: [PATCH v2 7/9] i2c: riic: Use predefined macro and simplify clock tick calculation Date: Wed, 18 Dec 2024 00:16:16 +0000 Message-ID: <20241218001618.488946-8-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241218001618.488946-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20241218001618.488946-1-prabhakar.mahadev-lad.rj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Lad Prabhakar Replace the hardcoded `1000000000` with the predefined `NANO` macro for clarity. Simplify the code by introducing a `ns_per_tick` variable to store `NANO / rate`, reducing redundancy and improving readability. Signed-off-by: Lad Prabhakar Reviewed-by: Geert Uytterhoeven --- v1->v2 - Collected RB tag from Geert --- drivers/i2c/busses/i2c-riic.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/i2c/busses/i2c-riic.c b/drivers/i2c/busses/i2c-riic.c index 378887b133a5..a2d0cde5ac54 100644 --- a/drivers/i2c/busses/i2c-riic.c +++ b/drivers/i2c/busses/i2c-riic.c @@ -45,6 +45,7 @@ #include #include #include +#include #define ICCR1_ICE BIT(7) #define ICCR1_IICRST BIT(6) @@ -312,6 +313,7 @@ static int riic_init_hw(struct riic_dev *riic) { int ret; unsigned long rate; + unsigned long ns_per_tick; int total_ticks, cks, brl, brh; struct i2c_timings *t = &riic->i2c_t; struct device *dev = riic->adapter.dev.parent; @@ -375,8 +377,9 @@ static int riic_init_hw(struct riic_dev *riic) * Remove clock ticks for rise and fall times. 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Tue, 17 Dec 2024 16:16:39 -0800 (PST) Received: from prasmi.Home ([2a06:5906:61b:2d00:ca61:1d3a:8af0:1c5a]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43656b1f638sm2135495e9.37.2024.12.17.16.16.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 Dec 2024 16:16:39 -0800 (PST) From: Prabhakar X-Google-Original-From: Prabhakar To: Chris Brandt , Andi Shyti , Philipp Zabel , Wolfram Sang , Geert Uytterhoeven Cc: linux-renesas-soc@vger.kernel.org, linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org, Prabhakar , Biju Das , Fabrizio Castro , Lad Prabhakar Subject: [PATCH v2 8/9] i2c: riic: Add `riic_bus_barrier()` to check bus availability Date: Wed, 18 Dec 2024 00:16:17 +0000 Message-ID: <20241218001618.488946-9-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241218001618.488946-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20241218001618.488946-1-prabhakar.mahadev-lad.rj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Lad Prabhakar Introduce a new `riic_bus_barrier()` function to verify bus availability before initiating an I2C transfer. This function enhances the bus arbitration check by ensuring that the SDA and SCL lines are not held low, in addition to checking the BBSY flag using `readb_poll_timeout()`. Previously, only the BBSY flag was checked to determine bus availability. However, it is possible for the SDA line to remain low even when BBSY = 0. This new implementation performs an additional check on the SDA and SCL lines to avoid potential bus contention issues. Signed-off-by: Lad Prabhakar --- v1->v2 - Used single register read to check SDA/SCL lines --- drivers/i2c/busses/i2c-riic.c | 29 ++++++++++++++++++++++++++--- 1 file changed, 26 insertions(+), 3 deletions(-) diff --git a/drivers/i2c/busses/i2c-riic.c b/drivers/i2c/busses/i2c-riic.c index a2d0cde5ac54..586092454bb2 100644 --- a/drivers/i2c/busses/i2c-riic.c +++ b/drivers/i2c/busses/i2c-riic.c @@ -40,6 +40,7 @@ #include #include #include +#include #include #include #include @@ -50,6 +51,8 @@ #define ICCR1_ICE BIT(7) #define ICCR1_IICRST BIT(6) #define ICCR1_SOWP BIT(4) +#define ICCR1_SCLI BIT(1) +#define ICCR1_SDAI BIT(0) #define ICCR2_BBSY BIT(7) #define ICCR2_SP BIT(3) @@ -135,6 +138,27 @@ static inline void riic_clear_set_bit(struct riic_dev *riic, u8 clear, u8 set, u riic_writeb(riic, (riic_readb(riic, reg) & ~clear) | set, reg); } +static int riic_bus_barrier(struct riic_dev *riic) +{ + int ret; + u8 val; + + /* + * The SDA line can still be low even when BBSY = 0. Therefore, after checking + * the BBSY flag, also verify that the SDA and SCL lines are not being held low. + */ + ret = readb_poll_timeout(riic->base + riic->info->regs[RIIC_ICCR2], val, + !(val & ICCR2_BBSY), 10, riic->adapter.timeout); + if (ret) + return -EBUSY; + + if ((riic_readb(riic, RIIC_ICCR1) & (ICCR1_SDAI | ICCR1_SCLI)) != + (ICCR1_SDAI | ICCR1_SCLI)) + return -EBUSY; + + return 0; +} + static int riic_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num) { struct riic_dev *riic = i2c_get_adapdata(adap); @@ -147,10 +171,9 @@ static int riic_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num) if (ret) return ret; - if (riic_readb(riic, RIIC_ICCR2) & ICCR2_BBSY) { - riic->err = -EBUSY; + riic->err = riic_bus_barrier(riic); + if (riic->err) goto out; - } reinit_completion(&riic->msg_done); riic->err = 0; From patchwork Wed Dec 18 00:16:18 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Prabhakar X-Patchwork-Id: 13912749 X-Patchwork-Delegate: geert@linux-m68k.org Received: from mail-wr1-f51.google.com (mail-wr1-f51.google.com [209.85.221.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C8AD81BDC3; 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Tue, 17 Dec 2024 16:16:40 -0800 (PST) Received: from prasmi.Home ([2a06:5906:61b:2d00:ca61:1d3a:8af0:1c5a]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43656b1f638sm2135495e9.37.2024.12.17.16.16.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 Dec 2024 16:16:40 -0800 (PST) From: Prabhakar X-Google-Original-From: Prabhakar To: Chris Brandt , Andi Shyti , Philipp Zabel , Wolfram Sang , Geert Uytterhoeven Cc: linux-renesas-soc@vger.kernel.org, linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org, Prabhakar , Biju Das , Fabrizio Castro , Lad Prabhakar Subject: [PATCH v2 9/9] i2c: riic: Implement bus recovery Date: Wed, 18 Dec 2024 00:16:18 +0000 Message-ID: <20241218001618.488946-10-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241218001618.488946-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20241218001618.488946-1-prabhakar.mahadev-lad.rj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Lad Prabhakar Implement bus recovery by reinitializing the hardware to reset the bus state and generating 9 clock cycles (and a stop condition) to release the SDA line. Signed-off-by: Lad Prabhakar --- v1->v2 - Used single register read to check SDA/SCL lines --- drivers/i2c/busses/i2c-riic.c | 100 ++++++++++++++++++++++++++++++---- 1 file changed, 90 insertions(+), 10 deletions(-) diff --git a/drivers/i2c/busses/i2c-riic.c b/drivers/i2c/busses/i2c-riic.c index 586092454bb2..d93c371a22de 100644 --- a/drivers/i2c/busses/i2c-riic.c +++ b/drivers/i2c/busses/i2c-riic.c @@ -50,6 +50,7 @@ #define ICCR1_ICE BIT(7) #define ICCR1_IICRST BIT(6) +#define ICCR1_CLO BIT(5) #define ICCR1_SOWP BIT(4) #define ICCR1_SCLI BIT(1) #define ICCR1_SDAI BIT(0) @@ -68,6 +69,7 @@ #define ICMR3_ACKBT BIT(3) #define ICFER_FMPE BIT(7) +#define ICFER_MALE BIT(1) #define ICIER_TIE BIT(7) #define ICIER_TEIE BIT(6) @@ -81,6 +83,8 @@ #define RIIC_INIT_MSG -1 +#define RIIC_RECOVERY_CLK_CNT 9 + enum riic_reg_list { RIIC_ICCR1 = 0, RIIC_ICCR2, @@ -150,13 +154,16 @@ static int riic_bus_barrier(struct riic_dev *riic) ret = readb_poll_timeout(riic->base + riic->info->regs[RIIC_ICCR2], val, !(val & ICCR2_BBSY), 10, riic->adapter.timeout); if (ret) - return -EBUSY; + goto i2c_recover; if ((riic_readb(riic, RIIC_ICCR1) & (ICCR1_SDAI | ICCR1_SCLI)) != (ICCR1_SDAI | ICCR1_SCLI)) - return -EBUSY; + goto i2c_recover; return 0; + +i2c_recover: + return i2c_recover_bus(&riic->adapter); } static int riic_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num) @@ -332,7 +339,7 @@ static const struct i2c_algorithm riic_algo = { .functionality = riic_func, }; -static int riic_init_hw(struct riic_dev *riic) +static int riic_init_hw(struct riic_dev *riic, bool recover) { int ret; unsigned long rate; @@ -414,9 +421,11 @@ static int riic_init_hw(struct riic_dev *riic) rate / total_ticks, ((brl + 3) * 100) / (brl + brh + 6), t->scl_fall_ns / ns_per_tick, t->scl_rise_ns / ns_per_tick, cks, brl, brh); - ret = pm_runtime_resume_and_get(dev); - if (ret) - return ret; + if (!recover) { + ret = pm_runtime_resume_and_get(dev); + if (ret) + return ret; + } /* Changing the order of accessing IICRST and ICE may break things! */ riic_writeb(riic, ICCR1_IICRST | ICCR1_SOWP, RIIC_ICCR1); @@ -434,8 +443,74 @@ static int riic_init_hw(struct riic_dev *riic) riic_clear_set_bit(riic, ICCR1_IICRST, 0, RIIC_ICCR1); - pm_runtime_mark_last_busy(dev); - pm_runtime_put_autosuspend(dev); + if (!recover) { + pm_runtime_mark_last_busy(dev); + pm_runtime_put_autosuspend(dev); + } + return 0; +} + +static int riic_recover_bus(struct i2c_adapter *adap) +{ + struct riic_dev *riic = i2c_get_adapdata(adap); + struct device *dev = riic->adapter.dev.parent; + int ret; + u8 val; + + ret = riic_init_hw(riic, true); + if (ret) + return -EINVAL; + + /* output extra SCL clock cycles with master arbitration-lost detection disabled */ + riic_clear_set_bit(riic, ICFER_MALE, 0, RIIC_ICFER); + + for (unsigned int i = 0; i < RIIC_RECOVERY_CLK_CNT; i++) { + riic_clear_set_bit(riic, 0, ICCR1_CLO, RIIC_ICCR1); + ret = readb_poll_timeout(riic->base + riic->info->regs[RIIC_ICCR1], val, + !(val & ICCR1_CLO), 0, 100); + if (ret) { + dev_err(dev, "SCL clock cycle timeout\n"); + return ret; + } + } + + /* + * The last clock cycle may have driven the SDA line high, so add a + * short delay to allow the line to stabilize before checking the status. + */ + udelay(5); + + /* + * If an incomplete byte write occurs, the SDA line may remain low + * even after 9 clock pulses, indicating the bus is not released. + * To resolve this, send an additional clock pulse to simulate a STOP + * condition and ensure proper bus release. + */ + if ((riic_readb(riic, RIIC_ICCR1) & (ICCR1_SDAI | ICCR1_SCLI)) != + (ICCR1_SDAI | ICCR1_SCLI)) { + riic_clear_set_bit(riic, 0, ICCR1_CLO, RIIC_ICCR1); + ret = readb_poll_timeout(riic->base + riic->info->regs[RIIC_ICCR1], val, + !(val & ICCR1_CLO), 0, 100); + if (ret) { + dev_err(dev, "SCL clock cycle timeout occurred while issuing the STOP condition\n"); + return ret; + } + /* delay to make sure SDA line goes back HIGH again */ + udelay(5); + } + + /* clear any flags set */ + riic_writeb(riic, 0, RIIC_ICSR2); + /* read back register to confirm writes */ + riic_readb(riic, RIIC_ICSR2); + + /* restore back ICFER_MALE */ + riic_clear_set_bit(riic, 0, ICFER_MALE, RIIC_ICFER); + + if ((riic_readb(riic, RIIC_ICCR1) & (ICCR1_SDAI | ICCR1_SCLI)) != + (ICCR1_SDAI | ICCR1_SCLI)) + return -EINVAL; + return 0; } @@ -447,6 +522,10 @@ static const struct riic_irq_desc riic_irqs[] = { { .res_num = 5, .isr = riic_tend_isr, .name = "riic-nack" }, }; +static struct i2c_bus_recovery_info riic_bri = { + .recover_bus = riic_recover_bus, +}; + static int riic_i2c_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -491,6 +570,7 @@ static int riic_i2c_probe(struct platform_device *pdev) strscpy(adap->name, "Renesas RIIC adapter", sizeof(adap->name)); adap->owner = THIS_MODULE; adap->algo = &riic_algo; + adap->bus_recovery_info = &riic_bri; adap->dev.parent = dev; adap->dev.of_node = dev->of_node; @@ -503,7 +583,7 @@ static int riic_i2c_probe(struct platform_device *pdev) pm_runtime_use_autosuspend(dev); pm_runtime_enable(dev); - ret = riic_init_hw(riic); + ret = riic_init_hw(riic, false); if (ret) goto out; @@ -611,7 +691,7 @@ static int riic_i2c_resume(struct device *dev) if (ret) return ret; - ret = riic_init_hw(riic); + ret = riic_init_hw(riic, false); if (ret) { /* * In case this happens there is no way to recover from this