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Wed, 18 Dec 2024 12:14:06 GMT Received: from songxue-gv.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 18 Dec 2024 04:14:00 -0800 From: Song Xue Date: Wed, 18 Dec 2024 20:12:56 +0800 Subject: [PATCH v3 1/2] arm64: dts: qcom: qcs615: Add support for secondary USB node on QCS615 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20241218-add_usb_host_mode_for_qcs615-v3-1-d9d29fe39a4b@quicinc.com> References: <20241218-add_usb_host_mode_for_qcs615-v3-0-d9d29fe39a4b@quicinc.com> In-Reply-To: <20241218-add_usb_host_mode_for_qcs615-v3-0-d9d29fe39a4b@quicinc.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: , , , , Krishna Kurapati , Song Xue , Konrad Dybcio X-Mailer: b4 0.15-dev-88a27 X-Developer-Signature: v=1; a=ed25519-sha256; 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Reviewed-by: Konrad Dybcio Signed-off-by: Krishna Kurapati Co-developed-by: Song Xue Signed-off-by: Song Xue --- arch/arm64/boot/dts/qcom/qcs615.dtsi | 78 ++++++++++++++++++++++++++++++++++++ 1 file changed, 78 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qcs615.dtsi b/arch/arm64/boot/dts/qcom/qcs615.dtsi index b8388dcca94cd8f4e6f1360305d5f6c7fff4eec3..a5155e61f25dbfd819c67662ae471962d29d0b28 100644 --- a/arch/arm64/boot/dts/qcom/qcs615.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs615.dtsi @@ -3079,6 +3079,22 @@ usb_1_hsphy: phy@88e2000 { status = "disabled"; }; + usb_hsphy_2: phy@88e3000 { + compatible = "qcom,qcs615-qusb2-phy"; + reg = <0x0 0x088e3000 0x0 0x180>; + + clocks = <&gcc GCC_AHB2PHY_WEST_CLK>, + <&rpmhcc RPMH_CXO_CLK>; + clock-names = "cfg_ahb", + "ref"; + + resets = <&gcc GCC_QUSB2PHY_SEC_BCR>; + + #phy-cells = <0>; + + status = "disabled"; + }; + usb_qmpphy: phy@88e6000 { compatible = "qcom,qcs615-qmp-usb3-phy"; reg = <0x0 0x88e6000 0x0 0x1000>; @@ -3168,6 +3184,68 @@ usb_1_dwc3: usb@a600000 { snps,usb3_lpm_capable; }; }; + + usb_2: usb@a8f8800 { + compatible = "qcom,qcs615-dwc3", "qcom,dwc3"; + reg = <0x0 0x0a8f8800 0x0 0x400>; + + clocks = <&gcc GCC_CFG_NOC_USB2_SEC_AXI_CLK>, + <&gcc GCC_USB20_SEC_MASTER_CLK>, + <&gcc GCC_AGGRE_USB2_SEC_AXI_CLK>, + <&gcc GCC_USB20_SEC_SLEEP_CLK>, + <&gcc GCC_USB20_SEC_MOCK_UTMI_CLK>, + <&gcc GCC_USB2_PRIM_CLKREF_CLK>; + clock-names = "cfg_noc", + "core", + "iface", + "sleep", + "mock_utmi", + "xo"; + + assigned-clocks = <&gcc GCC_USB20_SEC_MOCK_UTMI_CLK>, + <&gcc GCC_USB20_SEC_MASTER_CLK>; + assigned-clock-rates = <19200000>, <200000000>; + + interrupts-extended = <&intc GIC_SPI 663 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 662 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 11 IRQ_TYPE_EDGE_BOTH>, + <&pdc 10 IRQ_TYPE_EDGE_BOTH>; + interrupt-names = "pwr_event", + "hs_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq"; + + power-domains = <&gcc USB20_SEC_GDSC>; + required-opps = <&rpmhpd_opp_nom>; + + resets = <&gcc GCC_USB20_SEC_BCR>; + + qcom,select-utmi-as-pipe-clk; + + #address-cells = <2>; + #size-cells = <2>; + ranges; + + status = "disabled"; + + usb_2_dwc3: usb@a800000 { + compatible = "snps,dwc3"; + reg = <0x0 0x0a800000 0x0 0xcd00>; + + iommus = <&apps_smmu 0xe0 0x0>; + interrupts = ; + + phys = <&usb_hsphy_2>; + phy-names = "usb2-phy"; + + snps,dis_u2_susphy_quirk; + snps,dis_enblslpm_quirk; + snps,has-lpm-erratum; + snps,hird-threshold = /bits/ 8 <0x10>; + + maximum-speed = "high-speed"; + }; + }; }; arch_timer: timer { From patchwork Wed Dec 18 12:12:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Song Xue X-Patchwork-Id: 13913572 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 457681A4F12; Wed, 18 Dec 2024 12:14:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; 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Wed, 18 Dec 2024 12:14:09 +0000 (GMT) Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA02.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 4BICE9LE021089 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 18 Dec 2024 12:14:09 GMT Received: from songxue-gv.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 18 Dec 2024 04:14:03 -0800 From: Song Xue Date: Wed, 18 Dec 2024 20:12:57 +0800 Subject: [PATCH v3 2/2] arm64: dts: qcom: qcs615-ride: Enable secondary USB controller on QCS615 Ride Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20241218-add_usb_host_mode_for_qcs615-v3-2-d9d29fe39a4b@quicinc.com> References: <20241218-add_usb_host_mode_for_qcs615-v3-0-d9d29fe39a4b@quicinc.com> In-Reply-To: <20241218-add_usb_host_mode_for_qcs615-v3-0-d9d29fe39a4b@quicinc.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: , , , , Krishna Kurapati , Song Xue X-Mailer: b4 0.15-dev-88a27 X-Developer-Signature: v=1; a=ed25519-sha256; t=1734524036; l=2234; i=quic_songxue@quicinc.com; s=20240911; h=from:subject:message-id; bh=jamDY4APYyBLUyA42FN/U6o4cdT9e86Tt6RNWvLVV9s=; b=tHsEHtHI5zrjWPpAEE9MsXL94eS2adRamlnB09vGNnKGQjTqHcekHP2Tyvi3rqh20OPGLPHyt UaCVWscPoCKBfmspIVb9SspkIZi0Qa5OXEQDazns3UR8pfU7SzQ/cFU X-Developer-Key: i=quic_songxue@quicinc.com; a=ed25519; pk=Z6tjs+BBbyg1kYqhBq0EfW2Pl/yZdOPXutG9TOVA1yc= X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: J3FcNTorTILRUDqwFr5X3sB6BC4UfHla X-Proofpoint-GUID: J3FcNTorTILRUDqwFr5X3sB6BC4UfHla X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=961 mlxscore=0 priorityscore=1501 spamscore=0 adultscore=0 clxscore=1015 lowpriorityscore=0 phishscore=0 suspectscore=0 impostorscore=0 malwarescore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2412180098 From: Krishna Kurapati Enable secondary USB controller on QCS615 Ride platform. The secondary USB controller is made "host", as it is a Type-A port. Secondary USB controller of QCS615 Ride has Type-A port exposed for connecting peripheral. The VBUS to the peripheral is provided by TPS2549IRTERQ1 regulator connected to the port. The regulator has an enable pin controlled by PM8150. Model it as fixed regulator and keep it Always-On at boot, since the regulator is GPIO controlled regulator. Signed-off-by: Krishna Kurapati Co-developed-by: Song Xue Signed-off-by: Song Xue --- arch/arm64/boot/dts/qcom/qcs615-ride.dts | 36 ++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qcs615-ride.dts b/arch/arm64/boot/dts/qcom/qcs615-ride.dts index f41319ff47b983d771da52775fa78b4385c4e532..66f988104697367e87c1a9e688b3e1ff4c10a644 100644 --- a/arch/arm64/boot/dts/qcom/qcs615-ride.dts +++ b/arch/arm64/boot/dts/qcom/qcs615-ride.dts @@ -4,6 +4,7 @@ */ /dts-v1/; +#include #include #include "qcs615.dtsi" #include "pm8150.dtsi" @@ -33,6 +34,16 @@ xo_board_clk: xo-board-clk { #clock-cells = <0>; }; }; + + regulator-usb2-vbus { + compatible = "regulator-fixed"; + regulator-name = "USB2_VBUS"; + gpio = <&pm8150_gpios 10 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&usb2_en>; + pinctrl-names = "default"; + enable-active-high; + regulator-always-on; + }; }; &apps_rsc { @@ -203,6 +214,15 @@ &gcc { <&sleep_clk>; }; +&pm8150_gpios { + usb2_en: usb2-en-state { + pins = "gpio10"; + function = "normal"; + output-enable; + power-source = <0>; + }; +}; + &pon_pwrkey { status = "okay"; }; @@ -248,6 +268,22 @@ &usb_1_dwc3 { dr_mode = "peripheral"; }; +&usb_hsphy_2 { + vdd-supply = <&vreg_l5a>; + vdda-pll-supply = <&vreg_l12a>; + vdda-phy-dpdm-supply = <&vreg_l13a>; + + status = "okay"; +}; + +&usb_2 { + status = "okay"; +}; + +&usb_2_dwc3 { + dr_mode = "host"; +}; + &watchdog { clocks = <&sleep_clk>; };