From patchwork Sun Dec 22 00:20:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Dr. David Alan Gilbert" X-Patchwork-Id: 13917956 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8428EE7718D for ; Sun, 22 Dec 2024 00:21:05 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id F1B4810E1B1; Sun, 22 Dec 2024 00:21:04 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=treblig.org header.i=@treblig.org header.b="nfqsr+y6"; dkim-atps=neutral Received: from mx.treblig.org (mx.treblig.org [IPv6:2a00:1098:5b::1]) by gabe.freedesktop.org (Postfix) with ESMTPS id 036A410E12B for ; Sun, 22 Dec 2024 00:20:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=treblig.org ; s=bytemarkmx; h=MIME-Version:Message-ID:Date:Subject:From:Content-Type:From :Subject; bh=QUix15QTiaFfsssbab5rS4/shsq0Av6rYxiUE7OZ7WU=; b=nfqsr+y6VUNuN71H ehERd7OMf7L3J833iqNbjJjlLk6ycWADrkihWVa+93/gU7Rvvh3uEIzmtZB2h8oV/sahEOx7e/xtf FfC+oT6UDG4aKuXH4rOTFkSlm8V0qoupWN3iH+VQaHvjCIMX/nrpLwNTAU6BobGMhlH1DEL5fDGmV ov2CWWbsCkSok8lvOz/X8zYjZDrJTTIMK/T3Mw/6BpsfXKWM0WfnKvfR4Ko0TSkqjG7S+7lpv69Lo tDyCztryjcql6s+YTEec2ETzUGW0wbybaFmuf8J1ZbTTWIp961ypDhMEQhO/t7xYXPxad7KpunQKv 5Z5yFedpy3PM1qAp5g==; Received: from localhost ([127.0.0.1] helo=dalek.home.treblig.org) by mx.treblig.org with esmtp (Exim 4.96) (envelope-from ) id 1tP9i9-006iX5-0g; Sun, 22 Dec 2024 00:20:45 +0000 From: linux@treblig.org To: zhenyuw@linux.intel.com, zhi.wang.linux@gmail.com, jani.nikula@linux.intel.com, joonas.lahtinen@linux.intel.com, rodrigo.vivi@intel.com, tursulin@ursulin.net, intel-gvt-dev@lists.freedesktop.org, intel-gfx@lists.freedesktop.org Cc: airlied@gmail.com, simona@ffwll.ch, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, "Dr. David Alan Gilbert" Subject: [PATCH 1/3] drm/i915/gvt: Remove intel_gvt_ggtt_h2g<->index Date: Sun, 22 Dec 2024 00:20:41 +0000 Message-ID: <20241222002043.173080-2-linux@treblig.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241222002043.173080-1-linux@treblig.org> References: <20241222002043.173080-1-linux@treblig.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: "Dr. David Alan Gilbert" intel_gvt_ggtt_h2g_index() and intel_gvt_ggtt_index_g2h() were added in 2016 by commit 2707e4446688 ("drm/i915/gvt: vGPU graphics memory virtualization") but haven't been used. Remove them. They were the only users of intel_gvt_ggtt_gmadr_g2h() and intel_gvt_ggtt_gmadr_h2g(). Remove them. Signed-off-by: Dr. David Alan Gilbert --- drivers/gpu/drm/i915/gvt/gtt.c | 66 ---------------------------------- drivers/gpu/drm/i915/gvt/gvt.h | 6 ---- 2 files changed, 72 deletions(-) diff --git a/drivers/gpu/drm/i915/gvt/gtt.c b/drivers/gpu/drm/i915/gvt/gtt.c index 1bce1493b86f..464fb17e82ee 100644 --- a/drivers/gpu/drm/i915/gvt/gtt.c +++ b/drivers/gpu/drm/i915/gvt/gtt.c @@ -71,72 +71,6 @@ bool intel_gvt_ggtt_validate_range(struct intel_vgpu *vgpu, u64 addr, u32 size) return false; } -/* translate a guest gmadr to host gmadr */ -int intel_gvt_ggtt_gmadr_g2h(struct intel_vgpu *vgpu, u64 g_addr, u64 *h_addr) -{ - struct drm_i915_private *i915 = vgpu->gvt->gt->i915; - - if (drm_WARN(&i915->drm, !vgpu_gmadr_is_valid(vgpu, g_addr), - "invalid guest gmadr %llx\n", g_addr)) - return -EACCES; - - if (vgpu_gmadr_is_aperture(vgpu, g_addr)) - *h_addr = vgpu_aperture_gmadr_base(vgpu) - + (g_addr - vgpu_aperture_offset(vgpu)); - else - *h_addr = vgpu_hidden_gmadr_base(vgpu) - + (g_addr - vgpu_hidden_offset(vgpu)); - return 0; -} - -/* translate a host gmadr to guest gmadr */ -int intel_gvt_ggtt_gmadr_h2g(struct intel_vgpu *vgpu, u64 h_addr, u64 *g_addr) -{ - struct drm_i915_private *i915 = vgpu->gvt->gt->i915; - - if (drm_WARN(&i915->drm, !gvt_gmadr_is_valid(vgpu->gvt, h_addr), - "invalid host gmadr %llx\n", h_addr)) - return -EACCES; - - if (gvt_gmadr_is_aperture(vgpu->gvt, h_addr)) - *g_addr = vgpu_aperture_gmadr_base(vgpu) - + (h_addr - gvt_aperture_gmadr_base(vgpu->gvt)); - else - *g_addr = vgpu_hidden_gmadr_base(vgpu) - + (h_addr - gvt_hidden_gmadr_base(vgpu->gvt)); - return 0; -} - -int intel_gvt_ggtt_index_g2h(struct intel_vgpu *vgpu, unsigned long g_index, - unsigned long *h_index) -{ - u64 h_addr; - int ret; - - ret = intel_gvt_ggtt_gmadr_g2h(vgpu, g_index << I915_GTT_PAGE_SHIFT, - &h_addr); - if (ret) - return ret; - - *h_index = h_addr >> I915_GTT_PAGE_SHIFT; - return 0; -} - -int intel_gvt_ggtt_h2g_index(struct intel_vgpu *vgpu, unsigned long h_index, - unsigned long *g_index) -{ - u64 g_addr; - int ret; - - ret = intel_gvt_ggtt_gmadr_h2g(vgpu, h_index << I915_GTT_PAGE_SHIFT, - &g_addr); - if (ret) - return ret; - - *g_index = g_addr >> I915_GTT_PAGE_SHIFT; - return 0; -} - #define gtt_type_is_entry(type) \ (type > GTT_TYPE_INVALID && type < GTT_TYPE_PPGTT_ENTRY \ && type != GTT_TYPE_PPGTT_PTE_ENTRY \ diff --git a/drivers/gpu/drm/i915/gvt/gvt.h b/drivers/gpu/drm/i915/gvt/gvt.h index 2c95aeef4e41..8580c6d057e7 100644 --- a/drivers/gpu/drm/i915/gvt/gvt.h +++ b/drivers/gpu/drm/i915/gvt/gvt.h @@ -531,12 +531,6 @@ int intel_gvt_set_edid(struct intel_vgpu *vgpu, int port_num); gvt_gmadr_is_hidden(gvt, gmadr)) bool intel_gvt_ggtt_validate_range(struct intel_vgpu *vgpu, u64 addr, u32 size); -int intel_gvt_ggtt_gmadr_g2h(struct intel_vgpu *vgpu, u64 g_addr, u64 *h_addr); -int intel_gvt_ggtt_gmadr_h2g(struct intel_vgpu *vgpu, u64 h_addr, u64 *g_addr); -int intel_gvt_ggtt_index_g2h(struct intel_vgpu *vgpu, unsigned long g_index, - unsigned long *h_index); -int intel_gvt_ggtt_h2g_index(struct intel_vgpu *vgpu, unsigned long h_index, - unsigned long *g_index); void intel_vgpu_init_cfg_space(struct intel_vgpu *vgpu, bool primary); From patchwork Sun Dec 22 00:20:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Dr. David Alan Gilbert" X-Patchwork-Id: 13917953 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A73B1E7718B for ; Sun, 22 Dec 2024 00:20:55 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D732310E083; Sun, 22 Dec 2024 00:20:54 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=treblig.org header.i=@treblig.org header.b="oUaGQKt5"; dkim-atps=neutral Received: from mx.treblig.org (mx.treblig.org [IPv6:2a00:1098:5b::1]) by gabe.freedesktop.org (Postfix) with ESMTPS id AA9A710E12B for ; Sun, 22 Dec 2024 00:20:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=treblig.org ; s=bytemarkmx; h=MIME-Version:Message-ID:Date:Subject:From:Content-Type:From :Subject; bh=oEGtID3dfqDsPfrY5IfhY+Qz9vCN6+uuEv9bkElTmqU=; b=oUaGQKt5AF9jw5IA 3aVLiRpFyLzFMSarYjIsSIYmR7/DDofRJD787HKGZbmQNwRoYfseuplMEDyVt7WVGYeam8l4ojZ4w mxCObk0FVDLqnVnRy7BbdIIedapxDjwzE+cJeoEdxK5mIpf+kgLoCoZhdBVQYjH57vw6sV9kwp1eY tpmcZBYbIUYlScZtSk0N75h2hL2r8BwkAUUciDeurWJR+1l9B1CaY3/3EkFSAC191hUkUZntAaGuN +6dj4b/nbp3pwFx9WU+h4+gGNiilAosXKwSPQtSg5oT4q2nBX7nDT1Z69ha2wYopcoBcbjW5xmcRU V+J1K6FGhRSuI6pN9w==; Received: from localhost ([127.0.0.1] helo=dalek.home.treblig.org) by mx.treblig.org with esmtp (Exim 4.96) (envelope-from ) id 1tP9i9-006iX5-2u; Sun, 22 Dec 2024 00:20:45 +0000 From: linux@treblig.org To: zhenyuw@linux.intel.com, zhi.wang.linux@gmail.com, jani.nikula@linux.intel.com, joonas.lahtinen@linux.intel.com, rodrigo.vivi@intel.com, tursulin@ursulin.net, intel-gvt-dev@lists.freedesktop.org, intel-gfx@lists.freedesktop.org Cc: airlied@gmail.com, simona@ffwll.ch, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, "Dr. David Alan Gilbert" Subject: [PATCH 2/3] drm/i915/gvt: Remove unused intel_vgpu_decode_sprite_plane Date: Sun, 22 Dec 2024 00:20:42 +0000 Message-ID: <20241222002043.173080-3-linux@treblig.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241222002043.173080-1-linux@treblig.org> References: <20241222002043.173080-1-linux@treblig.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: "Dr. David Alan Gilbert" intel_vgpu_decode_sprite_plane() was added in 2017 by commit 9f31d1063b43 ("drm/i915/gvt: Add framebuffer decoder support") but has remained unused. Remove it. Signed-off-by: Dr. David Alan Gilbert --- drivers/gpu/drm/i915/gvt/fb_decoder.c | 117 -------------------------- drivers/gpu/drm/i915/gvt/fb_decoder.h | 2 - 2 files changed, 119 deletions(-) diff --git a/drivers/gpu/drm/i915/gvt/fb_decoder.c b/drivers/gpu/drm/i915/gvt/fb_decoder.c index c454e25b2b0f..a37322914f5e 100644 --- a/drivers/gpu/drm/i915/gvt/fb_decoder.c +++ b/drivers/gpu/drm/i915/gvt/fb_decoder.c @@ -395,120 +395,3 @@ int intel_vgpu_decode_cursor_plane(struct intel_vgpu *vgpu, plane->y_hot = vgpu_vreg_t(vgpu, vgtif_reg(cursor_y_hot)); return 0; } - -#define SPRITE_FORMAT_NUM (1 << 3) - -static const struct pixel_format sprite_pixel_formats[SPRITE_FORMAT_NUM] = { - [0x0] = {DRM_FORMAT_YUV422, 16, "YUV 16-bit 4:2:2 packed"}, - [0x1] = {DRM_FORMAT_XRGB2101010, 32, "RGB 32-bit 2:10:10:10"}, - [0x2] = {DRM_FORMAT_XRGB8888, 32, "RGB 32-bit 8:8:8:8"}, - [0x4] = {DRM_FORMAT_AYUV, 32, - "YUV 32-bit 4:4:4 packed (8:8:8:8 MSB-X:Y:U:V)"}, -}; - -/** - * intel_vgpu_decode_sprite_plane - Decode sprite plane - * @vgpu: input vgpu - * @plane: sprite plane to save decoded info - * This function is called for decoding plane - * - * Returns: - * 0 on success, non-zero if failed. - */ -int intel_vgpu_decode_sprite_plane(struct intel_vgpu *vgpu, - struct intel_vgpu_sprite_plane_format *plane) -{ - u32 val, fmt; - u32 color_order, yuv_order; - int drm_format; - int pipe; - - pipe = get_active_pipe(vgpu); - if (pipe >= I915_MAX_PIPES) - return -ENODEV; - - val = vgpu_vreg_t(vgpu, SPRCTL(pipe)); - plane->enabled = !!(val & SPRITE_ENABLE); - if (!plane->enabled) - return -ENODEV; - - plane->tiled = !!(val & SPRITE_TILED); - color_order = !!(val & SPRITE_RGB_ORDER_RGBX); - yuv_order = (val & SPRITE_YUV_ORDER_MASK) >> - _SPRITE_YUV_ORDER_SHIFT; - - fmt = (val & SPRITE_FORMAT_MASK) >> _SPRITE_FMT_SHIFT; - if (!sprite_pixel_formats[fmt].bpp) { - gvt_vgpu_err("Non-supported pixel format (0x%x)\n", fmt); - return -EINVAL; - } - plane->hw_format = fmt; - plane->bpp = sprite_pixel_formats[fmt].bpp; - drm_format = sprite_pixel_formats[fmt].drm_format; - - /* Order of RGB values in an RGBxxx buffer may be ordered RGB or - * BGR depending on the state of the color_order field - */ - if (!color_order) { - if (drm_format == DRM_FORMAT_XRGB2101010) - drm_format = DRM_FORMAT_XBGR2101010; - else if (drm_format == DRM_FORMAT_XRGB8888) - drm_format = DRM_FORMAT_XBGR8888; - } - - if (drm_format == DRM_FORMAT_YUV422) { - switch (yuv_order) { - case 0: - drm_format = DRM_FORMAT_YUYV; - break; - case 1: - drm_format = DRM_FORMAT_UYVY; - break; - case 2: - drm_format = DRM_FORMAT_YVYU; - break; - case 3: - drm_format = DRM_FORMAT_VYUY; - break; - default: - /* yuv_order has only 2 bits */ - break; - } - } - - plane->drm_format = drm_format; - - plane->base = vgpu_vreg_t(vgpu, SPRSURF(pipe)) & I915_GTT_PAGE_MASK; - if (!vgpu_gmadr_is_valid(vgpu, plane->base)) - return -EINVAL; - - plane->base_gpa = intel_vgpu_gma_to_gpa(vgpu->gtt.ggtt_mm, plane->base); - if (plane->base_gpa == INTEL_GVT_INVALID_ADDR) { - gvt_vgpu_err("Translate sprite plane gma 0x%x to gpa fail\n", - plane->base); - return -EINVAL; - } - - plane->stride = vgpu_vreg_t(vgpu, SPRSTRIDE(pipe)) & - _SPRITE_STRIDE_MASK; - - val = vgpu_vreg_t(vgpu, SPRSIZE(pipe)); - plane->height = (val & _SPRITE_SIZE_HEIGHT_MASK) >> - _SPRITE_SIZE_HEIGHT_SHIFT; - plane->width = (val & _SPRITE_SIZE_WIDTH_MASK) >> - _SPRITE_SIZE_WIDTH_SHIFT; - plane->height += 1; /* raw height is one minus the real value */ - plane->width += 1; /* raw width is one minus the real value */ - - val = vgpu_vreg_t(vgpu, SPRPOS(pipe)); - plane->x_pos = (val & _SPRITE_POS_X_MASK) >> _SPRITE_POS_X_SHIFT; - plane->y_pos = (val & _SPRITE_POS_Y_MASK) >> _SPRITE_POS_Y_SHIFT; - - val = vgpu_vreg_t(vgpu, SPROFFSET(pipe)); - plane->x_offset = (val & _SPRITE_OFFSET_START_X_MASK) >> - _SPRITE_OFFSET_START_X_SHIFT; - plane->y_offset = (val & _SPRITE_OFFSET_START_Y_MASK) >> - _SPRITE_OFFSET_START_Y_SHIFT; - - return 0; -} diff --git a/drivers/gpu/drm/i915/gvt/fb_decoder.h b/drivers/gpu/drm/i915/gvt/fb_decoder.h index fa6503900c84..436d43c0087b 100644 --- a/drivers/gpu/drm/i915/gvt/fb_decoder.h +++ b/drivers/gpu/drm/i915/gvt/fb_decoder.h @@ -156,7 +156,5 @@ int intel_vgpu_decode_primary_plane(struct intel_vgpu *vgpu, struct intel_vgpu_primary_plane_format *plane); int intel_vgpu_decode_cursor_plane(struct intel_vgpu *vgpu, struct intel_vgpu_cursor_plane_format *plane); -int intel_vgpu_decode_sprite_plane(struct intel_vgpu *vgpu, - struct intel_vgpu_sprite_plane_format *plane); #endif From patchwork Sun Dec 22 00:20:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Dr. David Alan Gilbert" X-Patchwork-Id: 13917955 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0E23BE7718B for ; Sun, 22 Dec 2024 00:21:02 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5571110E19F; Sun, 22 Dec 2024 00:21:01 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=treblig.org header.i=@treblig.org header.b="AYJwumjd"; dkim-atps=neutral Received: from mx.treblig.org (mx.treblig.org [IPv6:2a00:1098:5b::1]) by gabe.freedesktop.org (Postfix) with ESMTPS id 28AD810E163 for ; Sun, 22 Dec 2024 00:21:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=treblig.org ; s=bytemarkmx; h=MIME-Version:Message-ID:Date:Subject:From:Content-Type:From :Subject; bh=1bruFzOeZGedeEmzyy3gebb3G+WVopkhjQB23yNgkW0=; b=AYJwumjdYl/UNMMK GGQPS389rY6SApx3dsPzAUuA+e6+gYNyW3LJHY1O78ZEZbdwPX0DBybi4Fy8dAxJhRB3Cgk1yVl7T BR3tKOOW1TSEGYz7qFRjAr6AGtEwdg7ZrE/9uTOXFCRMRLyyQGA5gKNikvSdyGj8+5f4kCzvOg3ta l2KOHEPWR5iEDEFK2hJU+yrBGD+36U5I6enqdxzdmxNYk97asXTHriXe97Rc12ZgzQOxaB8zRphyJ yseafZBdvMwBmI7tJol2VkKmoeZCZRomje2U57oJKJVycHOVa9Ddb/u7pD000R4Y7C8Tzyq9jT2Sh +Z+Sdh4ByUh1W5JtjQ==; Received: from localhost ([127.0.0.1] helo=dalek.home.treblig.org) by mx.treblig.org with esmtp (Exim 4.96) (envelope-from ) id 1tP9iA-006iX5-1x; Sun, 22 Dec 2024 00:20:46 +0000 From: linux@treblig.org To: zhenyuw@linux.intel.com, zhi.wang.linux@gmail.com, jani.nikula@linux.intel.com, joonas.lahtinen@linux.intel.com, rodrigo.vivi@intel.com, tursulin@ursulin.net, intel-gvt-dev@lists.freedesktop.org, intel-gfx@lists.freedesktop.org Cc: airlied@gmail.com, simona@ffwll.ch, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, "Dr. David Alan Gilbert" Subject: [PATCH 3/3] drm/i915/gvt: Remove unused intel_gvt_in_force_nonpriv_whitelist Date: Sun, 22 Dec 2024 00:20:43 +0000 Message-ID: <20241222002043.173080-4-linux@treblig.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241222002043.173080-1-linux@treblig.org> References: <20241222002043.173080-1-linux@treblig.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: "Dr. David Alan Gilbert" The last use of intel_gvt_in_force_nonpriv_whitelist() was removed in 2020 by commit 02dd2b12a685 ("drm/i915/gvt: unify lri cmd handler and mmio handlers") Remove it. Signed-off-by: Dr. David Alan Gilbert --- drivers/gpu/drm/i915/gvt/handlers.c | 17 ----------------- drivers/gpu/drm/i915/gvt/mmio.h | 3 --- 2 files changed, 20 deletions(-) diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c index 9494d812c00a..7aca66dd12cd 100644 --- a/drivers/gpu/drm/i915/gvt/handlers.c +++ b/drivers/gpu/drm/i915/gvt/handlers.c @@ -3113,23 +3113,6 @@ int intel_vgpu_mask_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, return 0; } -/** - * intel_gvt_in_force_nonpriv_whitelist - if a mmio is in whitelist to be - * force-nopriv register - * - * @gvt: a GVT device - * @offset: register offset - * - * Returns: - * True if the register is in force-nonpriv whitelist; - * False if outside; - */ -bool intel_gvt_in_force_nonpriv_whitelist(struct intel_gvt *gvt, - unsigned int offset) -{ - return in_whitelist(offset); -} - /** * intel_vgpu_mmio_reg_rw - emulate tracked mmio registers * @vgpu: a vGPU diff --git a/drivers/gpu/drm/i915/gvt/mmio.h b/drivers/gpu/drm/i915/gvt/mmio.h index 32ebacb078e8..3dc912aba80b 100644 --- a/drivers/gpu/drm/i915/gvt/mmio.h +++ b/drivers/gpu/drm/i915/gvt/mmio.h @@ -96,9 +96,6 @@ int intel_vgpu_default_mmio_read(struct intel_vgpu *vgpu, unsigned int offset, int intel_vgpu_default_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, void *p_data, unsigned int bytes); -bool intel_gvt_in_force_nonpriv_whitelist(struct intel_gvt *gvt, - unsigned int offset); - int intel_vgpu_mmio_reg_rw(struct intel_vgpu *vgpu, unsigned int offset, void *pdata, unsigned int bytes, bool is_read);