From patchwork Sat Jan 4 07:52:21 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Akihiko Odaki X-Patchwork-Id: 13926138 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6EC19E77188 for ; Sat, 4 Jan 2025 07:52:55 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tTyxj-0000xt-JY; Sat, 04 Jan 2025 02:52:47 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tTyxh-0000xa-JE for qemu-devel@nongnu.org; Sat, 04 Jan 2025 02:52:45 -0500 Received: from mail-pl1-x62f.google.com ([2607:f8b0:4864:20::62f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tTyxf-00032J-Tu for qemu-devel@nongnu.org; Sat, 04 Jan 2025 02:52:45 -0500 Received: by mail-pl1-x62f.google.com with SMTP id d9443c01a7336-218c8aca5f1so228857415ad.0 for ; Fri, 03 Jan 2025 23:52:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=daynix-com.20230601.gappssmtp.com; s=20230601; t=1735977161; x=1736581961; darn=nongnu.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=ncj//1fVtuyUfAw467C/f6+0z34Dui3jJ5cwfgaMUy4=; b=gI4l0QdJ+h+Cydd/RN0nPd5gtOziGp0rfqf6af3LxmjO/wAAJGeMfY8dGDqA219kID tHD82yw89/fsiUJ9MDpHiHcwY83u98zXGPPKWBVoDbQfj/ATjvnmlenpA9neieQaOFis O9Oym+fS74oXsfJJ29VaBu6yb4wToluU0cA10mwl3fvDN1ENtN7czBNAJxUJAvkc+wto WLbbpKiJ7ZVE6xMlG4ZvlsKMfPbDSohjjebgxn4h/F2ETWTfdXf8uX7luq12wC3Yv1Vi c1WrDbrkGc0i2pFA6l9mWrq26xwG0GnpaqS+YL1HMPkBdzrSkKhsP6bz2GPa8v7cBkoo 3XPg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1735977161; x=1736581961; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ncj//1fVtuyUfAw467C/f6+0z34Dui3jJ5cwfgaMUy4=; b=kvm7PXsqacCkiC+uc8TIvEBdNxtqez4iTRfiTaKTCa1EMnvvqViPucSizJp72+HiWi 3YG7gyJm2oJqC4WE9b2C3G+Mo2nO9e+cJfQHNHptNXri8xvD3q6JQ0nbCx62S2cIbaZh LzKb6LoBB+CKf8YYCDWNE2gnlgnx2nF4Fb8VmfJOgMO1WRbXMhj0rk1lu7+xYdzAGeLw vnOgDimVAW2poZLngFq6RcfYSXT4ULZtPDVqsDF5NYBLhKsCBArOkTS8xAfvGVts7Dq/ A83Ye5eyusNaKKPJuGQtRDCWj1ORTGCIXM7lNXPC9l52abruO7ZkSPsuku897kn3HeJT uUUA== X-Gm-Message-State: AOJu0YzNCmLi9v56FNlRbnBiidz+Ymkj+ClBNbcziBWDUJNGdPXRSdfg B6fsE07dfOtA8CylP51rJ1PrCYBtWnyO4QC40swIqgJjG8pQP67hFA3tsqyZbv8l1GNAfTeSyBB 7b9o= X-Gm-Gg: ASbGncuPl8l+2ryqCHBPS0A++pFeLTv5PYbne5JAqIGb/fUePvatD0UlsDr+fhl5Xnk mUbFZqCl+D0NyrwigC2k4tPQD0xaY1jEsbw+s4bzhfqrKcAkHBZUIqhe2u0th58vnVV6V5VV+cZ sDkAMBYVgIuV8z+x5tRMBqrbYHhmikdMYXpXnR/jaCD0dXi6vy73Vb4BgVAhEbu/R+9CAXHxNX6 Bp5sREG/EfsGm+s8Y/M9sK+zRXzUTAj1ArY9BL/B06pMk6m4MEjgMCmhEzJ X-Google-Smtp-Source: AGHT+IG9AaS3tZXXMgp0VNaHGy3p0ib8tNcw2vJqqu5oefyYAhLLB7wB0si3Z6SXSjaopg0kpU/PuQ== X-Received: by 2002:a17:902:c406:b0:219:cdf1:a0b8 with SMTP id d9443c01a7336-219e6ebb28dmr767714575ad.30.1735977161511; Fri, 03 Jan 2025 23:52:41 -0800 (PST) Received: from localhost ([157.82.207.107]) by smtp.gmail.com with UTF8SMTPSA id d9443c01a7336-219dc964a8bsm255139195ad.8.2025.01.03.23.52.37 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 03 Jan 2025 23:52:41 -0800 (PST) From: Akihiko Odaki Date: Sat, 04 Jan 2025 16:52:21 +0900 Subject: [PATCH v18 01/14] hw/pci: Rename has_power to enabled MIME-Version: 1.0 Message-Id: <20250104-reuse-v18-1-c349eafd8673@daynix.com> References: <20250104-reuse-v18-0-c349eafd8673@daynix.com> In-Reply-To: <20250104-reuse-v18-0-c349eafd8673@daynix.com> To: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , "Michael S. Tsirkin" , Marcel Apfelbaum , Alex Williamson , =?utf-8?q?C=C3=A9dric_Le_Goa?= =?utf-8?q?ter?= , Paolo Bonzini , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Eduardo Habkost , Sriram Yagnaraman , Jason Wang , Keith Busch , Klaus Jensen , Markus Armbruster , Matthew Rosato , Eric Farman , Harsh Prateek Bora , Shivaprasad G Bhat Cc: qemu-devel@nongnu.org, qemu-block@nongnu.org, devel@daynix.com, Akihiko Odaki X-Mailer: b4 0.14-dev-fd6e3 Received-SPF: pass client-ip=2607:f8b0:4864:20::62f; envelope-from=akihiko.odaki@daynix.com; helo=mail-pl1-x62f.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The renamed state will not only represent powering state of PFs, but also represent SR-IOV VF enablement in the future. Signed-off-by: Akihiko Odaki Reviewed-by: Philippe Mathieu-Daudé --- include/hw/pci/pci.h | 7 ++++++- include/hw/pci/pci_device.h | 2 +- hw/pci/pci.c | 14 +++++++------- hw/pci/pci_host.c | 4 ++-- 4 files changed, 16 insertions(+), 11 deletions(-) diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index cefeb388bde5..c1e897f44143 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -674,6 +674,11 @@ static inline void pci_irq_deassert(PCIDevice *pci_dev) } MSIMessage pci_get_msi_message(PCIDevice *dev, int vector); -void pci_set_power(PCIDevice *pci_dev, bool state); +void pci_set_enabled(PCIDevice *pci_dev, bool state); + +static inline void pci_set_power(PCIDevice *pci_dev, bool state) +{ + pci_set_enabled(pci_dev, state); +} #endif diff --git a/include/hw/pci/pci_device.h b/include/hw/pci/pci_device.h index 8eaf0d58bb39..66b6c08b0118 100644 --- a/include/hw/pci/pci_device.h +++ b/include/hw/pci/pci_device.h @@ -57,7 +57,7 @@ typedef struct PCIReqIDCache PCIReqIDCache; struct PCIDevice { DeviceState qdev; bool partially_hotplugged; - bool has_power; + bool enabled; /* PCI config space */ uint8_t *config; diff --git a/hw/pci/pci.c b/hw/pci/pci.c index b6c630c32368..e1563d738ce2 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -1598,7 +1598,7 @@ static void pci_update_mappings(PCIDevice *d) continue; new_addr = pci_bar_address(d, i, r->type, r->size); - if (!d->has_power) { + if (!d->enabled) { new_addr = PCI_BAR_UNMAPPED; } @@ -1686,7 +1686,7 @@ void pci_default_write_config(PCIDevice *d, uint32_t addr, uint32_t val_in, int pci_update_irq_disabled(d, was_irq_disabled); memory_region_set_enabled(&d->bus_master_enable_region, (pci_get_word(d->config + PCI_COMMAND) - & PCI_COMMAND_MASTER) && d->has_power); + & PCI_COMMAND_MASTER) && d->enabled); } msi_write_config(d, addr, val_in, l); @@ -2961,18 +2961,18 @@ MSIMessage pci_get_msi_message(PCIDevice *dev, int vector) return msg; } -void pci_set_power(PCIDevice *d, bool state) +void pci_set_enabled(PCIDevice *d, bool state) { - if (d->has_power == state) { + if (d->enabled == state) { return; } - d->has_power = state; + d->enabled = state; pci_update_mappings(d); memory_region_set_enabled(&d->bus_master_enable_region, (pci_get_word(d->config + PCI_COMMAND) - & PCI_COMMAND_MASTER) && d->has_power); - if (!d->has_power) { + & PCI_COMMAND_MASTER) && d->enabled); + if (!d->enabled) { pci_device_reset(d); } } diff --git a/hw/pci/pci_host.c b/hw/pci/pci_host.c index 4510890dfc18..80f91f409f90 100644 --- a/hw/pci/pci_host.c +++ b/hw/pci/pci_host.c @@ -86,7 +86,7 @@ void pci_host_config_write_common(PCIDevice *pci_dev, uint32_t addr, * allowing direct removal of unexposed functions. */ if ((pci_dev->qdev.hotplugged && !pci_get_function_0(pci_dev)) || - !pci_dev->has_power || is_pci_dev_ejected(pci_dev)) { + !pci_dev->enabled || is_pci_dev_ejected(pci_dev)) { return; } @@ -111,7 +111,7 @@ uint32_t pci_host_config_read_common(PCIDevice *pci_dev, uint32_t addr, * allowing direct removal of unexposed functions. */ if ((pci_dev->qdev.hotplugged && !pci_get_function_0(pci_dev)) || - !pci_dev->has_power || is_pci_dev_ejected(pci_dev)) { + !pci_dev->enabled || is_pci_dev_ejected(pci_dev)) { return ~0x0; } From patchwork Sat Jan 4 07:52:22 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Akihiko Odaki X-Patchwork-Id: 13926140 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 063BAE77199 for ; Sat, 4 Jan 2025 07:53:04 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tTyxo-00012g-1U; Sat, 04 Jan 2025 02:52:52 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tTyxm-000124-Dr for qemu-devel@nongnu.org; Sat, 04 Jan 2025 02:52:50 -0500 Received: from mail-pj1-x102a.google.com ([2607:f8b0:4864:20::102a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tTyxk-00032i-T3 for qemu-devel@nongnu.org; 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Fri, 03 Jan 2025 23:52:47 -0800 (PST) Received: from localhost ([157.82.207.107]) by smtp.gmail.com with UTF8SMTPSA id d2e1a72fcca58-72af8dcff60sm18590051b3a.152.2025.01.03.23.52.43 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 03 Jan 2025 23:52:47 -0800 (PST) From: Akihiko Odaki Date: Sat, 04 Jan 2025 16:52:22 +0900 Subject: [PATCH v18 02/14] hw/ppc/spapr_pci: Do not create DT for disabled PCI device MIME-Version: 1.0 Message-Id: <20250104-reuse-v18-2-c349eafd8673@daynix.com> References: <20250104-reuse-v18-0-c349eafd8673@daynix.com> In-Reply-To: <20250104-reuse-v18-0-c349eafd8673@daynix.com> To: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , "Michael S. Tsirkin" , Marcel Apfelbaum , Alex Williamson , =?utf-8?q?C=C3=A9dric_Le_Goa?= =?utf-8?q?ter?= , Paolo Bonzini , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Eduardo Habkost , Sriram Yagnaraman , Jason Wang , Keith Busch , Klaus Jensen , Markus Armbruster , Matthew Rosato , Eric Farman , Harsh Prateek Bora , Shivaprasad G Bhat Cc: qemu-devel@nongnu.org, qemu-block@nongnu.org, devel@daynix.com, Akihiko Odaki X-Mailer: b4 0.14-dev-fd6e3 Received-SPF: pass client-ip=2607:f8b0:4864:20::102a; envelope-from=akihiko.odaki@daynix.com; helo=mail-pj1-x102a.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Disabled means it is a disabled SR-IOV VF and hidden from the guest. Do not create DT when starting the system and also keep the disabled PCI device not linked to DRC, which generates DT in case of hotplug. Signed-off-by: Akihiko Odaki Reviewed-by: Shivaprasad G Bhat Tested-by: Shivaprasad G Bhat --- hw/ppc/spapr_pci.c | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index 904227d9aa1f..b94e4ba1314f 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -1283,8 +1283,7 @@ static void spapr_dt_pci_device_cb(PCIBus *bus, PCIDevice *pdev, PciWalkFdt *p = opaque; int err; - if (p->err) { - /* Something's already broken, don't keep going */ + if (p->err || !pdev->enabled) { return; } @@ -1572,6 +1571,14 @@ static void spapr_pci_plug(HotplugHandler *plug_handler, SpaprDrc *drc = drc_from_dev(phb, pdev); uint32_t slotnr = PCI_SLOT(pdev->devfn); + /* + * If DR or the PCI device is disabled we don't need to do anything + * in the case of hotplug or coldplug callbacks. + */ + if (!pdev->enabled) { + return; + } + g_assert(drc); if (IS_PCI_BRIDGE(plugged_dev)) { @@ -1647,6 +1654,11 @@ static void spapr_pci_unplug_request(HotplugHandler *plug_handler, SpaprDrc *drc = drc_from_dev(phb, pdev); g_assert(drc); + + if (!drc->dev) { + return; + } + g_assert(drc->dev == plugged_dev); if (!spapr_drc_unplug_requested(drc)) { From patchwork Sat Jan 4 07:52:23 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Akihiko Odaki X-Patchwork-Id: 13926145 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 32C64E77188 for ; Sat, 4 Jan 2025 07:54:26 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tTyxv-0001DT-1f; Sat, 04 Jan 2025 02:52:59 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tTyxt-0001CY-QB for qemu-devel@nongnu.org; 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Tsirkin" , Marcel Apfelbaum , Alex Williamson , =?utf-8?q?C=C3=A9dric_Le_Goa?= =?utf-8?q?ter?= , Paolo Bonzini , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Eduardo Habkost , Sriram Yagnaraman , Jason Wang , Keith Busch , Klaus Jensen , Markus Armbruster , Matthew Rosato , Eric Farman , Harsh Prateek Bora , Shivaprasad G Bhat Cc: qemu-devel@nongnu.org, qemu-block@nongnu.org, devel@daynix.com, Akihiko Odaki X-Mailer: b4 0.14-dev-fd6e3 Received-SPF: pass client-ip=2607:f8b0:4864:20::630; envelope-from=akihiko.odaki@daynix.com; helo=mail-pl1-x630.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org A PF may automatically create VFs and the PF may be function 0. Signed-off-by: Akihiko Odaki Reviewed-by: Shivaprasad G Bhat Tested-by: Shivaprasad G Bhat --- hw/ppc/spapr_pci.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index b94e4ba1314f..e0a9d50edc3d 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -1549,7 +1549,9 @@ static void spapr_pci_pre_plug(HotplugHandler *plug_handler, * hotplug, we do not allow functions to be hotplugged to a * slot that already has function 0 present */ - if (plugged_dev->hotplugged && bus->devices[PCI_DEVFN(slotnr, 0)] && + if (plugged_dev->hotplugged && + !pci_is_vf(pdev) && + bus->devices[PCI_DEVFN(slotnr, 0)] && PCI_FUNC(pdev->devfn) != 0) { error_setg(errp, "PCI: slot %d function 0 already occupied by %s," " additional functions can no longer be exposed to guest.", From patchwork Sat Jan 4 07:52:24 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Akihiko Odaki X-Patchwork-Id: 13926141 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C9EDAE77188 for ; Sat, 4 Jan 2025 07:53:32 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tTyy8-0001QD-QC; Sat, 04 Jan 2025 02:53:13 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tTyxy-0001H3-ON for qemu-devel@nongnu.org; Sat, 04 Jan 2025 02:53:02 -0500 Received: from mail-pl1-x62f.google.com ([2607:f8b0:4864:20::62f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tTyxx-000344-74 for qemu-devel@nongnu.org; Sat, 04 Jan 2025 02:53:02 -0500 Received: by mail-pl1-x62f.google.com with SMTP id d9443c01a7336-21649a7bcdcso176406495ad.1 for ; Fri, 03 Jan 2025 23:53:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=daynix-com.20230601.gappssmtp.com; s=20230601; t=1735977180; x=1736581980; darn=nongnu.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=DRA5SFwLixA5p1Smgb33TcMmhiFuTV2U9nSiZzVSvuY=; b=KhK7lkjmCvPcimKd3LowOnDgIv/tZ/aNLqc+f9BGsvMMUNk8ZCnCswDnn+c9q7v2bf 2Gka+uKCgmNSW7K9EilDs/6QXlvb0fFAY+snM0fnd5u3/jTYnCKVv/VMC+Uk1zbiVkUb 54RFKIHur9U3TwJfG9uC7RWIRpaEVzCQ5bu+bCoJH+ILdrbruZ0QD3qKR1T4UeuYBZpy 56VoSW+CRM/HoC8wUXvf2cAyT853gRQ36g/lfzY9B1VRLEtvTngupZFdFVgEm0CII2Mp kEZIrJ6CyqXDPwbBlNP5oYQqptgizq3mwYhC+KLVWN7Xm0mfZazkMgSzbO7N6HXDTMlB dA1Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1735977180; x=1736581980; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=DRA5SFwLixA5p1Smgb33TcMmhiFuTV2U9nSiZzVSvuY=; b=QZtWIw3rQUZDYIkmRlpfXw68ZPo+vhUMbQN4tI9bgqtMbPiXtA1qysrIUba51GPDk/ hvW1fgxl7UoIrwWxOX3vC4MQSTLYaiQ/Xz3exmCWgdWmPoelOANEGtJHJuNClutWUIeg 4ogWZ9zykauxBOqklVPddEOU/rDKvk4FK+66JrnFgHQzTPZnSnUezJPjxBY5Tq+K+ZHW dm+jW/j7FPS4abCvKofte8RtZ0vm9UrLY8zkTHRoIBt3gS+6VmcypuTZxUd8aXJ1bQAs GlMK+fpYIArb4PcS6GxD39gejC7L6k7WaZct8njcU5pdLf7UW2MHbjgO77PsJneLoNUs sg8w== X-Gm-Message-State: AOJu0YwEjXVcTHaVDwn9Xv/Y6Q05JZ1hHAm5VFLvrbzYdIcw40E1EF3/ 6z0PGAaRulKGfGSlF1YyHj15KRQQliDC7BHtKF5DPdMlLQFDc26b69Xut54bLl4= X-Gm-Gg: ASbGncu7IJHT5eY0uqJwynZ5sJL7xn2BpyCF44siad+MUuPJhS2ifBEmSG+3JG261Fe XPYewPf76yYc+zb80xEwNVMkZqXSPVP8zrCwGAnMhd2J48xaYc4ABxdnXp+XOOkojAqnXwaYfqL qUR5Aa7GS4G5iCjsZr0bAnxNcdyCjZLOmE8rU1hhz8xnPhzFiGaNLV0s7OhlzMdnwH2HDleEmn/ qejP01A3ppLu1/Fkfm4u2V4vQKD7zjT1CyKQQ6JmQCM86CUWRbMOyFoCVlj X-Google-Smtp-Source: AGHT+IHsPO9c/m1yuEg5mf+TBn/tNlRwyfyQ3WC5KCu8ejCc4wAW43JYbhRNDvAz5XDtyKzwJhX+dw== X-Received: by 2002:a17:902:ce83:b0:216:5b8b:9062 with SMTP id d9443c01a7336-219e70dd21cmr775551145ad.54.1735977179942; Fri, 03 Jan 2025 23:52:59 -0800 (PST) Received: from localhost ([157.82.207.107]) by smtp.gmail.com with UTF8SMTPSA id d9443c01a7336-219dc9f693asm255751135ad.224.2025.01.03.23.52.55 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 03 Jan 2025 23:52:59 -0800 (PST) From: Akihiko Odaki Date: Sat, 04 Jan 2025 16:52:24 +0900 Subject: [PATCH v18 04/14] s390x/pci: Avoid creating zpci for VFs MIME-Version: 1.0 Message-Id: <20250104-reuse-v18-4-c349eafd8673@daynix.com> References: <20250104-reuse-v18-0-c349eafd8673@daynix.com> In-Reply-To: <20250104-reuse-v18-0-c349eafd8673@daynix.com> To: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , "Michael S. Tsirkin" , Marcel Apfelbaum , Alex Williamson , =?utf-8?q?C=C3=A9dric_Le_Goa?= =?utf-8?q?ter?= , Paolo Bonzini , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Eduardo Habkost , Sriram Yagnaraman , Jason Wang , Keith Busch , Klaus Jensen , Markus Armbruster , Matthew Rosato , Eric Farman , Harsh Prateek Bora , Shivaprasad G Bhat Cc: qemu-devel@nongnu.org, qemu-block@nongnu.org, devel@daynix.com, Akihiko Odaki X-Mailer: b4 0.14-dev-fd6e3 Received-SPF: pass client-ip=2607:f8b0:4864:20::62f; envelope-from=akihiko.odaki@daynix.com; helo=mail-pl1-x62f.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org VFs are automatically created by PF, and creating zpci for them will result in unexpected usage of fids. Currently QEMU does not support multifunction for s390x so we don't need zpci for VFs anyway. Signed-off-by: Akihiko Odaki --- hw/s390x/s390-pci-bus.c | 21 +++++++++++++++++++-- 1 file changed, 19 insertions(+), 2 deletions(-) diff --git a/hw/s390x/s390-pci-bus.c b/hw/s390x/s390-pci-bus.c index eead269cc285..8c5eb69f7d76 100644 --- a/hw/s390x/s390-pci-bus.c +++ b/hw/s390x/s390-pci-bus.c @@ -1080,6 +1080,16 @@ static void s390_pcihost_plug(HotplugHandler *hotplug_dev, DeviceState *dev, pbdev = s390_pci_find_dev_by_target(s, dev->id); if (!pbdev) { + /* + * VFs are automatically created by PF, and creating zpci for them + * will result in unexpected usage of fids. Currently QEMU does not + * support multifunction for s390x so we don't need zpci for VFs + * anyway. + */ + if (pci_is_vf(pdev)) { + return; + } + pbdev = s390_pci_device_new(s, dev->id, errp); if (!pbdev) { return; @@ -1167,7 +1177,10 @@ static void s390_pcihost_unplug(HotplugHandler *hotplug_dev, DeviceState *dev, int32_t devfn; pbdev = s390_pci_find_dev_by_pci(s, PCI_DEVICE(dev)); - g_assert(pbdev); + if (!pbdev) { + g_assert(pci_is_vf(pci_dev)); + return; + } s390_pci_generate_plug_event(HP_EVENT_STANDBY_TO_RESERVED, pbdev->fh, pbdev->fid); @@ -1206,7 +1219,11 @@ static void s390_pcihost_unplug_request(HotplugHandler *hotplug_dev, * we've checked the PCI device already (to prevent endless recursion). */ pbdev = s390_pci_find_dev_by_pci(s, PCI_DEVICE(dev)); - g_assert(pbdev); + if (!pbdev) { + g_assert(pci_is_vf(PCI_DEVICE(dev))); + return; + } + pbdev->pci_unplug_request_processed = true; qdev_unplug(DEVICE(pbdev), errp); } else if (object_dynamic_cast(OBJECT(dev), TYPE_S390_PCI_DEVICE)) { From patchwork Sat Jan 4 07:52:25 2025 Content-Type: text/plain; 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Fri, 03 Jan 2025 23:53:06 -0800 (PST) Received: from localhost ([157.82.207.107]) by smtp.gmail.com with UTF8SMTPSA id d9443c01a7336-219dc9d4645sm256898795ad.168.2025.01.03.23.53.02 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 03 Jan 2025 23:53:05 -0800 (PST) From: Akihiko Odaki Date: Sat, 04 Jan 2025 16:52:25 +0900 Subject: [PATCH v18 05/14] s390x/pci: Allow plugging SR-IOV devices MIME-Version: 1.0 Message-Id: <20250104-reuse-v18-5-c349eafd8673@daynix.com> References: <20250104-reuse-v18-0-c349eafd8673@daynix.com> In-Reply-To: <20250104-reuse-v18-0-c349eafd8673@daynix.com> To: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , "Michael S. Tsirkin" , Marcel Apfelbaum , Alex Williamson , =?utf-8?q?C=C3=A9dric_Le_Goa?= =?utf-8?q?ter?= , Paolo Bonzini , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Eduardo Habkost , Sriram Yagnaraman , Jason Wang , Keith Busch , Klaus Jensen , Markus Armbruster , Matthew Rosato , Eric Farman , Harsh Prateek Bora , Shivaprasad G Bhat Cc: qemu-devel@nongnu.org, qemu-block@nongnu.org, devel@daynix.com, Akihiko Odaki X-Mailer: b4 0.14-dev-fd6e3 Received-SPF: pass client-ip=2607:f8b0:4864:20::636; envelope-from=akihiko.odaki@daynix.com; helo=mail-pl1-x636.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The guest cannot use VFs due to the lack of multifunction support but can use PFs. Signed-off-by: Akihiko Odaki --- hw/s390x/s390-pci-bus.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/hw/s390x/s390-pci-bus.c b/hw/s390x/s390-pci-bus.c index 8c5eb69f7d76..c396d55c7240 100644 --- a/hw/s390x/s390-pci-bus.c +++ b/hw/s390x/s390-pci-bus.c @@ -974,7 +974,14 @@ static void s390_pcihost_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev, if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { PCIDevice *pdev = PCI_DEVICE(dev); - if (pdev->cap_present & QEMU_PCI_CAP_MULTIFUNCTION) { + /* + * Multifunction is not supported due to the lack of CLP. However, + * do not check for multifunction capability for SR-IOV devices because + * SR-IOV devices automatically add the multifunction capability whether + * the user intends to use the functions other than the PF. + */ + if (pdev->cap_present & QEMU_PCI_CAP_MULTIFUNCTION && + !pdev->exp.sriov_cap) { error_setg(errp, "multifunction not supported in s390"); return; } From patchwork Sat Jan 4 07:52:26 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Akihiko Odaki X-Patchwork-Id: 13926144 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B859AE77188 for ; Sat, 4 Jan 2025 07:54:16 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tTyyR-0001pQ-A7; Sat, 04 Jan 2025 02:53:35 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tTyyN-0001iA-LZ for qemu-devel@nongnu.org; Sat, 04 Jan 2025 02:53:27 -0500 Received: from mail-pl1-x631.google.com ([2607:f8b0:4864:20::631]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tTyy9-00035E-Ac for qemu-devel@nongnu.org; Sat, 04 Jan 2025 02:53:15 -0500 Received: by mail-pl1-x631.google.com with SMTP id d9443c01a7336-2164b662090so159264555ad.1 for ; Fri, 03 Jan 2025 23:53:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=daynix-com.20230601.gappssmtp.com; s=20230601; t=1735977192; x=1736581992; darn=nongnu.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=ZwhofAKjVKmkEhd1Cibtf+dlD6/Lpkqp1XwfNb60dic=; b=mHs6pOQQMf4aHycktc8g0L8NQSud1MedAjNI0R+0WBaSnsxstONGSPr52TtDnahBs0 QXfTy2/wy/YNUidpKulRo+fD+SaxeTf/Bh/jH2vJx5A5xYvGb5UsYRgAdyw6+vI/baVK 4/nCqITqNdX+TgGf8ydQHUSXbnOlewys90yq/Wo2nHW84lq0uJKaj7Ekard48xm3PQnQ QWqKhQZxVbWCSFDIMzToRkAQP2Yu2wZKWfZWS/1tAyFYgAmtV5J9tdfr416mUdQk9io5 TUFxYh7xWwdzTFVUAp5jqN/I3q6OsNo9Zav0ABcFyHXkFAuFsAnyYT+3GT6Vd4L/SmnB q2MQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1735977192; x=1736581992; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ZwhofAKjVKmkEhd1Cibtf+dlD6/Lpkqp1XwfNb60dic=; b=KCpbtejJxyORLITEOlZJVLwZt9srUhhzPeTz3g3P/hNH2+w1Hev+XQGl2cXItntZne umoAAbUAF7zA0HTq2BS8AGl2Xn0yF4EqwO2Ai6Hu4sNmVl5+zQI4NP3EUSRNwhfgF6pq ALffqE1pLFrloHTeOsplLKszRlWo52vMX4XCZFz/7nWjM/3keHVEwfQv90EwA7Mn2pY1 fGCI4dsEkjk6B5lGW/eU1mHo4uBkVpfIoDWKYpKsikMRQISBHDLuqHukQsjtaQlajHTp UBk5q/xumVy5bbYdGQWC/3xhByCc1lKV3ilMTTFAvd8AtB2Rv4kTEsKvLGNvbh82sdkz imEg== X-Gm-Message-State: AOJu0YyCrpbBzuVWM3WcwP7g+ch6w846uh0BqZY6zY6/dThORBIr29w+ CgOR3L+WgUS7IQkyTTuXJvr3YEWZeBo5jSJ1Yp2o16P5pyn53vNP7qMaKi5OxSr2jsVpVgFgnhY uREQ= X-Gm-Gg: ASbGncvbXjyW1Nwvguj8Sx/uAPqwqhHtTEy/484JzQ9JdV5p7mR1h5N8y8pKtIn7Ia6 WLP4UQvNku5D0LlEbZhMzQr/sKcltr1tfGN1MpjCekPP17sCw8gdoQhHHgzgv9osYegcDnzJLMy zvxMcb3iNRIk0nTk09DNZuizVX1yW/nQJkrjA92xA77fuwW1edUYmnsUULxzXEZtB/aSflkE6Ke Hey6FvT3Jw3Mux5LPI07Dz8W/FZ92/XJ2sCzSdEA810CWtk+ZStrQZa1gXS X-Google-Smtp-Source: AGHT+IFd9Ka0tE/xl6rRoN3Y6pC2tTaDB45q1tVZGRb6rqHzwPVqdsc7wi9zfo+a43GXuONMsUUkSw== X-Received: by 2002:a05:6a21:898e:b0:1e0:d837:c929 with SMTP id adf61e73a8af0-1e606dfe7f7mr58475545637.9.1735977192087; Fri, 03 Jan 2025 23:53:12 -0800 (PST) Received: from localhost ([157.82.207.107]) by smtp.gmail.com with UTF8SMTPSA id d2e1a72fcca58-72aad8fd610sm27368736b3a.136.2025.01.03.23.53.08 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 03 Jan 2025 23:53:11 -0800 (PST) From: Akihiko Odaki Date: Sat, 04 Jan 2025 16:52:26 +0900 Subject: [PATCH v18 06/14] s390x/pci: Check for multifunction after device realization MIME-Version: 1.0 Message-Id: <20250104-reuse-v18-6-c349eafd8673@daynix.com> References: <20250104-reuse-v18-0-c349eafd8673@daynix.com> In-Reply-To: <20250104-reuse-v18-0-c349eafd8673@daynix.com> To: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , "Michael S. Tsirkin" , Marcel Apfelbaum , Alex Williamson , =?utf-8?q?C=C3=A9dric_Le_Goa?= =?utf-8?q?ter?= , Paolo Bonzini , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Eduardo Habkost , Sriram Yagnaraman , Jason Wang , Keith Busch , Klaus Jensen , Markus Armbruster , Matthew Rosato , Eric Farman , Harsh Prateek Bora , Shivaprasad G Bhat Cc: qemu-devel@nongnu.org, qemu-block@nongnu.org, devel@daynix.com, Akihiko Odaki X-Mailer: b4 0.14-dev-fd6e3 Received-SPF: pass client-ip=2607:f8b0:4864:20::631; envelope-from=akihiko.odaki@daynix.com; helo=mail-pl1-x631.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The SR-IOV PFs set the multifunction bit during device realization so check them after that. There is no functional change because we explicitly ignore the multifunction bit for SR-IOV devices. Signed-off-by: Akihiko Odaki --- hw/s390x/s390-pci-bus.c | 28 +++++++++++++--------------- 1 file changed, 13 insertions(+), 15 deletions(-) diff --git a/hw/s390x/s390-pci-bus.c b/hw/s390x/s390-pci-bus.c index c396d55c7240..913d72cc7480 100644 --- a/hw/s390x/s390-pci-bus.c +++ b/hw/s390x/s390-pci-bus.c @@ -971,21 +971,7 @@ static void s390_pcihost_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev, "this device"); } - if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { - PCIDevice *pdev = PCI_DEVICE(dev); - - /* - * Multifunction is not supported due to the lack of CLP. However, - * do not check for multifunction capability for SR-IOV devices because - * SR-IOV devices automatically add the multifunction capability whether - * the user intends to use the functions other than the PF. - */ - if (pdev->cap_present & QEMU_PCI_CAP_MULTIFUNCTION && - !pdev->exp.sriov_cap) { - error_setg(errp, "multifunction not supported in s390"); - return; - } - } else if (object_dynamic_cast(OBJECT(dev), TYPE_S390_PCI_DEVICE)) { + if (object_dynamic_cast(OBJECT(dev), TYPE_S390_PCI_DEVICE)) { S390PCIBusDevice *pbdev = S390_PCI_DEVICE(dev); if (!s390_pci_alloc_idx(s, pbdev)) { @@ -1076,6 +1062,18 @@ static void s390_pcihost_plug(HotplugHandler *hotplug_dev, DeviceState *dev, } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { pdev = PCI_DEVICE(dev); + /* + * Multifunction is not supported due to the lack of CLP. However, + * do not check for multifunction capability for SR-IOV devices because + * SR-IOV devices automatically add the multifunction capability whether + * the user intends to use the functions other than the PF. + */ + if (pdev->cap_present & QEMU_PCI_CAP_MULTIFUNCTION && + !pdev->exp.sriov_cap) { + error_setg(errp, "multifunction not supported in s390"); + return; + } + if (!dev->id) { /* In the case the PCI device does not define an id */ /* we generate one based on the PCI address */ From patchwork Sat Jan 4 07:52:27 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Akihiko Odaki X-Patchwork-Id: 13926149 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 18F5EE77188 for ; Sat, 4 Jan 2025 07:55:00 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tTyyj-0002HH-6P; Sat, 04 Jan 2025 02:53:49 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tTyyP-0001oX-Gi for qemu-devel@nongnu.org; Sat, 04 Jan 2025 02:53:30 -0500 Received: from mail-pl1-x633.google.com ([2607:f8b0:4864:20::633]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tTyyN-00035j-DY for qemu-devel@nongnu.org; Sat, 04 Jan 2025 02:53:29 -0500 Received: by mail-pl1-x633.google.com with SMTP id d9443c01a7336-21628b3fe7dso176370705ad.3 for ; Fri, 03 Jan 2025 23:53:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=daynix-com.20230601.gappssmtp.com; s=20230601; t=1735977198; x=1736581998; darn=nongnu.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=hv2QfKl+6DpBVBsf1lBiBYw2dBxJGAO5vrLmLAhJfjM=; b=oqNEkIlkDqe9xJZLsZZMk2xeD310d4Dv+6+YPhN8a/2QDNwx6lPQ+HaUkU6it+A63W WBDwcbWS5X0q1M8hCCQIUbH933Kn8SgLHHWgzrb7zcU92ITtDZ4aZoycwkajYhZyK+6v pteDagFgJ7DiRStscVgj7H7h94OB5D7gowgEtKBBJE/d0I8MtR4ZxTaSk8T7qEBnxwFz IShLDuwU8xLqofEfCqGkKOWH/EiJmMv2wYYhhrUU8otKwbtfZTZbcsQiHq0ojtpfjIGr OUDb5tXW52ElL8b1LyeXETb/S7geSi1ZTd8tfgqRD9SZ/CTAoocZBY33A2i+IIZ0zRLa H3Uw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1735977198; x=1736581998; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=hv2QfKl+6DpBVBsf1lBiBYw2dBxJGAO5vrLmLAhJfjM=; b=L+wvPValKQi+4USdU590zPmnIYqEH1LF8DhhxI80PshH4aGPHhLCkE2SX6TIjKk8bn f82KlxArFpfMOHpsJkL9MqSy+YiWDeCKANbR5EZciHXyxoue0iKjVp8JvhxwjlUTieft z/7lSsZpMof4OHepl+C6nFmY0fKVFzvpGel+Mm08HmjH/InaqAdeQTVs/D0K/IPmSjGm uEfp7Wl8mZh8wu70jqX8DWt+n7TkLrytFcdfRM+ZVfQ7YMaNyb/liIoWtEV493RzOyPI /x5bU9Ur66+WUTOlvrgbzoreLs4ViDjVIM+yUOWShrBTKe1aH5RVH73b2UN2dSj+ReHz sNiA== X-Gm-Message-State: AOJu0Yy//7YDFTZtNMNFL3UdZyLkY5ZhnLmZBQluHPn+tHVhQtcxTz1Y RQDoClrVYj625JKufGi81rn7X6mtveEVZxJ8K6p4O9eNak5lmAlm6G5gnwi+qKU= X-Gm-Gg: ASbGnctyOXXDWvkFG7mTi3yCQIFfe7VIH4DvLIODaXanyea1RqGDaOOFuDY/Qc/MqE0 SFq35Dw6BlX3znSWxXR++1SLft5uECKy1jP8t2nw00omxtvsuFoVdJ6XJZYiLjkL8l8YK9ao2GQ Hebiwn4HgDQ3VFwrrdETn88oukZxdVS9WbAps/DpiFc0NsIV9hZh9B22j4GWwdq9g8cp0EB7q8u Cd+7RhNWJxAHmeXj8a/mxjsz/Y4FAJXK2uQczM5XudGV+FCxTUHF/1c0Dco X-Google-Smtp-Source: AGHT+IHOPDnneLjYCpwDBiPJLUVuIi4azUvarxq9rxPGcaV6XcgH7kwXlXbVy8QtGKA0djL7yI79Pg== X-Received: by 2002:a17:903:2345:b0:215:9a73:6c45 with SMTP id d9443c01a7336-219e6e9dee3mr768037195ad.22.1735977198221; Fri, 03 Jan 2025 23:53:18 -0800 (PST) Received: from localhost ([157.82.207.107]) by smtp.gmail.com with UTF8SMTPSA id d9443c01a7336-219dc9f6156sm247884315ad.209.2025.01.03.23.53.14 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 03 Jan 2025 23:53:17 -0800 (PST) From: Akihiko Odaki Date: Sat, 04 Jan 2025 16:52:27 +0900 Subject: [PATCH v18 07/14] pcie_sriov: Do not manually unrealize MIME-Version: 1.0 Message-Id: <20250104-reuse-v18-7-c349eafd8673@daynix.com> References: <20250104-reuse-v18-0-c349eafd8673@daynix.com> In-Reply-To: <20250104-reuse-v18-0-c349eafd8673@daynix.com> To: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , "Michael S. Tsirkin" , Marcel Apfelbaum , Alex Williamson , =?utf-8?q?C=C3=A9dric_Le_Goa?= =?utf-8?q?ter?= , Paolo Bonzini , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Eduardo Habkost , Sriram Yagnaraman , Jason Wang , Keith Busch , Klaus Jensen , Markus Armbruster , Matthew Rosato , Eric Farman , Harsh Prateek Bora , Shivaprasad G Bhat Cc: qemu-devel@nongnu.org, qemu-block@nongnu.org, devel@daynix.com, Akihiko Odaki X-Mailer: b4 0.14-dev-fd6e3 Received-SPF: pass client-ip=2607:f8b0:4864:20::633; envelope-from=akihiko.odaki@daynix.com; helo=mail-pl1-x633.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org A device gets automatically unrealized when being unparented. Signed-off-by: Akihiko Odaki --- hw/pci/pcie_sriov.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/hw/pci/pcie_sriov.c b/hw/pci/pcie_sriov.c index e9b23221d713..499becd5273f 100644 --- a/hw/pci/pcie_sriov.c +++ b/hw/pci/pcie_sriov.c @@ -204,11 +204,7 @@ static void unregister_vfs(PCIDevice *dev) trace_sriov_unregister_vfs(dev->name, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn), num_vfs); for (i = 0; i < num_vfs; i++) { - Error *err = NULL; PCIDevice *vf = dev->exp.sriov_pf.vf[i]; - if (!object_property_set_bool(OBJECT(vf), "realized", false, &err)) { - error_reportf_err(err, "Failed to unplug: "); - } object_unparent(OBJECT(vf)); object_unref(OBJECT(vf)); } From patchwork Sat Jan 4 07:52:28 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Akihiko Odaki X-Patchwork-Id: 13926142 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5BC71E77188 for ; Sat, 4 Jan 2025 07:53:57 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tTyyb-00029f-Up; Sat, 04 Jan 2025 02:53:43 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tTyyR-0001sB-Eq for qemu-devel@nongnu.org; Sat, 04 Jan 2025 02:53:35 -0500 Received: from mail-pl1-x635.google.com ([2607:f8b0:4864:20::635]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tTyyN-000364-EL for qemu-devel@nongnu.org; Sat, 04 Jan 2025 02:53:30 -0500 Received: by mail-pl1-x635.google.com with SMTP id d9443c01a7336-216426b0865so177646095ad.0 for ; Fri, 03 Jan 2025 23:53:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=daynix-com.20230601.gappssmtp.com; s=20230601; t=1735977204; x=1736582004; darn=nongnu.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=xwODeiAmUKin1dC/nSDAdnrtbdfpKWFdm1CDRITC1UE=; b=Yq5E2LUrD0wx0AsupB2GmNySNnRNjL+ks0+TbcRyqNwJXeuFBdgC2sBpBEim5Ps4sx cpL3pnjy3ooUIIFF172v12wkTZ7D6zN3ZxC7boM2FXNYa5DdWip1cjWrnzU4qZbk1v/s 8FwF3C2NjmlBnZ49uUQRffgIAzEzZvnmYUzhwsXXRfLwtGb/dTTvEKmeCpSnKNDP55Hf pFF4iDR88SAW2iUb+69+s5ZPd/TiHxAqb02fw7+4/UdNoKPLR9ahtHvey4BXaMoq6ZCH 2359wUxH6iDGbC6DDh708+l5ZS3ERGv10WxNMSUdV2Cz7p89pK05chfAI5mhI/V3x+EM VrTQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1735977204; x=1736582004; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=xwODeiAmUKin1dC/nSDAdnrtbdfpKWFdm1CDRITC1UE=; b=NWA5Fenf6d3Ij5LRS6Pkig0fQsRke4dwVbGMyzE3YGCORl9TJz1bxSqD+aN4vrH2r7 NFrV/jnkKP2uWwLYKeijbZXmnn3Aiogb1q1FyQ1zVu/ObfVA+cew1RkOwArt31vYZ4kr /ibOIh+7LmbzSV2gKbnYaSlIbI4okE3XrvvWb+H+FVM+8hsWFB74tZYNgcELOgog3yH6 ahCejaSDEAfj0w8w8Uw8fqEbZLvqDtxsGtaYqpSlqk4D93zO4pSNR3MwJRaz+ZcDDNIR XH/2SteDY43uNH1fCPi+tkYpfrHtni2jAzKZVz7nvsExu/pHnuCsXp7p0Ack1oPn8/YZ 0cLQ== X-Gm-Message-State: AOJu0YzDpLN2zF1GH6jxPOlJSzWFeT5Hv6VhKH8mZ2uRayi7vmJjQPk0 gDAFGf7CuOgO5RgIh+ROK9IFchF2nTzHNl1NIbx4fBmsS0JmLvcTpEGOhdO/iWQ= X-Gm-Gg: ASbGncv0d+WLph0y/IwhHPGK7K8Cpj6LJ9i2C0STcgrP7ma+vL1PJRS5BxG7hlOef0O kJYjb7Z5pd44Y/a+O/4szBVBQsCNmp4w3fux2Qlnt5mWMlWT85SnYnJsv24OdwZOYbvQSKbTCt5 svF3UXdf+P30+mc2JA8lPFBRlX8hGq0RGucx3VBUy+tMpVWs4fAqDH2jJdfslqEh2tSmHXplRUj J7Vt71U50vtVhUWW2RHjhxajHUvVOqY0AbSe9giCFlk915X01AURse81EHK X-Google-Smtp-Source: AGHT+IGOieOECPlYxJnB1vFEmdsQSupu2cPD80tNgz8Fub0I5WdeNt/0GSDeeDe86TV7iXSK51nx+Q== X-Received: by 2002:a17:902:d48c:b0:216:5b8b:232c with SMTP id d9443c01a7336-219e6f284efmr709998305ad.54.1735977204442; Fri, 03 Jan 2025 23:53:24 -0800 (PST) Received: from localhost ([157.82.207.107]) by smtp.gmail.com with UTF8SMTPSA id d9443c01a7336-219dc96e883sm256319135ad.72.2025.01.03.23.53.20 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 03 Jan 2025 23:53:24 -0800 (PST) From: Akihiko Odaki Date: Sat, 04 Jan 2025 16:52:28 +0900 Subject: [PATCH v18 08/14] pcie_sriov: Ensure VF addr does not overflow MIME-Version: 1.0 Message-Id: <20250104-reuse-v18-8-c349eafd8673@daynix.com> References: <20250104-reuse-v18-0-c349eafd8673@daynix.com> In-Reply-To: <20250104-reuse-v18-0-c349eafd8673@daynix.com> To: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , "Michael S. Tsirkin" , Marcel Apfelbaum , Alex Williamson , =?utf-8?q?C=C3=A9dric_Le_Goa?= =?utf-8?q?ter?= , Paolo Bonzini , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Eduardo Habkost , Sriram Yagnaraman , Jason Wang , Keith Busch , Klaus Jensen , Markus Armbruster , Matthew Rosato , Eric Farman , Harsh Prateek Bora , Shivaprasad G Bhat Cc: qemu-devel@nongnu.org, qemu-block@nongnu.org, devel@daynix.com, Akihiko Odaki X-Mailer: b4 0.14-dev-fd6e3 Received-SPF: pass client-ip=2607:f8b0:4864:20::635; envelope-from=akihiko.odaki@daynix.com; helo=mail-pl1-x635.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org pci_new() aborts when creating a VF with addr >= PCI_DEVFN_MAX. Signed-off-by: Akihiko Odaki --- docs/pcie_sriov.txt | 8 +++++--- include/hw/pci/pcie_sriov.h | 5 +++-- hw/net/igb.c | 10 +++++++--- hw/nvme/ctrl.c | 22 ++++++++++++++-------- hw/pci/pcie_sriov.c | 14 ++++++++++++-- 5 files changed, 41 insertions(+), 18 deletions(-) diff --git a/docs/pcie_sriov.txt b/docs/pcie_sriov.txt index a47aad0bfab0..ab2142807f79 100644 --- a/docs/pcie_sriov.txt +++ b/docs/pcie_sriov.txt @@ -52,9 +52,11 @@ setting up a BAR for a VF. ... /* Add and initialize the SR/IOV capability */ - pcie_sriov_pf_init(d, 0x200, "your_virtual_dev", - vf_devid, initial_vfs, total_vfs, - fun_offset, stride); + if (!pcie_sriov_pf_init(d, 0x200, "your_virtual_dev", + vf_devid, initial_vfs, total_vfs, + fun_offset, stride, errp)) { + return; + } /* Set up individual VF BARs (parameters as for normal BARs) */ pcie_sriov_pf_init_vf_bar( ... ) diff --git a/include/hw/pci/pcie_sriov.h b/include/hw/pci/pcie_sriov.h index 450cbef6c201..aa704e8f9d9f 100644 --- a/include/hw/pci/pcie_sriov.h +++ b/include/hw/pci/pcie_sriov.h @@ -27,10 +27,11 @@ typedef struct PCIESriovVF { uint16_t vf_number; /* Logical VF number of this function */ } PCIESriovVF; -void pcie_sriov_pf_init(PCIDevice *dev, uint16_t offset, +bool pcie_sriov_pf_init(PCIDevice *dev, uint16_t offset, const char *vfname, uint16_t vf_dev_id, uint16_t init_vfs, uint16_t total_vfs, - uint16_t vf_offset, uint16_t vf_stride); + uint16_t vf_offset, uint16_t vf_stride, + Error **errp); void pcie_sriov_pf_exit(PCIDevice *dev); /* Set up a VF bar in the SR/IOV bar area */ diff --git a/hw/net/igb.c b/hw/net/igb.c index 4d93ce629f95..c965fc2fb68a 100644 --- a/hw/net/igb.c +++ b/hw/net/igb.c @@ -446,9 +446,13 @@ static void igb_pci_realize(PCIDevice *pci_dev, Error **errp) pcie_ari_init(pci_dev, 0x150); - pcie_sriov_pf_init(pci_dev, IGB_CAP_SRIOV_OFFSET, TYPE_IGBVF, - IGB_82576_VF_DEV_ID, IGB_MAX_VF_FUNCTIONS, IGB_MAX_VF_FUNCTIONS, - IGB_VF_OFFSET, IGB_VF_STRIDE); + if (!pcie_sriov_pf_init(pci_dev, IGB_CAP_SRIOV_OFFSET, TYPE_IGBVF, + IGB_82576_VF_DEV_ID, IGB_MAX_VF_FUNCTIONS, + IGB_MAX_VF_FUNCTIONS, IGB_VF_OFFSET, IGB_VF_STRIDE, + errp)) { + igb_cleanup_msix(s); + return; + } pcie_sriov_pf_init_vf_bar(pci_dev, IGBVF_MMIO_BAR_IDX, PCI_BASE_ADDRESS_MEM_TYPE_64 | PCI_BASE_ADDRESS_MEM_PREFETCH, diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c index 68903d1d7067..8175751518f8 100644 --- a/hw/nvme/ctrl.c +++ b/hw/nvme/ctrl.c @@ -8481,7 +8481,8 @@ out: return pow2ceil(bar_size); } -static void nvme_init_sriov(NvmeCtrl *n, PCIDevice *pci_dev, uint16_t offset) +static bool nvme_init_sriov(NvmeCtrl *n, PCIDevice *pci_dev, uint16_t offset, + Error **errp) { uint16_t vf_dev_id = n->params.use_intel_id ? PCI_DEVICE_ID_INTEL_NVME : PCI_DEVICE_ID_REDHAT_NVME; @@ -8490,12 +8491,16 @@ static void nvme_init_sriov(NvmeCtrl *n, PCIDevice *pci_dev, uint16_t offset) le16_to_cpu(cap->vifrsm), NULL, NULL); - pcie_sriov_pf_init(pci_dev, offset, "nvme", vf_dev_id, - n->params.sriov_max_vfs, n->params.sriov_max_vfs, - NVME_VF_OFFSET, NVME_VF_STRIDE); + if (!pcie_sriov_pf_init(pci_dev, offset, "nvme", vf_dev_id, + n->params.sriov_max_vfs, n->params.sriov_max_vfs, + NVME_VF_OFFSET, NVME_VF_STRIDE, errp)) { + return false; + } pcie_sriov_pf_init_vf_bar(pci_dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY | PCI_BASE_ADDRESS_MEM_TYPE_64, bar_size); + + return true; } static int nvme_add_pm_capability(PCIDevice *pci_dev, uint8_t offset) @@ -8620,6 +8625,11 @@ static bool nvme_init_pci(NvmeCtrl *n, PCIDevice *pci_dev, Error **errp) return false; } + if (!pci_is_vf(pci_dev) && n->params.sriov_max_vfs && + !nvme_init_sriov(n, pci_dev, 0x120, errp)) { + return false; + } + nvme_update_msixcap_ts(pci_dev, n->conf_msix_qsize); pcie_cap_deverr_init(pci_dev); @@ -8649,10 +8659,6 @@ static bool nvme_init_pci(NvmeCtrl *n, PCIDevice *pci_dev, Error **errp) nvme_init_pmr(n, pci_dev); } - if (!pci_is_vf(pci_dev) && n->params.sriov_max_vfs) { - nvme_init_sriov(n, pci_dev, 0x120); - } - return true; } diff --git a/hw/pci/pcie_sriov.c b/hw/pci/pcie_sriov.c index 499becd5273f..91c64c988eb4 100644 --- a/hw/pci/pcie_sriov.c +++ b/hw/pci/pcie_sriov.c @@ -24,14 +24,22 @@ static PCIDevice *register_vf(PCIDevice *pf, int devfn, const char *name, uint16_t vf_num); static void unregister_vfs(PCIDevice *dev); -void pcie_sriov_pf_init(PCIDevice *dev, uint16_t offset, +bool pcie_sriov_pf_init(PCIDevice *dev, uint16_t offset, const char *vfname, uint16_t vf_dev_id, uint16_t init_vfs, uint16_t total_vfs, - uint16_t vf_offset, uint16_t vf_stride) + uint16_t vf_offset, uint16_t vf_stride, + Error **errp) { + int32_t devfn = dev->devfn + vf_offset; uint8_t *cfg = dev->config + offset; uint8_t *wmask; + if (total_vfs && + (uint32_t)devfn + (uint32_t)(total_vfs - 1) * vf_stride >= PCI_DEVFN_MAX) { + error_setg(errp, "VF addr overflows"); + return false; + } + pcie_add_capability(dev, PCI_EXT_CAP_ID_SRIOV, 1, offset, PCI_EXT_CAP_SRIOV_SIZEOF); dev->exp.sriov_cap = offset; @@ -69,6 +77,8 @@ void pcie_sriov_pf_init(PCIDevice *dev, uint16_t offset, pci_set_word(wmask + PCI_SRIOV_SYS_PGSIZE, 0x553); qdev_prop_set_bit(&dev->qdev, "multifunction", true); + + return true; } void pcie_sriov_pf_exit(PCIDevice *dev) From patchwork Sat Jan 4 07:52:29 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Akihiko Odaki X-Patchwork-Id: 13926143 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 12CBCE77197 for ; Sat, 4 Jan 2025 07:53:58 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tTyyk-0002RR-VM; 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Fri, 03 Jan 2025 23:53:30 -0800 (PST) Received: from localhost ([157.82.207.107]) by smtp.gmail.com with UTF8SMTPSA id d2e1a72fcca58-72aad815796sm28340967b3a.28.2025.01.03.23.53.26 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 03 Jan 2025 23:53:30 -0800 (PST) From: Akihiko Odaki Date: Sat, 04 Jan 2025 16:52:29 +0900 Subject: [PATCH v18 09/14] pcie_sriov: Reuse SR-IOV VF device instances MIME-Version: 1.0 Message-Id: <20250104-reuse-v18-9-c349eafd8673@daynix.com> References: <20250104-reuse-v18-0-c349eafd8673@daynix.com> In-Reply-To: <20250104-reuse-v18-0-c349eafd8673@daynix.com> To: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , "Michael S. Tsirkin" , Marcel Apfelbaum , Alex Williamson , =?utf-8?q?C=C3=A9dric_Le_Goa?= =?utf-8?q?ter?= , Paolo Bonzini , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Eduardo Habkost , Sriram Yagnaraman , Jason Wang , Keith Busch , Klaus Jensen , Markus Armbruster , Matthew Rosato , Eric Farman , Harsh Prateek Bora , Shivaprasad G Bhat Cc: qemu-devel@nongnu.org, qemu-block@nongnu.org, devel@daynix.com, Akihiko Odaki X-Mailer: b4 0.14-dev-fd6e3 Received-SPF: pass client-ip=2607:f8b0:4864:20::62c; envelope-from=akihiko.odaki@daynix.com; helo=mail-pl1-x62c.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Disable SR-IOV VF devices by reusing code to power down PCI devices instead of removing them when the guest requests to disable VFs. This allows to realize devices and report VF realization errors at PF realization time. Signed-off-by: Akihiko Odaki --- include/hw/pci/pci.h | 5 --- include/hw/pci/pci_device.h | 15 ++++++++ include/hw/pci/pcie_sriov.h | 1 - hw/pci/pci.c | 2 +- hw/pci/pcie_sriov.c | 94 +++++++++++++++++++-------------------------- 5 files changed, 55 insertions(+), 62 deletions(-) diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index c1e897f44143..e40235d9ab07 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -676,9 +676,4 @@ static inline void pci_irq_deassert(PCIDevice *pci_dev) MSIMessage pci_get_msi_message(PCIDevice *dev, int vector); void pci_set_enabled(PCIDevice *pci_dev, bool state); -static inline void pci_set_power(PCIDevice *pci_dev, bool state) -{ - pci_set_enabled(pci_dev, state); -} - #endif diff --git a/include/hw/pci/pci_device.h b/include/hw/pci/pci_device.h index 66b6c08b0118..37d88f0cd05b 100644 --- a/include/hw/pci/pci_device.h +++ b/include/hw/pci/pci_device.h @@ -219,6 +219,21 @@ static inline uint16_t pci_get_bdf(PCIDevice *dev) return PCI_BUILD_BDF(pci_bus_num(pci_get_bus(dev)), dev->devfn); } +static inline void pci_set_power(PCIDevice *pci_dev, bool state) +{ + /* + * Don't change the enabled state of VFs when powering on/off the device. + * + * When powering on, VFs must not be enabled immediately but they must + * wait until the guest configures SR-IOV. + * When powering off, their corresponding PFs will be reset and disable + * VFs. + */ + if (!pci_is_vf(pci_dev)) { + pci_set_enabled(pci_dev, state); + } +} + uint16_t pci_requester_id(PCIDevice *dev); /* DMA access functions */ diff --git a/include/hw/pci/pcie_sriov.h b/include/hw/pci/pcie_sriov.h index aa704e8f9d9f..70649236c18a 100644 --- a/include/hw/pci/pcie_sriov.h +++ b/include/hw/pci/pcie_sriov.h @@ -18,7 +18,6 @@ typedef struct PCIESriovPF { uint16_t num_vfs; /* Number of virtual functions created */ uint8_t vf_bar_type[PCI_NUM_REGIONS]; /* Store type for each VF bar */ - const char *vfname; /* Reference to the device type used for the VFs */ PCIDevice **vf; /* Pointer to an array of num_vfs VF devices */ } PCIESriovPF; diff --git a/hw/pci/pci.c b/hw/pci/pci.c index e1563d738ce2..d769952e89ba 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -2972,7 +2972,7 @@ void pci_set_enabled(PCIDevice *d, bool state) memory_region_set_enabled(&d->bus_master_enable_region, (pci_get_word(d->config + PCI_COMMAND) & PCI_COMMAND_MASTER) && d->enabled); - if (!d->enabled) { + if (d->qdev.realized) { pci_device_reset(d); } } diff --git a/hw/pci/pcie_sriov.c b/hw/pci/pcie_sriov.c index 91c64c988eb4..f1993bc553c0 100644 --- a/hw/pci/pcie_sriov.c +++ b/hw/pci/pcie_sriov.c @@ -20,9 +20,16 @@ #include "qapi/error.h" #include "trace.h" -static PCIDevice *register_vf(PCIDevice *pf, int devfn, - const char *name, uint16_t vf_num); -static void unregister_vfs(PCIDevice *dev); +static void unparent_vfs(PCIDevice *dev, uint16_t total_vfs) +{ + for (uint16_t i = 0; i < total_vfs; i++) { + PCIDevice *vf = dev->exp.sriov_pf.vf[i]; + object_unparent(OBJECT(vf)); + object_unref(OBJECT(vf)); + } + g_free(dev->exp.sriov_pf.vf); + dev->exp.sriov_pf.vf = NULL; +} bool pcie_sriov_pf_init(PCIDevice *dev, uint16_t offset, const char *vfname, uint16_t vf_dev_id, @@ -30,6 +37,7 @@ bool pcie_sriov_pf_init(PCIDevice *dev, uint16_t offset, uint16_t vf_offset, uint16_t vf_stride, Error **errp) { + BusState *bus = qdev_get_parent_bus(&dev->qdev); int32_t devfn = dev->devfn + vf_offset; uint8_t *cfg = dev->config + offset; uint8_t *wmask; @@ -44,7 +52,6 @@ bool pcie_sriov_pf_init(PCIDevice *dev, uint16_t offset, offset, PCI_EXT_CAP_SRIOV_SIZEOF); dev->exp.sriov_cap = offset; dev->exp.sriov_pf.num_vfs = 0; - dev->exp.sriov_pf.vfname = g_strdup(vfname); dev->exp.sriov_pf.vf = NULL; pci_set_word(cfg + PCI_SRIOV_VF_OFFSET, vf_offset); @@ -78,14 +85,34 @@ bool pcie_sriov_pf_init(PCIDevice *dev, uint16_t offset, qdev_prop_set_bit(&dev->qdev, "multifunction", true); + dev->exp.sriov_pf.vf = g_new(PCIDevice *, total_vfs); + + for (uint16_t i = 0; i < total_vfs; i++) { + PCIDevice *vf = pci_new(devfn, vfname); + vf->exp.sriov_vf.pf = dev; + vf->exp.sriov_vf.vf_number = i; + + if (!qdev_realize(&vf->qdev, bus, errp)) { + unparent_vfs(dev, i); + return false; + } + + /* set vid/did according to sr/iov spec - they are not used */ + pci_config_set_vendor_id(vf->config, 0xffff); + pci_config_set_device_id(vf->config, 0xffff); + + dev->exp.sriov_pf.vf[i] = vf; + devfn += vf_stride; + } + return true; } void pcie_sriov_pf_exit(PCIDevice *dev) { - unregister_vfs(dev); - g_free((char *)dev->exp.sriov_pf.vfname); - dev->exp.sriov_pf.vfname = NULL; + uint8_t *cfg = dev->config + dev->exp.sriov_cap; + + unparent_vfs(dev, pci_get_word(cfg + PCI_SRIOV_TOTAL_VF)); } void pcie_sriov_pf_init_vf_bar(PCIDevice *dev, int region_num, @@ -151,38 +178,11 @@ void pcie_sriov_vf_register_bar(PCIDevice *dev, int region_num, } } -static PCIDevice *register_vf(PCIDevice *pf, int devfn, const char *name, - uint16_t vf_num) -{ - PCIDevice *dev = pci_new(devfn, name); - dev->exp.sriov_vf.pf = pf; - dev->exp.sriov_vf.vf_number = vf_num; - PCIBus *bus = pci_get_bus(pf); - Error *local_err = NULL; - - qdev_realize(&dev->qdev, &bus->qbus, &local_err); - if (local_err) { - error_report_err(local_err); - return NULL; - } - - /* set vid/did according to sr/iov spec - they are not used */ - pci_config_set_vendor_id(dev->config, 0xffff); - pci_config_set_device_id(dev->config, 0xffff); - - return dev; -} - static void register_vfs(PCIDevice *dev) { uint16_t num_vfs; uint16_t i; uint16_t sriov_cap = dev->exp.sriov_cap; - uint16_t vf_offset = - pci_get_word(dev->config + sriov_cap + PCI_SRIOV_VF_OFFSET); - uint16_t vf_stride = - pci_get_word(dev->config + sriov_cap + PCI_SRIOV_VF_STRIDE); - int32_t devfn = dev->devfn + vf_offset; assert(sriov_cap > 0); num_vfs = pci_get_word(dev->config + sriov_cap + PCI_SRIOV_NUM_VF); @@ -190,18 +190,10 @@ static void register_vfs(PCIDevice *dev) return; } - dev->exp.sriov_pf.vf = g_new(PCIDevice *, num_vfs); - trace_sriov_register_vfs(dev->name, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn), num_vfs); for (i = 0; i < num_vfs; i++) { - dev->exp.sriov_pf.vf[i] = register_vf(dev, devfn, - dev->exp.sriov_pf.vfname, i); - if (!dev->exp.sriov_pf.vf[i]) { - num_vfs = i; - break; - } - devfn += vf_stride; + pci_set_enabled(dev->exp.sriov_pf.vf[i], true); } dev->exp.sriov_pf.num_vfs = num_vfs; } @@ -214,12 +206,8 @@ static void unregister_vfs(PCIDevice *dev) trace_sriov_unregister_vfs(dev->name, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn), num_vfs); for (i = 0; i < num_vfs; i++) { - PCIDevice *vf = dev->exp.sriov_pf.vf[i]; - object_unparent(OBJECT(vf)); - object_unref(OBJECT(vf)); + pci_set_enabled(dev->exp.sriov_pf.vf[i], false); } - g_free(dev->exp.sriov_pf.vf); - dev->exp.sriov_pf.vf = NULL; dev->exp.sriov_pf.num_vfs = 0; } @@ -241,14 +229,10 @@ void pcie_sriov_config_write(PCIDevice *dev, uint32_t address, PCI_FUNC(dev->devfn), off, val, len); if (range_covers_byte(off, len, PCI_SRIOV_CTRL)) { - if (dev->exp.sriov_pf.num_vfs) { - if (!(val & PCI_SRIOV_CTRL_VFE)) { - unregister_vfs(dev); - } + if (val & PCI_SRIOV_CTRL_VFE) { + register_vfs(dev); } else { - if (val & PCI_SRIOV_CTRL_VFE) { - register_vfs(dev); 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Tsirkin" , Marcel Apfelbaum , Alex Williamson , =?utf-8?q?C=C3=A9dric_Le_Goa?= =?utf-8?q?ter?= , Paolo Bonzini , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Eduardo Habkost , Sriram Yagnaraman , Jason Wang , Keith Busch , Klaus Jensen , Markus Armbruster , Matthew Rosato , Eric Farman , Harsh Prateek Bora , Shivaprasad G Bhat Cc: qemu-devel@nongnu.org, qemu-block@nongnu.org, devel@daynix.com, Akihiko Odaki X-Mailer: b4 0.14-dev-fd6e3 Received-SPF: pass client-ip=2607:f8b0:4864:20::102c; envelope-from=akihiko.odaki@daynix.com; helo=mail-pj1-x102c.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Release VFs failed to realize just as we do in unregister_vfs(). Fixes: 7c0fa8dff811 ("pcie: Add support for Single Root I/O Virtualization (SR/IOV)") Signed-off-by: Akihiko Odaki --- hw/pci/pcie_sriov.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hw/pci/pcie_sriov.c b/hw/pci/pcie_sriov.c index f1993bc553c0..db087bb9330c 100644 --- a/hw/pci/pcie_sriov.c +++ b/hw/pci/pcie_sriov.c @@ -93,6 +93,8 @@ bool pcie_sriov_pf_init(PCIDevice *dev, uint16_t offset, vf->exp.sriov_vf.vf_number = i; if (!qdev_realize(&vf->qdev, bus, errp)) { + object_unparent(OBJECT(vf)); + object_unref(vf); unparent_vfs(dev, i); return false; } From patchwork Sat Jan 4 07:52:31 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Akihiko Odaki X-Patchwork-Id: 13926151 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 38FEFE7719A for ; Sat, 4 Jan 2025 07:55:01 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tTyyn-0002ie-68; Sat, 04 Jan 2025 02:53:53 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tTyyj-0002LQ-U2 for qemu-devel@nongnu.org; Sat, 04 Jan 2025 02:53:49 -0500 Received: from mail-pl1-x62f.google.com ([2607:f8b0:4864:20::62f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tTyyh-00039d-UM for qemu-devel@nongnu.org; Sat, 04 Jan 2025 02:53:49 -0500 Received: by mail-pl1-x62f.google.com with SMTP id d9443c01a7336-2161eb95317so186651205ad.1 for ; Fri, 03 Jan 2025 23:53:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=daynix-com.20230601.gappssmtp.com; s=20230601; t=1735977223; x=1736582023; darn=nongnu.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=vBTA/eSFpNVagoYgK/YYl9vBkpIAy0UvZyUMa/rjIxs=; b=yuqvUwlT2RR/sPIWnbNjWpw4ayo89Q/VjY8q0tl+wRuFxP4FHUFSHz7vinZSMU10f9 jjv6GozIUEsbNVpJ6ikV76qW0yGAQnlR0VJ/CZwmOEAxmw0frUs8AG7lDOiWOwpTUIGp wfm4G0nWN+JroIrMNXSHDWhjQkdeWAt3gHY1N43LQgcv7vLnd79Acg9owTdyU64ORZvg jrp4voDNZrVVeu+3w7VxU8EzgwWgU4bIFFGzCjzv+pmTcxWJ5ab1fG1Mj4k6imLr2yVH GL6YjznyNLqKdScCC3yeu67DmQm/WOBhe40RLbtxP2LYr1gQGij8G8c/nZIwmV56Op0Z 09PA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1735977223; x=1736582023; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=vBTA/eSFpNVagoYgK/YYl9vBkpIAy0UvZyUMa/rjIxs=; b=piW5yectmakHxSVFt+K0UIxowWQxK73qrNmPmYUkicYS6cmSRQhK+kkX5WlH+2INrb HxZo0rOA8Z4TVlWvZ0NcPsGIWFfrqMxqJB7Wuni/9qoR19rQDS73Lz1Q9MweBswhn/2w ESnzNlWh09C92KGXExSV+099wbwUHgIyfz+zPf2DGHc/W2wysol2snzWErVNmPYD+Q8o GbFkajESxPkJRky5YjIoYuFsHBHfMZUyo40cqn9Yvw5qYPu9AHL45YLCUl42NDLVxF2a hJWwY7+6fRXz8mBhhpLB7AyHvYBD1/umVX0inDJ/X7Dd+MRk2lDQjFGuKHEUKbh0vNMu m07Q== X-Gm-Message-State: AOJu0Yznjrs0xcywe1G87W3AxS+up88zSjeU7BZn+HCzRUqLMX9ILR0R ozfy+TRpqlGYpTF5jEiZuLUN8e6zNGmTGpja8DtOWfO+GP61uHLZ9XRUT8KFnJY= X-Gm-Gg: ASbGncs5IlF/tymD6p/DMjKVWwE6FPy+y8pySAAu6Et/CHlR1lKkvMQcYuaiwibknfV 3xL2W/TsHOxw99ekFToUu8o6JBJsG8FAd9vMVcjAftUNeey+cphIe0w4RYW0VYSidg+owSR12bs TvVBfcu1iYPdh0c3YiTDYceZcWqyN8IqdBuYg811k6T7zc8hLE6Ej0dQGNp6IYNc5yYuT8fww1y yEphsBhNVCegev9+Ff7IZT2o1yne2zngdGUeTWqpSKwPOyec3g9LCj04W88 X-Google-Smtp-Source: AGHT+IFpNOixQtoeyLgFhdqJpsGqXvcJfy/spJhHRUxHqdjmb5pWG0ItnpSdBCMOG0e5ZNtw4jaRKQ== X-Received: by 2002:a05:6a20:12c5:b0:1e0:c3bf:7909 with SMTP id adf61e73a8af0-1e5e081c9damr85227358637.41.1735977223163; Fri, 03 Jan 2025 23:53:43 -0800 (PST) Received: from localhost ([157.82.207.107]) by smtp.gmail.com with UTF8SMTPSA id d2e1a72fcca58-72aad8370d5sm27448859b3a.71.2025.01.03.23.53.39 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 03 Jan 2025 23:53:42 -0800 (PST) From: Akihiko Odaki Date: Sat, 04 Jan 2025 16:52:31 +0900 Subject: [PATCH v18 11/14] pcie_sriov: Remove num_vfs from PCIESriovPF MIME-Version: 1.0 Message-Id: <20250104-reuse-v18-11-c349eafd8673@daynix.com> References: <20250104-reuse-v18-0-c349eafd8673@daynix.com> In-Reply-To: <20250104-reuse-v18-0-c349eafd8673@daynix.com> To: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , "Michael S. Tsirkin" , Marcel Apfelbaum , Alex Williamson , =?utf-8?q?C=C3=A9dric_Le_Goa?= =?utf-8?q?ter?= , Paolo Bonzini , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Eduardo Habkost , Sriram Yagnaraman , Jason Wang , Keith Busch , Klaus Jensen , Markus Armbruster , Matthew Rosato , Eric Farman , Harsh Prateek Bora , Shivaprasad G Bhat Cc: qemu-devel@nongnu.org, qemu-block@nongnu.org, devel@daynix.com, Akihiko Odaki X-Mailer: b4 0.14-dev-fd6e3 Received-SPF: pass client-ip=2607:f8b0:4864:20::62f; envelope-from=akihiko.odaki@daynix.com; helo=mail-pl1-x62f.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org num_vfs is not migrated so use PCI_SRIOV_CTRL_VFE and PCI_SRIOV_NUM_VF instead. Signed-off-by: Akihiko Odaki --- include/hw/pci/pcie_sriov.h | 1 - hw/pci/pcie_sriov.c | 38 +++++++++++++++++++++++++++----------- hw/pci/trace-events | 2 +- 3 files changed, 28 insertions(+), 13 deletions(-) diff --git a/include/hw/pci/pcie_sriov.h b/include/hw/pci/pcie_sriov.h index 70649236c18a..5148c5b77dd1 100644 --- a/include/hw/pci/pcie_sriov.h +++ b/include/hw/pci/pcie_sriov.h @@ -16,7 +16,6 @@ #include "hw/pci/pci.h" typedef struct PCIESriovPF { - uint16_t num_vfs; /* Number of virtual functions created */ uint8_t vf_bar_type[PCI_NUM_REGIONS]; /* Store type for each VF bar */ PCIDevice **vf; /* Pointer to an array of num_vfs VF devices */ } PCIESriovPF; diff --git a/hw/pci/pcie_sriov.c b/hw/pci/pcie_sriov.c index db087bb9330c..69609c112e31 100644 --- a/hw/pci/pcie_sriov.c +++ b/hw/pci/pcie_sriov.c @@ -51,7 +51,6 @@ bool pcie_sriov_pf_init(PCIDevice *dev, uint16_t offset, pcie_add_capability(dev, PCI_EXT_CAP_ID_SRIOV, 1, offset, PCI_EXT_CAP_SRIOV_SIZEOF); dev->exp.sriov_cap = offset; - dev->exp.sriov_pf.num_vfs = 0; dev->exp.sriov_pf.vf = NULL; pci_set_word(cfg + PCI_SRIOV_VF_OFFSET, vf_offset); @@ -188,29 +187,28 @@ static void register_vfs(PCIDevice *dev) assert(sriov_cap > 0); num_vfs = pci_get_word(dev->config + sriov_cap + PCI_SRIOV_NUM_VF); - if (num_vfs > pci_get_word(dev->config + sriov_cap + PCI_SRIOV_TOTAL_VF)) { - return; - } trace_sriov_register_vfs(dev->name, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn), num_vfs); for (i = 0; i < num_vfs; i++) { pci_set_enabled(dev->exp.sriov_pf.vf[i], true); } - dev->exp.sriov_pf.num_vfs = num_vfs; + + pci_set_word(dev->wmask + sriov_cap + PCI_SRIOV_NUM_VF, 0); } static void unregister_vfs(PCIDevice *dev) { - uint16_t num_vfs = dev->exp.sriov_pf.num_vfs; + uint8_t *cfg = dev->config + dev->exp.sriov_cap; uint16_t i; trace_sriov_unregister_vfs(dev->name, PCI_SLOT(dev->devfn), - PCI_FUNC(dev->devfn), num_vfs); - for (i = 0; i < num_vfs; i++) { + PCI_FUNC(dev->devfn)); + for (i = 0; i < pci_get_word(cfg + PCI_SRIOV_TOTAL_VF); i++) { pci_set_enabled(dev->exp.sriov_pf.vf[i], false); } - dev->exp.sriov_pf.num_vfs = 0; + + pci_set_word(dev->wmask + dev->exp.sriov_cap + PCI_SRIOV_NUM_VF, 0xffff); } void pcie_sriov_config_write(PCIDevice *dev, uint32_t address, @@ -236,6 +234,17 @@ void pcie_sriov_config_write(PCIDevice *dev, uint32_t address, } else { unregister_vfs(dev); } + } else if (range_covers_byte(off, len, PCI_SRIOV_NUM_VF)) { + uint8_t *cfg = dev->config + sriov_cap; + uint8_t *wmask = dev->wmask + sriov_cap; + uint16_t num_vfs = pci_get_word(cfg + PCI_SRIOV_NUM_VF); + uint16_t wmask_val = PCI_SRIOV_CTRL_MSE | PCI_SRIOV_CTRL_ARI; + + if (num_vfs <= pci_get_word(cfg + PCI_SRIOV_TOTAL_VF)) { + wmask_val |= PCI_SRIOV_CTRL_VFE; + } + + pci_set_word(wmask + PCI_SRIOV_CTRL, wmask_val); } } @@ -252,6 +261,8 @@ void pcie_sriov_pf_reset(PCIDevice *dev) unregister_vfs(dev); pci_set_word(dev->config + sriov_cap + PCI_SRIOV_NUM_VF, 0); + pci_set_word(dev->wmask + sriov_cap + PCI_SRIOV_CTRL, + PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE | PCI_SRIOV_CTRL_ARI); /* * Default is to use 4K pages, software can modify it @@ -298,7 +309,7 @@ PCIDevice *pcie_sriov_get_pf(PCIDevice *dev) PCIDevice *pcie_sriov_get_vf_at_index(PCIDevice *dev, int n) { assert(!pci_is_vf(dev)); - if (n < dev->exp.sriov_pf.num_vfs) { + if (n < pcie_sriov_num_vfs(dev)) { return dev->exp.sriov_pf.vf[n]; } return NULL; @@ -306,5 +317,10 @@ PCIDevice *pcie_sriov_get_vf_at_index(PCIDevice *dev, int n) uint16_t pcie_sriov_num_vfs(PCIDevice *dev) { - return dev->exp.sriov_pf.num_vfs; + uint16_t sriov_cap = dev->exp.sriov_cap; + uint8_t *cfg = dev->config + sriov_cap; + + return sriov_cap && + (pci_get_word(cfg + PCI_SRIOV_CTRL) & PCI_SRIOV_CTRL_VFE) ? + pci_get_word(cfg + PCI_SRIOV_NUM_VF) : 0; } diff --git a/hw/pci/trace-events b/hw/pci/trace-events index 19643aa8c6b0..e98f575a9d19 100644 --- a/hw/pci/trace-events +++ b/hw/pci/trace-events @@ -14,7 +14,7 @@ msix_write_config(char *name, bool enabled, bool masked) "dev %s enabled %d mask # hw/pci/pcie_sriov.c sriov_register_vfs(const char *name, int slot, int function, int num_vfs) "%s %02x:%x: creating %d vf devs" -sriov_unregister_vfs(const char *name, int slot, int function, int num_vfs) "%s %02x:%x: Unregistering %d vf devs" +sriov_unregister_vfs(const char *name, int slot, int function) "%s %02x:%x: Unregistering vf devs" sriov_config_write(const char *name, int slot, int fun, uint32_t offset, uint32_t val, uint32_t len) "%s %02x:%x: sriov offset 0x%x val 0x%x len %d" # pcie.c From patchwork Sat Jan 4 07:52:32 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Akihiko Odaki X-Patchwork-Id: 13926147 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 25F09E77188 for ; Sat, 4 Jan 2025 07:54:41 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tTyz9-000368-J5; Sat, 04 Jan 2025 02:54:15 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tTyym-0002f5-6d for qemu-devel@nongnu.org; Sat, 04 Jan 2025 02:53:52 -0500 Received: from mail-pl1-x630.google.com ([2607:f8b0:4864:20::630]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tTyyk-0003AF-Hs for qemu-devel@nongnu.org; Sat, 04 Jan 2025 02:53:51 -0500 Received: by mail-pl1-x630.google.com with SMTP id d9443c01a7336-21628b3fe7dso176373105ad.3 for ; Fri, 03 Jan 2025 23:53:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=daynix-com.20230601.gappssmtp.com; s=20230601; t=1735977229; x=1736582029; darn=nongnu.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=Nq5kA+rAx2s39hfKGaHhph3umAuBYnelbLPjqvJGEKM=; b=AaPG9Ly90LO2wr8OeF904FAJvUeJD+CrSq+lNJAIhSxa+ucNRY8FT81VuqJ9OMNevM 5qwf8u+0wUQEWOrgWuW7M+GKwWP/8MR322u0x69SUIJGB2xuok8mixcbptWnjmeZWXYu cYl04Dq7/lB78hhMU6/TRv1Xt8I/fOvizW29Nis+OiTozoc9cttsDFi7kgALPgzws5a4 iZ+XU3ETg7eg0OrBozkNH3AkSvk6EZJFjdKEHx9P93wtN321R6kj4B6SY0xq0v0T35uG zaW22WemfWzLwgY8CCh8kzP7RTuRhlPMIqc2K7YcFF7LrgBr6ntuvmttCEb+qZ25kWmi pKvA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1735977229; x=1736582029; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Nq5kA+rAx2s39hfKGaHhph3umAuBYnelbLPjqvJGEKM=; b=iikJNvwaqRiWZf9aCMd4Ny7lOUp8jbMjfrjpTrnEAw7pTWHD2Gh2iIRUOSMhcAEHBK EO0k9gTj9fOzkuHakSE2XsDXB4tQQzLJtFfFXqjGUV2NKXuGShlbZtMARo4rAI0h6eYk l56tPjrWSLVr7N+tsk4wao5b21GW70PhIK7icovfqp2ysUxU3UZE+6n+M4RbPDpkrdtL R+8I4w6PnR29GLToH7A1NEshZa4TlhkSD4o9k6kVu9AZkcJmTcbKnqGvQm+vlQ7p9wKl wykDR82cNaadcjEVUPcaUcBSWGvc25p6ceF1RP1tUm5mbF7MG7J/3IEScp0IDSzPh9tZ hEIQ== X-Gm-Message-State: AOJu0YzAKMyK6uCYMFaEOmwnzth268BriwJEveRWq7vTkaSCdS4NCzYc fbd1b/p1Mip5o98YKG7P4SIAOl4XzJ3GoJWtUmz/Ytnjc7G6Uc7FoTQBSkgVJ5o= X-Gm-Gg: ASbGnctiI/lNnhhDaRyS6kONYZgNhwRFmhjyNknus6pnE5bZJeCzq0Vl+WKvhvnqCRG N6IFts7AQK5nwV3sTy569qXwEZjWbfuAgEy0uM/xl40b0WVZiSCDBmDY75ZPTxHj404kRRE1nWq wI3T0tTCAHo7lEck4VYVe4e1aiV58CrNj/RgBvOplpfI/2JGc0OEttDiU11OwdmjXt0Qz53mscJ J38YA3J7O4in1vYKWPaWzY3sC1c+D8uSKKbosogYPFjdtrMWFJ+39dHxl+x X-Google-Smtp-Source: AGHT+IFSA0Cm91Hfo2b9s3W0fbZslWaAHdr0O3a3oYlX+TrKRpvIcZwgspbGH3vxth818ttd96wsDA== X-Received: by 2002:a17:902:fc44:b0:218:a5a8:431a with SMTP id d9443c01a7336-219e6f26013mr809481215ad.49.1735977229290; Fri, 03 Jan 2025 23:53:49 -0800 (PST) Received: from localhost ([157.82.207.107]) by smtp.gmail.com with UTF8SMTPSA id 41be03b00d2f7-8427ab7830asm25218874a12.0.2025.01.03.23.53.45 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 03 Jan 2025 23:53:49 -0800 (PST) From: Akihiko Odaki Date: Sat, 04 Jan 2025 16:52:32 +0900 Subject: [PATCH v18 12/14] pcie_sriov: Register VFs after migration MIME-Version: 1.0 Message-Id: <20250104-reuse-v18-12-c349eafd8673@daynix.com> References: <20250104-reuse-v18-0-c349eafd8673@daynix.com> In-Reply-To: <20250104-reuse-v18-0-c349eafd8673@daynix.com> To: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , "Michael S. Tsirkin" , Marcel Apfelbaum , Alex Williamson , =?utf-8?q?C=C3=A9dric_Le_Goa?= =?utf-8?q?ter?= , Paolo Bonzini , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Eduardo Habkost , Sriram Yagnaraman , Jason Wang , Keith Busch , Klaus Jensen , Markus Armbruster , Matthew Rosato , Eric Farman , Harsh Prateek Bora , Shivaprasad G Bhat Cc: qemu-devel@nongnu.org, qemu-block@nongnu.org, devel@daynix.com, Akihiko Odaki X-Mailer: b4 0.14-dev-fd6e3 Received-SPF: pass client-ip=2607:f8b0:4864:20::630; envelope-from=akihiko.odaki@daynix.com; helo=mail-pl1-x630.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org pcie_sriov doesn't have code to restore its state after migration, but igb, which uses pcie_sriov, naively claimed its migration capability. Add code to register VFs after migration and fix igb migration. Fixes: 3a977deebe6b ("Intrdocue igb device emulation") Signed-off-by: Akihiko Odaki --- include/hw/pci/pcie_sriov.h | 2 ++ hw/pci/pci.c | 7 +++++++ hw/pci/pcie_sriov.c | 7 +++++++ 3 files changed, 16 insertions(+) diff --git a/include/hw/pci/pcie_sriov.h b/include/hw/pci/pcie_sriov.h index 5148c5b77dd1..c5d2d318d330 100644 --- a/include/hw/pci/pcie_sriov.h +++ b/include/hw/pci/pcie_sriov.h @@ -57,6 +57,8 @@ void pcie_sriov_pf_add_sup_pgsize(PCIDevice *dev, uint16_t opt_sup_pgsize); void pcie_sriov_config_write(PCIDevice *dev, uint32_t address, uint32_t val, int len); +void pcie_sriov_pf_post_load(PCIDevice *dev); + /* Reset SR/IOV */ void pcie_sriov_pf_reset(PCIDevice *dev); diff --git a/hw/pci/pci.c b/hw/pci/pci.c index d769952e89ba..2724297ea43c 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -803,10 +803,17 @@ static bool migrate_is_not_pcie(void *opaque, int version_id) return !pci_is_express((PCIDevice *)opaque); } +static int pci_post_load(void *opaque, int version_id) +{ + pcie_sriov_pf_post_load(opaque); + return 0; +} + const VMStateDescription vmstate_pci_device = { .name = "PCIDevice", .version_id = 2, .minimum_version_id = 1, + .post_load = pci_post_load, .fields = (const VMStateField[]) { VMSTATE_INT32_POSITIVE_LE(version_id, PCIDevice), VMSTATE_BUFFER_UNSAFE_INFO_TEST(config, PCIDevice, diff --git a/hw/pci/pcie_sriov.c b/hw/pci/pcie_sriov.c index 69609c112e31..1eb4358256de 100644 --- a/hw/pci/pcie_sriov.c +++ b/hw/pci/pcie_sriov.c @@ -248,6 +248,13 @@ void pcie_sriov_config_write(PCIDevice *dev, uint32_t address, } } +void pcie_sriov_pf_post_load(PCIDevice *dev) +{ + if (dev->exp.sriov_cap) { + register_vfs(dev); + } +} + /* Reset SR/IOV */ void pcie_sriov_pf_reset(PCIDevice *dev) From patchwork Sat Jan 4 07:52:33 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Akihiko Odaki X-Patchwork-Id: 13926150 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 32B2EE77197 for ; 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Tsirkin" , Marcel Apfelbaum , Alex Williamson , =?utf-8?q?C=C3=A9dric_Le_Goa?= =?utf-8?q?ter?= , Paolo Bonzini , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Eduardo Habkost , Sriram Yagnaraman , Jason Wang , Keith Busch , Klaus Jensen , Markus Armbruster , Matthew Rosato , Eric Farman , Harsh Prateek Bora , Shivaprasad G Bhat Cc: qemu-devel@nongnu.org, qemu-block@nongnu.org, devel@daynix.com, Akihiko Odaki X-Mailer: b4 0.14-dev-fd6e3 Received-SPF: pass client-ip=2607:f8b0:4864:20::631; envelope-from=akihiko.odaki@daynix.com; helo=mail-pl1-x631.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org vfio_pci_size_rom() distinguishes whether rombar is explicitly set to 1 by checking dev->opts, bypassing the QOM property infrastructure. Use -1 as the default value for rombar to tell if the user explicitly set it to 1. The property is also converted from unsigned to signed. -1 is signed so it is safe to give it a new meaning. The values in [2 ^ 31, 2 ^ 32) become invalid, but nobody should have typed these values by chance. Suggested-by: Markus Armbruster Signed-off-by: Akihiko Odaki Reviewed-by: Markus Armbruster Reviewed-by: Philippe Mathieu-Daudé --- include/hw/pci/pci_device.h | 2 +- hw/pci/pci.c | 2 +- hw/vfio/pci.c | 5 ++--- 3 files changed, 4 insertions(+), 5 deletions(-) diff --git a/include/hw/pci/pci_device.h b/include/hw/pci/pci_device.h index 37d88f0cd05b..613f78aebf62 100644 --- a/include/hw/pci/pci_device.h +++ b/include/hw/pci/pci_device.h @@ -148,7 +148,7 @@ struct PCIDevice { uint32_t romsize; bool has_rom; MemoryRegion rom; - uint32_t rom_bar; + int32_t rom_bar; /* INTx routing notifier */ PCIINTxRoutingNotifier intx_routing_notifier; diff --git a/hw/pci/pci.c b/hw/pci/pci.c index 2724297ea43c..8f160c0c0d8a 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -85,7 +85,7 @@ static const Property pci_props[] = { DEFINE_PROP_PCI_DEVFN("addr", PCIDevice, devfn, -1), DEFINE_PROP_STRING("romfile", PCIDevice, romfile), DEFINE_PROP_UINT32("romsize", PCIDevice, romsize, UINT32_MAX), - DEFINE_PROP_UINT32("rombar", PCIDevice, rom_bar, 1), + DEFINE_PROP_INT32("rombar", PCIDevice, rom_bar, -1), DEFINE_PROP_BIT("multifunction", PCIDevice, cap_present, QEMU_PCI_CAP_MULTIFUNCTION_BITNR, false), DEFINE_PROP_BIT("x-pcie-lnksta-dllla", PCIDevice, cap_present, diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c index 17080b9dc0bf..ab17a98ee5b6 100644 --- a/hw/vfio/pci.c +++ b/hw/vfio/pci.c @@ -1012,7 +1012,6 @@ static void vfio_pci_size_rom(VFIOPCIDevice *vdev) { uint32_t orig, size = cpu_to_le32((uint32_t)PCI_ROM_ADDRESS_MASK); off_t offset = vdev->config_offset + PCI_ROM_ADDRESS; - DeviceState *dev = DEVICE(vdev); char *name; int fd = vdev->vbasedev.fd; @@ -1046,12 +1045,12 @@ static void vfio_pci_size_rom(VFIOPCIDevice *vdev) } if (vfio_opt_rom_in_denylist(vdev)) { - if (dev->opts && qdict_haskey(dev->opts, "rombar")) { + if (vdev->pdev.rom_bar > 0) { warn_report("Device at %s is known to cause system instability" " issues during option rom execution", vdev->vbasedev.name); error_printf("Proceeding anyway since user specified" - " non zero value for rombar\n"); + " positive value for rombar\n"); } else { warn_report("Rom loading for device at %s has been disabled" " due to system instability issues", From patchwork Sat Jan 4 07:52:34 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Akihiko Odaki X-Patchwork-Id: 13926148 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 53EFFE77197 for ; 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Tsirkin" , Marcel Apfelbaum , Alex Williamson , =?utf-8?q?C=C3=A9dric_Le_Goa?= =?utf-8?q?ter?= , Paolo Bonzini , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Eduardo Habkost , Sriram Yagnaraman , Jason Wang , Keith Busch , Klaus Jensen , Markus Armbruster , Matthew Rosato , Eric Farman , Harsh Prateek Bora , Shivaprasad G Bhat Cc: qemu-devel@nongnu.org, qemu-block@nongnu.org, devel@daynix.com, Akihiko Odaki X-Mailer: b4 0.14-dev-fd6e3 Received-SPF: pass client-ip=2607:f8b0:4864:20::62e; envelope-from=akihiko.odaki@daynix.com; helo=mail-pl1-x62e.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org It is no longer used. Signed-off-by: Akihiko Odaki Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Markus Armbruster --- include/hw/qdev-core.h | 4 ---- hw/core/qdev.c | 1 - system/qdev-monitor.c | 12 +++++++----- 3 files changed, 7 insertions(+), 10 deletions(-) diff --git a/include/hw/qdev-core.h b/include/hw/qdev-core.h index e6ef80b7fd0e..c4d3dc39064c 100644 --- a/include/hw/qdev-core.h +++ b/include/hw/qdev-core.h @@ -248,10 +248,6 @@ struct DeviceState { * @pending_deleted_expires_ms: optional timeout for deletion events */ int64_t pending_deleted_expires_ms; - /** - * @opts: QDict of options for the device - */ - QDict *opts; /** * @hotplugged: was device added after PHASE_MACHINE_READY? */ diff --git a/hw/core/qdev.c b/hw/core/qdev.c index 57c1d9df3a7f..09c4489e3c41 100644 --- a/hw/core/qdev.c +++ b/hw/core/qdev.c @@ -691,7 +691,6 @@ static void device_finalize(Object *obj) dev->canonical_path = NULL; } - qobject_unref(dev->opts); g_free(dev->id); } diff --git a/system/qdev-monitor.c b/system/qdev-monitor.c index c844f5380255..6a38b5678760 100644 --- a/system/qdev-monitor.c +++ b/system/qdev-monitor.c @@ -631,6 +631,7 @@ DeviceState *qdev_device_add_from_qdict(const QDict *opts, char *id; DeviceState *dev = NULL; BusState *bus = NULL; + QDict *properties; driver = qdict_get_try_str(opts, "driver"); if (!driver) { @@ -712,13 +713,14 @@ DeviceState *qdev_device_add_from_qdict(const QDict *opts, } /* set properties */ - dev->opts = qdict_clone_shallow(opts); - qdict_del(dev->opts, "driver"); - qdict_del(dev->opts, "bus"); - qdict_del(dev->opts, "id"); + properties = qdict_clone_shallow(opts); + qdict_del(properties, "driver"); + qdict_del(properties, "bus"); + qdict_del(properties, "id"); - object_set_properties_from_keyval(&dev->parent_obj, dev->opts, from_json, + object_set_properties_from_keyval(&dev->parent_obj, properties, from_json, errp); + qobject_unref(properties); if (*errp) { goto err_del_dev; }