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Sun, 05 Jan 2025 19:07:42 -0800 (PST) Received: from umbar.lan ([192.130.178.90]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-542238301efsm4869016e87.247.2025.01.05.19.07.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 05 Jan 2025 19:07:41 -0800 (PST) From: Dmitry Baryshkov Date: Mon, 06 Jan 2025 05:07:35 +0200 Subject: [PATCH v4 1/9] drm/msm/dpu: extract bandwidth aggregation function Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250106-dpu-perf-rework-v4-1-00b248349476@linaro.org> References: <20250106-dpu-perf-rework-v4-0-00b248349476@linaro.org> In-Reply-To: <20250106-dpu-perf-rework-v4-0-00b248349476@linaro.org> To: Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Stephen Boyd , Simona Vetter Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, Dmitry Baryshkov X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2664; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=Ranvcf9s/bstJI3Eo8F/WLE+D4NDgHgD/Z08d8sAtcc=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBne0j4V7gMlJS+NZnYUb5mxgwM/JXVWs//nPIj4 PCukzy/PrmJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZ3tI+AAKCRCLPIo+Aiko 1bVyB/0SPP/7XFYWq88gWJAZjJWFRNQJGXsz8SOcFvxdRxFETxTsGsqNHsA7zgTTuYwj2lldlZx +4nNrS/qJc17QHWTeUS5YUguRQOpTIulHxY2JwTiXsYSn9mvHGHWLYKU4yXb4c6R5KYyUkj1itn OHfFJerRzaWcdgeJQ2klEC/wRAPUqBq5cOUTxerirAKadMKgc8oPVMV32M09nQfTOOuGL3IOHRj xzs5KCKmwOk9xQMbGybB+NFvA+RDMVkgmljgaX93tuyhWEqid4c2BPdMRB/M79pCIQaZ96dFk1A DytTmjIzZq5Jy6UdXsdTaADceNhPU0qBv4LUPKTOlFDb+r4g X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A In preparation to refactoring the dpu_core_perf debugfs interface, extract the bandwidth aggregation function from _dpu_core_perf_crtc_update_bus(). Reviewed-by: Abhinav Kumar Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 45 +++++++++++++++------------ 1 file changed, 25 insertions(+), 20 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c index 6f0a37f954fe8797a4e3a34e7876a93d5e477642..c7ac1140e79dbf48566a89fa4d70f6bec69d1d81 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c @@ -210,36 +210,41 @@ int dpu_core_perf_crtc_check(struct drm_crtc *crtc, return 0; } -static int _dpu_core_perf_crtc_update_bus(struct dpu_kms *kms, - struct drm_crtc *crtc) +static void dpu_core_perf_aggregate(struct drm_device *ddev, + enum dpu_crtc_client_type curr_client_type, + struct dpu_core_perf_params *perf) { - struct dpu_core_perf_params perf = { 0 }; - enum dpu_crtc_client_type curr_client_type - = dpu_crtc_get_client_type(crtc); - struct drm_crtc *tmp_crtc; struct dpu_crtc_state *dpu_cstate; - int i, ret = 0; - u64 avg_bw; - - if (!kms->num_paths) - return 0; + struct drm_crtc *tmp_crtc; - drm_for_each_crtc(tmp_crtc, crtc->dev) { + drm_for_each_crtc(tmp_crtc, ddev) { if (tmp_crtc->enabled && - curr_client_type == - dpu_crtc_get_client_type(tmp_crtc)) { + curr_client_type == dpu_crtc_get_client_type(tmp_crtc)) { dpu_cstate = to_dpu_crtc_state(tmp_crtc->state); - perf.max_per_pipe_ib = max(perf.max_per_pipe_ib, - dpu_cstate->new_perf.max_per_pipe_ib); + perf->max_per_pipe_ib = max(perf->max_per_pipe_ib, + dpu_cstate->new_perf.max_per_pipe_ib); - perf.bw_ctl += dpu_cstate->new_perf.bw_ctl; + perf->bw_ctl += dpu_cstate->new_perf.bw_ctl; - DRM_DEBUG_ATOMIC("crtc=%d bw=%llu paths:%d\n", - tmp_crtc->base.id, - dpu_cstate->new_perf.bw_ctl, kms->num_paths); + DRM_DEBUG_ATOMIC("crtc=%d bw=%llu\n", + tmp_crtc->base.id, + dpu_cstate->new_perf.bw_ctl); } } +} + +static int _dpu_core_perf_crtc_update_bus(struct dpu_kms *kms, + struct drm_crtc *crtc) +{ + struct dpu_core_perf_params perf = { 0 }; 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Sun, 05 Jan 2025 19:07:45 -0800 (PST) Received: from umbar.lan ([192.130.178.90]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-542238301efsm4869016e87.247.2025.01.05.19.07.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 05 Jan 2025 19:07:44 -0800 (PST) From: Dmitry Baryshkov Date: Mon, 06 Jan 2025 05:07:36 +0200 Subject: [PATCH v4 2/9] drm/msm/dpu: remove duplicate code calculating sum of bandwidths Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250106-dpu-perf-rework-v4-2-00b248349476@linaro.org> References: <20250106-dpu-perf-rework-v4-0-00b248349476@linaro.org> In-Reply-To: <20250106-dpu-perf-rework-v4-0-00b248349476@linaro.org> To: Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Stephen Boyd , Simona Vetter Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, Dmitry Baryshkov X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=4681; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=e5UbVaT7LzeJrygH1gMv3eM7lgsU2vrSsGS5cybMORE=; b=owGbwMvMwMXYbdNlx6SpcZXxtFoSQ3q1x4/tO/YoBR99nD9lue3PU76Sf5M3JCip6nVdz2VpT LvNy1fayWjMwsDIxSArpsjiU9AyNWZTctiHHVPrYQaxMoFMYeDiFICJ9D9l/ytTuOb11BL3f8uY ArvuJyi3NmzfasejxH5yK8e8C9rPppu5LukUe81mW/U9WWvawQk3lD5vN0g3fBdefa1Pdm7bUi0 B0+oJsbphRxp2VeWxcFTfUJG2DDps/n7TkXTJvd26Ust+hKo9zFpVXfpt4hWBPWJ9bjxxwVW2D2 4kVabd6G+WWFagc36qQsT5A1dDquR/hLFuDWC7/6WaxdRxQfrXDf+4PgSfVz3C1ODzVztiRdgPr obYrO3H2vIYZvK6++1UiNO+L7FW1f0zd0Z/qHLTlNuyH3pWLKnilLLcuemo9aPj1+4Inzhb8TY8 bF9h25kao3o2rsCehdo2Rb/fCDR5WXKekLT8euvZN/lvAA== X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A The code in dpu_core_perf_crtc_check() mostly duplicates code in dpu_core_perf_aggregate(). Remove the duplication by reusing the latter function. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 94 +++++++++++---------------- 1 file changed, 38 insertions(+), 56 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c index c7ac1140e79dbf48566a89fa4d70f6bec69d1d81..f0d490afb53be2f4bc706af91da05bb893a5fe34 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c @@ -140,6 +140,30 @@ static void _dpu_core_perf_calc_crtc(const struct dpu_core_perf *core_perf, perf->max_per_pipe_ib, perf->bw_ctl); } +static void dpu_core_perf_aggregate(struct drm_device *ddev, + enum dpu_crtc_client_type curr_client_type, + struct dpu_core_perf_params *perf) +{ + struct dpu_crtc_state *dpu_cstate; + struct drm_crtc *tmp_crtc; + + drm_for_each_crtc(tmp_crtc, ddev) { + if (tmp_crtc->enabled && + curr_client_type == dpu_crtc_get_client_type(tmp_crtc)) { + dpu_cstate = to_dpu_crtc_state(tmp_crtc->state); + + perf->max_per_pipe_ib = max(perf->max_per_pipe_ib, + dpu_cstate->new_perf.max_per_pipe_ib); + + perf->bw_ctl += dpu_cstate->new_perf.bw_ctl; + + DRM_DEBUG_ATOMIC("crtc=%d bw=%llu\n", + tmp_crtc->base.id, + dpu_cstate->new_perf.bw_ctl); + } + } +} + /** * dpu_core_perf_crtc_check - validate performance of the given crtc state * @crtc: Pointer to crtc @@ -150,11 +174,9 @@ int dpu_core_perf_crtc_check(struct drm_crtc *crtc, struct drm_crtc_state *state) { u32 bw, threshold; - u64 bw_sum_of_intfs = 0; - enum dpu_crtc_client_type curr_client_type; struct dpu_crtc_state *dpu_cstate; - struct drm_crtc *tmp_crtc; struct dpu_kms *kms; + struct dpu_core_perf_params perf; if (!crtc || !state) { DPU_ERROR("invalid crtc\n"); @@ -172,68 +194,28 @@ int dpu_core_perf_crtc_check(struct drm_crtc *crtc, /* obtain new values */ _dpu_core_perf_calc_crtc(&kms->perf, crtc, state, &dpu_cstate->new_perf); - bw_sum_of_intfs = dpu_cstate->new_perf.bw_ctl; - curr_client_type = dpu_crtc_get_client_type(crtc); - - drm_for_each_crtc(tmp_crtc, crtc->dev) { - if (tmp_crtc->enabled && - dpu_crtc_get_client_type(tmp_crtc) == curr_client_type && - tmp_crtc != crtc) { - struct dpu_crtc_state *tmp_cstate = - to_dpu_crtc_state(tmp_crtc->state); - - DRM_DEBUG_ATOMIC("crtc:%d bw:%llu ctrl:%d\n", - tmp_crtc->base.id, tmp_cstate->new_perf.bw_ctl, - tmp_cstate->bw_control); - - bw_sum_of_intfs += tmp_cstate->new_perf.bw_ctl; - } + dpu_core_perf_aggregate(crtc->dev, dpu_crtc_get_client_type(crtc), &perf); - /* convert bandwidth to kb */ - bw = DIV_ROUND_UP_ULL(bw_sum_of_intfs, 1000); - DRM_DEBUG_ATOMIC("calculated bandwidth=%uk\n", bw); + /* convert bandwidth to kb */ + bw = DIV_ROUND_UP_ULL(perf.bw_ctl, 1000); + DRM_DEBUG_ATOMIC("calculated bandwidth=%uk\n", bw); - threshold = kms->perf.perf_cfg->max_bw_high; + threshold = kms->perf.perf_cfg->max_bw_high; - DRM_DEBUG_ATOMIC("final threshold bw limit = %d\n", threshold); + DRM_DEBUG_ATOMIC("final threshold bw limit = %d\n", threshold); - if (!threshold) { - DPU_ERROR("no bandwidth limits specified\n"); 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Sun, 05 Jan 2025 19:07:47 -0800 (PST) Received: from umbar.lan ([192.130.178.90]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-542238301efsm4869016e87.247.2025.01.05.19.07.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 05 Jan 2025 19:07:46 -0800 (PST) From: Dmitry Baryshkov Date: Mon, 06 Jan 2025 05:07:37 +0200 Subject: [PATCH v4 3/9] drm/msm/dpu: change ib values to u32 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250106-dpu-perf-rework-v4-3-00b248349476@linaro.org> References: <20250106-dpu-perf-rework-v4-0-00b248349476@linaro.org> In-Reply-To: <20250106-dpu-perf-rework-v4-0-00b248349476@linaro.org> To: Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Stephen Boyd , Simona Vetter Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, Dmitry Baryshkov X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2991; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=TTyO9vUJiSzSKuNCLaOk8E6Md2+vo7CigvDNmDQ5dQs=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBne0j5aWLiZNIYu1U6N2nvPJazCBEqQO/PYqrD8 mJvRYv6UeCJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZ3tI+QAKCRCLPIo+Aiko 1X2tB/wJxl1N7EusjgzyUZ5t1JmlEMWYpjphupru0vUy0hFSvAm8SwwDZLpZbuPhNYfNXntq7KB 7b8ZQVe0fb7LyBe1UWe6Pe/cVo+DpO1KuH1nxoyLbqE7/Oqtl2WBbMWatJWqPrwBmSALQuQT83z PZW5EmZH+lsaoISEQAUshn4cpwXUnBQ7qgmi+P8uP4nf7Ou5NeQJ1idIhXP8xDv7vFPcEcZODST sCXZQQ/p0xBchFuH2gCIBFKvDO0ps3xuUpto+tcxDD9xQM0nLkxPVumf9shNCH27Bcw1wrxGZ5w P/hCtu0fw1jBVgEGEPF2qJSJTBbORgC+r9K56k/UIeVbTOX/ X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A The IB values in core_perf calculations (max_per_pipe_ib, fix_core_ib_vote) are expressed in KBps and are passed to icc_set_bw without additional division. Change type of those values to u32. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 4 ++-- drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h | 4 ++-- drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 2 +- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c index f0d490afb53be2f4bc706af91da05bb893a5fe34..7263ab63a692554cd51a7fd91bd6250330179240 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c @@ -135,7 +135,7 @@ static void _dpu_core_perf_calc_crtc(const struct dpu_core_perf *core_perf, } DRM_DEBUG_ATOMIC( - "crtc=%d clk_rate=%llu core_ib=%llu core_ab=%llu\n", + "crtc=%d clk_rate=%llu core_ib=%u core_ab=%llu\n", crtc->base.id, perf->core_clk_rate, perf->max_per_pipe_ib, perf->bw_ctl); } @@ -477,7 +477,7 @@ int dpu_core_perf_debugfs_init(struct dpu_kms *dpu_kms, struct dentry *parent) (u32 *)perf, &dpu_core_perf_mode_fops); debugfs_create_u64("fix_core_clk_rate", 0600, entry, &perf->fix_core_clk_rate); - debugfs_create_u64("fix_core_ib_vote", 0600, entry, + debugfs_create_u32("fix_core_ib_vote", 0600, entry, &perf->fix_core_ib_vote); debugfs_create_u64("fix_core_ab_vote", 0600, entry, &perf->fix_core_ab_vote); diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h index 451bf8021114d9d4a2dfdbb81ed4150fc559c681..ca4595b4ec217697849af02446b23ed0857a0295 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h @@ -19,7 +19,7 @@ * @core_clk_rate: core clock rate request */ struct dpu_core_perf_params { - u64 max_per_pipe_ib; + u32 max_per_pipe_ib; u64 bw_ctl; u64 core_clk_rate; }; @@ -50,7 +50,7 @@ struct dpu_core_perf { struct dpu_core_perf_tune perf_tune; u32 enable_bw_release; u64 fix_core_clk_rate; - u64 fix_core_ib_vote; + u32 fix_core_ib_vote; u64 fix_core_ab_vote; }; diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c index 7191b1a6d41b3a96f956d199398f12b2923e8c82..8a523eb308630943871c2e075d3d0d9094606d05 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c @@ -1487,7 +1487,7 @@ static int dpu_crtc_debugfs_state_show(struct seq_file *s, void *v) seq_printf(s, "core_clk_rate: %llu\n", dpu_crtc->cur_perf.core_clk_rate); seq_printf(s, "bw_ctl: %llu\n", dpu_crtc->cur_perf.bw_ctl); - seq_printf(s, "max_per_pipe_ib: %llu\n", + seq_printf(s, "max_per_pipe_ib: %u\n", dpu_crtc->cur_perf.max_per_pipe_ib); return 0; From patchwork Mon Jan 6 03:07:38 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 13926903 Received: from mail-lf1-f53.google.com (mail-lf1-f53.google.com [209.85.167.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BFBCC86335 for ; Mon, 6 Jan 2025 03:07:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.53 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736132873; cv=none; b=upN7IJman0bjkWc56pjfd807NRKA07ENFshrJ3LWOZ8WQ5y+tlP37byHWcO/5PREdt+7UZT9U+PKdJWOQjRMnae3QtcguTNEBc9tNmeG5Tka72U7tRJbk7FFDhtMNuncWqxyDyX9a4NQ5uISKSbmg3CO7B30g70p1w7g8GcGOf4= ARC-Message-Signature: i=1; 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Sun, 05 Jan 2025 19:07:49 -0800 (PST) Received: from umbar.lan ([192.130.178.90]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-542238301efsm4869016e87.247.2025.01.05.19.07.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 05 Jan 2025 19:07:48 -0800 (PST) From: Dmitry Baryshkov Date: Mon, 06 Jan 2025 05:07:38 +0200 Subject: [PATCH v4 4/9] drm/msm/dpu: make fix_core_ab_vote consistent with fix_core_ib_vote Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250106-dpu-perf-rework-v4-4-00b248349476@linaro.org> References: <20250106-dpu-perf-rework-v4-0-00b248349476@linaro.org> In-Reply-To: <20250106-dpu-perf-rework-v4-0-00b248349476@linaro.org> To: Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Stephen Boyd , Simona Vetter Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, Dmitry Baryshkov X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2302; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=JMIpMFmUuSjIWpzC5uW4TfFD57Bcj868StpQVqk4CIM=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBne0j5yJtIKct8p9ZxKlcKTed0ff/2fXsxmYZkR cqjaLxugFmJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZ3tI+QAKCRCLPIo+Aiko 1QJRB/91HLihkUTCkNJfedXqBJP7HeE1u9hlmhHKfhrQs34HNSx/8F3/rsHVSOHqMSkRKnvOGoG nLK6HfX8ZrPrRU7I3hD0nD4AGRkLsA9TjhY4xq3cG+icaLQAbt218LGaW7EyQmd/61/VkFY/Cu4 iTEB7oMMawkw6Mh7PU6y0acf5owjOVOp4bRFJlm+sXdMwlevTKQIXHL62yYFA0HxfpivnfGuTai 8Rs/rSfzKrHBJALsCt0IAS3jnkdtlnyfOVquR/lYPYiccngjOxzI5A2J5zWQW7Ww50csO1Y0qbq lrMwch96EW9kWy6TJ+aBv3oXAEz9az0/zppFJePMpF9NNuVF X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A The fix_core_ab_vote is an average bandwidth value, used for bandwidth overrides in several cases. However there is an internal inconsistency: fix_core_ib_vote is defined in KBps, while fix_core_ab_vote is defined in Bps. Fix that by changing the type of the variable to u32 and using * 1000ULL multiplier when setting up the dpu_core_perf_params::bw_ctl value. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 4 ++-- drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c index 7263ab63a692554cd51a7fd91bd6250330179240..7cabc8f26908cfd2dbbffebd7c70fc37d9159733 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c @@ -125,7 +125,7 @@ static void _dpu_core_perf_calc_crtc(const struct dpu_core_perf *core_perf, perf->max_per_pipe_ib = 0; perf->core_clk_rate = 0; } else if (core_perf->perf_tune.mode == DPU_PERF_MODE_FIXED) { - perf->bw_ctl = core_perf->fix_core_ab_vote; + perf->bw_ctl = core_perf->fix_core_ab_vote * 1000ULL; perf->max_per_pipe_ib = core_perf->fix_core_ib_vote; perf->core_clk_rate = core_perf->fix_core_clk_rate; } else { @@ -479,7 +479,7 @@ int dpu_core_perf_debugfs_init(struct dpu_kms *dpu_kms, struct dentry *parent) &perf->fix_core_clk_rate); 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Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 5 +++-- drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 3 ++- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c index 7cabc8f26908cfd2dbbffebd7c70fc37d9159733..b93f7556f187d46b325a689ad01ec177cecbc37a 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c @@ -135,9 +135,10 @@ static void _dpu_core_perf_calc_crtc(const struct dpu_core_perf *core_perf, } DRM_DEBUG_ATOMIC( - "crtc=%d clk_rate=%llu core_ib=%u core_ab=%llu\n", + "crtc=%d clk_rate=%llu core_ib=%u core_ab=%u\n", crtc->base.id, perf->core_clk_rate, - perf->max_per_pipe_ib, perf->bw_ctl); + perf->max_per_pipe_ib, + (u32)DIV_ROUND_UP_ULL(perf->bw_ctl, 1000)); } static void dpu_core_perf_aggregate(struct drm_device *ddev, diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c index 8a523eb308630943871c2e075d3d0d9094606d05..ac3c6c5ad1cec3856f0eff2ed71153d3c2dc279e 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c @@ -1486,7 +1486,8 @@ static int dpu_crtc_debugfs_state_show(struct seq_file *s, void *v) seq_printf(s, "intf_mode: %d\n", dpu_crtc_get_intf_mode(crtc)); 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Sun, 05 Jan 2025 19:07:53 -0800 (PST) Received: from umbar.lan ([192.130.178.90]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-542238301efsm4869016e87.247.2025.01.05.19.07.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 05 Jan 2025 19:07:52 -0800 (PST) From: Dmitry Baryshkov Date: Mon, 06 Jan 2025 05:07:40 +0200 Subject: [PATCH v4 6/9] drm/msm/dpu: rename average bandwidth-related debugfs files Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250106-dpu-perf-rework-v4-6-00b248349476@linaro.org> References: <20250106-dpu-perf-rework-v4-0-00b248349476@linaro.org> In-Reply-To: <20250106-dpu-perf-rework-v4-0-00b248349476@linaro.org> To: Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Stephen Boyd , Simona Vetter Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, Dmitry Baryshkov X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; 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Sun, 05 Jan 2025 19:07:56 -0800 (PST) Received: from umbar.lan ([192.130.178.90]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-542238301efsm4869016e87.247.2025.01.05.19.07.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 05 Jan 2025 19:07:54 -0800 (PST) From: Dmitry Baryshkov Date: Mon, 06 Jan 2025 05:07:41 +0200 Subject: [PATCH v4 7/9] drm/msm/dpu: handle perf mode in _dpu_core_perf_crtc_update_bus() Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250106-dpu-perf-rework-v4-7-00b248349476@linaro.org> References: <20250106-dpu-perf-rework-v4-0-00b248349476@linaro.org> In-Reply-To: <20250106-dpu-perf-rework-v4-0-00b248349476@linaro.org> To: Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Stephen Boyd , Simona Vetter Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, Dmitry Baryshkov X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; 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Note, this changes the fix_core_ab_vote. Previously it would be multiplied per the CRTC number, now it will be used directly for interconnect voting. This better reflects user requirements in the case of different resolutions being set on different CRTCs: instead of using the same bandwidth for each CRTC (which is incorrect) user can now calculate overall bandwidth required by all outputs and use that value. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 40 +++++++++++++-------------- 1 file changed, 19 insertions(+), 21 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c index 70f43e8359caee2082f2ca9944a17a6a20aa3d49..7ff3405c6867556a8dc776783b91f1da6c86ef3f 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c @@ -118,22 +118,9 @@ static void _dpu_core_perf_calc_crtc(const struct dpu_core_perf *core_perf, return; } - memset(perf, 0, sizeof(struct dpu_core_perf_params)); - - if (core_perf->perf_tune.mode == DPU_PERF_MODE_MINIMUM) { - perf->bw_ctl = 0; - perf->max_per_pipe_ib = 0; - perf->core_clk_rate = 0; - } else if (core_perf->perf_tune.mode == DPU_PERF_MODE_FIXED) { - perf->bw_ctl = core_perf->fix_core_ab_vote * 1000ULL; - perf->max_per_pipe_ib = core_perf->fix_core_ib_vote; - perf->core_clk_rate = core_perf->fix_core_clk_rate; - } else { - perf->bw_ctl = _dpu_core_perf_calc_bw(perf_cfg, crtc); - perf->max_per_pipe_ib = perf_cfg->min_dram_ib; - perf->core_clk_rate = _dpu_core_perf_calc_clk(perf_cfg, crtc, state); - } - + perf->bw_ctl = _dpu_core_perf_calc_bw(perf_cfg, crtc); + perf->max_per_pipe_ib = perf_cfg->min_dram_ib; + perf->core_clk_rate = _dpu_core_perf_calc_clk(perf_cfg, crtc, state); DRM_DEBUG_ATOMIC( "crtc=%d clk_rate=%llu core_ib=%u core_ab=%u\n", crtc->base.id, perf->core_clk_rate, @@ -222,18 +209,29 @@ static int _dpu_core_perf_crtc_update_bus(struct dpu_kms *kms, { struct dpu_core_perf_params perf = { 0 }; int i, ret = 0; - u64 avg_bw; + u32 avg_bw; + u32 peak_bw; if (!kms->num_paths) return 0; - dpu_core_perf_aggregate(crtc->dev, dpu_crtc_get_client_type(crtc), &perf); + if (kms->perf.perf_tune.mode == DPU_PERF_MODE_MINIMUM) { + avg_bw = 0; + peak_bw = 0; + } else if (kms->perf.perf_tune.mode == DPU_PERF_MODE_FIXED) { + avg_bw = kms->perf.fix_core_ab_vote; + peak_bw = kms->perf.fix_core_ib_vote; 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Change that to allow overriding individual values (e.g. one can override just clock or just average bandwidth vote). The maximum values allowed for those entries by the platform can be read from the 'max_core_ab' and 'max_core_clk_rate' files in debugfs. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 87 +++------------------------ drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h | 10 --- 2 files changed, 9 insertions(+), 88 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c index 7ff3405c6867556a8dc776783b91f1da6c86ef3f..913eb4c01abe10c1ed84215fbbee50abd69e9317 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c @@ -17,20 +17,6 @@ #include "dpu_crtc.h" #include "dpu_core_perf.h" -/** - * enum dpu_perf_mode - performance tuning mode - * @DPU_PERF_MODE_NORMAL: performance controlled by user mode client - * @DPU_PERF_MODE_MINIMUM: performance bounded by minimum setting - * @DPU_PERF_MODE_FIXED: performance bounded by fixed setting - * @DPU_PERF_MODE_MAX: maximum value, used for error checking - */ -enum dpu_perf_mode { - DPU_PERF_MODE_NORMAL, - DPU_PERF_MODE_MINIMUM, - DPU_PERF_MODE_FIXED, - DPU_PERF_MODE_MAX -}; - /** * _dpu_core_perf_calc_bw() - to calculate BW per crtc * @perf_cfg: performance configuration @@ -215,18 +201,16 @@ static int _dpu_core_perf_crtc_update_bus(struct dpu_kms *kms, if (!kms->num_paths) return 0; - if (kms->perf.perf_tune.mode == DPU_PERF_MODE_MINIMUM) { - avg_bw = 0; - peak_bw = 0; - } else if (kms->perf.perf_tune.mode == DPU_PERF_MODE_FIXED) { + dpu_core_perf_aggregate(crtc->dev, dpu_crtc_get_client_type(crtc), &perf); + + avg_bw = div_u64(perf.bw_ctl, 1000); /*Bps_to_icc*/ + peak_bw = perf.max_per_pipe_ib; + + if (kms->perf.fix_core_ab_vote) avg_bw = kms->perf.fix_core_ab_vote; - peak_bw = kms->perf.fix_core_ib_vote; - } else { - dpu_core_perf_aggregate(crtc->dev, dpu_crtc_get_client_type(crtc), &perf); - avg_bw = div_u64(perf.bw_ctl, 1000); /*Bps_to_icc*/ - peak_bw = perf.max_per_pipe_ib; - } + if (kms->perf.fix_core_ib_vote) + peak_bw = kms->perf.fix_core_ib_vote; avg_bw /= kms->num_paths; @@ -275,12 +259,9 @@ static u64 _dpu_core_perf_get_core_clk_rate(struct dpu_kms *kms) struct drm_crtc *crtc; struct dpu_crtc_state *dpu_cstate; - if (kms->perf.perf_tune.mode == DPU_PERF_MODE_FIXED) + if (kms->perf.fix_core_clk_rate) return kms->perf.fix_core_clk_rate; - if (kms->perf.perf_tune.mode == DPU_PERF_MODE_MINIMUM) - return kms->perf.max_core_clk_rate; - clk_rate = 0; drm_for_each_crtc(crtc, kms->dev) { if (crtc->enabled) { @@ -396,54 +377,6 @@ int dpu_core_perf_crtc_update(struct drm_crtc *crtc, #ifdef CONFIG_DEBUG_FS -static ssize_t _dpu_core_perf_mode_write(struct file *file, - const char __user *user_buf, size_t count, loff_t *ppos) -{ - struct dpu_core_perf *perf = file->private_data; - u32 perf_mode = 0; - int ret; - - ret = kstrtouint_from_user(user_buf, count, 0, &perf_mode); - if (ret) - return ret; - - if (perf_mode >= DPU_PERF_MODE_MAX) - return -EINVAL; - - if (perf_mode == DPU_PERF_MODE_FIXED) { - DRM_INFO("fix performance mode\n"); - } else if (perf_mode == DPU_PERF_MODE_MINIMUM) { - /* run the driver with max clk and BW vote */ - DRM_INFO("minimum performance mode\n"); - } else if (perf_mode == DPU_PERF_MODE_NORMAL) { - /* reset the perf tune params to 0 */ - DRM_INFO("normal performance mode\n"); - } - perf->perf_tune.mode = perf_mode; - - return count; -} - -static ssize_t _dpu_core_perf_mode_read(struct file *file, - char __user *buff, size_t count, loff_t *ppos) -{ - struct dpu_core_perf *perf = file->private_data; - int len; - char buf[128]; - - len = scnprintf(buf, sizeof(buf), - "mode %d\n", - perf->perf_tune.mode); - - return simple_read_from_buffer(buff, count, ppos, buf, len); -} - -static const struct file_operations dpu_core_perf_mode_fops = { - .open = simple_open, - .read = _dpu_core_perf_mode_read, - .write = _dpu_core_perf_mode_write, -}; - /** * dpu_core_perf_debugfs_init - initialize debugfs for core performance context * @dpu_kms: Pointer to the dpu_kms struct @@ -472,8 +405,6 @@ int dpu_core_perf_debugfs_init(struct dpu_kms *dpu_kms, struct dentry *parent) (u32 *)&perf->perf_cfg->min_llcc_ib); debugfs_create_u32("min_dram_ib", 0400, entry, (u32 *)&perf->perf_cfg->min_dram_ib); - debugfs_create_file("perf_mode", 0600, entry, - (u32 *)perf, &dpu_core_perf_mode_fops); debugfs_create_u64("fix_core_clk_rate", 0600, entry, &perf->fix_core_clk_rate); debugfs_create_u32("fix_core_ib_vote", 0600, entry, diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h index 5e07119c14c6a9ed3413d0eaddbd93df5cc3f79d..9d8516ca32d162b1e277ec88067e5c21abeb2017 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h @@ -24,20 +24,11 @@ struct dpu_core_perf_params { u64 core_clk_rate; }; -/** - * struct dpu_core_perf_tune - definition of performance tuning control - * @mode: performance mode - */ -struct dpu_core_perf_tune { - u32 mode; -}; - /** * struct dpu_core_perf - definition of core performance context * @perf_cfg: Platform-specific performance configuration * @core_clk_rate: current core clock rate * @max_core_clk_rate: maximum allowable core clock rate - * @perf_tune: debug control for performance tuning * @enable_bw_release: debug control for bandwidth release * @fix_core_clk_rate: fixed core clock request in Hz used in mode 2 * @fix_core_ib_vote: fixed core ib vote in bps used in mode 2 @@ -47,7 +38,6 @@ struct dpu_core_perf { const struct dpu_perf_cfg *perf_cfg; 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Sun, 05 Jan 2025 19:07:59 -0800 (PST) Received: from umbar.lan ([192.130.178.90]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-542238301efsm4869016e87.247.2025.01.05.19.07.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 05 Jan 2025 19:07:58 -0800 (PST) From: Dmitry Baryshkov Date: Mon, 06 Jan 2025 05:07:43 +0200 Subject: [PATCH v4 9/9] drm/msm/dpu: drop dpu_core_perf_params::max_per_pipe_ib Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250106-dpu-perf-rework-v4-9-00b248349476@linaro.org> References: <20250106-dpu-perf-rework-v4-0-00b248349476@linaro.org> In-Reply-To: <20250106-dpu-perf-rework-v4-0-00b248349476@linaro.org> To: Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Stephen Boyd , Simona Vetter Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, Dmitry Baryshkov , Konrad Dybcio X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=4335; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=oxkaR0JZPrIZxqN448X3RF02D4PAZKi9Fntcg0zH3oQ=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBne0j6o/3hLawn8SE5xGF3Cxo+0quVgwdVB4hEV r7+b303Z0+JATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZ3tI+gAKCRCLPIo+Aiko 1WOHB/sGxZ3bsc5J6lsIkxoTOJ/FYTMoXYRfiGeMAzqx2U+QcRjiElnxMixlkbd0BY3RC+swG9g sHNZnMOM4mPJ22MwFJscMYiTp+z65LT1DAzUegjYwGjmTCmUW2CsgiMlZyrGnF0FSOJb3N/x7Iu NpV6luraN/VtA9x57AAWzWkwmg7QfWV97KjQnFUqz2BkIs1MH8G7pltviJB845n6kdUy+0B6oRE 7VxOvJk8poM/0jND349kMAxh2XxarpjXmiwTzQeKvC10punUFxH/IOUNn2govwpFpH6PVmoxwH9 d4yKa0oqrNq5emyCw0YWEXHzQ8Wo1Fym2DwAVYvqlptEyTPD X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A The max_per_pipe_ib is a constant across all CRTCs and is read from the catalog. The override value is also applied at the _dpu_core_perf_crtc_update_bus() time. Drop corresponding calculations and read the value directly at icc_set_bw() time. Suggested-by: Konrad Dybcio Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 16 ++++------------ drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h | 2 -- drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 2 -- 3 files changed, 4 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c index 913eb4c01abe10c1ed84215fbbee50abd69e9317..62dab5883513dc570076da5a64e32e502dd4320b 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c @@ -105,12 +105,10 @@ static void _dpu_core_perf_calc_crtc(const struct dpu_core_perf *core_perf, } perf->bw_ctl = _dpu_core_perf_calc_bw(perf_cfg, crtc); - perf->max_per_pipe_ib = perf_cfg->min_dram_ib; perf->core_clk_rate = _dpu_core_perf_calc_clk(perf_cfg, crtc, state); DRM_DEBUG_ATOMIC( - "crtc=%d clk_rate=%llu core_ib=%u core_ab=%u\n", + "crtc=%d clk_rate=%llu core_ab=%u\n", crtc->base.id, perf->core_clk_rate, - perf->max_per_pipe_ib, (u32)DIV_ROUND_UP_ULL(perf->bw_ctl, 1000)); } @@ -126,9 +124,6 @@ static void dpu_core_perf_aggregate(struct drm_device *ddev, curr_client_type == dpu_crtc_get_client_type(tmp_crtc)) { dpu_cstate = to_dpu_crtc_state(tmp_crtc->state); - perf->max_per_pipe_ib = max(perf->max_per_pipe_ib, - dpu_cstate->new_perf.max_per_pipe_ib); - perf->bw_ctl += dpu_cstate->new_perf.bw_ctl; DRM_DEBUG_ATOMIC("crtc=%d bw=%llu\n", @@ -204,7 +199,7 @@ static int _dpu_core_perf_crtc_update_bus(struct dpu_kms *kms, dpu_core_perf_aggregate(crtc->dev, dpu_crtc_get_client_type(crtc), &perf); avg_bw = div_u64(perf.bw_ctl, 1000); /*Bps_to_icc*/ - peak_bw = perf.max_per_pipe_ib; + peak_bw = kms->catalog->perf->min_dram_ib; if (kms->perf.fix_core_ab_vote) avg_bw = kms->perf.fix_core_ab_vote; @@ -315,15 +310,12 @@ int dpu_core_perf_crtc_update(struct drm_crtc *crtc, * 2. new bandwidth vote - "ab or ib vote" is lower * than current vote at end of commit or stop. */ - if ((params_changed && ((new->bw_ctl > old->bw_ctl) || - (new->max_per_pipe_ib > old->max_per_pipe_ib))) || - (!params_changed && ((new->bw_ctl < old->bw_ctl) || - (new->max_per_pipe_ib < old->max_per_pipe_ib)))) { + if ((params_changed && new->bw_ctl > old->bw_ctl) || + (!params_changed && new->bw_ctl < old->bw_ctl)) { DRM_DEBUG_ATOMIC("crtc=%d p=%d new_bw=%llu,old_bw=%llu\n", crtc->base.id, params_changed, new->bw_ctl, old->bw_ctl); old->bw_ctl = new->bw_ctl; - old->max_per_pipe_ib = new->max_per_pipe_ib; update_bus = true; } diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h index 9d8516ca32d162b1e277ec88067e5c21abeb2017..863a6fc1f30c21cf2030a30be5fe62b024b3b820 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h @@ -14,12 +14,10 @@ /** * struct dpu_core_perf_params - definition of performance parameters - * @max_per_pipe_ib: maximum instantaneous bandwidth request * @bw_ctl: arbitrated bandwidth request * @core_clk_rate: core clock rate request */ struct dpu_core_perf_params { - u32 max_per_pipe_ib; u64 bw_ctl; u64 core_clk_rate; }; diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c index ac3c6c5ad1cec3856f0eff2ed71153d3c2dc279e..cc240d3c7faa89254a575237634d0d0fa8f04f73 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c @@ -1488,8 +1488,6 @@ static int dpu_crtc_debugfs_state_show(struct seq_file *s, void *v) dpu_crtc->cur_perf.core_clk_rate); seq_printf(s, "bw_ctl: %uk\n", (u32)DIV_ROUND_UP_ULL(dpu_crtc->cur_perf.bw_ctl, 1000)); - seq_printf(s, "max_per_pipe_ib: %u\n", - dpu_crtc->cur_perf.max_per_pipe_ib); return 0; }