From patchwork Wed Jan 15 06:33:23 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen Wang X-Patchwork-Id: 13939869 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E5912C02185 for ; Wed, 15 Jan 2025 06:33:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Cc:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=pJAsfcxBi9xXOwKjeXROkkuNLRzw5Hj8ZS5thnXt63A=; b=VgzQaHXtw0ym9Y Wo2BJidCvlbSPVkSFcg8Rslg16OCfQd02hQeBE7IMqQXZnyAlgaXW5NAzBuwpIKk8qaMb0i/DkyBl hrlJmYiII9uZb9y2Al1X7tq/x3QhWSbE4L9IBAEuV8OVVNiCaKmFumoB23lNmTX/BPg+CkQ+Pyc9a /Vh2aH82gQJPRhwjOqDSY3lLNJe0y0+QfPT7fILWsV6oC29Pl6bXRvG34ioDM3AuUfjk0B5YsBr0I 04QE9tH+PFw3MSoJXG0itQ0C5BXNShUJkWDUNz96d9eS+t2qaxqgt+gK4DRhq6425JcsBRqjFvLXp 6fdX1HnsoF/o2kfQe8yQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tXwyA-0000000Ao7p-1E27; Wed, 15 Jan 2025 06:33:38 +0000 Received: from mail-ot1-x331.google.com ([2607:f8b0:4864:20::331]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tXwy7-0000000Ao5y-2SID for linux-riscv@lists.infradead.org; Wed, 15 Jan 2025 06:33:36 +0000 Received: by mail-ot1-x331.google.com with SMTP id 46e09a7af769-71e287897ceso4289121a34.0 for ; Tue, 14 Jan 2025 22:33:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1736922814; x=1737527614; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=vjPLS+87c164zvN8uut+ZV6gycKxJWoni1PwVPwNYxc=; b=gYozak/geK2iNYulPwbgOO+gKNrYB13ufn5R7rYzk+opSEsRAq+v4BcVKn5SRqta0B DkKHWf1DdaK4HueCCOU9m99vqQ2r8mOe3TzfwHysb/BZWCi2ICPI70OMf8uRES389eTe dz/DjoqMrjoKi/F020W1HLYzm2ev56lHWW0UndNopihQettNGrkcGEJVe89xQMRD1vNL NZxBAaH6VnJypagbUDHl0hyNp2VhynlC3Zwj6YX6Xv0nEbRhsw9/A09kNIngJBvqcRkj 7s9B6lGwvXgZ4Gj7j8zTJc/O0lSsVXHkBXlSRFSfzNvOBME5I+m49F8HUWMQkuyy+idQ 9Neg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1736922814; x=1737527614; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=vjPLS+87c164zvN8uut+ZV6gycKxJWoni1PwVPwNYxc=; b=wmjAwoJm6l/5CYxez/2nzWgVhMh7Ks5TeAd+i+EVf8zDJ34Tj8PaQLz6Tzrwvs5N00 SdlQg9VKpxipd7231zGRXLBLi6RyfeCipFEb4sDHFZuAUpqGVrWs9h+tI5EhGo/YngR3 ip1CDnTsjvHlHNLDcXM9PUIC/eHE9fTQF+1whuvdTCFNoszxM5iJQfJncp4eti7X4rWm TpRFezv4b5bFfresRNb26gPapRA5AA4d0WkscyE257YawmiiUWWpz/oqe5csIzscV6tM CXqhwCDYUMvE4U2VqBgCg8Sl+mQm9RN5Gr0Vi5Xu1Muz1m0O8qzqNchqrq40GgHZsLPO z08A== X-Forwarded-Encrypted: i=1; AJvYcCWUOKJremJ7QdxeoOobD3UBM4aBiflBlnKK/zjj72wze+QOiIHjJITucSwmZqzbhYJb49+AXwv0CBnE4Q==@lists.infradead.org X-Gm-Message-State: AOJu0Yy1D2tcj8RXti/PzpnpGsZA1u8DziLAzsrPcMid9lpJ+sigUYaM OKFff9Y/bzNiwMaF0GWX5Aa49DmnN4da89JCzZD/Zx7YKGeb5BFC X-Gm-Gg: ASbGncuEK7pgqiCk5orKVp6gMawJ2V7BZBYDEPuoFSNqagz1Lzb9a6YV9hFpwG5TUU/ B828mqj3uoeoAkWqnRqPC0FmKtXw7kkeyGyn2AZ5g2NPwHPKTYes53EzCdQE50gWcKquAl7+brw FAtnnEcr4lSWHchdWrsqOsQ72iGw9bWaNNM0TYqxSGnvf3scsMcjwqaIi0iJtGDtki9bM3WwumL S8X2F4CQwTIqrgTk90gN0diVQ8LQCrvYHzSb+UvozrqgXKMWgB8zxRglAOslCH7HTE= X-Google-Smtp-Source: AGHT+IHJ0fRsrZOJ5WCpP1mUvMfEhSmwHHeo2V+axn7r2mLfWnYK4N8MJqFEaFRilpt3uQk+aUC6oA== X-Received: by 2002:a05:6830:630e:b0:71e:240a:4828 with SMTP id 46e09a7af769-721e2e59135mr19635685a34.16.1736922814398; Tue, 14 Jan 2025 22:33:34 -0800 (PST) Received: from localhost.localdomain ([122.8.183.87]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-7231861bfebsm5394941a34.51.2025.01.14.22.33.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Jan 2025 22:33:33 -0800 (PST) From: Chen Wang To: u.kleine-koenig@baylibre.com, aou@eecs.berkeley.edu, arnd@arndb.de, unicorn_wang@outlook.com, conor+dt@kernel.org, guoren@kernel.org, inochiama@outlook.com, krzk+dt@kernel.org, palmer@dabbelt.com, paul.walmsley@sifive.com, robh@kernel.org, tglx@linutronix.de, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, chao.wei@sophgo.com, xiaoguang.xing@sophgo.com, fengchun.li@sophgo.com, samuel.holland@sifive.com, christophe.jaillet@wanadoo.fr Subject: [PATCH v3 1/3] dt-bindings: interrupt-controller: Add Sophgo SG2042 MSI Date: Wed, 15 Jan 2025 14:33:23 +0800 Message-Id: X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250114_223335_635164_9CF73C31 X-CRM114-Status: GOOD ( 11.67 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org From: Chen Wang Add binding for Sophgo SG2042 MSI controller. Signed-off-by: Chen Wang --- .../sophgo,sg2042-msi.yaml | 58 +++++++++++++++++++ 1 file changed, 58 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-msi.yaml diff --git a/Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-msi.yaml b/Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-msi.yaml new file mode 100644 index 000000000000..f641df191787 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/sophgo,sg2042-msi.yaml @@ -0,0 +1,58 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/sophgo,sg2042-msi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Sophgo SG2042 MSI Controller + +maintainers: + - Chen Wang + +description: + This interrupt controller is in Sophgo SG2042 for transforming interrupts from + PCIe MSI to PLIC interrupts. + +allOf: + - $ref: /schemas/interrupts.yaml# + - $ref: /schemas/interrupt-controller/msi-controller.yaml# + +properties: + compatible: + const: sophgo,sg2042-msi + + reg: + items: + - description: msi doorbell address + - description: clear register + + reg-names: + items: + - const: doorbell + - const: clr + + msi-controller: true + + msi-ranges: + maxItems: 1 + +required: + - compatible + - reg + - reg-names + - msi-controller + - msi-ranges + +unevaluatedProperties: false + +examples: + - | + #include + msi-controller@30000000 { + compatible = "sophgo,sg2042-msi"; + reg = <0x30000000 0x4>, <0x30000008 0x4>; + reg-names = "doorbell", "clr"; + msi-controller; + msi-ranges = <&plic 64 IRQ_TYPE_LEVEL_HIGH 32>; + interrupt-parent = <&plic>; + }; From patchwork Wed Jan 15 06:33:45 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen Wang X-Patchwork-Id: 13939870 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 47DD1C02180 for ; Wed, 15 Jan 2025 06:34:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Cc:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=qkHz9Oq8jgNaUgkjUkOFghkh8z6Ovx/+280uGLGPZsw=; b=AbkV8W4jTMpWpv Z8zYIkt3v8PfTckHJ1tvUog6VkMUyvXfBLcRBjTuIrcAC+VvoJlQ4neXUgYPozbo+8iOlP8NJ/fyr /CHqB1WZsNfKqrsM/5maTWvqE7SB9ip6MK2ep02Qow1J2aZCPurCxPpbJnhFi47hKX2HJ+XhOj5UV DPDYG08HFrgD7K7jSVRs/6JZKyPn2tuj45G3eRdXncwYILAgP76f0/7GL+ILcGqfV0v5mdFyXIAvy JJcJR50WcpCPjY9HwPpODahZkT+Sp2fLbnF1QNih7oatiE8+A+QATUN4gBrDxgSjtlLuHOfIAj3j/ KWDJdZleq/0kSsuLwplA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tXwyT-0000000AoE9-3bEl; Wed, 15 Jan 2025 06:33:57 +0000 Received: from mail-ot1-x330.google.com ([2607:f8b0:4864:20::330]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tXwyR-0000000AoD1-0lyn for linux-riscv@lists.infradead.org; Wed, 15 Jan 2025 06:33:56 +0000 Received: by mail-ot1-x330.google.com with SMTP id 46e09a7af769-71e2dccdb81so4357548a34.1 for ; Tue, 14 Jan 2025 22:33:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1736922834; x=1737527634; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=UzjTeEY2+sET1QtOARyHjdsr1nFiQCmKj/PSNb9JIQ4=; b=nBPqEiImiLZRoW2Q1ySXmzCME3rfhYpwXupXV1fmnAD0gF1Nxo18r1WckSS3XpMI28 NMiKV4R68bU9glL6kb1D95R6za9ZnG5QH7ibBGvxZlqQ7Ycv2LewGIl1bqwshHxuedHu QDYzA6jKwwJHtI4wdXsvVEbXGOv3kSG3Q+gHVB4TO9B39FG0sOKZ2lvsmHpqoPiHSuld F/wAU9uUF7k/Vqu3MjxbBx1FOIFz8u7PdAtLf6QYpVGsMp6+DY3sh9ONSjJ9sHg2pzRa c2yco0+2P9j19lJuLhIaqqkxQPZHSrl37OGKC81BnhZYtQ/RZaS0Z3JUHPdcMvEnU3EP sxCg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1736922834; x=1737527634; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=UzjTeEY2+sET1QtOARyHjdsr1nFiQCmKj/PSNb9JIQ4=; b=crbWMRis/ZPX0+uch3HXoosr0mgiXuZtpIRZuc88t5HhXNxGEjet3RpwsuvQj3QFbH JHkvLraMbZgt0wt44aVn3T01vQA/pdBi6co7v3OmbU6kOQ+7SKql9eCcGv6QBzIsHBCO 66P+Gb43lI0pSYAaagwV4XiSBjcFIB+vP75XI+whN9S3KwuXCvHk/n7DEdsL3mfUenPl 2pUuvrgADwLlK68d/w+TDURG4+0IRutGU0W0GRhimInqqOmJ0/yHoj+7kGspRgLfIpHv EDW57dNtlf521kD8wZ8oBFWxxy76gokZmpmU0YkNZHhyNAmVZ5zG/VOp2haIR9zrsVIJ stnQ== X-Forwarded-Encrypted: i=1; AJvYcCXwFedkqa2Cx6vk5XmHtu5VPE5z9kDdf/aWElzRx/KyMvxLAbaol9EIrLr28HMwsV8SgNnKfavgP4+SYg==@lists.infradead.org X-Gm-Message-State: AOJu0YwGyoECJ2twSCuj/QbfxKUf3BC2EiWUIlkcof0Y/sIL2e/Adoou NodS/MfL6rFkWybk8lGWr8ww1ayo6lK2ZVp67ZtFQPF9ZCYv8Vdj X-Gm-Gg: ASbGncucGy6mGNGW/8ymIS1U4THU3kHuizLKnRmMG83/Mi13TXq/gkABoQOfG7ueimf 9tKkRomaulHGVK5fbJ74SyU6fDo+hYbgBRwvQogwlvO1qi9u7Jt61BoZufWHuOUZGZM5e+z4xuh K56Mzqz36v/w1MGtfowozcpExgxBdpgDgt2EKj5yiH986QEnjn2ZKYlNQqmPlDFPIn2gRMfoC72 2J+4NzXR872lIwtxrCwb3E00LXAQnKhRx3pzGH4sirV3PoHSWkJfFVUMkhPG9BXNdU= X-Google-Smtp-Source: AGHT+IHXAw89dGDyX9Nw8CfePHQKR3L/8boZN0/bHFRvrKiAMKe05eg8QKM7xv5N0LeiBS3sNhSU1g== X-Received: by 2002:a05:6830:7185:b0:71d:fb64:b601 with SMTP id 46e09a7af769-721e2ef8013mr19422504a34.27.1736922834050; Tue, 14 Jan 2025 22:33:54 -0800 (PST) Received: from localhost.localdomain ([122.8.183.87]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-7232698f926sm4756652a34.40.2025.01.14.22.33.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Jan 2025 22:33:52 -0800 (PST) From: Chen Wang To: u.kleine-koenig@baylibre.com, aou@eecs.berkeley.edu, arnd@arndb.de, unicorn_wang@outlook.com, conor+dt@kernel.org, guoren@kernel.org, inochiama@outlook.com, krzk+dt@kernel.org, palmer@dabbelt.com, paul.walmsley@sifive.com, robh@kernel.org, tglx@linutronix.de, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, chao.wei@sophgo.com, xiaoguang.xing@sophgo.com, fengchun.li@sophgo.com, samuel.holland@sifive.com, christophe.jaillet@wanadoo.fr Subject: [PATCH v3 2/3] irqchip: Add the Sophgo SG2042 MSI interrupt controller Date: Wed, 15 Jan 2025 14:33:45 +0800 Message-Id: X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250114_223355_227353_F1429E61 X-CRM114-Status: GOOD ( 24.96 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org From: Chen Wang Add driver for Sophgo SG2042 MSI interrupt controller. Signed-off-by: Chen Wang --- drivers/irqchip/Kconfig | 12 ++ drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-sg2042-msi.c | 268 +++++++++++++++++++++++++++++++ 3 files changed, 281 insertions(+) create mode 100644 drivers/irqchip/irq-sg2042-msi.c diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig index 9bee02db1643..161fb5df857f 100644 --- a/drivers/irqchip/Kconfig +++ b/drivers/irqchip/Kconfig @@ -749,6 +749,18 @@ config MCHP_EIC help Support for Microchip External Interrupt Controller. +config SOPHGO_SG2042_MSI + bool "Sophgo SG2042 MSI Controller" + depends on ARCH_SOPHGO || COMPILE_TEST + depends on PCI + select IRQ_DOMAIN_HIERARCHY + select IRQ_MSI_LIB + select PCI_MSI + help + Support for the Sophgo SG2042 MSI Controller. + This on-chip interrupt controller enables MSI sources to be + routed to the primary PLIC controller on SoC. + config SUNPLUS_SP7021_INTC bool "Sunplus SP7021 interrupt controller" if COMPILE_TEST default SOC_SP7021 diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile index 25e9ad29b8c4..dd60e597491d 100644 --- a/drivers/irqchip/Makefile +++ b/drivers/irqchip/Makefile @@ -128,4 +128,5 @@ obj-$(CONFIG_WPCM450_AIC) += irq-wpcm450-aic.o obj-$(CONFIG_IRQ_IDT3243X) += irq-idt3243x.o obj-$(CONFIG_APPLE_AIC) += irq-apple-aic.o obj-$(CONFIG_MCHP_EIC) += irq-mchp-eic.o +obj-$(CONFIG_SOPHGO_SG2042_MSI) += irq-sg2042-msi.o obj-$(CONFIG_SUNPLUS_SP7021_INTC) += irq-sp7021-intc.o diff --git a/drivers/irqchip/irq-sg2042-msi.c b/drivers/irqchip/irq-sg2042-msi.c new file mode 100644 index 000000000000..1f88e1671e5c --- /dev/null +++ b/drivers/irqchip/irq-sg2042-msi.c @@ -0,0 +1,268 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * SG2042 MSI Controller + * + * Copyright (C) 2024 Sophgo Technology Inc. + * Copyright (C) 2024 Chen Wang + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "irq-msi-lib.h" + +#define SG2042_MAX_MSI_VECTOR 32 + +struct sg2042_msi_chipdata { + void __iomem *reg_clr; // clear reg, see TRM, 10.1.33, GP_INTR0_CLR + + phys_addr_t doorbell_addr; // see TRM, 10.1.32, GP_INTR0_SET + + u32 irq_first; // The vector number that MSIs starts + u32 num_irqs; // The number of vectors for MSIs + + DECLARE_BITMAP(msi_map, SG2042_MAX_MSI_VECTOR); + struct mutex msi_map_lock; // lock for msi_map +}; + +static int sg2042_msi_allocate_hwirq(struct sg2042_msi_chipdata *data, int num_req) +{ + int first; + + guard(mutex)(&data->msi_map_lock); + first = bitmap_find_free_region(data->msi_map, data->num_irqs, + get_count_order(num_req)); + return first >= 0 ? first : -ENOSPC; +} + +static void sg2042_msi_free_hwirq(struct sg2042_msi_chipdata *data, + int hwirq, int num_req) +{ + guard(mutex)(&data->msi_map_lock); + bitmap_release_region(data->msi_map, hwirq, get_count_order(num_req)); +} + +static void sg2042_msi_irq_ack(struct irq_data *d) +{ + struct sg2042_msi_chipdata *data = irq_data_get_irq_chip_data(d); + int bit_off = d->hwirq; + + writel(1 << bit_off, data->reg_clr); + + irq_chip_ack_parent(d); +} + +static void sg2042_msi_irq_compose_msi_msg(struct irq_data *d, + struct msi_msg *msg) +{ + struct sg2042_msi_chipdata *data = irq_data_get_irq_chip_data(d); + + msg->address_hi = upper_32_bits(data->doorbell_addr); + msg->address_lo = lower_32_bits(data->doorbell_addr); + msg->data = 1 << d->hwirq; +} + +static const struct irq_chip sg2042_msi_middle_irq_chip = { + .name = "SG2042 MSI", + .irq_ack = sg2042_msi_irq_ack, + .irq_mask = irq_chip_mask_parent, + .irq_unmask = irq_chip_unmask_parent, +#ifdef CONFIG_SMP + .irq_set_affinity = irq_chip_set_affinity_parent, +#endif + .irq_compose_msi_msg = sg2042_msi_irq_compose_msi_msg, +}; + +static int sg2042_msi_parent_domain_alloc(struct irq_domain *domain, + unsigned int virq, int hwirq) +{ + struct sg2042_msi_chipdata *data = domain->host_data; + struct irq_fwspec fwspec; + struct irq_data *d; + int ret; + + fwspec.fwnode = domain->parent->fwnode; + fwspec.param_count = 2; + fwspec.param[0] = data->irq_first + hwirq; + fwspec.param[1] = IRQ_TYPE_EDGE_RISING; + + ret = irq_domain_alloc_irqs_parent(domain, virq, 1, &fwspec); + if (ret) + return ret; + + d = irq_domain_get_irq_data(domain->parent, virq); + return d->chip->irq_set_type(d, IRQ_TYPE_EDGE_RISING); +} + +static int sg2042_msi_middle_domain_alloc(struct irq_domain *domain, + unsigned int virq, + unsigned int nr_irqs, void *args) +{ + struct sg2042_msi_chipdata *data = domain->host_data; + int hwirq, err, i; + + hwirq = sg2042_msi_allocate_hwirq(data, nr_irqs); + if (hwirq < 0) + return hwirq; + + for (i = 0; i < nr_irqs; i++) { + err = sg2042_msi_parent_domain_alloc(domain, virq + i, hwirq + i); + if (err) + goto err_hwirq; + + irq_domain_set_hwirq_and_chip(domain, virq + i, hwirq + i, + &sg2042_msi_middle_irq_chip, data); + } + + return 0; + +err_hwirq: + sg2042_msi_free_hwirq(data, hwirq, nr_irqs); + irq_domain_free_irqs_parent(domain, virq, i); + + return err; +} + +static void sg2042_msi_middle_domain_free(struct irq_domain *domain, + unsigned int virq, + unsigned int nr_irqs) +{ + struct irq_data *d = irq_domain_get_irq_data(domain, virq); + struct sg2042_msi_chipdata *data = irq_data_get_irq_chip_data(d); + + irq_domain_free_irqs_parent(domain, virq, nr_irqs); + sg2042_msi_free_hwirq(data, d->hwirq, nr_irqs); +} + +static const struct irq_domain_ops sg2042_msi_middle_domain_ops = { + .alloc = sg2042_msi_middle_domain_alloc, + .free = sg2042_msi_middle_domain_free, + .select = msi_lib_irq_domain_select, +}; + +#define SG2042_MSI_FLAGS_REQUIRED (MSI_FLAG_USE_DEF_DOM_OPS | \ + MSI_FLAG_USE_DEF_CHIP_OPS) + +#define SG2042_MSI_FLAGS_SUPPORTED MSI_GENERIC_FLAGS_MASK + +static struct msi_parent_ops sg2042_msi_parent_ops = { + .required_flags = SG2042_MSI_FLAGS_REQUIRED, + .supported_flags = SG2042_MSI_FLAGS_SUPPORTED, + .bus_select_mask = MATCH_PCI_MSI, + .bus_select_token = DOMAIN_BUS_NEXUS, + .prefix = "SG2042-", + .init_dev_msi_info = msi_lib_init_dev_msi_info, +}; + +static int sg2042_msi_init_domains(struct sg2042_msi_chipdata *data, + struct device_node *node) +{ + struct fwnode_handle *fwnode = of_node_to_fwnode(node); + struct irq_domain *plic_domain, *middle_domain; + struct device_node *plic_node; + + if (!of_find_property(node, "interrupt-parent", NULL)) { + pr_err("Can't find interrupt-parent!\n"); + return -EINVAL; + } + + plic_node = of_irq_find_parent(node); + if (!plic_node) { + pr_err("Failed to find the PLIC node!\n"); + return -ENXIO; + } + + plic_domain = irq_find_host(plic_node); + of_node_put(plic_node); + if (!plic_domain) { + pr_err("Failed to find the PLIC domain\n"); + return -ENXIO; + } + + middle_domain = irq_domain_create_hierarchy(plic_domain, 0, data->num_irqs, + fwnode, + &sg2042_msi_middle_domain_ops, + data); + if (!middle_domain) { + pr_err("Failed to create the MSI middle domain\n"); + return -ENOMEM; + } + + irq_domain_update_bus_token(middle_domain, DOMAIN_BUS_NEXUS); + + middle_domain->flags |= IRQ_DOMAIN_FLAG_MSI_PARENT; + middle_domain->msi_parent_ops = &sg2042_msi_parent_ops; + + return 0; +} + +static int sg2042_msi_probe(struct platform_device *pdev) +{ + struct sg2042_msi_chipdata *data; + struct of_phandle_args args = {}; + struct resource *res; + int ret; + + data = devm_kzalloc(&pdev->dev, sizeof(struct sg2042_msi_chipdata), GFP_KERNEL); + if (!data) + return -ENOMEM; + + data->reg_clr = devm_platform_ioremap_resource_byname(pdev, "clr"); + if (IS_ERR(data->reg_clr)) { + dev_err(&pdev->dev, "Failed to map clear register\n"); + return PTR_ERR(data->reg_clr); + } + + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "doorbell"); + if (!res) { + dev_err(&pdev->dev, "Failed get resource from set\n"); + return -EINVAL; + } + data->doorbell_addr = res->start; + + ret = of_parse_phandle_with_args(pdev->dev.of_node, "msi-ranges", + "#interrupt-cells", 0, &args); + if (ret) { + dev_err(&pdev->dev, "Unable to parse MSI vec base\n"); + return ret; + } + data->irq_first = (u32)args.args[0]; + + ret = of_property_read_u32_index(pdev->dev.of_node, "msi-ranges", + args.args_count + 1, &data->num_irqs); + if (ret) { + dev_err(&pdev->dev, "Unable to parse MSI vec number\n"); + of_node_put(args.np); + return ret; + } + of_node_put(args.np); + + mutex_init(&data->msi_map_lock); + + return sg2042_msi_init_domains(data, pdev->dev.of_node); +} + +static const struct of_device_id sg2042_msi_of_match[] = { + { .compatible = "sophgo,sg2042-msi" }, + {} +}; + +static struct platform_driver sg2042_msi_driver = { + .driver = { + .name = "sg2042-msi", + .of_match_table = sg2042_msi_of_match, + }, + .probe = sg2042_msi_probe, +}; +builtin_platform_driver(sg2042_msi_driver); From patchwork Wed Jan 15 06:34:03 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen Wang X-Patchwork-Id: 13939880 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 76D31C02180 for ; Wed, 15 Jan 2025 06:34:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Cc:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=o26AvdLGizwjUZPuMq6mZ2TdruUVGZO0G5woG2TDkFk=; b=sS64s3o2SbaBWU pSk4L6zD+dxyp+KQO91goepd2c09HjuCvSmQx3glruwk1KCbCpELV6s5STuynQl/3O1M5mR9RWGjn JcZIX3MSJEI2zROdCCRFfSXPzn3V8lBFMnO6OWtoIlv9fFKBwLmwtVrgi21NeGeWIBc4WE5N4Gsdr VeY43syhQsQ9SJokbe5d/Yjs61peUYfDmYa8naOaJllQIWGZdlWCdlCC1rB9VDMeHJN/AkmYaygmm 23rcy9/1NkPPfvZvzYJQF9XcV6hQd9KI5l87naPiIb8muqKntl3j9VRSZ3QzsZwMnrKG6+M2mXcHY SFzAu6DfcGTmW94UfjEg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tXwyn-0000000AoMF-1s3b; Wed, 15 Jan 2025 06:34:17 +0000 Received: from mail-oi1-x231.google.com ([2607:f8b0:4864:20::231]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tXwyl-0000000AoLB-0Ekn for linux-riscv@lists.infradead.org; Wed, 15 Jan 2025 06:34:16 +0000 Received: by mail-oi1-x231.google.com with SMTP id 5614622812f47-3ebc678b5c9so3456374b6e.3 for ; Tue, 14 Jan 2025 22:34:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1736922854; x=1737527654; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=GsPuBRXPrRe+Bt0PCOpU8wnomNv8x15d/msImOZKwTk=; b=ja1rUQXgecrdR46LjKhzDzC9uda1WXUcPBW/vBIh7UKy3EOBQo0Oe8IT+4jLrsUMh9 XUMRIdGU3x5CTCQOT3Yeonom+sDpIMUPT4+ptk0h6cF4RdQgB4aHrxH/sfccbYONm6eq MmmkQ5kLXjGZO6BabNsa+sNnMY8GumlrWw4HTLNXMpeR206afWTdqN2Cj3MWNttXgOxi m1fjetU6jvwmh0id3RB1umo0IKHSgduoazCJ+Y8SWSPDTA+QKWm1OxcfNtFQA/KeDKTT C/kyLAvWfDPJ3aaBXzVwLr+Eqx+jyDpk+tSuNrBZjZQP8Kj83ueCLtjJQ0DSp3KM1rmN qM1A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1736922854; x=1737527654; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=GsPuBRXPrRe+Bt0PCOpU8wnomNv8x15d/msImOZKwTk=; b=I/LnVKCfYG9oTHzJh7uVhREqnlMJGckyZQWjAP8GvPgw76ekoz/IrLq527cTxYA24j A8LUC5p9hgU2XGFtKpG8Ls3KuUd1aKE80D2C8i3KrD/gmFYLZNDiwa23PL4cXGZ8gCi1 eojNmweH4lOH/7G5OuLvTPMUquVplcAgDKzwC6XPBdI4roVkV5AyimyjRZGKp0vIZFkv jeZDHDos5x8gr5DxT8vKpSQIDgQQPPsmxaJNiVfWmXb4W0Tm3CrTvSwz7vbElikmwdwg 8V4/wzAh5RGwbBnwbOiMT983ecXKZYNkjYMvPHI5sfS6/CsOqGD8HYHm8vo+X9ow2uyU lbfg== X-Forwarded-Encrypted: i=1; AJvYcCWnUWiqdo2RNA0muev/bB8SjeDxPI6MQRqn4TxgzlyU2C5rjNHC/LrzEqMF/KJtAIFSkgDjcWMB3z0bvA==@lists.infradead.org X-Gm-Message-State: AOJu0YwGuvEut2GVZJNLdSbvy0zHL1eWHFd4+lYC7VbYA4LvT/lKL1tr ghCfVBx1JuuefNjWspxdCyV6pTTjv5TBebSgkulthjYpPonifFvT X-Gm-Gg: ASbGnctgK3vNp9PURIWcWv+7WvWUgBj8Hgs9Ab+dvguDUblGvqOoPWI11kv/SMiXuZ/ gyeoItJU9j4/Mfc8h5zvmMaZQdv7BbcCLcm0l4jz63v84m9MSF0F0Li/CMVeTd6YZbaeTgbHatz syF4pBCaxvvV9OmfkqWHxyHf9ELn0MfcWExRKaLs+mRH2WqgHDUvlApFDJFZ62hfKOEZyaxlZYc w+6dHbblSElCdfmZFC9/lkQUAmXuLuWgEbM4wDRKWDL9dSh0IfymAgyi69hHEhbl2o= X-Google-Smtp-Source: AGHT+IELGwamiB2gMcY8O0oJQ90/3MS8jb/wwVW95TfJxiL1SCHLWtPN8hXbGGAxJTWF58sEAHjsPQ== X-Received: by 2002:a05:6808:1783:b0:3eb:5562:34ba with SMTP id 5614622812f47-3ef2ecba226mr17767634b6e.25.1736922853795; Tue, 14 Jan 2025 22:34:13 -0800 (PST) Received: from localhost.localdomain ([122.8.183.87]) by smtp.gmail.com with ESMTPSA id 5614622812f47-3f037656039sm4739635b6e.17.2025.01.14.22.34.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Jan 2025 22:34:12 -0800 (PST) From: Chen Wang To: u.kleine-koenig@baylibre.com, aou@eecs.berkeley.edu, arnd@arndb.de, unicorn_wang@outlook.com, conor+dt@kernel.org, guoren@kernel.org, inochiama@outlook.com, krzk+dt@kernel.org, palmer@dabbelt.com, paul.walmsley@sifive.com, robh@kernel.org, tglx@linutronix.de, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, chao.wei@sophgo.com, xiaoguang.xing@sophgo.com, fengchun.li@sophgo.com, samuel.holland@sifive.com, christophe.jaillet@wanadoo.fr Subject: [PATCH v3 3/3] riscv: sophgo: dts: add msi controller for SG2042 Date: Wed, 15 Jan 2025 14:34:03 +0800 Message-Id: X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250114_223415_098351_27F4FC9E X-CRM114-Status: UNSURE ( 8.84 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org From: Chen Wang Add msi-controller node to dts for SG2042. Signed-off-by: Chen Wang --- arch/riscv/boot/dts/sophgo/sg2042.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/riscv/boot/dts/sophgo/sg2042.dtsi b/arch/riscv/boot/dts/sophgo/sg2042.dtsi index e62ac51ac55a..02fbb978973c 100644 --- a/arch/riscv/boot/dts/sophgo/sg2042.dtsi +++ b/arch/riscv/boot/dts/sophgo/sg2042.dtsi @@ -173,6 +173,16 @@ pllclk: clock-controller@70300100c0 { #clock-cells = <1>; }; + msi: msi-controller@7030010300 { + compatible = "sophgo,sg2042-msi"; + reg = <0x70 0x30010300 0x0 0x4>, + <0x70 0x30010304 0x0 0x4>; + reg-names = "doorbell", "clr"; + msi-controller; + msi-ranges = <&intc 64 IRQ_TYPE_LEVEL_HIGH 32>; + interrupt-parent = <&intc>; + }; + rpgate: clock-controller@7030010368 { compatible = "sophgo,sg2042-rpgate"; reg = <0x70 0x30010368 0x0 0x98>;