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[147.11.224.80]) by smtp.gmail.com with ESMTPSA id g12sm24897149pfd.72.2019.03.17.01.03.16 (version=TLS1 cipher=AES128-SHA bits=128/128); Sun, 17 Mar 2019 01:03:16 -0700 (PDT) From: Bin Meng To: qemu-riscv@nongnu.org, qemu-devel@nongnu.org, Alistair Francis , Palmer Dabbelt , Bastian Koppelmann , Sagar Karandikar Date: Sun, 17 Mar 2019 01:03:10 -0700 Message-Id: <1552809791-7714-1-git-send-email-bmeng.cn@gmail.com> X-Mailer: git-send-email 1.7.1 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::542 Subject: [Qemu-devel] [PATCH 1/2] riscv: sifive_uart: Generate TX interrupt X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP At present the sifive uart model only generates RX interrupt. This updates it to generate TX interrupt so that it is more useful. Note the TX fifo is still unimplemented. Signed-off-by: Bin Meng Reviewed-by: Alistair Francis --- hw/riscv/sifive_uart.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/hw/riscv/sifive_uart.c b/hw/riscv/sifive_uart.c index 456a3d3..3b3f94f 100644 --- a/hw/riscv/sifive_uart.c +++ b/hw/riscv/sifive_uart.c @@ -51,7 +51,8 @@ static uint64_t uart_ip(SiFiveUARTState *s) static void update_irq(SiFiveUARTState *s) { int cond = 0; - if ((s->ie & SIFIVE_UART_IE_RXWM) && s->rx_fifo_len) { + if ((s->ie & SIFIVE_UART_IE_TXWM) || + ((s->ie & SIFIVE_UART_IE_RXWM) && s->rx_fifo_len)) { cond = 1; } if (cond) { @@ -108,6 +109,7 @@ uart_write(void *opaque, hwaddr addr, switch (addr) { case SIFIVE_UART_TXFIFO: qemu_chr_fe_write(&s->chr, &ch, 1); + update_irq(s); return; case SIFIVE_UART_IE: s->ie = val64; From patchwork Sun Mar 17 08:03:11 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bin Meng X-Patchwork-Id: 10856179 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 096C81390 for ; Sun, 17 Mar 2019 08:25:44 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id EA3512936F for ; Sun, 17 Mar 2019 08:25:43 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id DD7BC293D6; Sun, 17 Mar 2019 08:25:43 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.7 required=2.0 tests=BAYES_00,DKIM_ADSP_CUSTOM_MED, DKIM_INVALID,DKIM_SIGNED,FREEMAIL_FROM,MAILING_LIST_MULTI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 767BE2936F for ; Sun, 17 Mar 2019 08:25:43 +0000 (UTC) Received: from localhost ([127.0.0.1]:51752 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h5R70-0007px-2u for patchwork-qemu-devel@patchwork.kernel.org; Sun, 17 Mar 2019 04:25:42 -0400 Received: from eggs.gnu.org ([209.51.188.92]:43188) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h5R5V-0006G7-2a for qemu-devel@nongnu.org; Sun, 17 Mar 2019 04:24:09 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1h5QqF-00082p-5D for qemu-devel@nongnu.org; Sun, 17 Mar 2019 04:08:23 -0400 Received: from mail-pg1-x543.google.com ([2607:f8b0:4864:20::543]:36195) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1h5QlN-0004x1-4V; Sun, 17 Mar 2019 04:03:21 -0400 Received: by mail-pg1-x543.google.com with SMTP id r124so9289880pgr.3; Sun, 17 Mar 2019 01:03:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:subject:date:message-id:in-reply-to:references; bh=1f3hMlG+smdy7QoDSj89gXWpJwklHuAzeeOC5rLIymE=; b=fpIdgEO82gCxL+m8mXUJbeUVYgOlpcwmjMvqUP/JX9jAoKjar0RsOSyXbkuOf42Mny Cnw6VaWWaPgIsJcn2aGfOuRv9NXiU1MwTo/SG939rIEPKDwp5a5UyTe9a644vTzp2lcs jOEAZdOHcytTi/4H8E1HUqqDWETwaK0hh21O3Mlp3hm8TpdnI4QjD5Qpqba6J3V6GRdK ghGj0TdXqfgMJW84qXmo6gDaP8KNnwlKkeCd4FHvBVGkxSPL8zXw9yoiLTuSCp6kwZ14 B0kouzdK/vnvKezXRsDWG5d5V/K4woZIg7IVa+YGPrjAdtcVzE+hxIKrww+5KS/sKzsQ ZFgg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=1f3hMlG+smdy7QoDSj89gXWpJwklHuAzeeOC5rLIymE=; b=r+vwHJqhiu7dgW+qPABilbcggxyw97pTQlB72NB1SKpx1fUHeYKrkgXQNdDJUJn3oV Ba4Gv1+vTjqUXGH7O7JZxDXWPx82Rcz00SPKx/pFCdwIkCL18m2HTH2ZB23R0pQF5SLz Xe0Eh3eAWuoIsHDyEwdvgN4zdaefPfNUalqWbwLgTSX/SVapds/tsIdFio/OZTY6whaN JM+nOKx5ABvBm2ZTKVQKuw+r2qfdrTJb4Xhpvc4myv/kXU+yLUwLqYOdqCsxqjHrPicq xv7+c7MbdD/w+BndeUEzL1GnX3QzGFgSxU4+rNue2eK1qI0R4d1XQHQac7k7NoxRtgiD gbZA== X-Gm-Message-State: APjAAAVs8M/NXKUPOu1LzKF6eeu6jffI1gD95QxRdcR30v/lefWilc/M WzhQno9TnBZoMn7VCRkxNmI/EqthTrw= X-Google-Smtp-Source: APXvYqxpPgB6XNXxN/TVBt9E+fqZRThe8rUhZ79qUxLlHKSgQ2ICUu1zEV6JmyEStb3Mgy4xhvKFUw== X-Received: by 2002:a17:902:ba8d:: with SMTP id k13mr13640433pls.15.1552809798422; Sun, 17 Mar 2019 01:03:18 -0700 (PDT) Received: from localhost.localdomain (unknown-224-80.windriver.com. [147.11.224.80]) by smtp.gmail.com with ESMTPSA id g12sm24897149pfd.72.2019.03.17.01.03.17 (version=TLS1 cipher=AES128-SHA bits=128/128); Sun, 17 Mar 2019 01:03:17 -0700 (PDT) From: Bin Meng To: qemu-riscv@nongnu.org, qemu-devel@nongnu.org, Alistair Francis , Palmer Dabbelt , Bastian Koppelmann , Sagar Karandikar Date: Sun, 17 Mar 2019 01:03:11 -0700 Message-Id: <1552809791-7714-2-git-send-email-bmeng.cn@gmail.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1552809791-7714-1-git-send-email-bmeng.cn@gmail.com> References: <1552809791-7714-1-git-send-email-bmeng.cn@gmail.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::543 Subject: [Qemu-devel] [PATCH 2/2] riscv: sifive_u: Correct UART0's IRQ in the device tree X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP The UART0's interrupt vector is wrongly set to 1 in the device tree. Use SIFIVE_U_UART0_IRQ instead. Signed-off-by: Bin Meng Reviewed-by: Alistair Francis --- hw/riscv/sifive_u.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index 7bc2582..57741c2 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -244,7 +244,7 @@ static void create_fdt(SiFiveUState *s, const struct MemmapEntry *memmap, qemu_fdt_setprop_cell(fdt, nodename, "clock-frequency", SIFIVE_U_CLOCK_FREQ / 2); qemu_fdt_setprop_cells(fdt, nodename, "interrupt-parent", plic_phandle); - qemu_fdt_setprop_cells(fdt, nodename, "interrupts", 1); + qemu_fdt_setprop_cells(fdt, nodename, "interrupts", SIFIVE_U_UART0_IRQ); qemu_fdt_add_subnode(fdt, "/chosen"); qemu_fdt_setprop_string(fdt, "/chosen", "stdout-path", nodename);