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Thu, 16 Jan 2025 09:29:56 -0800 (PST) Received: from localhost.localdomain ([5.188.167.4]) by smtp.googlemail.com with ESMTPSA id 2adb3069b0e04-5439af0e90asm51125e87.76.2025.01.16.09.29.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Jan 2025 09:29:55 -0800 (PST) From: Sergey Matyukevich To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Palmer Dabbelt Cc: Paul Walmsley , Albert Ou , Alexandre Ghiti , Conor Dooley , Robin Murphy , Lad Prabhakar , Geert Uytterhoeven , Christoph Hellwig , Sergey Matyukevich Subject: [PATCH] riscv: select DMA_DIRECT_REMAP by RISCV_ISA_SVPBMT and ERRATA_THEAD_MAE Date: Thu, 16 Jan 2025 20:29:35 +0300 Message-ID: <20250116172950.1989748-1-geomatsi@gmail.com> X-Mailer: git-send-email 2.48.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250116_092959_515689_3D2175F9 X-CRM114-Status: GOOD ( 12.47 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Select DMA_DIRECT_REMAP for the RISC-V extensions that allow to set page-based memory types in PTEs according to the requested DMA attributes. This is the purpose of Svpbmt or XTheadMae extensions. Zicbom or XTheadCmo serve a different purpose, providing instructions to flush/invalidate cache blocks. Fixes: 381cae169853 ("riscv: only select DMA_DIRECT_REMAP from RISCV_ISA_ZICBOM and ERRATA_THEAD_PBMT") Signed-off-by: Sergey Matyukevich --- arch/riscv/Kconfig | 2 +- arch/riscv/Kconfig.errata | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index d4a7ca0388c0..a5dabb744009 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -603,6 +603,7 @@ config RISCV_ISA_SVPBMT depends on 64BIT && MMU depends on RISCV_ALTERNATIVE default y + select DMA_DIRECT_REMAP help Adds support to dynamically detect the presence of the Svpbmt ISA-extension (Supervisor-mode: page-based memory types) and @@ -787,7 +788,6 @@ config RISCV_ISA_ZICBOM depends on RISCV_ALTERNATIVE default y select RISCV_DMA_NONCOHERENT - select DMA_DIRECT_REMAP help Adds support to dynamically detect the presence of the ZICBOM extension (Cache Block Management Operations) and enable its diff --git a/arch/riscv/Kconfig.errata b/arch/riscv/Kconfig.errata index 2acc7d876e1f..3bcae5bd3231 100644 --- a/arch/riscv/Kconfig.errata +++ b/arch/riscv/Kconfig.errata @@ -86,6 +86,7 @@ config ERRATA_THEAD_MAE bool "Apply T-Head's memory attribute extension (XTheadMae) errata" depends on ERRATA_THEAD && 64BIT && MMU select RISCV_ALTERNATIVE_EARLY + select DMA_DIRECT_REMAP default y help This will apply the memory attribute extension errata to handle the @@ -96,7 +97,6 @@ config ERRATA_THEAD_MAE config ERRATA_THEAD_CMO bool "Apply T-Head cache management errata" depends on ERRATA_THEAD && MMU - select DMA_DIRECT_REMAP select RISCV_DMA_NONCOHERENT select RISCV_NONSTANDARD_CACHE_OPS default y