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REPLY(-4.00)[]; BAYES_HAM(-3.00)[100.00%]; MID_CONTAINS_FROM(1.00)[]; NEURAL_HAM_LONG(-1.00)[-1.000]; R_MISSING_CHARSET(0.50)[]; NEURAL_HAM_SHORT(-0.20)[-1.000]; MIME_GOOD(-0.10)[text/plain]; MIME_TRACE(0.00)[0:+]; TO_DN_SOME(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; ARC_NA(0.00)[]; DKIM_SIGNED(0.00)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; FUZZY_BLOCKED(0.00)[rspamd.com]; FROM_EQ_ENVFROM(0.00)[]; FROM_HAS_DN(0.00)[]; RCPT_COUNT_THREE(0.00)[4]; DBL_BLOCKED_OPENRESOLVER(0.00)[imap1.dmz-prg2.suse.org:helo,suse.de:mid,suse.de:email]; RCVD_COUNT_TWO(0.00)[2]; TO_MATCH_ENVRCPT_ALL(0.00)[]; RCVD_TLS_ALL(0.00)[] X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Wide-screen support is relevant for mode validation. Do not detect it before setting up the mode-setting pipeline. Gets the function call out of the way of other initialization code. Signed-off-by: Thomas Zimmermann --- drivers/gpu/drm/ast/ast_main.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/ast/ast_main.c b/drivers/gpu/drm/ast/ast_main.c index bc37c65305d48..037d389ab630d 100644 --- a/drivers/gpu/drm/ast/ast_main.c +++ b/drivers/gpu/drm/ast/ast_main.c @@ -290,7 +290,6 @@ struct drm_device *ast_device_create(struct pci_dev *pdev, ast->regs = regs; ast->ioregs = ioregs; - ast_detect_widescreen(ast); ast_detect_tx_chip(ast, need_post); ret = ast_get_dram_info(ast); @@ -315,6 +314,8 @@ struct drm_device *ast_device_create(struct pci_dev *pdev, drm_info(dev, "failed to map reserved buffer!\n"); } + ast_detect_widescreen(ast); + ret = ast_mode_config_init(ast); if (ret) return ERR_PTR(ret); From patchwork Fri Jan 17 10:29:07 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Zimmermann X-Patchwork-Id: 13943205 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D4BA8C02183 for ; Fri, 17 Jan 2025 10:35:28 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5629410E18B; Fri, 17 Jan 2025 10:35:28 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (1024-bit key; unprotected) header.d=suse.de header.i=@suse.de header.b="rZIKVBpW"; dkim=permerror (0-bit key) header.d=suse.de header.i=@suse.de header.b="eW8Xj53n"; dkim-atps=neutral Received: from smtp-out1.suse.de (smtp-out1.suse.de [195.135.223.130]) by gabe.freedesktop.org (Postfix) with ESMTPS id CD65E10E18B for ; Fri, 17 Jan 2025 10:35:27 +0000 (UTC) Received: from imap1.dmz-prg2.suse.org (imap1.dmz-prg2.suse.org [IPv6:2a07:de40:b281:104:10:150:64:97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by smtp-out1.suse.de (Postfix) with ESMTPS id CAA8F21161; Fri, 17 Jan 2025 10:34:55 +0000 (UTC) Authentication-Results: smtp-out1.suse.de; none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.de; s=susede2_rsa; t=1737110095; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=gF4LDq4hEDXgMmXBFNDKrHXph3NcVcChScRNC5zKkcs=; b=rZIKVBpWViQr6zOgQY8HLGzNjuEg9eFle4iWkU0myMBkzK8BWMgif2Hj5LcI0N7fPktdr+ i59pmFUdbjevM2xnmW3bnl82XJvwqT0DiXfOAtgsMNlPk86Veqi0cRhTELz+N2vNAfUfoH 8VoHOxb3YOdTH+nHjEnEPxIuOpHfrK0= DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=suse.de; s=susede2_ed25519; t=1737110095; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=gF4LDq4hEDXgMmXBFNDKrHXph3NcVcChScRNC5zKkcs=; b=eW8Xj53n7o8Jzpjtn15+fiT+tPBKy2G2PUQa+LoxnK4F0H5hDc9WT5d9bkFbJ43pRegsZb LLeyOL+u9t+GUHDQ== Received: from imap1.dmz-prg2.suse.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by imap1.dmz-prg2.suse.org (Postfix) with ESMTPS id A324D13AB2; Fri, 17 Jan 2025 10:34:55 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id uMoLJk8yimewLAAAD6G6ig (envelope-from ); Fri, 17 Jan 2025 10:34:55 +0000 From: Thomas Zimmermann To: airlied@redhat.com, jfalempe@redhat.com Cc: dri-devel@lists.freedesktop.org, Thomas Zimmermann Subject: [PATCH 2/8] drm/ast: Detect DRAM before TX-chip Date: Fri, 17 Jan 2025 11:29:07 +0100 Message-ID: <20250117103450.28692-3-tzimmermann@suse.de> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250117103450.28692-1-tzimmermann@suse.de> References: <20250117103450.28692-1-tzimmermann@suse.de> MIME-Version: 1.0 X-Spamd-Result: default: False [-4.00 / 50.00]; REPLY(-4.00)[] X-Rspamd-Queue-Id: CAA8F21161 X-Rspamd-Pre-Result: action=no action; module=replies; Message is reply to one we originated X-Rspamd-Action: no action X-Rspamd-Server: rspamd1.dmz-prg2.suse.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Move DRAM detection before TX-chip detection. Both steps are independent from each other. Detection of the TX-chip is now next to posting those chips, which can be done in a single step. Signed-off-by: Thomas Zimmermann --- drivers/gpu/drm/ast/ast_main.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/gpu/drm/ast/ast_main.c b/drivers/gpu/drm/ast/ast_main.c index 037d389ab630d..456230bef2736 100644 --- a/drivers/gpu/drm/ast/ast_main.c +++ b/drivers/gpu/drm/ast/ast_main.c @@ -290,15 +290,13 @@ struct drm_device *ast_device_create(struct pci_dev *pdev, ast->regs = regs; ast->ioregs = ioregs; - ast_detect_tx_chip(ast, need_post); - ret = ast_get_dram_info(ast); if (ret) return ERR_PTR(ret); - drm_info(dev, "dram MCLK=%u Mhz type=%d bus_width=%d\n", ast->mclk, ast->dram_type, ast->dram_bus_width); + ast_detect_tx_chip(ast, need_post); if (need_post) ast_post_gpu(ast); From patchwork Fri Jan 17 10:29:08 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Zimmermann X-Patchwork-Id: 13943207 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F1A47C02183 for ; Fri, 17 Jan 2025 10:35:33 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6E61610EAC5; Fri, 17 Jan 2025 10:35:33 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (1024-bit key; unprotected) header.d=suse.de header.i=@suse.de header.b="I8URgbbi"; dkim=permerror (0-bit key) header.d=suse.de header.i=@suse.de header.b="5xPbgQiS"; dkim-atps=neutral Received: from smtp-out1.suse.de (smtp-out1.suse.de [195.135.223.130]) by gabe.freedesktop.org (Postfix) with ESMTPS id CD74310EABB for ; Fri, 17 Jan 2025 10:35:27 +0000 (UTC) Received: from imap1.dmz-prg2.suse.org (imap1.dmz-prg2.suse.org [IPv6:2a07:de40:b281:104:10:150:64:97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by smtp-out1.suse.de (Postfix) with ESMTPS id 0171321169; Fri, 17 Jan 2025 10:34:56 +0000 (UTC) Authentication-Results: smtp-out1.suse.de; none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.de; s=susede2_rsa; t=1737110096; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=AuWW+jH8LD4wJsotGIfuzm0Qf54CbRkyccEnf4P3IeE=; b=I8URgbbi1YcTCP7mYj2Sh3zs3zluyUTxJ8WGaa1R8lRdnNR9f4sT1mP6Y01rxrb6mO7gXP BoTm/Ury76n48pdAaiyV6bqylzMZ4/9wX0z7bvNWT1HGXvBrSFIDH+r8k3xqvkupyFavRz 8aKfwf7qw53ybhTSLduR2IkVLCeIU7c= DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=suse.de; s=susede2_ed25519; t=1737110096; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=AuWW+jH8LD4wJsotGIfuzm0Qf54CbRkyccEnf4P3IeE=; b=5xPbgQiSEJQcDBzQcMA/hvMtEEH41GvpZCAV7vjVDyvUN+i9PDMizR90dz3FYUa669V+HU 807Yu9/o0OEwOGBw== Received: from imap1.dmz-prg2.suse.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by imap1.dmz-prg2.suse.org (Postfix) with ESMTPS id CE32113ABA; Fri, 17 Jan 2025 10:34:55 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id 2DTvME8yimewLAAAD6G6ig (envelope-from ); Fri, 17 Jan 2025 10:34:55 +0000 From: Thomas Zimmermann To: airlied@redhat.com, jfalempe@redhat.com Cc: dri-devel@lists.freedesktop.org, Thomas Zimmermann Subject: [PATCH 3/8] drm/ast: Refactor ast_post_gpu() by Gen Date: Fri, 17 Jan 2025 11:29:08 +0100 Message-ID: <20250117103450.28692-4-tzimmermann@suse.de> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250117103450.28692-1-tzimmermann@suse.de> References: <20250117103450.28692-1-tzimmermann@suse.de> MIME-Version: 1.0 X-Spamd-Result: default: False [-4.00 / 50.00]; REPLY(-4.00)[] X-Rspamd-Queue-Id: 0171321169 X-Rspamd-Pre-Result: action=no action; module=replies; Message is reply to one we originated X-Rspamd-Action: no action X-Rspamd-Server: rspamd1.dmz-prg2.suse.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Reorganize ast_post_gpu() so that it first branches by Gen and then by config mode and TX chip. This will later make it possible to split up the function by Gen. The helper ast_init_3rdtx() only handles Gen4 and Gen5, so leave it out from the other Gens. Signed-off-by: Thomas Zimmermann --- drivers/gpu/drm/ast/ast_post.c | 36 ++++++++++++++++++++++++---------- 1 file changed, 26 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/ast/ast_post.c b/drivers/gpu/drm/ast/ast_post.c index 364030f97571d..49f661760f9e5 100644 --- a/drivers/gpu/drm/ast/ast_post.c +++ b/drivers/gpu/drm/ast/ast_post.c @@ -344,21 +344,37 @@ void ast_post_gpu(struct ast_device *ast) { ast_set_def_ext_reg(ast); - if (IS_AST_GEN7(ast)) { + if (AST_GEN(ast) >= 7) { if (ast->tx_chip == AST_TX_ASTDP) ast_dp_launch(ast); - } else if (ast->config_mode == ast_use_p2a) { - if (IS_AST_GEN6(ast)) + } else if (AST_GEN(ast) >= 6) { + if (ast->config_mode == ast_use_p2a) { ast_post_chip_2500(ast); - else if (IS_AST_GEN5(ast) || IS_AST_GEN4(ast)) + } else { + if (ast->tx_chip == AST_TX_SIL164) { + /* Enable DVO */ + ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xa3, 0xcf, 0x80); + } + } + } else if (AST_GEN(ast) >= 4) { + if (ast->config_mode == ast_use_p2a) { ast_post_chip_2300(ast); - else + ast_init_3rdtx(ast); + } else { + if (ast->tx_chip == AST_TX_SIL164) { + /* Enable DVO */ + ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xa3, 0xcf, 0x80); + } + } + } else { + if (ast->config_mode == ast_use_p2a) { ast_init_dram_reg(ast); - - ast_init_3rdtx(ast); - } else { - if (ast->tx_chip == AST_TX_SIL164) - ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xa3, 0xcf, 0x80); /* Enable DVO */ + } else { + if (ast->tx_chip == AST_TX_SIL164) { + /* Enable DVO */ + ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xa3, 0xcf, 0x80); + } + } } } From patchwork Fri Jan 17 10:29:09 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Zimmermann X-Patchwork-Id: 13943200 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9223CC02183 for ; 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Fri, 17 Jan 2025 10:34:55 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id sFt3O08yimewLAAAD6G6ig (envelope-from ); Fri, 17 Jan 2025 10:34:55 +0000 From: Thomas Zimmermann To: airlied@redhat.com, jfalempe@redhat.com Cc: dri-devel@lists.freedesktop.org, Thomas Zimmermann Subject: [PATCH 4/8] drm/ast: Initialize ASTDP in ast_post_gpu() Date: Fri, 17 Jan 2025 11:29:09 +0100 Message-ID: <20250117103450.28692-5-tzimmermann@suse.de> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250117103450.28692-1-tzimmermann@suse.de> References: <20250117103450.28692-1-tzimmermann@suse.de> MIME-Version: 1.0 X-Spamd-Result: default: False [-6.80 / 50.00]; REPLY(-4.00)[]; BAYES_HAM(-3.00)[100.00%]; MID_CONTAINS_FROM(1.00)[]; NEURAL_HAM_LONG(-1.00)[-1.000]; R_MISSING_CHARSET(0.50)[]; NEURAL_HAM_SHORT(-0.20)[-1.000]; MIME_GOOD(-0.10)[text/plain]; MIME_TRACE(0.00)[0:+]; TO_DN_SOME(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; ARC_NA(0.00)[]; DKIM_SIGNED(0.00)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; FUZZY_BLOCKED(0.00)[rspamd.com]; FROM_EQ_ENVFROM(0.00)[]; FROM_HAS_DN(0.00)[]; RCPT_COUNT_THREE(0.00)[4]; DBL_BLOCKED_OPENRESOLVER(0.00)[imap1.dmz-prg2.suse.org:helo,suse.de:email,suse.de:mid]; RCVD_COUNT_TWO(0.00)[2]; TO_MATCH_ENVRCPT_ALL(0.00)[]; RCVD_TLS_ALL(0.00)[] X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Remove the call to ast_dp_launch() from ast_detect_tx_chip() and perform it unconditionally in ast_post_gpu(). Also add error handling: the detection code apparently used ast_dp_launch() to test for a working ASTDP, falling back to VGA on errors. As the VBIOS reports ASTDP, silently ignoring errors is questionable behavior. With the refactoring, failing to initialize the ASTDP will also fail probing the driver. Signed-off-by: Thomas Zimmermann --- drivers/gpu/drm/ast/ast_drv.c | 6 +++++- drivers/gpu/drm/ast/ast_drv.h | 2 +- drivers/gpu/drm/ast/ast_main.c | 19 +++++++++++++------ drivers/gpu/drm/ast/ast_post.c | 13 ++++++++++--- 4 files changed, 29 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/ast/ast_drv.c b/drivers/gpu/drm/ast/ast_drv.c index ff3bcdd1cff2a..cddd69972e89d 100644 --- a/drivers/gpu/drm/ast/ast_drv.c +++ b/drivers/gpu/drm/ast/ast_drv.c @@ -393,11 +393,15 @@ static int ast_drm_freeze(struct drm_device *dev) static int ast_drm_thaw(struct drm_device *dev) { struct ast_device *ast = to_ast_device(dev); + int ret; ast_enable_vga(ast->ioregs); ast_open_key(ast->ioregs); ast_enable_mmio(dev->dev, ast->ioregs); - ast_post_gpu(ast); + + ret = ast_post_gpu(ast); + if (ret) + return ret; return drm_mode_config_helper_resume(dev); } diff --git a/drivers/gpu/drm/ast/ast_drv.h b/drivers/gpu/drm/ast/ast_drv.h index 6b4305ac07d4f..cf9edef8fca66 100644 --- a/drivers/gpu/drm/ast/ast_drv.h +++ b/drivers/gpu/drm/ast/ast_drv.h @@ -445,7 +445,7 @@ int ast_mode_config_init(struct ast_device *ast); int ast_mm_init(struct ast_device *ast); /* ast post */ -void ast_post_gpu(struct ast_device *ast); +int ast_post_gpu(struct ast_device *ast); u32 ast_mindwm(struct ast_device *ast, u32 r); void ast_moutdwm(struct ast_device *ast, u32 r, u32 v); void ast_patch_ahb_2500(void __iomem *regs); diff --git a/drivers/gpu/drm/ast/ast_main.c b/drivers/gpu/drm/ast/ast_main.c index 456230bef2736..474eb255b325b 100644 --- a/drivers/gpu/drm/ast/ast_main.c +++ b/drivers/gpu/drm/ast/ast_main.c @@ -138,10 +138,7 @@ static void ast_detect_tx_chip(struct ast_device *ast, bool need_post) } else if (IS_AST_GEN7(ast)) { if (ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xd1, AST_IO_VGACRD1_TX_TYPE_MASK) == AST_IO_VGACRD1_TX_ASTDP) { - int ret = ast_dp_launch(ast); - - if (!ret) - ast->tx_chip = AST_TX_ASTDP; + ast->tx_chip = AST_TX_ASTDP; } } @@ -297,8 +294,18 @@ struct drm_device *ast_device_create(struct pci_dev *pdev, ast->mclk, ast->dram_type, ast->dram_bus_width); ast_detect_tx_chip(ast, need_post); - if (need_post) - ast_post_gpu(ast); + switch (ast->tx_chip) { + case AST_TX_ASTDP: + ret = ast_post_gpu(ast); + break; + default: + ret = 0; + if (need_post) + ret = ast_post_gpu(ast); + break; + } + if (ret) + return ERR_PTR(ret); ret = ast_mm_init(ast); if (ret) diff --git a/drivers/gpu/drm/ast/ast_post.c b/drivers/gpu/drm/ast/ast_post.c index 49f661760f9e5..0daa8e52a092a 100644 --- a/drivers/gpu/drm/ast/ast_post.c +++ b/drivers/gpu/drm/ast/ast_post.c @@ -340,13 +340,18 @@ static void ast_init_dram_reg(struct ast_device *ast) } while ((j & 0x40) == 0); } -void ast_post_gpu(struct ast_device *ast) +int ast_post_gpu(struct ast_device *ast) { + int ret; + ast_set_def_ext_reg(ast); if (AST_GEN(ast) >= 7) { - if (ast->tx_chip == AST_TX_ASTDP) - ast_dp_launch(ast); + if (ast->tx_chip == AST_TX_ASTDP) { + ret = ast_dp_launch(ast); + if (ret) + return ret; + } } else if (AST_GEN(ast) >= 6) { if (ast->config_mode == ast_use_p2a) { ast_post_chip_2500(ast); @@ -376,6 +381,8 @@ void ast_post_gpu(struct ast_device *ast) } } } + + return 0; } /* AST 2300 DRAM settings */ From patchwork Fri Jan 17 10:29:10 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Zimmermann X-Patchwork-Id: 13943201 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 291B5C02183 for ; Fri, 17 Jan 2025 10:35:03 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1059610E301; Fri, 17 Jan 2025 10:35:00 +0000 (UTC) Received: from smtp-out2.suse.de (smtp-out2.suse.de [IPv6:2a07:de40:b251:101:10:150:64:2]) by gabe.freedesktop.org (Postfix) with ESMTPS id E39D010E301 for ; Fri, 17 Jan 2025 10:34:57 +0000 (UTC) Received: from imap1.dmz-prg2.suse.org (imap1.dmz-prg2.suse.org [IPv6:2a07:de40:b281:104:10:150:64:97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by smtp-out2.suse.de (Postfix) with ESMTPS id BDF401F38C; Fri, 17 Jan 2025 10:34:56 +0000 (UTC) Authentication-Results: smtp-out2.suse.de; none Received: from imap1.dmz-prg2.suse.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by imap1.dmz-prg2.suse.org (Postfix) with ESMTPS id 2FF1B13AF1; Fri, 17 Jan 2025 10:34:56 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id ENJjClAyimewLAAAD6G6ig (envelope-from ); Fri, 17 Jan 2025 10:34:56 +0000 From: Thomas Zimmermann To: airlied@redhat.com, jfalempe@redhat.com Cc: dri-devel@lists.freedesktop.org, Thomas Zimmermann Subject: [PATCH 5/8] drm/ast: Hide Gens 1 to 3 TX detection in branch Date: Fri, 17 Jan 2025 11:29:10 +0100 Message-ID: <20250117103450.28692-6-tzimmermann@suse.de> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250117103450.28692-1-tzimmermann@suse.de> References: <20250117103450.28692-1-tzimmermann@suse.de> MIME-Version: 1.0 X-Rspamd-Pre-Result: action=no action; module=replies; Message is reply to one we originated X-Spamd-Result: default: False [-4.00 / 50.00]; REPLY(-4.00)[] X-Rspamd-Queue-Id: BDF401F38C X-Rspamd-Pre-Result: action=no action; module=replies; Message is reply to one we originated X-Rspamd-Action: no action X-Rspamd-Server: rspamd2.dmz-prg2.suse.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Gen7 only supports ASTDP. Gens 4 to 6 support various TX chips, except ASTDP. These boards detect the TX chips by reading the SoC scratch register as VGACRD1. Gens 1 to 3 only support SIL164. These boards read the DVO bit from VGACRA3. Hence move this test behind a branch, so that it does not run on later generations. Signed-off-by: Thomas Zimmermann --- drivers/gpu/drm/ast/ast_main.c | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/ast/ast_main.c b/drivers/gpu/drm/ast/ast_main.c index 474eb255b325b..50b57bc15d53c 100644 --- a/drivers/gpu/drm/ast/ast_main.c +++ b/drivers/gpu/drm/ast/ast_main.c @@ -96,21 +96,21 @@ static void ast_detect_tx_chip(struct ast_device *ast, bool need_post) /* Check 3rd Tx option (digital output afaik) */ ast->tx_chip = AST_TX_NONE; - /* - * VGACRA3 Enhanced Color Mode Register, check if DVO is already - * enabled, in that case, assume we have a SIL164 TMDS transmitter - * - * Don't make that assumption if we the chip wasn't enabled and - * is at power-on reset, otherwise we'll incorrectly "detect" a - * SIL164 when there is none. - */ - if (!need_post) { - jreg = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xa3, 0xff); - if (jreg & 0x80) - ast->tx_chip = AST_TX_SIL164; - } - - if (IS_AST_GEN4(ast) || IS_AST_GEN5(ast) || IS_AST_GEN6(ast)) { + if (AST_GEN(ast) <= 3) { + /* + * VGACRA3 Enhanced Color Mode Register, check if DVO is already + * enabled, in that case, assume we have a SIL164 TMDS transmitter + * + * Don't make that assumption if we the chip wasn't enabled and + * is at power-on reset, otherwise we'll incorrectly "detect" a + * SIL164 when there is none. + */ + if (!need_post) { + jreg = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xa3, 0xff); + if (jreg & 0x80) + ast->tx_chip = AST_TX_SIL164; + } + } else if (IS_AST_GEN4(ast) || IS_AST_GEN5(ast) || IS_AST_GEN6(ast)) { /* * On AST GEN4+, look the configuration set by the SoC in * the SOC scratch register #1 bits 11:8 (interestingly marked From patchwork Fri Jan 17 10:29:11 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Zimmermann X-Patchwork-Id: 13943204 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5439CC02185 for ; Fri, 17 Jan 2025 10:35:07 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 03D1710E3A8; Fri, 17 Jan 2025 10:35:05 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; 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Fri, 17 Jan 2025 10:34:56 +0000 From: Thomas Zimmermann To: airlied@redhat.com, jfalempe@redhat.com Cc: dri-devel@lists.freedesktop.org, Thomas Zimmermann Subject: [PATCH 6/8] drm/ast: Align Gen1 DVO detection to register manual Date: Fri, 17 Jan 2025 11:29:11 +0100 Message-ID: <20250117103450.28692-7-tzimmermann@suse.de> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250117103450.28692-1-tzimmermann@suse.de> References: <20250117103450.28692-1-tzimmermann@suse.de> MIME-Version: 1.0 X-Spamd-Result: default: False [-6.80 / 50.00]; REPLY(-4.00)[]; BAYES_HAM(-3.00)[100.00%]; MID_CONTAINS_FROM(1.00)[]; NEURAL_HAM_LONG(-1.00)[-1.000]; R_MISSING_CHARSET(0.50)[]; NEURAL_HAM_SHORT(-0.20)[-1.000]; MIME_GOOD(-0.10)[text/plain]; MIME_TRACE(0.00)[0:+]; TO_DN_SOME(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; ARC_NA(0.00)[]; DKIM_SIGNED(0.00)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; FUZZY_BLOCKED(0.00)[rspamd.com]; FROM_EQ_ENVFROM(0.00)[]; FROM_HAS_DN(0.00)[]; RCPT_COUNT_THREE(0.00)[4]; DBL_BLOCKED_OPENRESOLVER(0.00)[suse.de:email,suse.de:mid,imap1.dmz-prg2.suse.org:helo]; RCVD_COUNT_TWO(0.00)[2]; TO_MATCH_ENVRCPT_ALL(0.00)[]; RCVD_TLS_ALL(0.00)[] X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Align variable names and register constants for TX-chip detection to the names in the register manual. Signed-off-by: Thomas Zimmermann --- drivers/gpu/drm/ast/ast_main.c | 6 +++--- drivers/gpu/drm/ast/ast_reg.h | 1 + 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/ast/ast_main.c b/drivers/gpu/drm/ast/ast_main.c index 50b57bc15d53c..40d3b7770cf18 100644 --- a/drivers/gpu/drm/ast/ast_main.c +++ b/drivers/gpu/drm/ast/ast_main.c @@ -76,7 +76,7 @@ static void ast_detect_tx_chip(struct ast_device *ast, bool need_post) }; struct drm_device *dev = &ast->base; - u8 jreg, vgacrd1; + u8 vgacra3, vgacrd1; /* * Several of the listed TX chips are not explicitly supported @@ -106,8 +106,8 @@ static void ast_detect_tx_chip(struct ast_device *ast, bool need_post) * SIL164 when there is none. */ if (!need_post) { - jreg = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xa3, 0xff); - if (jreg & 0x80) + vgacra3 = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xa3, 0xff); + if (vgacra3 & AST_IO_VGACRA3_DVO_ENABLED) ast->tx_chip = AST_TX_SIL164; } } else if (IS_AST_GEN4(ast) || IS_AST_GEN5(ast) || IS_AST_GEN6(ast)) { diff --git a/drivers/gpu/drm/ast/ast_reg.h b/drivers/gpu/drm/ast/ast_reg.h index 2aadf07d135af..0745d58e5b450 100644 --- a/drivers/gpu/drm/ast/ast_reg.h +++ b/drivers/gpu/drm/ast/ast_reg.h @@ -32,6 +32,7 @@ #define AST_IO_VGACR80_PASSWORD (0xa8) #define AST_IO_VGACRA1_VGAIO_DISABLED BIT(1) #define AST_IO_VGACRA1_MMIO_ENABLED BIT(2) +#define AST_IO_VGACRA3_DVO_ENABLED BIT(7) #define AST_IO_VGACRB6_HSYNC_OFF BIT(0) #define AST_IO_VGACRB6_VSYNC_OFF BIT(1) #define AST_IO_VGACRCB_HWC_16BPP BIT(0) /* set: ARGB4444, cleared: 2bpp palette */ From patchwork Fri Jan 17 10:29:12 2025 Content-Type: text/plain; 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REPLY(-4.00)[]; BAYES_HAM(-3.00)[100.00%]; MID_CONTAINS_FROM(1.00)[]; NEURAL_HAM_LONG(-1.00)[-1.000]; R_MISSING_CHARSET(0.50)[]; NEURAL_HAM_SHORT(-0.20)[-1.000]; MIME_GOOD(-0.10)[text/plain]; MIME_TRACE(0.00)[0:+]; TO_DN_SOME(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; ARC_NA(0.00)[]; DKIM_SIGNED(0.00)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; FUZZY_BLOCKED(0.00)[rspamd.com]; FROM_EQ_ENVFROM(0.00)[]; FROM_HAS_DN(0.00)[]; RCPT_COUNT_THREE(0.00)[4]; DBL_BLOCKED_OPENRESOLVER(0.00)[imap1.dmz-prg2.suse.org:helo,suse.de:mid,suse.de:email]; RCVD_COUNT_TWO(0.00)[2]; TO_MATCH_ENVRCPT_ALL(0.00)[]; RCVD_TLS_ALL(0.00)[] X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Gens 4 to 6 and Gen7 use the same pattern for detecting the installed TX chips. Merge the code into a single branch. Signed-off-by: Thomas Zimmermann --- drivers/gpu/drm/ast/ast_main.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/ast/ast_main.c b/drivers/gpu/drm/ast/ast_main.c index 40d3b7770cf18..b0d1b99ed532b 100644 --- a/drivers/gpu/drm/ast/ast_main.c +++ b/drivers/gpu/drm/ast/ast_main.c @@ -110,15 +110,18 @@ static void ast_detect_tx_chip(struct ast_device *ast, bool need_post) if (vgacra3 & AST_IO_VGACRA3_DVO_ENABLED) ast->tx_chip = AST_TX_SIL164; } - } else if (IS_AST_GEN4(ast) || IS_AST_GEN5(ast) || IS_AST_GEN6(ast)) { + } else { /* - * On AST GEN4+, look the configuration set by the SoC in + * On AST GEN4+, look at the configuration set by the SoC in * the SOC scratch register #1 bits 11:8 (interestingly marked * as "reserved" in the spec) */ jreg = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xd1, AST_IO_VGACRD1_TX_TYPE_MASK); switch (jreg) { + /* + * GEN4 to GEN6 + */ case AST_IO_VGACRD1_TX_SIL164_VBIOS: ast->tx_chip = AST_TX_SIL164; break; @@ -134,11 +137,13 @@ static void ast_detect_tx_chip(struct ast_device *ast, bool need_post) fallthrough; case AST_IO_VGACRD1_TX_FW_EMBEDDED_FW: ast->tx_chip = AST_TX_DP501; - } - } else if (IS_AST_GEN7(ast)) { - if (ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xd1, AST_IO_VGACRD1_TX_TYPE_MASK) == - AST_IO_VGACRD1_TX_ASTDP) { + break; + /* + * GEN7+ + */ + case AST_IO_VGACRD1_TX_ASTDP: ast->tx_chip = AST_TX_ASTDP; + break; } } From patchwork Fri Jan 17 10:29:13 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Zimmermann X-Patchwork-Id: 13943203 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2C443C02183 for ; Fri, 17 Jan 2025 10:35:06 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A55EF10E397; Fri, 17 Jan 2025 10:35:01 +0000 (UTC) Received: from smtp-out1.suse.de (smtp-out1.suse.de [195.135.223.130]) by gabe.freedesktop.org (Postfix) with ESMTPS id 5B99210E17D for ; Fri, 17 Jan 2025 10:34:59 +0000 (UTC) Received: from imap1.dmz-prg2.suse.org (imap1.dmz-prg2.suse.org [IPv6:2a07:de40:b281:104:10:150:64:97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by smtp-out1.suse.de (Postfix) with ESMTPS id DAF3721178; Fri, 17 Jan 2025 10:34:56 +0000 (UTC) Authentication-Results: smtp-out1.suse.de; none Received: from imap1.dmz-prg2.suse.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by imap1.dmz-prg2.suse.org (Postfix) with ESMTPS id B413B13AB2; Fri, 17 Jan 2025 10:34:56 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id 8BGwKlAyimewLAAAD6G6ig (envelope-from ); Fri, 17 Jan 2025 10:34:56 +0000 From: Thomas Zimmermann To: airlied@redhat.com, jfalempe@redhat.com Cc: dri-devel@lists.freedesktop.org, Thomas Zimmermann Subject: [PATCH 8/8] drm/ast: Only warn about unsupported TX chips on Gen4 and later Date: Fri, 17 Jan 2025 11:29:13 +0100 Message-ID: <20250117103450.28692-9-tzimmermann@suse.de> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250117103450.28692-1-tzimmermann@suse.de> References: <20250117103450.28692-1-tzimmermann@suse.de> MIME-Version: 1.0 X-Rspamd-Pre-Result: action=no action; module=replies; Message is reply to one we originated X-Spamd-Result: default: False [-4.00 / 50.00]; REPLY(-4.00)[] X-Rspamd-Queue-Id: DAF3721178 X-Rspamd-Pre-Result: action=no action; module=replies; Message is reply to one we originated X-Rspamd-Action: no action X-Rspamd-Server: rspamd1.dmz-prg2.suse.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Only Gen4 and later read the installed TX chip from the SoC. So only warn on those generations about unsupported chips. Signed-off-by: Thomas Zimmermann --- drivers/gpu/drm/ast/ast_main.c | 40 +++++++++++++++++++--------------- 1 file changed, 22 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/ast/ast_main.c b/drivers/gpu/drm/ast/ast_main.c index b0d1b99ed532b..ba69280b33e78 100644 --- a/drivers/gpu/drm/ast/ast_main.c +++ b/drivers/gpu/drm/ast/ast_main.c @@ -78,21 +78,6 @@ static void ast_detect_tx_chip(struct ast_device *ast, bool need_post) struct drm_device *dev = &ast->base; u8 vgacra3, vgacrd1; - /* - * Several of the listed TX chips are not explicitly supported - * by the ast driver. If these exist in real-world devices, they - * are most likely reported as VGA or SIL164 outputs. We warn here - * to get bug reports for these devices. If none come in for some - * time, we can begin to fail device probing on these values. - */ - vgacrd1 = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xd1, AST_IO_VGACRD1_TX_TYPE_MASK); - drm_WARN(dev, vgacrd1 == AST_IO_VGACRD1_TX_ITE66121_VBIOS, - "ITE IT66121 detected, 0x%x, Gen%lu\n", vgacrd1, AST_GEN(ast)); - drm_WARN(dev, vgacrd1 == AST_IO_VGACRD1_TX_CH7003_VBIOS, - "Chrontel CH7003 detected, 0x%x, Gen%lu\n", vgacrd1, AST_GEN(ast)); - drm_WARN(dev, vgacrd1 == AST_IO_VGACRD1_TX_ANX9807_VBIOS, - "Analogix ANX9807 detected, 0x%x, Gen%lu\n", vgacrd1, AST_GEN(ast)); - /* Check 3rd Tx option (digital output afaik) */ ast->tx_chip = AST_TX_NONE; @@ -116,9 +101,9 @@ static void ast_detect_tx_chip(struct ast_device *ast, bool need_post) * the SOC scratch register #1 bits 11:8 (interestingly marked * as "reserved" in the spec) */ - jreg = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xd1, - AST_IO_VGACRD1_TX_TYPE_MASK); - switch (jreg) { + vgacrd1 = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xd1, + AST_IO_VGACRD1_TX_TYPE_MASK); + switch (vgacrd1) { /* * GEN4 to GEN6 */ @@ -144,6 +129,25 @@ static void ast_detect_tx_chip(struct ast_device *ast, bool need_post) case AST_IO_VGACRD1_TX_ASTDP: ast->tx_chip = AST_TX_ASTDP; break; + /* + * Several of the listed TX chips are not explicitly supported + * by the ast driver. If these exist in real-world devices, they + * are most likely reported as VGA or SIL164 outputs. We warn here + * to get bug reports for these devices. If none come in for some + * time, we can begin to fail device probing on these values. + */ + case AST_IO_VGACRD1_TX_ITE66121_VBIOS: + drm_warn(dev, "ITE IT66121 detected, 0x%x, Gen%lu\n", + vgacrd1, AST_GEN(ast)); + break; + case AST_IO_VGACRD1_TX_CH7003_VBIOS: + drm_warn(dev, "Chrontel CH7003 detected, 0x%x, Gen%lu\n", + vgacrd1, AST_GEN(ast)); + break; + case AST_IO_VGACRD1_TX_ANX9807_VBIOS: + drm_warn(dev, "Analogix ANX9807 detected, 0x%x, Gen%lu\n", + vgacrd1, AST_GEN(ast)); + break; } }