From patchwork Mon Jan 27 17:21:46 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Ville Syrjala X-Patchwork-Id: 13951638 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8BB64C0218C for ; Mon, 27 Jan 2025 17:22:03 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0935410E30A; Mon, 27 Jan 2025 17:22:03 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="c9ie9G14"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.17]) by gabe.freedesktop.org (Postfix) with ESMTPS id 68F9510E30A for ; Mon, 27 Jan 2025 17:22:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1737998522; x=1769534522; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=P3Gszlz4xLYuT0ZVy9z99gNgTYlSg48w9P7o+uZtvq8=; b=c9ie9G14T+wPuPAElZIDaTo1v48KMYDXow80vrbjNsvn6orWOWmuzCFD BMiNNWX+JhDzi7fp/xgt3twmQeKfLyanyp86sTZhloIfR9d+uqjcXPM80 C+ufqOYe9Bi+RftTNgDKWBbJ0RUhH+nxOPTEDvNygtC7KgmQlSOUm/HgK QsMmrH9OUGcMhOaXnQTBs3cLa2Dq9L4gVUUYYSsmVsuwYFeY29YNAXRCh jA1wfn+XbeiyIAwtE6fs/xZhlTplVVHZdHxJ0oi9EpzXn3DnqZnC1yHOV rKr7iRNhtsIf92lNzd1hj1ZPZ3ay6v7tX4qjx/OdsgcdecJduPlHTZ17p Q==; X-CSE-ConnectionGUID: YD6AougSR62VvHpiJHlaWw== X-CSE-MsgGUID: 2wan4eU0R/2ugKLRYaUZOQ== X-IronPort-AV: E=McAfee;i="6700,10204,11328"; a="38501377" X-IronPort-AV: E=Sophos;i="6.13,239,1732608000"; d="scan'208";a="38501377" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Jan 2025 09:22:02 -0800 X-CSE-ConnectionGUID: z7MG5m1UTPyLyykihObxkw== X-CSE-MsgGUID: zFwszp9jTZWDB3UdaO22NQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,239,1732608000"; d="scan'208";a="108610181" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.74]) by fmviesa008.fm.intel.com with SMTP; 27 Jan 2025 09:22:00 -0800 Received: by stinkbox (sSMTP sendmail emulation); Mon, 27 Jan 2025 19:21:59 +0200 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Cc: stable@vger.kernel.org Subject: [PATCH 01/11] drm/i915: Make sure all planes in use by the joiner have their crtc included Date: Mon, 27 Jan 2025 19:21:46 +0200 Message-ID: <20250127172156.21928-2-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.45.3 In-Reply-To: <20250127172156.21928-1-ville.syrjala@linux.intel.com> References: <20250127172156.21928-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä Any active plane needs to have its crtc included in the atomic state. For planes enabled via uapi that is all handler in the core. But when we use a plane for joiner the uapi code things the plane is disabled and therefore doesn't have a crtc. So we need to pull those in by hand. We do it first thing in intel_joiner_add_affected_crtcs() so that any newly added crtc will subsequently pull in all of its joined crtcs as well. The symptoms from failing to do this are: - duct tape in the form of commit 1d5b09f8daf8 ("drm/i915: Fix NULL ptr deref by checking new_crtc_state") - the plane's hw state will get overwritten by the disabled uapi state if it can't find the uapi counterpart plane in the atomic state from where it should copy the correct state Cc: stable@vger.kernel.org Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_display.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 7d68d652c1bc..2b31c8f4b7cd 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -6682,12 +6682,30 @@ static int intel_async_flip_check_hw(struct intel_atomic_state *state, struct in static int intel_joiner_add_affected_crtcs(struct intel_atomic_state *state) { struct drm_i915_private *i915 = to_i915(state->base.dev); + const struct intel_plane_state *plane_state; struct intel_crtc_state *crtc_state; + struct intel_plane *plane; struct intel_crtc *crtc; u8 affected_pipes = 0; u8 modeset_pipes = 0; int i; + /* + * Any plane which is in use by the joiner needs its crtc. + * Pull those in first as this will not have happened yet + * if the plane remains disabled according to uapi. + */ + for_each_new_intel_plane_in_state(state, plane, plane_state, i) { + crtc = to_intel_crtc(plane_state->hw.crtc); + if (!crtc) + continue; + + crtc_state = intel_atomic_get_crtc_state(&state->base, crtc); + if (IS_ERR(crtc_state)) + return PTR_ERR(crtc_state); + } + + /* Now pull in all joined crtcs */ for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) { affected_pipes |= crtc_state->joiner_pipes; if (intel_crtc_needs_modeset(crtc_state)) From patchwork Mon Jan 27 17:21:47 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Ville Syrjala X-Patchwork-Id: 13951639 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AD1FFC02188 for ; Mon, 27 Jan 2025 17:22:06 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4F00210E58A; Mon, 27 Jan 2025 17:22:06 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="l+Y2gLJQ"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.17]) by gabe.freedesktop.org (Postfix) with ESMTPS id 3C13410E58A for ; Mon, 27 Jan 2025 17:22:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1737998525; x=1769534525; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=V7dhXPUsqazBK1vfjuw6O6wHQ8d07z4IbheAVtw8RgU=; b=l+Y2gLJQT5W5dGGAtTyVvylincZERkGWft7D87jdsxmhnW9GoXRQdVHX EOdxY5XbLp9skA+xEDVxJZBP0ZR8q5/6HrBQr38ALkC/vePS7ol9HlqNR 6u2mONu3j8OromjuOQLQQAahNGfKr/u263YK5PyKGT9j+lrW2eoWLZPzP Dl6rfgV6kDcUZCLY4p4Z4JQlRlyagtizpwPEDsFujqv3T2KA1U3aM3f93 2z+c6QtTto01zBaLRoohVxSVst4cx2mYKtAmGdTitvl82fYI0DvOS1M5E evK5TsZlZsymvNGJcXjViz8VXg55VjOmwBSW+qNG5BSBx6II3Ui30nWvv A==; X-CSE-ConnectionGUID: JljM80OPSr6hAXR+MHe4Cg== X-CSE-MsgGUID: 4ZkCGzufTvaV55lFgLx6RA== X-IronPort-AV: E=McAfee;i="6700,10204,11328"; a="38501380" X-IronPort-AV: E=Sophos;i="6.13,239,1732608000"; d="scan'208";a="38501380" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Jan 2025 09:22:05 -0800 X-CSE-ConnectionGUID: cPsGkTMNQpeg6Kwxwh0cHA== X-CSE-MsgGUID: zE4XHv7+SfCTLK7A9z/EDA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,239,1732608000"; d="scan'208";a="108610188" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.74]) by fmviesa008.fm.intel.com with SMTP; 27 Jan 2025 09:22:03 -0800 Received: by stinkbox (sSMTP sendmail emulation); Mon, 27 Jan 2025 19:22:02 +0200 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Subject: [PATCH 02/11] Revert "drm/i915: Fix NULL ptr deref by checking new_crtc_state" Date: Mon, 27 Jan 2025 19:21:47 +0200 Message-ID: <20250127172156.21928-3-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.45.3 In-Reply-To: <20250127172156.21928-1-ville.syrjala@linux.intel.com> References: <20250127172156.21928-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä This reverts commit 1d5b09f8daf859247a1ea65b0d732a24d88980d8. Now that the root cause the missing crtc state has been fixed we can get rid of the duct tape. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_atomic_plane.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c index c558143f4f82..b7af33c5dd3f 100644 --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c @@ -1124,7 +1124,7 @@ intel_prepare_plane_fb(struct drm_plane *_plane, * This should only fail upon a hung GPU, in which case we * can safely continue. */ - if (new_crtc_state && intel_crtc_needs_modeset(new_crtc_state)) { + if (intel_crtc_needs_modeset(new_crtc_state)) { ret = add_dma_resv_fences(old_obj->resv, &new_plane_state->uapi); if (ret < 0) From patchwork Mon Jan 27 17:21:48 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Ville Syrjala X-Patchwork-Id: 13951640 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 71251C0218A for ; Mon, 27 Jan 2025 17:22:09 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 189AC10E590; Mon, 27 Jan 2025 17:22:09 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="M2x2xCFu"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.17]) by gabe.freedesktop.org (Postfix) with ESMTPS id 27BA210E591 for ; Mon, 27 Jan 2025 17:22:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1737998528; x=1769534528; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=yGYJoa3a7Q0LGrXPTatGzxwrtNvDRW2abTf8cNb4r94=; b=M2x2xCFu9qt+slaKZuxtYO54zPRB4QPzxtFHj8SSUq0xCYh0bzUPXvun 6o0IQV+EKTT0OWeUohFreO5fEqxDGSaq6LhPjD4z5YWvP7zN2jmJzizlW +wOb1L7RaahXeoJ41XxvdImkYkMayquNIugne2oIVdjNgMuMG3aYbY7il ujusNqX1YcUAB0U8UY7isj0TAs6OQ9WNMWBTXAb9F12yrbhbzhngx6A0d mdlAPQnR1AorD0i/BFenuJ8ICeWoLV7tg0HeARyd8vHXfBG1Js7tZNnyy VOe8l063r+P0IkcwY5hL5QTDme/dNA1/MPILnKRsAis+t48CVTtTzwoMm A==; X-CSE-ConnectionGUID: BqF7Y1xURom65/iMiZBMog== X-CSE-MsgGUID: P0EEYr/vRP2/CVE6SOBRsA== X-IronPort-AV: E=McAfee;i="6700,10204,11328"; a="38501383" X-IronPort-AV: E=Sophos;i="6.13,239,1732608000"; d="scan'208";a="38501383" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Jan 2025 09:22:08 -0800 X-CSE-ConnectionGUID: n1DjwkFxSuCZxUXX/NTg1g== X-CSE-MsgGUID: WttMWXcrSECfjpJQfC4oiA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,239,1732608000"; d="scan'208";a="108610192" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.74]) by fmviesa008.fm.intel.com with SMTP; 27 Jan 2025 09:22:06 -0800 Received: by stinkbox (sSMTP sendmail emulation); Mon, 27 Jan 2025 19:22:05 +0200 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Subject: [PATCH 03/11] drm/i915: Rework joiner and Y plane dependency handling Date: Mon, 27 Jan 2025 19:21:48 +0200 Message-ID: <20250127172156.21928-4-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.45.3 In-Reply-To: <20250127172156.21928-1-ville.syrjala@linux.intel.com> References: <20250127172156.21928-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä The current code tries to handle joiner vs. Y planes completely independently. That does not really work since each pipe selects its Y planes completely independently, and any plane pulled into the state by one of the secondary pipes needs to have the plane on the primary pipe also included in the state (for the uapi state copy). The current code sometimes forgets to pull in planes that we need, leading to weird things like the Y<->UV plane link only getting torn down from one side but not the other. Remedy the situation by pulling in the exact same set planes on all the joined pipes. To calculate the set we simply look through each joined crtc and any plane in the state gets added to the set. However due to the way the Y plane selection works we may not be able to determine the set in one go. One plane on one pipe may pull in a Y plane, which may have to pull in another plane because it's not acting in the same role on another pipe, etc. The simple approach taken here is to keep looping and adding planes to the set until it stops growing. I suppose if we tracked more of this Y plane stuff in the crtc state rather than the plane state we might be able to do it in one go. But this works, and it's not going to loop for long anyway since we only have so many pipes and Y planes to consider. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_display.c | 104 ++++++++++--------- 1 file changed, 53 insertions(+), 51 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 2b31c8f4b7cd..68ae8770dc4f 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -4402,31 +4402,6 @@ static bool check_single_encoder_cloning(struct intel_atomic_state *state, return true; } -static int icl_add_linked_planes(struct intel_atomic_state *state) -{ - struct intel_plane *plane, *linked; - struct intel_plane_state *plane_state, *linked_plane_state; - int i; - - for_each_new_intel_plane_in_state(state, plane, plane_state, i) { - linked = plane_state->planar_linked_plane; - - if (!linked) - continue; - - linked_plane_state = intel_atomic_get_plane_state(state, linked); - if (IS_ERR(linked_plane_state)) - return PTR_ERR(linked_plane_state); - - drm_WARN_ON(state->base.dev, - linked_plane_state->planar_linked_plane != plane); - drm_WARN_ON(state->base.dev, - linked_plane_state->planar_slave == plane_state->planar_slave); - } - - return 0; -} - static int icl_check_nv12_planes(struct intel_atomic_state *state, struct intel_crtc *crtc) { @@ -6172,44 +6147,75 @@ static bool active_planes_affects_min_cdclk(struct drm_i915_private *dev_priv) IS_IVYBRIDGE(dev_priv); } -static int intel_crtc_add_joiner_planes(struct intel_atomic_state *state, - struct intel_crtc *crtc, - struct intel_crtc *other) +static u8 intel_joiner_affected_planes(struct intel_atomic_state *state, + u8 joined_pipes) { - const struct intel_plane_state __maybe_unused *plane_state; + const struct intel_plane_state *plane_state; struct intel_plane *plane; - u8 plane_ids = 0; + u8 affected_planes = 0; int i; for_each_new_intel_plane_in_state(state, plane, plane_state, i) { - if (plane->pipe == crtc->pipe) - plane_ids |= BIT(plane->id); + struct intel_plane *linked = plane_state->planar_linked_plane; + + if ((joined_pipes & BIT(plane->pipe)) == 0) + continue; + + affected_planes |= BIT(plane->id); + if (linked) + affected_planes |= BIT(linked->id); } - return intel_crtc_add_planes_to_state(state, other, plane_ids); + return affected_planes; } -static int intel_joiner_add_affected_planes(struct intel_atomic_state *state) +static int intel_joiner_add_affected_planes(struct intel_atomic_state *state, + u8 joined_pipes) { - struct drm_i915_private *i915 = to_i915(state->base.dev); - const struct intel_crtc_state *crtc_state; - struct intel_crtc *crtc; - int i; + u8 prev_affected_planes, affected_planes = 0; - for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) { - struct intel_crtc *other; + /* + * We want all the joined pipes to have the same + * set of planes in the atomic state, to make sure + * state copying always works correctly, and the + * UV<->Y plane linkage is always up to date. + * Keep pulling planes in until we've determined + * the full set of affected plane. A bit complicated + * on account of each pipe being capable of selecting + * their own Y planes independently of the other pipes, + * and the selection being done from the set of + * inactive planes. + */ + do { + struct intel_crtc *crtc; - for_each_intel_crtc_in_pipe_mask(&i915->drm, other, - crtc_state->joiner_pipes) { + for_each_intel_crtc_in_pipe_mask(state->base.dev, crtc, joined_pipes) { int ret; - if (crtc == other) - continue; - - ret = intel_crtc_add_joiner_planes(state, crtc, other); + ret = intel_crtc_add_planes_to_state(state, crtc, affected_planes); if (ret) return ret; } + + prev_affected_planes = affected_planes; + affected_planes = intel_joiner_affected_planes(state, joined_pipes); + } while (affected_planes != prev_affected_planes); + + return 0; +} + +static int intel_add_affected_planes(struct intel_atomic_state *state) +{ + const struct intel_crtc_state *crtc_state; + struct intel_crtc *crtc; + int i; + + for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) { + int ret; + + ret = intel_joiner_add_affected_planes(state, intel_crtc_joined_pipe_mask(crtc_state)); + if (ret) + return ret; } return 0; @@ -6224,11 +6230,7 @@ static int intel_atomic_check_planes(struct intel_atomic_state *state) struct intel_crtc *crtc; int i, ret; - ret = icl_add_linked_planes(state); - if (ret) - return ret; - - ret = intel_joiner_add_affected_planes(state); + ret = intel_add_affected_planes(state); if (ret) return ret; From patchwork Mon Jan 27 17:21:49 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Ville Syrjala X-Patchwork-Id: 13951641 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id ACF21C0218C for ; Mon, 27 Jan 2025 17:22:12 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5728C10E587; Mon, 27 Jan 2025 17:22:12 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="ed+/LTeE"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.17]) by gabe.freedesktop.org (Postfix) with ESMTPS id EACC610E591 for ; Mon, 27 Jan 2025 17:22:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1737998531; x=1769534531; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=dxdlTmfKWKJxHLaGLQ3XU+h9iZLxMLc25w6vxn3M6TE=; b=ed+/LTeE0UtGdzd0h3Kyt7c8Hqauc9Q7uP/JLGhAZF1kXz62dblW145G yKL+gFkdHZqYNUwFHhKddeQavilcAJeBRpfOtMFjefYS3bOHlxSYI6M5i nPA+FCWaz7FroRwSNlvVyWdicDNxL3Q32eKob1yk+iKhHhumbyK9/qs2X wc/9y0Ig2X1LVhZl2HnNkuuk7So4GyfRiMmv6l3jvdTNjkkwuqCvGviRq 9l72zd3glIEQbOa+F6omoPjCiyq1229HlSjIwdRC0Ye+I0/p8A5AEMT73 RQH5HVXxVSObxhnUAK+cR4bZ0sYGuoP9+KNyO/k3DUFvKqgFXwE1AEyjM Q==; X-CSE-ConnectionGUID: O1CQMPzaRDiiEo+BF3vEvQ== X-CSE-MsgGUID: /Y4XHuRoTQuei7cX8DF41A== X-IronPort-AV: E=McAfee;i="6700,10204,11328"; a="38501385" X-IronPort-AV: E=Sophos;i="6.13,239,1732608000"; d="scan'208";a="38501385" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Jan 2025 09:22:10 -0800 X-CSE-ConnectionGUID: AVeLgwKFTBu3qtNlHo0pBw== X-CSE-MsgGUID: 41xdCfdCS9uGVQ75ILEWTg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,239,1732608000"; d="scan'208";a="108610203" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.74]) by fmviesa008.fm.intel.com with SMTP; 27 Jan 2025 09:22:09 -0800 Received: by stinkbox (sSMTP sendmail emulation); Mon, 27 Jan 2025 19:22:08 +0200 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Subject: [PATCH 04/11] drm/i915: s/planar_slave/is_y_plane/ Date: Mon, 27 Jan 2025 19:21:49 +0200 Message-ID: <20250127172156.21928-5-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.45.3 In-Reply-To: <20250127172156.21928-1-ville.syrjala@linux.intel.com> References: <20250127172156.21928-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä Bspec talks about Y planes, not planar slaves. Switch to using the same erminology to make life a bit less confusing. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_atomic_plane.c | 4 ++-- drivers/gpu/drm/i915/display/intel_display.c | 8 ++++---- .../gpu/drm/i915/display/intel_display_debugfs.c | 6 +++--- drivers/gpu/drm/i915/display/intel_display_types.h | 13 +++---------- drivers/gpu/drm/i915/display/skl_universal_plane.c | 3 +-- drivers/gpu/drm/i915/display/skl_watermark.c | 4 ++-- 6 files changed, 15 insertions(+), 23 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c index b7af33c5dd3f..650801cb400c 100644 --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c @@ -841,7 +841,7 @@ void intel_crtc_planes_update_noarm(struct intel_dsb *dsb, /* TODO: for mailbox updates this should be skipped */ if (new_plane_state->uapi.visible || - new_plane_state->planar_slave) + new_plane_state->is_y_plane) intel_plane_update_noarm(dsb, plane, new_crtc_state, new_plane_state); } @@ -874,7 +874,7 @@ static void skl_crtc_planes_update_arm(struct intel_dsb *dsb, * would have to be called here as well. */ if (new_plane_state->uapi.visible || - new_plane_state->planar_slave) + new_plane_state->is_y_plane) intel_plane_update_arm(dsb, plane, new_crtc_state, new_plane_state); else intel_plane_disable_arm(dsb, plane, new_crtc_state); diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 68ae8770dc4f..875597007461 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -4424,7 +4424,7 @@ static int icl_check_nv12_planes(struct intel_atomic_state *state, continue; plane_state->planar_linked_plane = NULL; - if (plane_state->planar_slave && !plane_state->uapi.visible) { + if (plane_state->is_y_plane && !plane_state->uapi.visible) { crtc_state->enabled_planes &= ~BIT(plane->id); crtc_state->active_planes &= ~BIT(plane->id); crtc_state->update_planes |= BIT(plane->id); @@ -4432,7 +4432,7 @@ static int icl_check_nv12_planes(struct intel_atomic_state *state, crtc_state->rel_data_rate[plane->id] = 0; } - plane_state->planar_slave = false; + plane_state->is_y_plane = false; } if (!crtc_state->nv12_planes) @@ -4469,7 +4469,7 @@ static int icl_check_nv12_planes(struct intel_atomic_state *state, plane_state->planar_linked_plane = linked; - linked_state->planar_slave = true; + linked_state->is_y_plane = true; linked_state->planar_linked_plane = plane; crtc_state->enabled_planes |= BIT(linked->id); crtc_state->active_planes |= BIT(linked->id); @@ -5812,7 +5812,7 @@ intel_verify_planes(struct intel_atomic_state *state) for_each_new_intel_plane_in_state(state, plane, plane_state, i) - assert_plane(plane, plane_state->planar_slave || + assert_plane(plane, plane_state->is_y_plane || plane_state->uapi.visible); } diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c index 926f09c35084..95484eec3b0a 100644 --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c @@ -365,8 +365,8 @@ static const char *plane_visibility(const struct intel_plane_state *plane_state) if (plane_state->uapi.visible) return "visible"; - if (plane_state->planar_slave) - return "planar-slave"; + if (plane_state->is_y_plane) + return "Y plane"; return "hidden"; } @@ -399,7 +399,7 @@ static void intel_plane_uapi_info(struct seq_file *m, struct intel_plane *plane) if (plane_state->planar_linked_plane) seq_printf(m, "\t\tplanar: Linked to [PLANE:%d:%s] as a %s\n", plane_state->planar_linked_plane->base.base.id, plane_state->planar_linked_plane->base.name, - plane_state->planar_slave ? "slave" : "master"); + plane_state->is_y_plane ? "Y plane" : "UV plane"); } static void intel_plane_hw_info(struct seq_file *m, struct intel_plane *plane) diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index cb51b7936f93..5785c7b6bc39 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -638,6 +638,9 @@ struct intel_plane_state { /* Plane state to display black pixels when pxp is borked */ bool force_black; + /* Acting as Y plane for another UV plane? */ + bool is_y_plane; + /* plane control register */ u32 ctl; @@ -677,16 +680,6 @@ struct intel_plane_state { */ struct intel_plane *planar_linked_plane; - /* - * planar_slave: - * If set don't update use the linked plane's state for updating - * this plane during atomic commit with the update_slave() callback. - * - * It's also used by the watermark code to ignore wm calculations on - * this plane. They're calculated by the linked plane's wm code. - */ - u32 planar_slave; - struct drm_intel_sprite_colorkey ckey; struct drm_rect psr2_sel_fetch_area; diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c index 301ad3a22c4c..d5e5b76c5b38 100644 --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c @@ -1380,8 +1380,7 @@ static void icl_plane_csc_load_black(struct intel_dsb *dsb, static int icl_plane_color_plane(const struct intel_plane_state *plane_state) { - /* Program the UV plane on planar master */ - if (plane_state->planar_linked_plane && !plane_state->planar_slave) + if (plane_state->planar_linked_plane && !plane_state->is_y_plane) return 1; else return 0; diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c index 45fe4aaeb450..5ab8e8433dfd 100644 --- a/drivers/gpu/drm/i915/display/skl_watermark.c +++ b/drivers/gpu/drm/i915/display/skl_watermark.c @@ -2259,8 +2259,8 @@ static int icl_build_plane_wm(struct intel_crtc_state *crtc_state, struct skl_plane_wm *wm = &crtc_state->wm.skl.raw.planes[plane_id]; int ret; - /* Watermarks calculated in master */ - if (plane_state->planar_slave) + /* Watermarks calculated on UV plane */ + if (plane_state->is_y_plane) return 0; memset(wm, 0, sizeof(*wm)); From patchwork Mon Jan 27 17:21:50 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Ville Syrjala X-Patchwork-Id: 13951642 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7408FC0218A for ; Mon, 27 Jan 2025 17:22:15 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1F21610E591; Mon, 27 Jan 2025 17:22:15 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="MovlBPEE"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.17]) by gabe.freedesktop.org (Postfix) with ESMTPS id B9ACB10E592 for ; Mon, 27 Jan 2025 17:22:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1737998533; x=1769534533; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=NUlsH0NPB6EEl9MMXW2IW8udJHPwea4PIYp4IIjZcCs=; b=MovlBPEEosRwobtfk5dqyDt6CKgCVlckchh0gjEKzOWxUE2JG7wBnwQw qUVSYFhBUsZrXoW8ukVqVlJjUs8zqzWqGWMgAEbvRb8AuOpuO+3i5qAXJ qmQWi0QGyCLQRnXylzcHF7WP7gC2reI3IRa70XBbxCt9gApkEbtYVLK88 z5g+Vpw367mM/XVcPhmCSW+bZedwN1VOAGyZv1WQSXWJmB/TMbdYfepm9 aY60UrPU4cqPAdWxvDaqnh6hf0EhFuMHI49JD959iFZ3n+OxaS4BmhTmH pci5mJOynP4FlQPfmGAAMA2cCfSeMlhGOnmPI6uLoAZH7CHRGSri3MLF/ A==; X-CSE-ConnectionGUID: zmUWRCpDSKiFXLts+jGJrA== X-CSE-MsgGUID: WWtOTRk3Qp6ixm8e3TKHDA== X-IronPort-AV: E=McAfee;i="6700,10204,11328"; a="38501389" X-IronPort-AV: E=Sophos;i="6.13,239,1732608000"; d="scan'208";a="38501389" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Jan 2025 09:22:13 -0800 X-CSE-ConnectionGUID: 3SzV4ZFqRzWdtvFjgEbnWg== X-CSE-MsgGUID: FCUIxxaFQdmHL5MStNyo2Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,239,1732608000"; d="scan'208";a="108610213" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.74]) by fmviesa008.fm.intel.com with SMTP; 27 Jan 2025 09:22:12 -0800 Received: by stinkbox (sSMTP sendmail emulation); Mon, 27 Jan 2025 19:22:10 +0200 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Subject: [PATCH 05/11] drm/i915: Extract unlink_nv12_plane() Date: Mon, 27 Jan 2025 19:21:50 +0200 Message-ID: <20250127172156.21928-6-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.45.3 In-Reply-To: <20250127172156.21928-1-ville.syrjala@linux.intel.com> References: <20250127172156.21928-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä Pull the details of the nv12 plane unlinking to a small funciton to make the higher level code less messy. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_display.c | 32 +++++++++++++------- 1 file changed, 21 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 875597007461..bc62298b1b49 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -4402,6 +4402,24 @@ static bool check_single_encoder_cloning(struct intel_atomic_state *state, return true; } +static void unlink_nv12_plane(struct intel_crtc_state *crtc_state, + struct intel_plane_state *plane_state) +{ + struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); + + plane_state->planar_linked_plane = NULL; + + if (plane_state->is_y_plane && !plane_state->uapi.visible) { + crtc_state->enabled_planes &= ~BIT(plane->id); + crtc_state->active_planes &= ~BIT(plane->id); + crtc_state->update_planes |= BIT(plane->id); + crtc_state->data_rate[plane->id] = 0; + crtc_state->rel_data_rate[plane->id] = 0; + } + + plane_state->is_y_plane = false; +} + static int icl_check_nv12_planes(struct intel_atomic_state *state, struct intel_crtc *crtc) { @@ -4420,19 +4438,11 @@ static int icl_check_nv12_planes(struct intel_atomic_state *state, * in the crtc_state->active_planes mask. */ for_each_new_intel_plane_in_state(state, plane, plane_state, i) { - if (plane->pipe != crtc->pipe || !plane_state->planar_linked_plane) + if (plane->pipe != crtc->pipe) continue; - plane_state->planar_linked_plane = NULL; - if (plane_state->is_y_plane && !plane_state->uapi.visible) { - crtc_state->enabled_planes &= ~BIT(plane->id); - crtc_state->active_planes &= ~BIT(plane->id); - crtc_state->update_planes |= BIT(plane->id); - crtc_state->data_rate[plane->id] = 0; - crtc_state->rel_data_rate[plane->id] = 0; - } - - plane_state->is_y_plane = false; + if (plane_state->planar_linked_plane) + unlink_nv12_plane(crtc_state, plane_state); } if (!crtc_state->nv12_planes) From patchwork Mon Jan 27 17:21:51 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Ville Syrjala X-Patchwork-Id: 13951643 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B9921C0218A for ; Mon, 27 Jan 2025 17:22:18 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 360F310E593; Mon, 27 Jan 2025 17:22:18 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="Pc3k3Gvw"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.17]) by gabe.freedesktop.org (Postfix) with ESMTPS id 90DA310E5A8 for ; Mon, 27 Jan 2025 17:22:16 +0000 (UTC) DKIM-Signature: v=1; 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d="scan'208";a="108610218" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.74]) by fmviesa008.fm.intel.com with SMTP; 27 Jan 2025 09:22:14 -0800 Received: by stinkbox (sSMTP sendmail emulation); Mon, 27 Jan 2025 19:22:13 +0200 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Subject: [PATCH 06/11] drm/i915: Remove pointless visible check in unlink_nv12_plane() Date: Mon, 27 Jan 2025 19:21:51 +0200 Message-ID: <20250127172156.21928-7-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.45.3 In-Reply-To: <20250127172156.21928-1-ville.syrjala@linux.intel.com> References: <20250127172156.21928-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä visible can't be true when is_y_plane is true. Replace the bogus check with an WARN_ON(). Flatten the function while at it. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_display.c | 18 +++++++++++------- 1 file changed, 11 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index bc62298b1b49..8004ad20ed0a 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -4405,19 +4405,23 @@ static bool check_single_encoder_cloning(struct intel_atomic_state *state, static void unlink_nv12_plane(struct intel_crtc_state *crtc_state, struct intel_plane_state *plane_state) { + struct intel_display *display = to_intel_display(plane_state); struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); plane_state->planar_linked_plane = NULL; - if (plane_state->is_y_plane && !plane_state->uapi.visible) { - crtc_state->enabled_planes &= ~BIT(plane->id); - crtc_state->active_planes &= ~BIT(plane->id); - crtc_state->update_planes |= BIT(plane->id); - crtc_state->data_rate[plane->id] = 0; - crtc_state->rel_data_rate[plane->id] = 0; - } + if (!plane_state->is_y_plane) + return; + + drm_WARN_ON(display->drm, plane_state->uapi.visible); plane_state->is_y_plane = false; + + crtc_state->enabled_planes &= ~BIT(plane->id); + crtc_state->active_planes &= ~BIT(plane->id); + crtc_state->update_planes |= BIT(plane->id); + crtc_state->data_rate[plane->id] = 0; + crtc_state->rel_data_rate[plane->id] = 0; } static int icl_check_nv12_planes(struct intel_atomic_state *state, From patchwork Mon Jan 27 17:21:52 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Ville Syrjala X-Patchwork-Id: 13951644 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BB77BC02188 for ; Mon, 27 Jan 2025 17:22:20 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 64E8710E598; Mon, 27 Jan 2025 17:22:20 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="AE/p3wAd"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.17]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4A0B510E5A4 for ; Mon, 27 Jan 2025 17:22:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1737998539; x=1769534539; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=Dr1psfAAuxafNSmnpXvWRIYeiU2KczewSqHqD4d1uZ8=; b=AE/p3wAdkzsuiHOIHCnTaFUJmm0aO037SDSvgyZIGSYAc3EV1uUThGAA sREtEM0oX1/i4kLad1A2lCyvY+QeU9MmuQrtiqMbm921VRtdRJFhALVYC Xhd/jIVRudBnLf2KsAZ00vuateE8GXef2263FBioyWed6Pxr9yFW4xSNU rV7JOjPng9mYrt3FQ1qD+jd58sUtRMwUnTaUQ+lctuq1JqleuCpHKaUWN J0q6CIIWbhIQdk1OJEoSAVD8MQxhf5026wwohLO/gBc0Njov+pdUUKkvs wpZ7ktDtZIbD0NyNbbalGPYjCp3goDGQXy809Vvi/q8NtadLd1W7/FRi5 w==; X-CSE-ConnectionGUID: KSg8zBf/QI2rbuCMcLaL6Q== X-CSE-MsgGUID: YNZCh3T5RrGBd0qqFTk9+A== X-IronPort-AV: E=McAfee;i="6700,10204,11328"; a="38501393" X-IronPort-AV: E=Sophos;i="6.13,239,1732608000"; d="scan'208";a="38501393" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Jan 2025 09:22:19 -0800 X-CSE-ConnectionGUID: EosH951GROi7t5RMRblnYQ== X-CSE-MsgGUID: viRzo/6xT1OaM55nJB1FbA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,239,1732608000"; d="scan'208";a="108610222" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.74]) by fmviesa008.fm.intel.com with SMTP; 27 Jan 2025 09:22:17 -0800 Received: by stinkbox (sSMTP sendmail emulation); Mon, 27 Jan 2025 19:22:16 +0200 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Subject: [PATCH 07/11] drm/i915: Extract link_nv12_planes() Date: Mon, 27 Jan 2025 19:21:52 +0200 Message-ID: <20250127172156.21928-8-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.45.3 In-Reply-To: <20250127172156.21928-1-ville.syrjala@linux.intel.com> References: <20250127172156.21928-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä Pull the code linking the UV and Y planes together into a sensible function instead of having the code plastered inside the higher level loop. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_display.c | 83 +++++++++++--------- 1 file changed, 47 insertions(+), 36 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 8004ad20ed0a..a1fa40622d35 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -4402,6 +4402,52 @@ static bool check_single_encoder_cloning(struct intel_atomic_state *state, return true; } +static void link_nv12_planes(struct intel_crtc_state *crtc_state, + struct intel_plane_state *plane_state, + struct intel_plane_state *linked_state) +{ + struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); + struct intel_plane *linked = to_intel_plane(linked_state->uapi.plane); + struct drm_i915_private *dev_priv = to_i915(plane->base.dev); + + plane_state->planar_linked_plane = linked; + + linked_state->is_y_plane = true; + linked_state->planar_linked_plane = plane; + crtc_state->enabled_planes |= BIT(linked->id); + crtc_state->active_planes |= BIT(linked->id); + crtc_state->update_planes |= BIT(linked->id); + crtc_state->data_rate[linked->id] = + crtc_state->data_rate_y[plane->id]; + crtc_state->rel_data_rate[linked->id] = + crtc_state->rel_data_rate_y[plane->id]; + drm_dbg_kms(&dev_priv->drm, "Using %s as Y plane for %s\n", + linked->base.name, plane->base.name); + + /* Copy parameters to slave plane */ + linked_state->ctl = plane_state->ctl | PLANE_CTL_YUV420_Y_PLANE; + linked_state->color_ctl = plane_state->color_ctl; + linked_state->view = plane_state->view; + linked_state->decrypt = plane_state->decrypt; + + intel_plane_copy_hw_state(linked_state, plane_state); + linked_state->uapi.src = plane_state->uapi.src; + linked_state->uapi.dst = plane_state->uapi.dst; + + if (icl_is_hdr_plane(dev_priv, plane->id)) { + if (linked->id == PLANE_7) + plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_7_ICL; + else if (linked->id == PLANE_6) + plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_6_ICL; + else if (linked->id == PLANE_5) + plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_5_RKL; + else if (linked->id == PLANE_4) + plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_4_RKL; + else + MISSING_CASE(linked->id); + } +} + static void unlink_nv12_plane(struct intel_crtc_state *crtc_state, struct intel_plane_state *plane_state) { @@ -4481,42 +4527,7 @@ static int icl_check_nv12_planes(struct intel_atomic_state *state, return -EINVAL; } - plane_state->planar_linked_plane = linked; - - linked_state->is_y_plane = true; - linked_state->planar_linked_plane = plane; - crtc_state->enabled_planes |= BIT(linked->id); - crtc_state->active_planes |= BIT(linked->id); - crtc_state->update_planes |= BIT(linked->id); - crtc_state->data_rate[linked->id] = - crtc_state->data_rate_y[plane->id]; - crtc_state->rel_data_rate[linked->id] = - crtc_state->rel_data_rate_y[plane->id]; - drm_dbg_kms(&dev_priv->drm, "Using %s as Y plane for %s\n", - linked->base.name, plane->base.name); - - /* Copy parameters to slave plane */ - linked_state->ctl = plane_state->ctl | PLANE_CTL_YUV420_Y_PLANE; - linked_state->color_ctl = plane_state->color_ctl; - linked_state->view = plane_state->view; - linked_state->decrypt = plane_state->decrypt; - - intel_plane_copy_hw_state(linked_state, plane_state); - linked_state->uapi.src = plane_state->uapi.src; - linked_state->uapi.dst = plane_state->uapi.dst; - - if (icl_is_hdr_plane(dev_priv, plane->id)) { - if (linked->id == PLANE_7) - plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_7_ICL; - else if (linked->id == PLANE_6) - plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_6_ICL; - else if (linked->id == PLANE_5) - plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_5_RKL; - else if (linked->id == PLANE_4) - plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_4_RKL; - else - MISSING_CASE(linked->id); - } + link_nv12_planes(crtc_state, plane_state, linked_state); } return 0; From patchwork Mon Jan 27 17:21:53 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Ville Syrjala X-Patchwork-Id: 13951645 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E5C79C02188 for ; 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X-CSE-ConnectionGUID: zIGmZBwNStSrWADw7xkIEQ== X-CSE-MsgGUID: 5XwH9Gt2T8WUhnnroPzdRQ== X-IronPort-AV: E=McAfee;i="6700,10204,11328"; a="38501396" X-IronPort-AV: E=Sophos;i="6.13,239,1732608000"; d="scan'208";a="38501396" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Jan 2025 09:22:22 -0800 X-CSE-ConnectionGUID: aO7BlFIjTKm6aU2IlIn+Pw== X-CSE-MsgGUID: EmSWIskLTXOYF9dZz1mBmg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,239,1732608000"; d="scan'208";a="108610231" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.74]) by fmviesa008.fm.intel.com with SMTP; 27 Jan 2025 09:22:20 -0800 Received: by stinkbox (sSMTP sendmail emulation); Mon, 27 Jan 2025 19:22:19 +0200 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Subject: [PATCH 08/11] drm/i915: Rename the variables in icl_check_nv12_planes() Date: Mon, 27 Jan 2025 19:21:53 +0200 Message-ID: <20250127172156.21928-9-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.45.3 In-Reply-To: <20250127172156.21928-1-ville.syrjala@linux.intel.com> References: <20250127172156.21928-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä All the this generic 'plane' vs 'linked' stuff is hard to follow. Rename the variables to use the y_plane vs. uv_plane terminology to make it clear which is which. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_display.c | 107 ++++++++++--------- 1 file changed, 58 insertions(+), 49 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index a1fa40622d35..3e784fbd4474 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -4403,48 +4403,54 @@ static bool check_single_encoder_cloning(struct intel_atomic_state *state, } static void link_nv12_planes(struct intel_crtc_state *crtc_state, - struct intel_plane_state *plane_state, - struct intel_plane_state *linked_state) + struct intel_plane_state *uv_plane_state, + struct intel_plane_state *y_plane_state) { - struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); - struct intel_plane *linked = to_intel_plane(linked_state->uapi.plane); - struct drm_i915_private *dev_priv = to_i915(plane->base.dev); - - plane_state->planar_linked_plane = linked; - - linked_state->is_y_plane = true; - linked_state->planar_linked_plane = plane; - crtc_state->enabled_planes |= BIT(linked->id); - crtc_state->active_planes |= BIT(linked->id); - crtc_state->update_planes |= BIT(linked->id); - crtc_state->data_rate[linked->id] = - crtc_state->data_rate_y[plane->id]; - crtc_state->rel_data_rate[linked->id] = - crtc_state->rel_data_rate_y[plane->id]; + struct intel_plane *uv_plane = to_intel_plane(uv_plane_state->uapi.plane); + struct intel_plane *y_plane = to_intel_plane(y_plane_state->uapi.plane); + struct drm_i915_private *dev_priv = to_i915(uv_plane->base.dev); + + uv_plane_state->planar_linked_plane = y_plane; + + y_plane_state->is_y_plane = true; + y_plane_state->planar_linked_plane = uv_plane; + + crtc_state->enabled_planes |= BIT(y_plane->id); + crtc_state->active_planes |= BIT(y_plane->id); + crtc_state->update_planes |= BIT(y_plane->id); + crtc_state->data_rate[y_plane->id] = crtc_state->data_rate_y[uv_plane->id]; + crtc_state->rel_data_rate[y_plane->id] = crtc_state->rel_data_rate_y[uv_plane->id]; + drm_dbg_kms(&dev_priv->drm, "Using %s as Y plane for %s\n", - linked->base.name, plane->base.name); + y_plane->base.name, uv_plane->base.name); - /* Copy parameters to slave plane */ - linked_state->ctl = plane_state->ctl | PLANE_CTL_YUV420_Y_PLANE; - linked_state->color_ctl = plane_state->color_ctl; - linked_state->view = plane_state->view; - linked_state->decrypt = plane_state->decrypt; + /* Copy parameters to Y plane */ + y_plane_state->ctl = uv_plane_state->ctl | PLANE_CTL_YUV420_Y_PLANE; + y_plane_state->color_ctl = uv_plane_state->color_ctl; + y_plane_state->view = uv_plane_state->view; + y_plane_state->decrypt = uv_plane_state->decrypt; - intel_plane_copy_hw_state(linked_state, plane_state); - linked_state->uapi.src = plane_state->uapi.src; - linked_state->uapi.dst = plane_state->uapi.dst; + intel_plane_copy_hw_state(y_plane_state, uv_plane_state); + y_plane_state->uapi.src = uv_plane_state->uapi.src; + y_plane_state->uapi.dst = uv_plane_state->uapi.dst; - if (icl_is_hdr_plane(dev_priv, plane->id)) { - if (linked->id == PLANE_7) - plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_7_ICL; - else if (linked->id == PLANE_6) - plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_6_ICL; - else if (linked->id == PLANE_5) - plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_5_RKL; - else if (linked->id == PLANE_4) - plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_4_RKL; - else - MISSING_CASE(linked->id); + if (icl_is_hdr_plane(dev_priv, uv_plane->id)) { + switch (y_plane->id) { + case PLANE_7: + uv_plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_7_ICL; + break; + case PLANE_6: + uv_plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_6_ICL; + break; + case PLANE_5: + uv_plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_5_RKL; + break; + case PLANE_4: + uv_plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_4_RKL; + break; + default: + MISSING_CASE(y_plane->id); + } } } @@ -4476,8 +4482,8 @@ static int icl_check_nv12_planes(struct intel_atomic_state *state, struct drm_i915_private *dev_priv = to_i915(state->base.dev); struct intel_crtc_state *crtc_state = intel_atomic_get_new_crtc_state(state, crtc); - struct intel_plane *plane, *linked; struct intel_plane_state *plane_state; + struct intel_plane *plane; int i; if (DISPLAY_VER(dev_priv) < 11) @@ -4499,27 +4505,30 @@ static int icl_check_nv12_planes(struct intel_atomic_state *state, return 0; for_each_new_intel_plane_in_state(state, plane, plane_state, i) { - struct intel_plane_state *linked_state = NULL; + struct intel_plane_state *y_plane_state = NULL; + struct intel_plane *y_plane; - if (plane->pipe != crtc->pipe || - !(crtc_state->nv12_planes & BIT(plane->id))) + if (plane->pipe != crtc->pipe) continue; - for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, linked) { - if (!icl_is_nv12_y_plane(dev_priv, linked->id)) + if ((crtc_state->nv12_planes & BIT(plane->id)) == 0) + continue; + + for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, y_plane) { + if (!icl_is_nv12_y_plane(dev_priv, y_plane->id)) continue; - if (crtc_state->active_planes & BIT(linked->id)) + if (crtc_state->active_planes & BIT(y_plane->id)) continue; - linked_state = intel_atomic_get_plane_state(state, linked); - if (IS_ERR(linked_state)) - return PTR_ERR(linked_state); + y_plane_state = intel_atomic_get_plane_state(state, y_plane); + if (IS_ERR(y_plane_state)) + return PTR_ERR(y_plane_state); break; } - if (!linked_state) { + if (!y_plane_state) { drm_dbg_kms(&dev_priv->drm, "Need %d free Y planes for planar YUV\n", hweight8(crtc_state->nv12_planes)); @@ -4527,7 +4536,7 @@ static int icl_check_nv12_planes(struct intel_atomic_state *state, return -EINVAL; } - link_nv12_planes(crtc_state, plane_state, linked_state); + link_nv12_planes(crtc_state, plane_state, y_plane_state); } return 0; From patchwork Mon Jan 27 17:21:54 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Ville Syrjala X-Patchwork-Id: 13951646 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id ECCD8C0218C for ; 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X-CSE-ConnectionGUID: JmZrpCF2QsyKfIyfDFTBOA== X-CSE-MsgGUID: a/arLap4S6GcFegBNfYZxw== X-IronPort-AV: E=McAfee;i="6700,10204,11328"; a="38501399" X-IronPort-AV: E=Sophos;i="6.13,239,1732608000"; d="scan'208";a="38501399" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Jan 2025 09:22:24 -0800 X-CSE-ConnectionGUID: FXo7ELVwSJKfowOdYzdQXA== X-CSE-MsgGUID: kSwUGqEPQGuSZGNQqmHVWQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,239,1732608000"; d="scan'208";a="108610256" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.74]) by fmviesa008.fm.intel.com with SMTP; 27 Jan 2025 09:22:23 -0800 Received: by stinkbox (sSMTP sendmail emulation); Mon, 27 Jan 2025 19:22:22 +0200 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Subject: [PATCH 09/11] drm/i915: Move icl+ nv12 plane register mangling into skl_universal_plane.c Date: Mon, 27 Jan 2025 19:21:54 +0200 Message-ID: <20250127172156.21928-10-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.45.3 In-Reply-To: <20250127172156.21928-1-ville.syrjala@linux.intel.com> References: <20250127172156.21928-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä Try to keep all the low level skl+ universal plane register details inside skl_universal_plane.c instead of having them sprinkled all over the place. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_display.c | 30 ++++------------- .../drm/i915/display/skl_universal_plane.c | 32 +++++++++++++++++++ .../drm/i915/display/skl_universal_plane.h | 3 ++ 3 files changed, 41 insertions(+), 24 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 3e784fbd4474..36611b290dff 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -123,7 +123,6 @@ #include "intel_wm.h" #include "skl_scaler.h" #include "skl_universal_plane.h" -#include "skl_universal_plane_regs.h" #include "skl_watermark.h" #include "vlv_dpio_phy_regs.h" #include "vlv_dsi.h" @@ -4425,33 +4424,16 @@ static void link_nv12_planes(struct intel_crtc_state *crtc_state, y_plane->base.name, uv_plane->base.name); /* Copy parameters to Y plane */ - y_plane_state->ctl = uv_plane_state->ctl | PLANE_CTL_YUV420_Y_PLANE; - y_plane_state->color_ctl = uv_plane_state->color_ctl; - y_plane_state->view = uv_plane_state->view; - y_plane_state->decrypt = uv_plane_state->decrypt; - intel_plane_copy_hw_state(y_plane_state, uv_plane_state); y_plane_state->uapi.src = uv_plane_state->uapi.src; y_plane_state->uapi.dst = uv_plane_state->uapi.dst; - if (icl_is_hdr_plane(dev_priv, uv_plane->id)) { - switch (y_plane->id) { - case PLANE_7: - uv_plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_7_ICL; - break; - case PLANE_6: - uv_plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_6_ICL; - break; - case PLANE_5: - uv_plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_5_RKL; - break; - case PLANE_4: - uv_plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_4_RKL; - break; - default: - MISSING_CASE(y_plane->id); - } - } + y_plane_state->ctl = uv_plane_state->ctl; + y_plane_state->color_ctl = uv_plane_state->color_ctl; + y_plane_state->view = uv_plane_state->view; + y_plane_state->decrypt = uv_plane_state->decrypt; + + icl_link_nv12_planes(uv_plane_state, y_plane_state); } static void unlink_nv12_plane(struct intel_crtc_state *crtc_state, diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c index d5e5b76c5b38..4c19fce4db0e 100644 --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c @@ -2316,6 +2316,38 @@ static int skl_plane_check(struct intel_crtc_state *crtc_state, return 0; } +void icl_link_nv12_planes(struct intel_plane_state *uv_plane_state, + struct intel_plane_state *y_plane_state) +{ + struct intel_plane *uv_plane = to_intel_plane(uv_plane_state->uapi.plane); + struct intel_plane *y_plane = to_intel_plane(y_plane_state->uapi.plane); + struct drm_i915_private *i915 = to_i915(uv_plane->base.dev); + + drm_WARN_ON(&i915->drm, icl_is_nv12_y_plane(i915, uv_plane->id)); + drm_WARN_ON(&i915->drm, !icl_is_nv12_y_plane(i915, y_plane->id)); + + y_plane_state->ctl |= PLANE_CTL_YUV420_Y_PLANE; + + if (icl_is_hdr_plane(i915, uv_plane->id)) { + switch (y_plane->id) { + case PLANE_7: + uv_plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_7_ICL; + break; + case PLANE_6: + uv_plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_6_ICL; + break; + case PLANE_5: + uv_plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_5_RKL; + break; + case PLANE_4: + uv_plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_4_RKL; + break; + default: + MISSING_CASE(y_plane->id); + } + } +} + static enum intel_fbc_id skl_fbc_id_for_pipe(enum pipe pipe) { return pipe - PIPE_A + INTEL_FBC_A; diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.h b/drivers/gpu/drm/i915/display/skl_universal_plane.h index 18b41d13f0bd..9161bf64e8a3 100644 --- a/drivers/gpu/drm/i915/display/skl_universal_plane.h +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.h @@ -32,6 +32,9 @@ int skl_format_to_fourcc(int format, bool rgb_order, bool alpha); int skl_calc_main_surface_offset(const struct intel_plane_state *plane_state, int *x, int *y, u32 *offset); +void icl_link_nv12_planes(struct intel_plane_state *uv_plane_state, + struct intel_plane_state *y_plane_state); + bool icl_is_nv12_y_plane(struct drm_i915_private *dev_priv, enum plane_id plane_id); u8 icl_hdr_plane_mask(void); From patchwork Mon Jan 27 17:21:55 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Ville Syrjala X-Patchwork-Id: 13951647 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 30CF7C02188 for ; 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X-CSE-ConnectionGUID: nF+MJasQRUu/56Z8GMX+TA== X-CSE-MsgGUID: oYg4CYG9RKuB3O+zrLMLCA== X-IronPort-AV: E=McAfee;i="6700,10204,11328"; a="38501401" X-IronPort-AV: E=Sophos;i="6.13,239,1732608000"; d="scan'208";a="38501401" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Jan 2025 09:22:27 -0800 X-CSE-ConnectionGUID: QUF2IOwMSvCVSTQDS+axfg== X-CSE-MsgGUID: FUrSnMidQViIkzgRtrvKmw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,239,1732608000"; d="scan'208";a="108610274" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.74]) by fmviesa008.fm.intel.com with SMTP; 27 Jan 2025 09:22:25 -0800 Received: by stinkbox (sSMTP sendmail emulation); Mon, 27 Jan 2025 19:22:24 +0200 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Subject: [PATCH 10/11] drm/i915: Relocate intel_atomic_check_planes() Date: Mon, 27 Jan 2025 19:21:55 +0200 Message-ID: <20250127172156.21928-11-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.45.3 In-Reply-To: <20250127172156.21928-1-ville.syrjala@linux.intel.com> References: <20250127172156.21928-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä Move all the intel_atomic_check_planes() machinery into intel_atomic_plane.c in order to declutter intel_display.c. Signed-off-by: Ville Syrjälä --- .../gpu/drm/i915/display/intel_atomic_plane.c | 293 ++++++++++++++++++ .../gpu/drm/i915/display/intel_atomic_plane.h | 3 + drivers/gpu/drm/i915/display/intel_display.c | 292 ----------------- drivers/gpu/drm/i915/display/intel_display.h | 2 - 4 files changed, 296 insertions(+), 294 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c index 650801cb400c..1fb35f4a7cf4 100644 --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c @@ -52,6 +52,7 @@ #include "intel_fb.h" #include "intel_fb_pin.h" #include "skl_scaler.h" +#include "skl_universal_plane.h" #include "skl_watermark.h" static void intel_plane_state_reset(struct intel_plane_state *plane_state, @@ -1215,3 +1216,295 @@ void intel_plane_init_cursor_vblank_work(struct intel_plane_state *old_plane_sta drm_vblank_work_init(&old_plane_state->unpin_work, old_plane_state->uapi.crtc, intel_cursor_unpin_work); } + +static void link_nv12_planes(struct intel_crtc_state *crtc_state, + struct intel_plane_state *uv_plane_state, + struct intel_plane_state *y_plane_state) +{ + struct intel_plane *uv_plane = to_intel_plane(uv_plane_state->uapi.plane); + struct intel_plane *y_plane = to_intel_plane(y_plane_state->uapi.plane); + struct drm_i915_private *dev_priv = to_i915(uv_plane->base.dev); + + uv_plane_state->planar_linked_plane = y_plane; + + y_plane_state->is_y_plane = true; + y_plane_state->planar_linked_plane = uv_plane; + + crtc_state->enabled_planes |= BIT(y_plane->id); + crtc_state->active_planes |= BIT(y_plane->id); + crtc_state->update_planes |= BIT(y_plane->id); + crtc_state->data_rate[y_plane->id] = crtc_state->data_rate_y[uv_plane->id]; + crtc_state->rel_data_rate[y_plane->id] = crtc_state->rel_data_rate_y[uv_plane->id]; + + drm_dbg_kms(&dev_priv->drm, "Using %s as Y plane for %s\n", + y_plane->base.name, uv_plane->base.name); + + /* Copy parameters to Y plane */ + intel_plane_copy_hw_state(y_plane_state, uv_plane_state); + y_plane_state->uapi.src = uv_plane_state->uapi.src; + y_plane_state->uapi.dst = uv_plane_state->uapi.dst; + + y_plane_state->ctl = uv_plane_state->ctl; + y_plane_state->color_ctl = uv_plane_state->color_ctl; + y_plane_state->view = uv_plane_state->view; + y_plane_state->decrypt = uv_plane_state->decrypt; + + icl_link_nv12_planes(uv_plane_state, y_plane_state); +} + +static void unlink_nv12_plane(struct intel_crtc_state *crtc_state, + struct intel_plane_state *plane_state) +{ + struct intel_display *display = to_intel_display(plane_state); + struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); + + plane_state->planar_linked_plane = NULL; + + if (!plane_state->is_y_plane) + return; + + drm_WARN_ON(display->drm, plane_state->uapi.visible); + + plane_state->is_y_plane = false; + + crtc_state->enabled_planes &= ~BIT(plane->id); + crtc_state->active_planes &= ~BIT(plane->id); + crtc_state->update_planes |= BIT(plane->id); + crtc_state->data_rate[plane->id] = 0; + crtc_state->rel_data_rate[plane->id] = 0; +} + +static int icl_check_nv12_planes(struct intel_atomic_state *state, + struct intel_crtc *crtc) +{ + struct drm_i915_private *dev_priv = to_i915(state->base.dev); + struct intel_crtc_state *crtc_state = + intel_atomic_get_new_crtc_state(state, crtc); + struct intel_plane_state *plane_state; + struct intel_plane *plane; + int i; + + if (DISPLAY_VER(dev_priv) < 11) + return 0; + + /* + * Destroy all old plane links and make the slave plane invisible + * in the crtc_state->active_planes mask. + */ + for_each_new_intel_plane_in_state(state, plane, plane_state, i) { + if (plane->pipe != crtc->pipe) + continue; + + if (plane_state->planar_linked_plane) + unlink_nv12_plane(crtc_state, plane_state); + } + + if (!crtc_state->nv12_planes) + return 0; + + for_each_new_intel_plane_in_state(state, plane, plane_state, i) { + struct intel_plane_state *y_plane_state = NULL; + struct intel_plane *y_plane; + + if (plane->pipe != crtc->pipe) + continue; + + if ((crtc_state->nv12_planes & BIT(plane->id)) == 0) + continue; + + for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, y_plane) { + if (!icl_is_nv12_y_plane(dev_priv, y_plane->id)) + continue; + + if (crtc_state->active_planes & BIT(y_plane->id)) + continue; + + y_plane_state = intel_atomic_get_plane_state(state, y_plane); + if (IS_ERR(y_plane_state)) + return PTR_ERR(y_plane_state); + + break; + } + + if (!y_plane_state) { + drm_dbg_kms(&dev_priv->drm, + "Need %d free Y planes for planar YUV\n", + hweight8(crtc_state->nv12_planes)); + + return -EINVAL; + } + + link_nv12_planes(crtc_state, plane_state, y_plane_state); + } + + return 0; +} + +static int intel_crtc_add_planes_to_state(struct intel_atomic_state *state, + struct intel_crtc *crtc, + u8 plane_ids_mask) +{ + struct drm_i915_private *dev_priv = to_i915(state->base.dev); + struct intel_plane *plane; + + for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) { + struct intel_plane_state *plane_state; + + if ((plane_ids_mask & BIT(plane->id)) == 0) + continue; + + plane_state = intel_atomic_get_plane_state(state, plane); + if (IS_ERR(plane_state)) + return PTR_ERR(plane_state); + } + + return 0; +} + +int intel_atomic_add_affected_planes(struct intel_atomic_state *state, + struct intel_crtc *crtc) +{ + const struct intel_crtc_state *old_crtc_state = + intel_atomic_get_old_crtc_state(state, crtc); + const struct intel_crtc_state *new_crtc_state = + intel_atomic_get_new_crtc_state(state, crtc); + + return intel_crtc_add_planes_to_state(state, crtc, + old_crtc_state->enabled_planes | + new_crtc_state->enabled_planes); +} + +static bool active_planes_affects_min_cdclk(struct drm_i915_private *dev_priv) +{ + /* See {hsw,vlv,ivb}_plane_ratio() */ + return IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv) || + IS_CHERRYVIEW(dev_priv) || IS_VALLEYVIEW(dev_priv) || + IS_IVYBRIDGE(dev_priv); +} + +static u8 intel_joiner_affected_planes(struct intel_atomic_state *state, + u8 joined_pipes) +{ + const struct intel_plane_state *plane_state; + struct intel_plane *plane; + u8 affected_planes = 0; + int i; + + for_each_new_intel_plane_in_state(state, plane, plane_state, i) { + struct intel_plane *linked = plane_state->planar_linked_plane; + + if ((joined_pipes & BIT(plane->pipe)) == 0) + continue; + + affected_planes |= BIT(plane->id); + if (linked) + affected_planes |= BIT(linked->id); + } + + return affected_planes; +} + +static int intel_joiner_add_affected_planes(struct intel_atomic_state *state, + u8 joined_pipes) +{ + u8 prev_affected_planes, affected_planes = 0; + + /* + * We want all the joined pipes to have the same + * set of planes in the atomic state, to make sure + * state copying always works correctly, and the + * UV<->Y plane linkage is always up to date. + * Keep pulling planes in until we've determined + * the full set of affected plane. A bit complicated + * on account of each pipe being capable of selecting + * their own Y planes independently of the other pipes, + * and the selection being done from the set of + * inactive planes. + */ + do { + struct intel_crtc *crtc; + + for_each_intel_crtc_in_pipe_mask(state->base.dev, crtc, joined_pipes) { + int ret; + + ret = intel_crtc_add_planes_to_state(state, crtc, affected_planes); + if (ret) + return ret; + } + + prev_affected_planes = affected_planes; + affected_planes = intel_joiner_affected_planes(state, joined_pipes); + } while (affected_planes != prev_affected_planes); + + return 0; +} + +static int intel_add_affected_planes(struct intel_atomic_state *state) +{ + const struct intel_crtc_state *crtc_state; + struct intel_crtc *crtc; + int i; + + for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) { + int ret; + + ret = intel_joiner_add_affected_planes(state, intel_crtc_joined_pipe_mask(crtc_state)); + if (ret) + return ret; + } + + return 0; +} + +int intel_atomic_check_planes(struct intel_atomic_state *state) +{ + struct drm_i915_private *dev_priv = to_i915(state->base.dev); + struct intel_crtc_state *old_crtc_state, *new_crtc_state; + struct intel_plane_state __maybe_unused *plane_state; + struct intel_plane *plane; + struct intel_crtc *crtc; + int i, ret; + + ret = intel_add_affected_planes(state); + if (ret) + return ret; + + for_each_new_intel_plane_in_state(state, plane, plane_state, i) { + ret = intel_plane_atomic_check(state, plane); + if (ret) { + drm_dbg_atomic(&dev_priv->drm, + "[PLANE:%d:%s] atomic driver check failed\n", + plane->base.base.id, plane->base.name); + return ret; + } + } + + for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, + new_crtc_state, i) { + u8 old_active_planes, new_active_planes; + + ret = icl_check_nv12_planes(state, crtc); + if (ret) + return ret; + + /* + * On some platforms the number of active planes affects + * the planes' minimum cdclk calculation. Add such planes + * to the state before we compute the minimum cdclk. + */ + if (!active_planes_affects_min_cdclk(dev_priv)) + continue; + + old_active_planes = old_crtc_state->active_planes & ~BIT(PLANE_CURSOR); + new_active_planes = new_crtc_state->active_planes & ~BIT(PLANE_CURSOR); + + if (hweight8(old_active_planes) == hweight8(new_active_planes)) + continue; + + ret = intel_crtc_add_planes_to_state(state, crtc, new_active_planes); + if (ret) + return ret; + } + + return 0; +} diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.h b/drivers/gpu/drm/i915/display/intel_atomic_plane.h index fb87b3353ab0..9dc0b8468c2e 100644 --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.h +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.h @@ -81,5 +81,8 @@ void intel_plane_helper_add(struct intel_plane *plane); bool intel_plane_needs_physical(struct intel_plane *plane); void intel_plane_init_cursor_vblank_work(struct intel_plane_state *old_plane_state, struct intel_plane_state *new_plane_state); +int intel_atomic_add_affected_planes(struct intel_atomic_state *state, + struct intel_crtc *crtc); +int intel_atomic_check_planes(struct intel_atomic_state *state); #endif /* __INTEL_ATOMIC_PLANE_H__ */ diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 36611b290dff..04341e512780 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -4401,129 +4401,6 @@ static bool check_single_encoder_cloning(struct intel_atomic_state *state, return true; } -static void link_nv12_planes(struct intel_crtc_state *crtc_state, - struct intel_plane_state *uv_plane_state, - struct intel_plane_state *y_plane_state) -{ - struct intel_plane *uv_plane = to_intel_plane(uv_plane_state->uapi.plane); - struct intel_plane *y_plane = to_intel_plane(y_plane_state->uapi.plane); - struct drm_i915_private *dev_priv = to_i915(uv_plane->base.dev); - - uv_plane_state->planar_linked_plane = y_plane; - - y_plane_state->is_y_plane = true; - y_plane_state->planar_linked_plane = uv_plane; - - crtc_state->enabled_planes |= BIT(y_plane->id); - crtc_state->active_planes |= BIT(y_plane->id); - crtc_state->update_planes |= BIT(y_plane->id); - crtc_state->data_rate[y_plane->id] = crtc_state->data_rate_y[uv_plane->id]; - crtc_state->rel_data_rate[y_plane->id] = crtc_state->rel_data_rate_y[uv_plane->id]; - - drm_dbg_kms(&dev_priv->drm, "Using %s as Y plane for %s\n", - y_plane->base.name, uv_plane->base.name); - - /* Copy parameters to Y plane */ - intel_plane_copy_hw_state(y_plane_state, uv_plane_state); - y_plane_state->uapi.src = uv_plane_state->uapi.src; - y_plane_state->uapi.dst = uv_plane_state->uapi.dst; - - y_plane_state->ctl = uv_plane_state->ctl; - y_plane_state->color_ctl = uv_plane_state->color_ctl; - y_plane_state->view = uv_plane_state->view; - y_plane_state->decrypt = uv_plane_state->decrypt; - - icl_link_nv12_planes(uv_plane_state, y_plane_state); -} - -static void unlink_nv12_plane(struct intel_crtc_state *crtc_state, - struct intel_plane_state *plane_state) -{ - struct intel_display *display = to_intel_display(plane_state); - struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); - - plane_state->planar_linked_plane = NULL; - - if (!plane_state->is_y_plane) - return; - - drm_WARN_ON(display->drm, plane_state->uapi.visible); - - plane_state->is_y_plane = false; - - crtc_state->enabled_planes &= ~BIT(plane->id); - crtc_state->active_planes &= ~BIT(plane->id); - crtc_state->update_planes |= BIT(plane->id); - crtc_state->data_rate[plane->id] = 0; - crtc_state->rel_data_rate[plane->id] = 0; -} - -static int icl_check_nv12_planes(struct intel_atomic_state *state, - struct intel_crtc *crtc) -{ - struct drm_i915_private *dev_priv = to_i915(state->base.dev); - struct intel_crtc_state *crtc_state = - intel_atomic_get_new_crtc_state(state, crtc); - struct intel_plane_state *plane_state; - struct intel_plane *plane; - int i; - - if (DISPLAY_VER(dev_priv) < 11) - return 0; - - /* - * Destroy all old plane links and make the slave plane invisible - * in the crtc_state->active_planes mask. - */ - for_each_new_intel_plane_in_state(state, plane, plane_state, i) { - if (plane->pipe != crtc->pipe) - continue; - - if (plane_state->planar_linked_plane) - unlink_nv12_plane(crtc_state, plane_state); - } - - if (!crtc_state->nv12_planes) - return 0; - - for_each_new_intel_plane_in_state(state, plane, plane_state, i) { - struct intel_plane_state *y_plane_state = NULL; - struct intel_plane *y_plane; - - if (plane->pipe != crtc->pipe) - continue; - - if ((crtc_state->nv12_planes & BIT(plane->id)) == 0) - continue; - - for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, y_plane) { - if (!icl_is_nv12_y_plane(dev_priv, y_plane->id)) - continue; - - if (crtc_state->active_planes & BIT(y_plane->id)) - continue; - - y_plane_state = intel_atomic_get_plane_state(state, y_plane); - if (IS_ERR(y_plane_state)) - return PTR_ERR(y_plane_state); - - break; - } - - if (!y_plane_state) { - drm_dbg_kms(&dev_priv->drm, - "Need %d free Y planes for planar YUV\n", - hweight8(crtc_state->nv12_planes)); - - return -EINVAL; - } - - link_nv12_planes(crtc_state, plane_state, y_plane_state); - } - - return 0; -} - static u16 hsw_linetime_wm(const struct intel_crtc_state *crtc_state) { const struct drm_display_mode *pipe_mode = @@ -6121,175 +5998,6 @@ static void intel_crtc_check_fastset(const struct intel_crtc_state *old_crtc_sta new_crtc_state->update_pipe = true; } -static int intel_crtc_add_planes_to_state(struct intel_atomic_state *state, - struct intel_crtc *crtc, - u8 plane_ids_mask) -{ - struct drm_i915_private *dev_priv = to_i915(state->base.dev); - struct intel_plane *plane; - - for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) { - struct intel_plane_state *plane_state; - - if ((plane_ids_mask & BIT(plane->id)) == 0) - continue; - - plane_state = intel_atomic_get_plane_state(state, plane); - if (IS_ERR(plane_state)) - return PTR_ERR(plane_state); - } - - return 0; -} - -int intel_atomic_add_affected_planes(struct intel_atomic_state *state, - struct intel_crtc *crtc) -{ - const struct intel_crtc_state *old_crtc_state = - intel_atomic_get_old_crtc_state(state, crtc); - const struct intel_crtc_state *new_crtc_state = - intel_atomic_get_new_crtc_state(state, crtc); - - return intel_crtc_add_planes_to_state(state, crtc, - old_crtc_state->enabled_planes | - new_crtc_state->enabled_planes); -} - -static bool active_planes_affects_min_cdclk(struct drm_i915_private *dev_priv) -{ - /* See {hsw,vlv,ivb}_plane_ratio() */ - return IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv) || - IS_CHERRYVIEW(dev_priv) || IS_VALLEYVIEW(dev_priv) || - IS_IVYBRIDGE(dev_priv); -} - -static u8 intel_joiner_affected_planes(struct intel_atomic_state *state, - u8 joined_pipes) -{ - const struct intel_plane_state *plane_state; - struct intel_plane *plane; - u8 affected_planes = 0; - int i; - - for_each_new_intel_plane_in_state(state, plane, plane_state, i) { - struct intel_plane *linked = plane_state->planar_linked_plane; - - if ((joined_pipes & BIT(plane->pipe)) == 0) - continue; - - affected_planes |= BIT(plane->id); - if (linked) - affected_planes |= BIT(linked->id); - } - - return affected_planes; -} - -static int intel_joiner_add_affected_planes(struct intel_atomic_state *state, - u8 joined_pipes) -{ - u8 prev_affected_planes, affected_planes = 0; - - /* - * We want all the joined pipes to have the same - * set of planes in the atomic state, to make sure - * state copying always works correctly, and the - * UV<->Y plane linkage is always up to date. - * Keep pulling planes in until we've determined - * the full set of affected plane. A bit complicated - * on account of each pipe being capable of selecting - * their own Y planes independently of the other pipes, - * and the selection being done from the set of - * inactive planes. - */ - do { - struct intel_crtc *crtc; - - for_each_intel_crtc_in_pipe_mask(state->base.dev, crtc, joined_pipes) { - int ret; - - ret = intel_crtc_add_planes_to_state(state, crtc, affected_planes); - if (ret) - return ret; - } - - prev_affected_planes = affected_planes; - affected_planes = intel_joiner_affected_planes(state, joined_pipes); - } while (affected_planes != prev_affected_planes); - - return 0; -} - -static int intel_add_affected_planes(struct intel_atomic_state *state) -{ - const struct intel_crtc_state *crtc_state; - struct intel_crtc *crtc; - int i; - - for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) { - int ret; - - ret = intel_joiner_add_affected_planes(state, intel_crtc_joined_pipe_mask(crtc_state)); - if (ret) - return ret; - } - - return 0; -} - -static int intel_atomic_check_planes(struct intel_atomic_state *state) -{ - struct drm_i915_private *dev_priv = to_i915(state->base.dev); - struct intel_crtc_state *old_crtc_state, *new_crtc_state; - struct intel_plane_state __maybe_unused *plane_state; - struct intel_plane *plane; - struct intel_crtc *crtc; - int i, ret; - - ret = intel_add_affected_planes(state); - if (ret) - return ret; - - for_each_new_intel_plane_in_state(state, plane, plane_state, i) { - ret = intel_plane_atomic_check(state, plane); - if (ret) { - drm_dbg_atomic(&dev_priv->drm, - "[PLANE:%d:%s] atomic driver check failed\n", - plane->base.base.id, plane->base.name); - return ret; - } - } - - for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, - new_crtc_state, i) { - u8 old_active_planes, new_active_planes; - - ret = icl_check_nv12_planes(state, crtc); - if (ret) - return ret; - - /* - * On some platforms the number of active planes affects - * the planes' minimum cdclk calculation. Add such planes - * to the state before we compute the minimum cdclk. - */ - if (!active_planes_affects_min_cdclk(dev_priv)) - continue; - - old_active_planes = old_crtc_state->active_planes & ~BIT(PLANE_CURSOR); - new_active_planes = new_crtc_state->active_planes & ~BIT(PLANE_CURSOR); - - if (hweight8(old_active_planes) == hweight8(new_active_planes)) - continue; - - ret = intel_crtc_add_planes_to_state(state, crtc, new_active_planes); - if (ret) - return ret; - } - - return 0; -} - static int intel_atomic_check_crtcs(struct intel_atomic_state *state) { struct intel_crtc_state __maybe_unused *crtc_state; diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h index 49a246feb1ae..f3b29c0abb22 100644 --- a/drivers/gpu/drm/i915/display/intel_display.h +++ b/drivers/gpu/drm/i915/display/intel_display.h @@ -413,8 +413,6 @@ enum phy_fia { i) int intel_atomic_check(struct drm_device *dev, struct drm_atomic_state *state); -int intel_atomic_add_affected_planes(struct intel_atomic_state *state, - struct intel_crtc *crtc); u8 intel_calc_active_pipes(struct intel_atomic_state *state, u8 active_pipes); void intel_link_compute_m_n(u16 bpp, int nlanes, From patchwork Mon Jan 27 17:21:56 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Ville Syrjala X-Patchwork-Id: 13951648 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A2B50C02191 for ; Mon, 27 Jan 2025 17:22:32 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 47C1910E597; Mon, 27 Jan 2025 17:22:32 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="UdPFYJPr"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.17]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4A0D110E595 for ; Mon, 27 Jan 2025 17:22:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1737998550; x=1769534550; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=bxLjU7BslkIAkIEDcxOzZkJQR9srwJIWqTN7FAQ2UQg=; b=UdPFYJPrhYP231WT0o/KO4MxSkbulyRHQnWNC0rVlxnLKgppc+jvxeHr 73Ic1YGDV1FDW+FBvHYkanwrNMAMVSvLAvjNBy7dYISwSQKiLaT80+4i1 +0G0S6e0xtTl8GLJq27byvR19oop+wKUUWYNki7sMOGSdY44v7vjkoQtq Sg2uAsq5P7z2FrGke5Q+EWiBTn8cCt+2iN0DSlahYKwrzWF8F8zZGJrQb RC9kIsG0gf0/JQgeclwK/B0U9HKeSEVeuVVnABgMxiMMMsGr2zG4J6f2S UaBis2ik8rhejedMCWF6nqd98kCZs2KkmuxQ71qCSbumkxDbr162ZaaM3 g==; X-CSE-ConnectionGUID: 6KK597pxQfq/X5Gyqp6fnA== X-CSE-MsgGUID: XSfM91M0Qt2Br77h57B8+A== X-IronPort-AV: E=McAfee;i="6700,10204,11328"; a="38501409" X-IronPort-AV: E=Sophos;i="6.13,239,1732608000"; d="scan'208";a="38501409" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Jan 2025 09:22:30 -0800 X-CSE-ConnectionGUID: mjM32oRtTnupCvZfgZmiPQ== X-CSE-MsgGUID: cXYQnw42TXG0hKvYGalnIw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,239,1732608000"; d="scan'208";a="108610279" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.74]) by fmviesa008.fm.intel.com with SMTP; 27 Jan 2025 09:22:28 -0800 Received: by stinkbox (sSMTP sendmail emulation); Mon, 27 Jan 2025 19:22:27 +0200 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Subject: [PATCH 11/11] drm/i915: Pimp the Y plane selection debugs Date: Mon, 27 Jan 2025 19:21:56 +0200 Message-ID: <20250127172156.21928-12-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.45.3 In-Reply-To: <20250127172156.21928-1-ville.syrjala@linux.intel.com> References: <20250127172156.21928-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä Use the standard [PLANE:%d:%s] stuff for the Y plane debugs, and more clearly spell out which plane is UV plane and which is Y plane when linking them. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_atomic_plane.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c index 1fb35f4a7cf4..9c2e8aaba8cd 100644 --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c @@ -1236,8 +1236,9 @@ static void link_nv12_planes(struct intel_crtc_state *crtc_state, crtc_state->data_rate[y_plane->id] = crtc_state->data_rate_y[uv_plane->id]; crtc_state->rel_data_rate[y_plane->id] = crtc_state->rel_data_rate_y[uv_plane->id]; - drm_dbg_kms(&dev_priv->drm, "Using %s as Y plane for %s\n", - y_plane->base.name, uv_plane->base.name); + drm_dbg_kms(&dev_priv->drm, "UV plane [PLANE:%d:%s] using Y plane [PLANE:%d:%s]\n", + uv_plane->base.base.id, uv_plane->base.name, + y_plane->base.base.id, y_plane->base.name); /* Copy parameters to Y plane */ intel_plane_copy_hw_state(y_plane_state, uv_plane_state); @@ -1328,7 +1329,8 @@ static int icl_check_nv12_planes(struct intel_atomic_state *state, if (!y_plane_state) { drm_dbg_kms(&dev_priv->drm, - "Need %d free Y planes for planar YUV\n", + "[CRTC:%d:%s] need %d free Y planes for planar YUV\n", + crtc->base.base.id, crtc->base.name, hweight8(crtc_state->nv12_planes)); return -EINVAL;