From patchwork Mon Jan 27 22:12:36 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Belgaumkar, Vinay" X-Patchwork-Id: 13951772 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 045CDC02188 for ; Mon, 27 Jan 2025 22:16:13 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9195A10E5CD; Mon, 27 Jan 2025 22:16:12 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="aFavKljN"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.13]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9138C10E5CD; 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27 Jan 2025 14:16:12 -0800 X-CSE-ConnectionGUID: wMZP1ZZoTDuHtUnDpAvM3w== X-CSE-MsgGUID: TLhDwh3ORZG63VlKpMP8Rg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="145773746" Received: from vbelgaum-ubuntu.fm.intel.com ([10.1.39.141]) by orviesa001.jf.intel.com with ESMTP; 27 Jan 2025 14:16:11 -0800 From: Vinay Belgaumkar To: intel-gfx@lists.freedesktop.org, igt-dev@lists.freedesktop.org Cc: Vinay Belgaumkar , Riana Tauro , Lucas De Marchi , Kamil Konieczny , Rodrigo Vivi Subject: [PATCH i-g-t v5 1/2] lib/igt_perf: Add utils to extract PMU event info Date: Mon, 27 Jan 2025 14:12:36 -0800 Message-Id: <20250127221237.2811011-2-vinay.belgaumkar@intel.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20250127221237.2811011-1-vinay.belgaumkar@intel.com> References: <20250127221237.2811011-1-vinay.belgaumkar@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Functions to parse event ID and GT bit shift for PMU events. v2: Review comments (Riana) Cc: Riana Tauro Cc: Lucas De Marchi Cc: Kamil Konieczny Cc: Rodrigo Vivi Signed-off-by: Vinay Belgaumkar --- lib/igt_perf.c | 70 ++++++++++++++++++++++++++++++++++++++++++++++++++ lib/igt_perf.h | 2 ++ 2 files changed, 72 insertions(+) diff --git a/lib/igt_perf.c b/lib/igt_perf.c index 3866c6d77..7e81d5516 100644 --- a/lib/igt_perf.c +++ b/lib/igt_perf.c @@ -92,6 +92,76 @@ const char *xe_perf_device(int xe, char *buf, int buflen) return buf; } +/** + * perf_event_format: Returns the start/end positions of an event format param + * @device: Device string in driver:pci format + * @param: Parameter for which you need the format start/end bits + * Returns: Start/end bit positions for a event parameter format + */ +int perf_event_format(const char *device, const char *param, uint32_t *start, uint32_t *end) +{ + char buf[NAME_MAX]; + ssize_t bytes; + int ret; + int fd; + + snprintf(buf, sizeof(buf), + "/sys/bus/event_source/devices/%s/format/%s", + device, param); + + fd = open(buf, O_RDONLY); + if (fd < 0) + return -EINVAL; + + bytes = read(fd, buf, sizeof(buf) - 1); + close(fd); + if (bytes < 1) + return -EINVAL; + + buf[bytes] = '\0'; + ret = sscanf(buf, "config:%u-%u", start, end); + if (ret != 2) + return -EINVAL; + + return ret; +} + +/** + * perf_event_config: + * @device: Device string in driver:pci format + * @event: The event name + * @config: Pointer to the config + * Returns: 0 for success, negative value on error + */ +int perf_event_config(const char *device, const char *event, uint64_t *config) +{ + char buf[NAME_MAX]; + ssize_t bytes; + int ret; + int fd; + + snprintf(buf, sizeof(buf), + "/sys/bus/event_source/devices/%s/events/%s", + device, + event); + + fd = open(buf, O_RDONLY); + if (fd < 0) + return -EINVAL; + + bytes = read(fd, buf, sizeof(buf) - 1); + close(fd); + if (bytes < 1) + return ret; + + buf[bytes] = '\0'; + ret = sscanf(buf, "event=0x%lx", config); + if (ret != 1) + return -EINVAL; + + return 0; +} + uint64_t xe_perf_type_id(int xe) { char buf[80]; diff --git a/lib/igt_perf.h b/lib/igt_perf.h index 3d9ba2917..69f7a3d74 100644 --- a/lib/igt_perf.h +++ b/lib/igt_perf.h @@ -71,5 +71,7 @@ int perf_i915_open(int i915, uint64_t config); int perf_i915_open_group(int i915, uint64_t config, int group); int perf_xe_open(int xe, uint64_t config); +int perf_event_config(const char *device, const char *event, uint64_t *config); +int perf_event_format(const char *device, const char *param, uint32_t *start, uint32_t *end); #endif /* I915_PERF_H */ From patchwork Mon Jan 27 22:12:37 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Belgaumkar, Vinay" X-Patchwork-Id: 13951773 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CFFF7C0218C for ; Mon, 27 Jan 2025 22:16:15 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 77F0110E5CE; Mon, 27 Jan 2025 22:16:15 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="JWpDMQ5y"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.13]) by gabe.freedesktop.org (Postfix) with ESMTPS id 82D9510E5CC; Mon, 27 Jan 2025 22:16:12 +0000 (UTC) DKIM-Signature: v=1; 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d="scan'208";a="145773753" Received: from vbelgaum-ubuntu.fm.intel.com ([10.1.39.141]) by orviesa001.jf.intel.com with ESMTP; 27 Jan 2025 14:16:12 -0800 From: Vinay Belgaumkar To: intel-gfx@lists.freedesktop.org, igt-dev@lists.freedesktop.org Cc: Vinay Belgaumkar , Lucas De Marchi , Riana Tauro , Rodrigo Vivi Subject: [PATCH i-g-t v5 2/2] tests/xe/pmu: Add pmu tests Date: Mon, 27 Jan 2025 14:12:37 -0800 Message-Id: <20250127221237.2811011-3-vinay.belgaumkar@intel.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20250127221237.2811011-1-vinay.belgaumkar@intel.com> References: <20250127221237.2811011-1-vinay.belgaumkar@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Simple tests for validating the PMU implementation for GT C6 residencies. v2: Rename rc6-residency-* to gt-c6-residency and remove freq tests. v3: Keep just gt-c6 tests, add frequency tests later. Cc: Lucas De Marchi Cc: Riana Tauro Cc: Rodrigo Vivi Signed-off-by: Vinay Belgaumkar --- tests/intel/xe_pmu.c | 192 +++++++++++++++++++++++++++++++++++++++++++ tests/meson.build | 1 + 2 files changed, 193 insertions(+) create mode 100644 tests/intel/xe_pmu.c diff --git a/tests/intel/xe_pmu.c b/tests/intel/xe_pmu.c new file mode 100644 index 000000000..9a7c9a558 --- /dev/null +++ b/tests/intel/xe_pmu.c @@ -0,0 +1,192 @@ +// SPDX-License-Identifier: MIT +/* + * Copyright © 2025 Intel Corporation + */ + +/** + * TEST: Test Xe PMU functionality + * Category: Perf Monitoring Unit + * Mega feature: Perf Monitoring Unit + * Sub-category: Power Management + * Functionality: Power/Perf + * Test category: Functional tests + */ + +#include +#include +#include +#include +#include +#include +#include + +#include "igt.h" +#include "igt_device.h" +#include "igt_power.h" +#include "igt_sysfs.h" +#include "igt_perf.h" + +#include "lib/igt_syncobj.h" +#include "xe/xe_ioctl.h" +#include "xe/xe_gt.h" +#include "xe/xe_query.h" +#include "xe/xe_spin.h" +#include "xe/xe_util.h" + +#define SLEEP_DURATION 2 /* in seconds */ +const double tolerance = 0.1; +const unsigned long batch_duration_ns = 500e6; +const char *no_debug_data = "\0"; + +#define __assert_within_epsilon(x, ref, tol_up, tol_down, debug_data) \ + igt_assert_f((double)(x) <= (1.0 + (tol_up)) * (double)(ref) && \ + (double)(x) >= (1.0 - (tol_down)) * (double)(ref), \ + "'%s' != '%s' (%f not within +%.1f%%/-%.1f%% tolerance of %f)\n%s\n",\ + #x, #ref, (double)(x), \ + (tol_up) * 100.0, (tol_down) * 100.0, \ + (double)(ref), debug_data) + +#define assert_within_epsilon(x, ref, tolerance) \ + __assert_within_epsilon(x, ref, tolerance, tolerance, no_debug_data) + +#define assert_within_epsilon_debug(x, ref, tolerance, debug_data) \ + __assert_within_epsilon(x, ref, tolerance, tolerance, debug_data) + +struct workload { + struct drm_xe_sync sync[2]; + struct drm_xe_exec exec; + uint64_t addr; + struct xe_spin_opts spin_opts; + struct xe_spin *spin; + uint32_t exec_queue; + uint32_t syncobj; + size_t bo_size; + uint32_t bo; + uint32_t vm; +}; + +static int open_pmu(int xe, uint64_t config) +{ + int fd; + + fd = perf_xe_open(xe, config); + igt_skip_on(fd < 0 && errno == ENODEV); + igt_assert(fd >= 0); + + return fd; +} + +static uint64_t __pmu_read_single(int fd, uint64_t *ts) +{ + uint64_t data[2]; + + igt_assert_eq(read(fd, data, sizeof(data)), sizeof(data)); + if (ts) + *ts = data[1]; + + return data[0]; +} + +/** + * SUBTEST: c6 + * Description: Basic residency test to validate idle residency + * measured over a time interval is within the tolerance + */ +static unsigned int measured_usleep(unsigned int usec) +{ + struct timespec ts = { }; + unsigned int slept; + + slept = igt_nsec_elapsed(&ts); + igt_assert(slept == 0); + do { + usleep(usec - slept); + slept = igt_nsec_elapsed(&ts) / 1000; + } while (slept < usec); + + return igt_nsec_elapsed(&ts) / 1000; +} + +static unsigned long read_idle_residency(int fd, int gt) +{ + unsigned long residency = 0; + int gt_fd; + + gt_fd = xe_sysfs_gt_open(fd, gt); + igt_assert(gt_fd >= 0); + igt_assert(igt_sysfs_scanf(gt_fd, "gtidle/idle_residency_ms", "%lu", &residency) == 1); + close(gt_fd); + + return residency; +} + +static u64 get_event_config(int xe, unsigned int gt, char *event) +{ + int ret; + char xe_device[100]; + u64 pmu_config; + u32 start, end; + + xe_perf_device(xe, xe_device, sizeof(xe_device)); + ret = perf_event_config(xe_device, event, &pmu_config); + igt_assert(ret >= 0); + ret = perf_event_format(xe_device, "gt", &start, &end); + igt_assert(ret >= 0); + pmu_config |= (u64) gt << start; + + return pmu_config; +} + +static void test_c6(int xe, unsigned int gt) +{ + int pmu_fd; + u64 pmu_config; + char event[100]; + uint64_t ts[2]; + unsigned long slept, start, end; + uint64_t val; + + /* Get the PMU config for the c6 event */ + sprintf(event, "gt-c6-residency"); + pmu_config = get_event_config(xe, gt, event); + + pmu_fd = open_pmu(xe, pmu_config); + + igt_require_f(igt_wait(xe_gt_is_in_c6(xe, gt), 1000, 10), "GT %d should be in C6\n", gt); + + /* While idle check full RC6. */ + start = read_idle_residency(xe, gt); + val = __pmu_read_single(pmu_fd, &ts[0]); + slept = measured_usleep(SLEEP_DURATION * USEC_PER_SEC) / 1000; + end = read_idle_residency(xe, gt); + val = __pmu_read_single(pmu_fd, &ts[1]) - val; + + igt_debug("gt%u: slept=%lu, perf=%"PRIu64"\n", + gt, slept, val); + + igt_debug("Start res: %lu, end_res: %lu", start, end); + + assert_within_epsilon(val, + (ts[1] - ts[0])/1000000, + tolerance); + close(pmu_fd); +} + +igt_main +{ + int fd, gt; + + igt_fixture { + fd = drm_open_driver(DRIVER_XE); + igt_require(!IS_PONTEVECCHIO(xe_dev_id(fd))); + } + + igt_describe("Validate PMU C6 residency counters"); + igt_subtest("c6") + xe_for_each_gt(fd, gt) + test_c6(fd, gt); + + igt_fixture { + close(fd); + } +} diff --git a/tests/meson.build b/tests/meson.build index 33dffad31..d20f50766 100644 --- a/tests/meson.build +++ b/tests/meson.build @@ -309,6 +309,7 @@ intel_xe_progs = [ 'xe_pat', 'xe_peer2peer', 'xe_pm', + 'xe_pmu', 'xe_pm_residency', 'xe_prime_self_import', 'xe_query',