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pr=C From: Michal Orzel To: CC: Michal Orzel , Stefano Stabellini , Julien Grall , Bertrand Marquis , Subject: [for-4.20][PATCH v2 1/2] device-tree: bootfdt: Fix build issue when CONFIG_PHYS_ADDR_T_32=y Date: Tue, 28 Jan 2025 10:40:01 +0100 Message-ID: <20250128094002.145755-2-michal.orzel@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250128094002.145755-1-michal.orzel@amd.com> References: <20250128094002.145755-1-michal.orzel@amd.com> MIME-Version: 1.0 Received-SPF: None (SATLEXMB04.amd.com: michal.orzel@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF0002636A:EE_|SA1PR12MB5639:EE_ X-MS-Office365-Filtering-Correlation-Id: 2a5daca5-b10e-4680-3af9-08dd3f7fc061 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|36860700013|376014|82310400026; X-Microsoft-Antispam-Message-Info: jLuw5yeT+DLcd05Gr29gO4hAlKcY7oqbLe29HZQIEz1qkp5PfJpz1TW2Gm+YGX2s3xV5jPvNtbpOfWSAwlcKuEeovBKVxNUptWXISbohhJkuNBYVnINOyIQbchSfvblS83hdj9vkjp2LCuZJB7fD4pys5nJgTPlSVi6QfP14KLiGmQPtqi9UtLHnHjdk1uHCMVqPZfXbzhxdBmO3Fyh9siRNuVOySUky4TIEMxAyw2YIPrzrughBsvd/mITaS8/rBIPbXAKhL5YJCBwogKngmYEaqpib2cLxkYkEUiV6+65PZUcUVPjckYMeN+e0k2knKDeHDhcg2UICudu0v6OuPNev47hWh+Zhdfrpp2GRdnzDOqo02YQRh2nHpvUL9hO0ZBBR19+Ov0fqCMTISPmRLnY96nxuDSLQNXAkO9KcxThqs3GxU6mMx3+CZI6WqDbwAZRItK1lJGvQb9beyW4OiNvJg2B5gZKVWCTRyoTRWqXWcN+XfJ3Dk4fPgwbAkjVbLLU0XzwBEnX+CzfBHTU2EiOCPk4Ca4Wv0hXkS/yxABSrTzaP7oexzuRyyJHjRrzt2UMG5phDNNyHjN7aLpKkHKmpmaCVsXoedR6wELkX8ikVU/UCwn20jm9dapQBbioPMLtSNTNT6WwxPTIe7Dev3umYavmd9Tx1uVNiFUsGaU0OtIU2o2/cTkUjC1Npj0NDplWbyh8gTy3QCY2TD+E1HlxMEtDXF00RWCZHdF6muh4GDJvG6t5BSb/Lp88vp4jn6EKHZlRX/YCJDxjp2wREXGmrtnGJtyKWxGd0GyMJg9xSaV2Q6FUFVnnwEuMX002GREG5zz7+cV/jSL7ZJyXSnPc2ErRryQkZU/kABaGP3Sy0QHMNy3soSgmNpKWgtCTBR/PlZnZYDLER0S5RQdD1P9lHpBC24ziQPfw0DsF/XsAUcaQYpSXTnDfnvqVyIRfnt7oMK10kkWRZzIKoWn0yos9I1/JeNWEdOnt0F3SutJEbhmlb5I3a0EtkufTD0ovkp2IOX+04ptvvVft0nvOLnzJ1+wsw1e9e3jK8KnXbrYw1hkioGCWUBlOPU5f+Un7n6O+QX7rSzMYgStvWOcettOJutdkTT46MTnyhluH0u3GUZYWS0Cc7IVr7CeZOedqju+DtBoFCGk1eQYJeSSTg4VxBQvLjuqE2IQDlOr0AUOzU5ELo0l7MMjzw4S/KaIfRNN1vdBt1bOS1IMdYbuyDVYd+TF39jKnlVaL5wYTqmiSo5VhtUMs8/UIN0qJbZZRveDW/k90Ae37WkjM1B67V9W3q8JDdCRz6Tf9INAXsgd0E1i414Xfj8F2O5sL40y2TWdqAkNZtaYbaemY0x3ixH7agLJjoCg1YtxoM0bR3RHa84GbyXA7IG8dVhIrFHJSJjQOaiMlj8qtZ53DBpYCMWMcUTEb6fbOwG8gdkJK913dzGjw8Ih1WAGK4CvJVmv2VuOgofrjJJ3+Nem8/Nv3LkQ/Eber8lYN4jKI4FyFzV5A= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(1800799024)(36860700013)(376014)(82310400026);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Jan 2025 09:40:07.6691 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2a5daca5-b10e-4680-3af9-08dd3f7fc061 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF0002636A.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB5639 On Arm32, when CONFIG_PHYS_ADDR_T_32 is set, a build failure is observed: common/device-tree/bootfdt.c: In function 'build_assertions': ./include/xen/macros.h:47:31: error: static assertion failed: "!(alignof(struct membanks) != 8)" 47 | #define BUILD_BUG_ON(cond) ({ _Static_assert(!(cond), "!(" #cond ")"); }) | ^~~~~~~~~~~~~~ common/device-tree/bootfdt.c:31:5: note: in expansion of macro 'BUILD_BUG_ON' 31 | BUILD_BUG_ON(alignof(struct membanks) != 8); When CONFIG_PHYS_ADDR_T_32 is set, paddr_t is defined as unsigned long, therefore the struct membanks alignment is 4B and not 8B. The check is there to ensure the struct membanks and struct membank, which is a member of the former, are equally aligned. Therefore modify the check to compare alignments obtained via alignof not to rely on hardcoded values. Fixes: 2209c1e35b47 ("xen/arm: Introduce a generic way to access memory bank structures") Signed-off-by: Michal Orzel Release-Acked-by: Oleksii Kurochko Tested-by: Luca Fancellu Reviewed-by: Julien Grall --- Changes in v2: - modify the check to test against alignment of struct membank --- xen/common/device-tree/bootfdt.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/common/device-tree/bootfdt.c b/xen/common/device-tree/bootfdt.c index 47386d4fffea..529c91e603ab 100644 --- a/xen/common/device-tree/bootfdt.c +++ b/xen/common/device-tree/bootfdt.c @@ -27,8 +27,8 @@ static void __init __maybe_unused build_assertions(void) */ BUILD_BUG_ON((offsetof(struct membanks, bank) != offsetof(struct meminfo, bank))); - /* Ensure "struct membanks" is 8-byte aligned */ - BUILD_BUG_ON(alignof(struct membanks) != 8); + /* Ensure "struct membanks" and "struct membank" are equally aligned */ + BUILD_BUG_ON(alignof(struct membanks) != alignof(struct membank)); } static bool __init device_tree_node_is_available(const void *fdt, int node) From patchwork Tue Jan 28 09:40:02 2025 Content-Type: text/plain; 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pr=C From: Michal Orzel To: CC: Michal Orzel , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk , , Luca Fancellu Subject: [for-4.20][PATCH v2 2/2] xen/arm: Fix build issue when CONFIG_PHYS_ADDR_T_32=y Date: Tue, 28 Jan 2025 10:40:02 +0100 Message-ID: <20250128094002.145755-3-michal.orzel@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250128094002.145755-1-michal.orzel@amd.com> References: <20250128094002.145755-1-michal.orzel@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF00002320:EE_|CY5PR12MB6106:EE_ X-MS-Office365-Filtering-Correlation-Id: d6df9984-2065-4f39-ceea-08dd3f7fc176 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|376014|36860700013|82310400026; X-Microsoft-Antispam-Message-Info: J4JC/3EXPRJp9LbF7KAZWarMl/+Er0MkoTDzfCC/hPZxpH7qlD1c1Uv0ln6oypcimIOAaEqMsQytF0ui6z+srwY568chCOVrlX50qAx7HcLh2mfD+OXiOcWeq9pZ4J9IXMXIpOSTi9uxLk6dilfe7F8+nb4bW1u4r3VQ2pZIl9F87SOOzGVqbqo6gFY1q31iXf7n29uomreHu3wr+BBsFYwH/BWLHlOnaa7qesh08LzUoz2bPhTuyi3ebXkV6sDd+/qAtDh2Rb2LyIePpSW58SrJN8rnuaKklumBf5NcvnzTGq6V2Lzs+lSSKODBHpljfh536EJDVAoyxk3rLFDu28MrqiYjAwQz4Ps6/c6jPGuoRkETGB+/y0+ttB538zjy8M8Ax2nezhkG/RRfj+RkXCzoC74PXq2FTl8noVJGHvIIatLPNk7x0j/7Ld55iLDhOyjOfJMduiFeW6Nglna93LfWd+NQTl3KGZtZq9fg3+/AS41vUgP1jpEUC1jQOEAPB7zQF1615TlB5rMt4VtUOuhwaQKkFQHRFjXkAh2H8ExrmU6VK1YY9ayFVonVTeIDjaArQwuF3uA4AgzPJj1IeGepRwuykkWrhwfsLEMD6VE4Ho6ShJccYKc21P2tOGxr6o+f72zchuvdACsDR+ytzgZ+ApT0W3peobd34EPU3a3Gljo800NAE3NqfRPPmpTYiyXrS8+u2AcjShQ7szYwjPmUE+6gvOZMW8obu/PMy6d2i+FHPG5OQZGvnVWQWLKtyLacvHSpwMSbZs/I2+l06SWzyeSnGMtQ6o35gTHI2sKpQV89bDk+75I9JSjhY/D2Sx6Zk8k1qHMjLCVMWywJPt6LOyvO5vnBBrvWt19bvhOL2NBAc6YbG4gJRZAQGSfwlmvj2zJAFWVE/IAwctE/boGY2INlbMw6fVWL6DegNSvAnsQkWI+dFWFdiImtccaB8YvHDhz09iuDHRuGiuD9B0GBaWtJ8aO1P9mYVpSX9GxTBYB5AIMmxCGH32qHr/XOk2fwIk+y2XelaMKAgpJ7DGemThMW71l1+91DYk58+GTj23Mbbrkkuo2NqiTKAtO/N8dU7Bii2pOQOTGLFMp9sF6e1dbll+PaF9T95J6ERP+9lj3yXBgk8ZiiQ6wRiCZU49OPBe8ngR0AvjfiH8SfmOneJvVJoun3xVoGhh6pWNElHUJKomltlqLumzU44OioyPYT3FJgJAg691ZGBNyydxFUbeMhRjifrDIjH5W/fFoHhaE2aiC2oUxtTwLjq8k30IbmRFftqds88F8/mXRMfKNlKmUuqshOfAnmoZtM2cZiCRJ9o8IVSB/xNjdBh+neu35bGPJY4L9hcIjb+lyakBsGJZQtTVFUyvYbUtdXCggJliNRqdawJOOBq+oYpJ2v3i3pP8FdOz+rksDUJXodbGWMHN+YZduh0MOMLnttyE39SvemWt9JKR6IgGSIOzRWeCDDEhRqjkx8/1oVJVIefuYY9244iQCxmFQIr3prjUs= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB03.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(1800799024)(376014)(36860700013)(82310400026);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Jan 2025 09:40:09.4726 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d6df9984-2065-4f39-ceea-08dd3f7fc176 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF00002320.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY5PR12MB6106 On Arm32, when CONFIG_PHYS_ADDR_T_32 is set, a build failure is observed: arch/arm/platforms/vexpress.c: In function 'vexpress_smp_init': arch/arm/platforms/vexpress.c:102:12: error: format '%lx' expects argument of type 'long unsigned int', but argument 2 has type 'long long unsigned int' [-Werror=format=] 102 | printk("Set SYS_FLAGS to %"PRIpaddr" (%p)\n", When CONFIG_PHYS_ADDR_T_32 is set, paddr_t is defined as unsigned long. Commit 96f35de69e59 dropped __virt_to_maddr() which used paddr_t as a return type. Without a cast, the expression type is unsigned long long which causes the issue. Fix it. Fixes: 96f35de69e59 ("x86+Arm: drop (rename) __virt_to_maddr() / __maddr_to_virt()") Signed-off-by: Michal Orzel Release-Acked-by: Oleksii Kurochko Reviewed-by: Luca Fancellu Tested-by: Luca Fancellu Reviewed-by: Stefano Stabellini --- Changes in v2: - none --- xen/arch/arm/include/asm/mm.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/arm/include/asm/mm.h b/xen/arch/arm/include/asm/mm.h index f91ff088f6b1..a0d8e5afe977 100644 --- a/xen/arch/arm/include/asm/mm.h +++ b/xen/arch/arm/include/asm/mm.h @@ -263,7 +263,7 @@ static inline void __iomem *ioremap_wc(paddr_t start, size_t len) #define virt_to_maddr(va) ({ \ vaddr_t va_ = (vaddr_t)(va); \ - (va_to_par(va_) & PADDR_MASK & PAGE_MASK) | (va_ & ~PAGE_MASK); \ + (paddr_t)((va_to_par(va_) & PADDR_MASK & PAGE_MASK) | (va_ & ~PAGE_MASK)); \ }) #ifdef CONFIG_ARM_32