From patchwork Tue Jan 28 13:04:13 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quentin Schulz X-Patchwork-Id: 13952535 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7A84CC0218D for ; Tue, 28 Jan 2025 13:07:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References :Message-Id:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date: From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=JzpCYHMBGWPG5CoyUq/UfW7/LHtFazkA2XZqLCyJ6Fs=; b=CDwPB1gueICpURBhpYngWl4V9e HzF35S9vV8THzaPItES8kNN5RiSPehT3TaQZWP5S7kQPQRarqTAAhh8qJKO/nCVjvjmyfo6YK7Y5N yaM5nJXJxwp/zlOqCbohknMqgUMa62Q5FbF1q10iS5NyI4p8CnFZ93lCzvE4YmdPOQWuIJhUW1Tt6 ddlnLc29rA3gUs7RNiIjvDhecMpDocXfkJQA9PB3THq2HKp15c8f/cpDEpTdsyta9Bl3GD1HByVMM TwEeTJSLxIcoacjDgQQgl56tE/h36VrnxlaUkmkTggPPKzPQnRevuyEXC8ZrW1kctgj1Y8pMSmInt AcXsM+eg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tclJK-00000004vQ9-1JH2; Tue, 28 Jan 2025 13:07:22 +0000 Received: from smtp-42a9.mail.infomaniak.ch ([84.16.66.169]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tclGf-00000004v3M-3yWI for linux-arm-kernel@lists.infradead.org; Tue, 28 Jan 2025 13:04:40 +0000 Received: from smtp-4-0001.mail.infomaniak.ch (smtp-4-0001.mail.infomaniak.ch [10.7.10.108]) by smtp-4-3000.mail.infomaniak.ch (Postfix) with ESMTPS id 4Yj58x45VtzYZg; Tue, 28 Jan 2025 14:04:33 +0100 (CET) Received: from unknown by smtp-4-0001.mail.infomaniak.ch (Postfix) with ESMTPA id 4Yj58w6chyzd4h; Tue, 28 Jan 2025 14:04:32 +0100 (CET) From: Quentin Schulz Date: Tue, 28 Jan 2025 14:04:13 +0100 Subject: [PATCH v3 1/4] arm64: dts: rockchip: add overlay test for Wolfvision PF5 MIME-Version: 1.0 Message-Id: <20250128-pre-ict-jaguar-v3-1-7be2f09d390a@cherry.de> References: <20250128-pre-ict-jaguar-v3-0-7be2f09d390a@cherry.de> In-Reply-To: <20250128-pre-ict-jaguar-v3-0-7be2f09d390a@cherry.de> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Jagan Teki , Niklas Cassel , Michael Riesch Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Quentin Schulz X-Mailer: b4 0.14.2 X-Infomaniak-Routing: alpha X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250128_050438_128634_2BFB06A2 X-CRM114-Status: GOOD ( 10.03 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Quentin Schulz The Wolfvision PF5 can have a PF5 Visualizer display and IO Expander board connected to it. Therefore, let's generate an overlay test so the application of the two overlays are validated against the base DTB. Suggested-by: Michael Riesch Signed-off-by: Quentin Schulz Reviewed-by: Michael Riesch --- arch/arm64/boot/dts/rockchip/Makefile | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile index def1222c1907eb16b23cff6d540174a4e897abc9..bba9b2f1c761040545bea561878e9b63f8c29488 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -128,8 +128,6 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-roc-pc.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3b.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-wolfvision-pf5.dtb -dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-wolfvision-pf5-display-vz.dtbo -dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-wolfvision-pf5-io-expander.dtbo dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-armsom-sige5.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3576-evb1-v10.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3582-radxa-e52c.dtb @@ -170,3 +168,18 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-orangepi-5.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-orangepi-5b.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-rock-5a.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-rock-5c.dtb + +# Overlays +## To build one or more overlays, overlay application tests must be added below. +## +## dtb-$(CONFIG_ARCH_ROCKCHIP) += .dtb +## -dtbs := .dtb .dtbo [.dtbo ...] +## +## This will generate each individual DTBO listed as a dependency of +## .dtb **AND** make .dtb keep its +## symbols (like when DTC_FLAGS has -@ passed). + +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-wolfvision-pf5-vz-2-uhd.dtb +rk3568-wolfvision-pf5-vz-2-uhd-dtbs := rk3568-wolfvision-pf5.dtb \ + rk3568-wolfvision-pf5-display-vz.dtbo \ + rk3568-wolfvision-pf5-io-expander.dtbo From patchwork Tue Jan 28 13:04:14 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quentin Schulz X-Patchwork-Id: 13952539 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 97406C0218A for ; Tue, 28 Jan 2025 13:10:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References :Message-Id:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date: From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=FGeNObgPtgq54kPtmrdkDCI2N8ZHYHSijDKpuZYgM3g=; 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Tue, 28 Jan 2025 14:04:33 +0100 (CET) From: Quentin Schulz Date: Tue, 28 Jan 2025 14:04:14 +0100 Subject: [PATCH v3 2/4] arm64: dts: rockchip: add overlay test for Edgeble NCM6A MIME-Version: 1.0 Message-Id: <20250128-pre-ict-jaguar-v3-2-7be2f09d390a@cherry.de> References: <20250128-pre-ict-jaguar-v3-0-7be2f09d390a@cherry.de> In-Reply-To: <20250128-pre-ict-jaguar-v3-0-7be2f09d390a@cherry.de> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Jagan Teki , Niklas Cassel , Michael Riesch Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Quentin Schulz , Krzysztof Kozlowski X-Mailer: b4 0.14.2 X-Infomaniak-Routing: alpha X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250128_050438_235070_A8E9C171 X-CRM114-Status: GOOD ( 12.03 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Quentin Schulz The Edgeble NCM6A can have WiFi modules connected and this is handled via an overlay (commit 951d6aaa37fe ("arm64: dts: rockchip: Add Edgeble NCM6A WiFi6 Overlay")). In order to make sure the overlay is still valid in the future, let's add a validation test by applying the overlay on top of the main base at build time. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Quentin Schulz --- arch/arm64/boot/dts/rockchip/Makefile | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile index bba9b2f1c761040545bea561878e9b63f8c29488..267966ea69b194887d59e38a4220239a90a91306 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -136,7 +136,6 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-armsom-w3.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-coolpi-cm5-evb.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-coolpi-cm5-genbook.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-edgeble-neu6a-io.dtb -dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-edgeble-neu6a-wifi.dtbo dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-edgeble-neu6b-io.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb1-v10.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-firefly-itx-3588j.dtb @@ -183,3 +182,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-wolfvision-pf5-vz-2-uhd.dtb rk3568-wolfvision-pf5-vz-2-uhd-dtbs := rk3568-wolfvision-pf5.dtb \ rk3568-wolfvision-pf5-display-vz.dtbo \ rk3568-wolfvision-pf5-io-expander.dtbo + +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-edgeble-neu6a-wifi.dtb +rk3588-edgeble-neu6a-wifi-dtbs := rk3588-edgeble-neu6a-io.dtb \ + rk3588-edgeble-neu6a-wifi.dtbo From patchwork Tue Jan 28 13:04:15 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Quentin Schulz X-Patchwork-Id: 13952540 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8E2D9C0218A for ; Tue, 28 Jan 2025 13:11:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References :Message-Id:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date: From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=2oSP95XUNF9YgGuhjbMbdX93etot5nS0L4Q5b8kdKpQ=; b=dyxh4Y2K91BJ/XTxbYXghPKovn ZIJYOTBmRAq0sfiOAg1+gBqWqDIZ4g7iKric/7hTA6EmKefSvYptiaHaY7KUkptLOwy9MDdugReTa h68rg085vy2l6w3uyI0wJ1fWDFAjASNq0uQXWoqyRh/QCXR7mY/p3kZTzhWDNFIwUCRtg+5aZPVbn q4kcvfHhfn4st9cp3PheIwoUlvdex6/5VcWAO0d/qtNKEeHyfmbyFNZ8kzNPoCalWHomRv6nuJAh2 noehunARLn5pi+sx1yGXWrIZG/NdtGJqJidFUFgHCUwhWeXIgXeVX/7klJ9fL5BjgroEkUmV1ZuSy IkVdsCSA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tclNF-00000004wCM-3cte; Tue, 28 Jan 2025 13:11:25 +0000 Received: from smtp-bc0f.mail.infomaniak.ch ([45.157.188.15]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tclGg-00000004v3R-2xzM for linux-arm-kernel@lists.infradead.org; Tue, 28 Jan 2025 13:04:42 +0000 Received: from smtp-4-0001.mail.infomaniak.ch (smtp-4-0001.mail.infomaniak.ch [10.7.10.108]) by smtp-4-3000.mail.infomaniak.ch (Postfix) with ESMTPS id 4Yj58y74jyzRZL; Tue, 28 Jan 2025 14:04:34 +0100 (CET) Received: from unknown by smtp-4-0001.mail.infomaniak.ch (Postfix) with ESMTPA id 4Yj58y1nxZzcLQ; Tue, 28 Jan 2025 14:04:34 +0100 (CET) From: Quentin Schulz Date: Tue, 28 Jan 2025 14:04:15 +0100 Subject: [PATCH v3 3/4] arm64: dts: rockchip: add overlay tests for Rock 5B PCIe overlays MIME-Version: 1.0 Message-Id: <20250128-pre-ict-jaguar-v3-3-7be2f09d390a@cherry.de> References: <20250128-pre-ict-jaguar-v3-0-7be2f09d390a@cherry.de> In-Reply-To: <20250128-pre-ict-jaguar-v3-0-7be2f09d390a@cherry.de> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Jagan Teki , Niklas Cassel , Michael Riesch Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Quentin Schulz , Krzysztof Kozlowski X-Mailer: b4 0.14.2 X-Infomaniak-Routing: alpha X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250128_050438_886798_10CAA6DA X-CRM114-Status: GOOD ( 11.74 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Quentin Schulz According to commit 40658534756f ("arm64: dts: rockchip: Add rock5b overlays for PCIe endpoint mode"), Rock 5B can operate in PCIe endpoint mode. For that to work, the rk3588-rock-5b-pcie-ep.dtbo overlay needs to be applied on Rock 5B base Device Tree. If that Rock 5B is connected to another Rock 5B, the latter needs to apply the rk3588-rock-5b-pcie-srns.dtbo overlay. In order to make sure the overlays are still valid in the future, let's add a validation test by applying the overlays on top of the main base at build time. Reviewed-by: Krzysztof Kozlowski Reviewed-by: Niklas Cassel Signed-off-by: Quentin Schulz --- arch/arm64/boot/dts/rockchip/Makefile | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile index 267966ea69b194887d59e38a4220239a90a91306..ebcd16ce976ebe56a98d9685228980cd1f2f180a 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -150,8 +150,6 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-orangepi-5-plus.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-quartzpro64.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5-itx.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b.dtb -dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b-pcie-ep.dtbo -dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b-pcie-srns.dtbo dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-tiger-haikou.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-toybrick-x0.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-turing-rk1.dtb @@ -186,3 +184,11 @@ rk3568-wolfvision-pf5-vz-2-uhd-dtbs := rk3568-wolfvision-pf5.dtb \ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-edgeble-neu6a-wifi.dtb rk3588-edgeble-neu6a-wifi-dtbs := rk3588-edgeble-neu6a-io.dtb \ rk3588-edgeble-neu6a-wifi.dtbo + +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b-pcie-ep.dtb +rk3588-rock-5b-pcie-ep-dtbs := rk3588-rock-5b.dtb \ + rk3588-rock-5b-pcie-ep.dtbo + +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b-pcie-srns.dtb +rk3588-rock-5b-pcie-srns-dtbs := rk3588-rock-5b.dtb \ + rk3588-rock-5b-pcie-srns.dtbo From patchwork Tue Jan 28 13:04:16 2025 Content-Type: text/plain; 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Tue, 28 Jan 2025 14:04:34 +0100 (CET) From: Quentin Schulz Date: Tue, 28 Jan 2025 14:04:16 +0100 Subject: [PATCH v3 4/4] arm64: dts: rockchip: minimal support for Pre-ICT tester adapter for RK3588 Jaguar MIME-Version: 1.0 Message-Id: <20250128-pre-ict-jaguar-v3-4-7be2f09d390a@cherry.de> References: <20250128-pre-ict-jaguar-v3-0-7be2f09d390a@cherry.de> In-Reply-To: <20250128-pre-ict-jaguar-v3-0-7be2f09d390a@cherry.de> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Jagan Teki , Niklas Cassel , Michael Riesch Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Quentin Schulz , Krzysztof Kozlowski X-Mailer: b4 0.14.2 X-Infomaniak-Routing: alpha X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250128_050438_825961_4DD5AF50 X-CRM114-Status: GOOD ( 20.74 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Quentin Schulz The Pre-ICT tester adapter connects to RK3588 Jaguar SBC through its proprietary Mezzanine connector. It exposes a PCIe Gen2 1x M.2 connector and two proprietary camera connectors. Support for the latter will come once the rest of the camera stack is supported. Additionally, the adapter loops some GPIOs together as well as route some GPIOs to power rails. This adapter is used for manufacturing RK3588 Jaguar to be able to test the Mezzanine connector is properly soldered. Acked-by: Krzysztof Kozlowski Signed-off-by: Quentin Schulz --- arch/arm64/boot/dts/rockchip/Makefile | 4 + .../dts/rockchip/rk3588-jaguar-pre-ict-tester.dtso | 171 +++++++++++++++++++++ 2 files changed, 175 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile index ebcd16ce976ebe56a98d9685228980cd1f2f180a..a09b9c0060f8ecde582ad39f0f3e27047a31ec9c 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -185,6 +185,10 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-edgeble-neu6a-wifi.dtb rk3588-edgeble-neu6a-wifi-dtbs := rk3588-edgeble-neu6a-io.dtb \ rk3588-edgeble-neu6a-wifi.dtbo +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-jaguar-pre-ict-tester.dtb +rk3588-jaguar-pre-ict-tester-dtbs := rk3588-jaguar.dtb \ + rk3588-jaguar-pre-ict-tester.dtbo + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b-pcie-ep.dtb rk3588-rock-5b-pcie-ep-dtbs := rk3588-rock-5b.dtb \ rk3588-rock-5b-pcie-ep.dtbo diff --git a/arch/arm64/boot/dts/rockchip/rk3588-jaguar-pre-ict-tester.dtso b/arch/arm64/boot/dts/rockchip/rk3588-jaguar-pre-ict-tester.dtso new file mode 100644 index 0000000000000000000000000000000000000000..9d44dfe2f30d793accb994a230c58038f0c3daad --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3588-jaguar-pre-ict-tester.dtso @@ -0,0 +1,171 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) +/* + * Copyright (c) 2024 Cherry Embedded Solutions GmbH + * + * Device Tree Overlay for the Pre-ICT tester adapter for the Mezzanine + * connector on RK3588 Jaguar. + * + * This adapter has a PCIe Gen2 x1 M.2 M-Key connector and two proprietary + * camera connectors (each their own I2C bus, clock, reset and PWM lines as well + * as 2-lane CSI). + * + * This adapter routes some GPIOs to power rails and loops together some other + * GPIOs. + * + * This adapter is used during manufacturing for validating proper soldering of + * the mezzanine connector. + */ + +/dts-v1/; +/plugin/; + +#include +#include + +&{/} { + pre_ict_tester_vcc_1v2: regulator-pre-ict-tester-vcc-1v2 { + compatible = "regulator-fixed"; + regulator-name = "pre_ict_tester_vcc_1v2"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + vin-supply = <&vcc_3v3_s3>; + }; + + pre_ict_tester_vcc_2v8: regulator-pre-ict-tester-vcc-2v8 { + compatible = "regulator-fixed"; + regulator-name = "pre_ict_tester_vcc_2v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + vin-supply = <&vcc_3v3_s3>; + }; +}; + +&combphy0_ps { + status = "okay"; +}; + +&gpio3 { + pinctrl-0 = <&pre_ict_pwr2gpio>; + pinctrl-names = "default"; +}; + +&pcie2x1l2 { + pinctrl-names = "default"; + pinctrl-0 = <&pcie2x1l2_perstn_m0>; + reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>; /* PCIE20X1_2_PERSTN_M0 */ + vpcie3v3-supply = <&vcc_3v3_s3>; + status = "okay"; +}; + +&pinctrl { + pcie2x1l2 { + pcie2x1l2_perstn_m0: pcie2x1l2-perstn-m0 { + rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pre-ict-tester { + pre_ict_pwr2gpio: pre-ict-pwr2gpio-pins { + rockchip,pins = + /* + * GPIO3_A3 requires two power rails to be properly + * routed to the mezzanine connector to report a proper + * value: VCC_1V8_S0_1 and VCC_IN_2. It may report an + * incorrect value if VCC_1V8_S0_1 isn't properly routed, + * but GPIO3_C6 would catch this HW soldering issue. + * If VCC_IN_2 is properly routed, GPIO3_A3 should be + * LOW. The signal shall not read HIGH in the event + * GPIO3_A3 isn't properly routed due to soldering + * issue. Therefore, let's enforce a pull-up (which is + * the SoC default for this pin). + */ + <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>, + /* + * GPIO3_A4 is directly routed to VCC_1V8_S0_2 power + * rail. It should be HIGH if all is properly soldered. + * To guarantee that, a pull-down is enforced (which is + * the SoC default for this pin) so that LOW is read if + * the loop doesn't exist on HW (soldering issue on + * either signals). + */ + <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_down>, + /* + * GPIO3_B2 requires two power rails to be properly + * routed to the mezzanine connector to report a proper + * value: VCC_1V8_S0_1 and VCC_IN_1. It may report an + * incorrect value if VCC_1V8_S0_1 isn't properly routed, + * but GPIO3_C6 would catch this HW soldering issue. + * If VCC_IN_1 is properly routed, GPIO3_B2 should be + * LOW. This is an issue if GPIO3_B2 isn't properly + * routed due to soldering issue, because GPIO3_B2 + * default bias is pull-down therefore being LOW. So + * the worst case scenario and the pass scenario expect + * the same value. Make GPIO3_B2 a pull-up so that a + * soldering issue on GPIO3_B2 reports HIGH but proper + * soldering reports LOW. + */ + <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>, + /* + * GPIO3_C6 is directly routed to VCC_1V8_S0_1 power + * rail. It should be HIGH if all is properly soldered. + * This is an issue if GPIO3_C6 or VCC_1V8_S0_1 isn't + * properly routed due to soldering issue, because + * GPIO3_C6 default bias is pull-up therefore being HIGH + * in all cases: + * - GPIO3_C6 is floating (so HIGH) if GPIO3_C6 is not + * routed properly, + * - GPIO3_C6 is floating (so HIGH) if VCC_1V8_S0_1 is + * not routed properly, + * - GPIO3_C6 is HIGH if everything is proper, + * Make GPIO3_C6 a pull-down so that a soldering issue + * on GPIO3_C6 or VCC_1V8_S0_1 reports LOW but proper + * soldering reports HIGH. + */ + <3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_down>, + /* + * GPIO3_D2 is routed to VCC_5V0_1 power rail through a + * voltage divider on the adapter. + * It should be HIGH if all is properly soldered. + * To guarantee that, a pull-down is enforced (which is + * the SoC default for this pin) so that LOW is read if + * the loop doesn't exist on HW (soldering issue on + * either signals). + */ + <3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_down>, + /* + * GPIO3_D3 is routed to VCC_5V0_2 power rail through a + * voltage divider on the adapter. + * It should be HIGH if all is properly soldered. + * To guarantee that, a pull-down is enforced (which is + * the SoC default for this pin) so that LOW is read if + * the loop doesn't exist on HW (soldering issue on + * either signals). + */ + <3 RK_PD3 RK_FUNC_GPIO &pcfg_pull_down>, + /* + * GPIO3_D4 is routed to VCC_3V3_S3_1 power rail through + * a voltage divider on the adapter. + * It should be HIGH if all is properly soldered. + * To guarantee that, a pull-down is enforced (which is + * the SoC default for this pin) so that LOW is read if + * the loop doesn't exist on HW (soldering issue on + * either signals). + */ + <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_down>, + /* + * GPIO3_D5 is routed to VCC_3V3_S3_2 power rail through + * a voltage divider on the adapter. + * It should be HIGH if all is properly soldered. + * To guarantee that, a pull-down is enforced (which is + * the SoC default for this pin) so that LOW is read if + * the loop doesn't exist on HW (soldering issue on + * either signals). + */ + <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; +};