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Signed-off-by: Frank Li --- arch/arm64/boot/dts/freescale/imx8-ss-hsio.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-hsio.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-hsio.dtsi index 70a8aa1a67911..635b1c801cec7 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-hsio.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-hsio.dtsi @@ -68,9 +68,9 @@ pcieb: pcie@5f010000 { bus-range = <0x00 0xff>; device_type = "pci"; interrupt-map = <0 0 0 1 &gic 0 105 4>, - <0 0 0 2 &gic 0 106 4>, - <0 0 0 3 &gic 0 107 4>, - <0 0 0 4 &gic 0 108 4>; + <0 0 0 2 &gic 0 106 4>, + <0 0 0 3 &gic 0 107 4>, + <0 0 0 4 &gic 0 108 4>; interrupt-map-mask = <0 0 0 0x7>; num-lanes = <1>; num-viewport = <4>; From patchwork Tue Jan 28 21:15:56 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Li X-Patchwork-Id: 13953189 Received: from EUR05-VI1-obe.outbound.protection.outlook.com (mail-vi1eur05on2052.outbound.protection.outlook.com [40.107.21.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3C7FD1E50E for ; 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Signed-off-by: Frank Li --- .../boot/dts/freescale/imx8-ss-hsio.dtsi | 19 +++++++++++++++++++ .../boot/dts/freescale/imx8qm-ss-hsio.dtsi | 19 +++++++++++++++++++ 2 files changed, 38 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-hsio.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-hsio.dtsi index 635b1c801cec7..8ec6df02e6381 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-hsio.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-hsio.dtsi @@ -79,6 +79,25 @@ pcieb: pcie@5f010000 { status = "disabled"; }; + pcieb_ep: pcie-ep@5f010000 { + compatible = "fsl,imx8q-pcie-ep"; + reg = <0x5f010000 0x00010000>, + <0x80000000 0x10000000>; + reg-names = "dbi", "addr_space"; + num-lanes = <1>; + interrupts = ; + interrupt-names = "dma"; + clocks = <&pcieb_lpcg IMX_LPCG_CLK_6>, + <&pcieb_lpcg IMX_LPCG_CLK_4>, + <&pcieb_lpcg IMX_LPCG_CLK_5>; + clock-names = "dbi", "mstr", "slv"; + power-domains = <&pd IMX_SC_R_PCIE_B>; + fsl,max-link-speed = <3>; + num-ib-windows = <6>; + num-ob-windows = <6>; + status = "disabled"; + }; + pcieb_lpcg: clock-controller@5f060000 { compatible = "fsl,imx8qxp-lpcg"; reg = <0x5f060000 0x10000>; diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-hsio.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-hsio.dtsi index b1d0189a17258..d52609e4fc455 100644 --- a/arch/arm64/boot/dts/freescale/imx8qm-ss-hsio.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-hsio.dtsi @@ -42,6 +42,25 @@ pciea: pcie@5f000000 { status = "disabled"; }; + pciea_ep: pcie-ep@5f000000 { + compatible = "fsl,imx8q-pcie-ep"; + reg = <0x5f000000 0x00010000>, + <0x40000000 0x10000000>; + reg-names = "dbi", "addr_space"; + num-lanes = <1>; + interrupts = ; + interrupt-names = "dma"; + clocks = <&pciea_lpcg IMX_LPCG_CLK_6>, + <&pciea_lpcg IMX_LPCG_CLK_4>, + <&pciea_lpcg IMX_LPCG_CLK_5>; + clock-names = "dbi", "mstr", "slv"; + power-domains = <&pd IMX_SC_R_PCIE_A>; + fsl,max-link-speed = <3>; + num-ib-windows = <6>; + num-ob-windows = <6>; + status = "disabled"; + }; + pcieb: pcie@5f010000 { compatible = "fsl,imx8q-pcie"; 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Signed-off-by: Frank Li --- arch/arm64/boot/dts/freescale/Makefile | 4 ++++ .../dts/freescale/imx8qxp-mek-pcie-ep.dtso | 22 +++++++++++++++++++ 2 files changed, 26 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx8qxp-mek-pcie-ep.dtso diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile index 839432153cc7a..9bd32ec898c25 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -267,6 +267,10 @@ dtb-$(CONFIG_ARCH_MXC) += imx8qxp-colibri-eval-v3.dtb dtb-$(CONFIG_ARCH_MXC) += imx8qxp-colibri-iris.dtb dtb-$(CONFIG_ARCH_MXC) += imx8qxp-colibri-iris-v2.dtb dtb-$(CONFIG_ARCH_MXC) += imx8qxp-mek.dtb + +imx8qxp-mek-pcie-ep-dtbs += imx8qxp-mek.dtb imx8qxp-mek-pcie-ep.dtbo +dtb-$(CONFIG_ARCH_MXC) += imx8qxp-mek-pcie-ep.dtb + dtb-$(CONFIG_ARCH_MXC) += imx8qxp-tqma8xqp-mba8xx.dtb dtb-$(CONFIG_ARCH_MXC) += imx8ulp-evk.dtb dtb-$(CONFIG_ARCH_MXC) += imx93-9x9-qsb.dtb diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek-pcie-ep.dtso b/arch/arm64/boot/dts/freescale/imx8qxp-mek-pcie-ep.dtso new file mode 100644 index 0000000000000..4f562eb5c5b1d --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qxp-mek-pcie-ep.dtso @@ -0,0 +1,22 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2025 NXP + */ + +#include + +/dts-v1/; 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Tue, 28 Jan 2025 21:16:28 +0000 Received: from PAXPR04MB9642.eurprd04.prod.outlook.com ([fe80::9126:a61e:341d:4b06]) by PAXPR04MB9642.eurprd04.prod.outlook.com ([fe80::9126:a61e:341d:4b06%5]) with mapi id 15.20.8377.021; Tue, 28 Jan 2025 21:16:28 +0000 From: Frank Li To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), imx@lists.linux.dev (open list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE), linux-arm-kernel@lists.infradead.org (moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE), linux-kernel@vger.kernel.org (open list) Cc: imx@lists.linux.dev, hongxing.zhu@nxp.com Subject: [PATCH 4/5] arm64: dts: imx95: add PCIe's msi-map and iommu-map property Date: Tue, 28 Jan 2025 16:15:58 -0500 Message-Id: <20250128211559.1582598-4-Frank.Li@nxp.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250128211559.1582598-1-Frank.Li@nxp.com> References: <20250128211559.1582598-1-Frank.Li@nxp.com> X-ClientProxiedBy: SJ0PR13CA0229.namprd13.prod.outlook.com (2603:10b6:a03:2c1::24) To PAXPR04MB9642.eurprd04.prod.outlook.com (2603:10a6:102:240::14) Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: PAXPR04MB9642:EE_|PAXPR04MB8490:EE_ X-MS-Office365-Filtering-Correlation-Id: 85a8245c-13ca-48fc-279f-08dd3fe10789 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|7416014|52116014|366016|376014|921020|38350700014; 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Signed-off-by: Frank Li --- arch/arm64/boot/dts/freescale/imx95.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi index 6b8470cb3461a..2cebeda43a52d 100644 --- a/arch/arm64/boot/dts/freescale/imx95.dtsi +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi @@ -1573,6 +1573,12 @@ pcie0: pcie@4c300000 { assigned-clock-parents = <0>, <0>, <&scmi_clk IMX95_CLK_SYSPLL1_PFD1_DIV2>; power-domains = <&scmi_devpd IMX95_PD_HSIO_TOP>; + /* pcie0's Devid(BIT[7:6]) is 0x00, stream id(BIT[5:0]) is 0x10~0x17 */ + msi-map = <0x0 &its 0x10 0x1>, + <0x100 &its 0x11 0x7>; + iommu-map = <0x000 &smmu 0x10 0x1>, + <0x100 &smmu 0x11 0x7>; + iommu-map-mask = <0x1ff>; fsl,max-link-speed = <3>; status = "disabled"; }; @@ -1640,6 +1646,14 @@ pcie1: pcie@4c380000 { assigned-clock-parents = <0>, <0>, <&scmi_clk IMX95_CLK_SYSPLL1_PFD1_DIV2>; power-domains = <&scmi_devpd IMX95_PD_HSIO_TOP>; + /* pcie1's Devid(BIT[7:6]) is 0x10, stream id(BIT[5:0]) is 0x18~0x1f */ + msi-map = <0x0 &its 0x98 0x1>, + <0x100 &its 0x99 0x7>; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: aWqr0bi/9PhFvcFpSbY+RBmQ98BF2OW2iztLH64YJyVdj7nXjiemHkbY+HcsN7nGBlltahg3AJtWRDPkqWq45OeK+gf68iAB4ekBWWZBUpbreeg2IVe1luV0eeruinJIElgZbuArE9CF4vBB8Vb/AzegWj030Rt9gpdPx54aL8RC0D2Wt6WOXEvN487MHbN4jy6qkfwDEHCBvsf+vGNUMEkvgvs3C6200pWGXzShBXxj9pRp0P7bMk1q127OrgdFmsVRfUPiqyIJepYzc/WUJqPx13vgBd5BQmN2uz85NMhDcdgOeSo2fYNWei4tsveOlwcEa3wRlSSaa0BKokVG3Zk741kExNHbyycppA7irNuHR9bos/acz3bwAELWHJD1Fda+6pFzGPr0j+PpW/xWk8mcfiYQ/dG/dERvRdNwadSejticfTOX9L+uUtfX2/f2hFSLQ9o57b0GgLvsu+CfnO2gzprgkpr9G6TG96gK0N/w/FvXeV/fF6CIopkq3NEQDo1/ozw71G4LXWeWARkOdeGoBvt7KwO7I+s3pymsYCCTZ+1nfwYgTmdbKmUPwGblWmEiqDQbfk35nVatk54t5z4HYUxoHDVGKU3gZ1kqVuwZNfm1G19MK0jKanxmFJciZoaqpWpk4zQf2YEwAExdiFkLdvU1VDyLW2ltD4CHq8i5bpuFv2Q1U0AKGYskaFZoouOefbnEHC1tpJSliCQuf/JT1lbgG1FhQ+GgIeCK16TkJ/dsrY0Uc0xy/Usl9QBBNbTAlJRv1T3ip5HZ0r+PU7X2OB3B7B6U2iu31o5htKYswH3MQD8YUdlYgHbCp05/Rb4L81dDprDVlBwvzOGZAqhRObFNASRqugC/Y8lQURtImdBjk9CZ6PDiZVFi4pnbxgsWudqn5+UczISap9umtO36W6a4gXUPmlPfOWn93VDjEyqI8wgo62LgwPZVBTrGBIzPcBNgwOxFJEBdRLEWxNC960ZrUYy4pijlkugX8O8dcnoub5J24nuKcDdslTJEfZw0sipAVzMWdMSyQxJSZqiwJtmsJGR5at6bPrkdbGeqN5N4mN7lglsevKMbCBs42ePbNGrxXG9q8oyWF8SiP0oSZBHHYQaLT3Dc9NSKWEh0eiPpHhTLZMSMrX36pDuvkyblXa/ayikBpDMktilAazEBV0CFJGpgvOHOQuCOgM+tR/MvtqGs2FbQgJuZD8ZeptMGc4ncVWdLgPyp0uh/SSzbilskRllyV5YTPc2ELB0E40VHtzMQlWN4bz+VLvBAm5NpGPxSxi17rY/wtvE56KowQD/rqc9NbZ+n/tFHLZAKxzlEi/gaG1u5sKCyo+wl+WZlCKrC7K10Mpb/xf+BVfOe3mln6CV5ZtgMGprBtEuU1rtB/YJlMS9eqRjvjfDu44XQyOmv+ApxpHEtvLXE+vw4AnU9qyevNowpLzinDkNscPRREk9C50oHu4bcANPbRPjnCEsL4JZiGxazsM/7JrboXcbWjOhfL3jZseZW4MRdhZ7Ga48dFlOM+riiN6epolpsVB1fgACT0SyMr+b6NpBhzubp7R2VYo2tpQ3p25I= X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 9111b778-5f5a-420d-b57b-08dd3fe109a0 X-MS-Exchange-CrossTenant-AuthSource: PAXPR04MB9642.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Jan 2025 21:16:31.9790 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 8EZEoPid6wKRIMVc0DW22fGoQCRpcUZHRranQCPyyYaDjskwPh8W6Upe7FgkQgqeJ7H6qVm/jxT3WnFF+xie9A== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAXPR04MB8490 Add "ref" clock for i.MX95's pcie and fix below CHECK_DTBS warnings: arch/arm64/boot/dts/freescale/imx95-19x19-evk.dtb: pcie@4c300000: clock-names: ['pcie', 'pcie_bus', 'pcie_phy', 'pcie_aux'] is too short from schema $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie.yaml Signed-off-by: Frank Li --- arch/arm64/boot/dts/freescale/imx95.dtsi | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi index 2cebeda43a52d..f0dc8be2abffa 100644 --- a/arch/arm64/boot/dts/freescale/imx95.dtsi +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi @@ -1537,6 +1537,14 @@ smmu: iommu@490d0000 { }; }; + hsio_blk_ctl: syscon@4c0100c0 { + compatible = "nxp,imx95-hsio-blk-ctl", "syscon"; + reg = <0x0 0x4c0100c0 0x0 0x1>; + #clock-cells = <1>; + power-domains = <&scmi_devpd IMX95_PD_HSIO_TOP>; + clocks = <&dummy>; + }; + pcie0: pcie@4c300000 { compatible = "fsl,imx95-pcie"; reg = <0 0x4c300000 0 0x10000>, @@ -1564,8 +1572,9 @@ pcie0: pcie@4c300000 { clocks = <&scmi_clk IMX95_CLK_HSIO>, <&scmi_clk IMX95_CLK_HSIOPLL>, <&scmi_clk IMX95_CLK_HSIOPLL_VCO>, - <&scmi_clk IMX95_CLK_HSIOPCIEAUX>; - clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux"; + <&scmi_clk IMX95_CLK_HSIOPCIEAUX>, + <&hsio_blk_ctl 0>; + clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux", "ref"; assigned-clocks =<&scmi_clk IMX95_CLK_HSIOPLL_VCO>, <&scmi_clk IMX95_CLK_HSIOPLL>, <&scmi_clk IMX95_CLK_HSIOPCIEAUX>; @@ -1637,8 +1646,9 @@ pcie1: pcie@4c380000 { clocks = <&scmi_clk IMX95_CLK_HSIO>, <&scmi_clk IMX95_CLK_HSIOPLL>, <&scmi_clk IMX95_CLK_HSIOPLL_VCO>, - <&scmi_clk IMX95_CLK_HSIOPCIEAUX>; - clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux"; + <&scmi_clk IMX95_CLK_HSIOPCIEAUX>, + <&hsio_blk_ctl 0>; + clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux", "ref"; assigned-clocks =<&scmi_clk IMX95_CLK_HSIOPLL_VCO>, <&scmi_clk IMX95_CLK_HSIOPLL>, <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;