From patchwork Mon Feb 3 12:43:40 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nick Chan X-Patchwork-Id: 13957401 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5EBEEC02192 for ; Mon, 3 Feb 2025 12:51:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=PYOobTdeVvBQEcklmUZtQ/nTyy5cKNm1JGVJ6HGQd8s=; b=2njp8FOFwTkEJyf5mVEiOkva2M 2j+dgn30PSX35FzUzG9N/6nnd5/tR0fp9UztmWojR4Wu0XyMUR9FU5UflZK5DKQGjMcaa88pPkvw9 5VmnFiTVp5QqwK11i0ZTMoMg1Y4uo354a1DWZsA1ooZupfgJ/Uc4Fz2Gdlf1u6rlcXd7jtMnIAHXL RQqMn5BrEJ2c7LMh5cw8BUEzdBHHF1cKw8Rp8+rrxDnWoVVWSgnFm81L9+doZ1ORetki9B2DmSOnC BrPw06fC628NTR1mDAjVJeFz+nQtdqrdEPn5FzODHhj3m/mnxYL1C6WHoSNoMKe3uELm8Ki4Fmtkw CoahW+kg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tevv4-0000000FQYv-2JjE; Mon, 03 Feb 2025 12:51:18 +0000 Received: from mail-pl1-x633.google.com ([2607:f8b0:4864:20::633]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tevsT-0000000FPcX-1HpW for linux-arm-kernel@lists.infradead.org; Mon, 03 Feb 2025 12:48:38 +0000 Received: by mail-pl1-x633.google.com with SMTP id d9443c01a7336-2163b0c09afso72768215ad.0 for ; Mon, 03 Feb 2025 04:48:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1738586916; x=1739191716; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=PYOobTdeVvBQEcklmUZtQ/nTyy5cKNm1JGVJ6HGQd8s=; b=FGz67+qgxoUOJqj0cp43Q9TAeA8y+5X7t4gJknYmBIt0lPJywAocb7cQQRvFogTt6g 9KDCkAJlGZc4UrUVphC/HSPak/1NMWgSEQQcvk9KIgPGpOdrWNvBSJeaNDQIX0iBLNxD KauIBld8+F9nRPu4zMPe29ksJxZMhQqyiZ0rbcp862xb8ss86Kj1p+N4Q7FkxI9eCUu6 9dxaLRdNCYMeEJuKBcuoSGl0zVSXN9z8s4rDsskzdjEGXaRneU5n/JHrGErcf5+L+yVq 3z9rwGVlLMKdQmK1PdbCQg1FyfVGUWU/u/HgK4HBH1EGvQNLkYVO+cNhUOUWz6klqlft 1EEg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738586916; x=1739191716; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=PYOobTdeVvBQEcklmUZtQ/nTyy5cKNm1JGVJ6HGQd8s=; b=e3Ar3bYvgCl0EFHidUa3Fg1Fmn0SZTdLAeB9hKaRrsL59wsvlqbA8w7MSx+E2DCH2C d9bYwdYm/oVF1sVlZZuUdA4wEUxAuhlGFp3h4Gv1BFxoFGVSJelWicyu9Rn/bmdLcs7T M9pHn0aQG+s+zI/TxjpNPoTdIqH9lgx++rVFBHNfekFtiASqH3bOydtGTrwGE1TL0d0I GTmLDX6HhQCRt9GEbY9le3mXh8s4UOHYIqjmRrvM/iMOPymwBNaDIPrqrF/FiQcTUVhA FpnyEzJ0ELRSal1murUKIpU4XQLbqpm0386Ud8EJOxesEW6CwrJjACQm4sG1xuOwVO7s O4Bw== X-Forwarded-Encrypted: i=1; AJvYcCXtI5rciEaXOM0F3pWnLf4nFt5PgGJhdi316by4DOL1kGAe0Bz72P2MMgSTwswEd6hKXKJsfNbNHQx57Mq84egk@lists.infradead.org X-Gm-Message-State: AOJu0YzdTw2dCxwwDj/hCRNrhRq50dfbRL0vmUjk1JvTBaKN8DcwjpWq m7q3TalEMmbzYa/XtVP/2yHVg5dy590NCJ3PKTkKWV3z9Oo6sjiN X-Gm-Gg: ASbGnctpz4O5TLgXetwTra9N4hDlCnjk4sw1G8S0ElnwyfUf2uz2soMqIyN/a+qQf/H npW5iTCKzDvgqH8z+kxTdR7sGsnkmLqd7E2Szu+0Optk8sSVYRRPNv3G2IbXt3BYgPKL80yLjvz bJW7812sAGAqabyjNPBlnFiCeGrEv6xUMp/2Fsmc9JJrncn/dFPht03nxWbIWqdgLJTh+TUCXbx k0EaVPv580jWXDwUU5d160JXGOTdpDzrX0C98u8ovqbJ7bnMocyTH+w9cqk8u8pH9Sm5rmrre/T FHNZkwHOetQ9MI9f X-Google-Smtp-Source: AGHT+IHNxiz6QozzdjMZnbxINSYc1bgjbCbDWy4u2OcKc7sDsAQ2D/vBYRoNRl5irV8KJMRowGeBUw== X-Received: by 2002:a05:6a20:748c:b0:1ea:e81c:60fa with SMTP id adf61e73a8af0-1ed7a638a2dmr35595806637.20.1738586916570; Mon, 03 Feb 2025 04:48:36 -0800 (PST) Received: from nick-mbp.. ([59.188.211.160]) by smtp.googlemail.com with ESMTPSA id 41be03b00d2f7-acebddbb0d4sm7835225a12.10.2025.02.03.04.48.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Feb 2025 04:48:36 -0800 (PST) From: Nick Chan To: Hector Martin , Sven Peter , Alyssa Rosenzweig , Rob Herring , Krzysztof Kozlowski , Conor Dooley , asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Nick Chan Subject: [PATCH RESEND 1/9] arm64: dts: apple: s5l8960x: Add cpufreq nodes Date: Mon, 3 Feb 2025 20:43:40 +0800 Message-ID: <20250203124747.41541-2-towinchenmi@gmail.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250203124747.41541-1-towinchenmi@gmail.com> References: <20250203124747.41541-1-towinchenmi@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250203_044837_342154_2ED7DACE X-CRM114-Status: GOOD ( 15.74 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add cpufreq nodes for Apple A7 SoC. Signed-off-by: Nick Chan --- arch/arm64/boot/dts/apple/s5l8960x-5s.dtsi | 1 + arch/arm64/boot/dts/apple/s5l8960x-air1.dtsi | 1 + arch/arm64/boot/dts/apple/s5l8960x-mini2.dtsi | 1 + arch/arm64/boot/dts/apple/s5l8960x-opp.dtsi | 45 +++++++++++++++++++ arch/arm64/boot/dts/apple/s5l8960x.dtsi | 10 +++++ arch/arm64/boot/dts/apple/s5l8965x-opp.dtsi | 45 +++++++++++++++++++ 6 files changed, 103 insertions(+) create mode 100644 arch/arm64/boot/dts/apple/s5l8960x-opp.dtsi create mode 100644 arch/arm64/boot/dts/apple/s5l8965x-opp.dtsi diff --git a/arch/arm64/boot/dts/apple/s5l8960x-5s.dtsi b/arch/arm64/boot/dts/apple/s5l8960x-5s.dtsi index 0b16adf07f79..83c0a4deb5ba 100644 --- a/arch/arm64/boot/dts/apple/s5l8960x-5s.dtsi +++ b/arch/arm64/boot/dts/apple/s5l8960x-5s.dtsi @@ -8,6 +8,7 @@ #include "s5l8960x.dtsi" #include "s5l8960x-common.dtsi" +#include "s5l8960x-opp.dtsi" #include / { diff --git a/arch/arm64/boot/dts/apple/s5l8960x-air1.dtsi b/arch/arm64/boot/dts/apple/s5l8960x-air1.dtsi index 741c5a9f21dd..d88894e0fce7 100644 --- a/arch/arm64/boot/dts/apple/s5l8960x-air1.dtsi +++ b/arch/arm64/boot/dts/apple/s5l8960x-air1.dtsi @@ -8,6 +8,7 @@ #include "s5l8960x.dtsi" #include "s5l8960x-common.dtsi" +#include "s5l8965x-opp.dtsi" #include / { diff --git a/arch/arm64/boot/dts/apple/s5l8960x-mini2.dtsi b/arch/arm64/boot/dts/apple/s5l8960x-mini2.dtsi index b27ef5680626..261b5008a6b4 100644 --- a/arch/arm64/boot/dts/apple/s5l8960x-mini2.dtsi +++ b/arch/arm64/boot/dts/apple/s5l8960x-mini2.dtsi @@ -8,6 +8,7 @@ #include "s5l8960x.dtsi" #include "s5l8960x-common.dtsi" +#include "s5l8960x-opp.dtsi" #include / { diff --git a/arch/arm64/boot/dts/apple/s5l8960x-opp.dtsi b/arch/arm64/boot/dts/apple/s5l8960x-opp.dtsi new file mode 100644 index 000000000000..e4d568c4a119 --- /dev/null +++ b/arch/arm64/boot/dts/apple/s5l8960x-opp.dtsi @@ -0,0 +1,45 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Operating points for Apple S5L8960X "A7" SoC, Up to 1296 MHz + * + * target-type: N51, N53, J85, J86. J87, J85m, J86m, J87m + * + * Copyright (c) 2024, Nick Chan + */ + +/ { + cyclone_opp: opp-table { + compatible = "operating-points-v2"; + + opp01 { + opp-hz = /bits/ 64 <300000000>; + opp-level = <1>; + clock-latency-ns = <15500>; + }; + opp02 { + opp-hz = /bits/ 64 <396000000>; + opp-level = <2>; + clock-latency-ns = <43000>; + }; + opp03 { + opp-hz = /bits/ 64 <600000000>; + opp-level = <3>; + clock-latency-ns = <26000>; + }; + opp04 { + opp-hz = /bits/ 64 <840000000>; + opp-level = <4>; + clock-latency-ns = <30000>; + }; + opp05 { + opp-hz = /bits/ 64 <1128000000>; + opp-level = <5>; + clock-latency-ns = <39500>; + }; + opp06 { + opp-hz = /bits/ 64 <1296000000>; + opp-level = <6>; + clock-latency-ns = <45500>; + }; + }; +}; diff --git a/arch/arm64/boot/dts/apple/s5l8960x.dtsi b/arch/arm64/boot/dts/apple/s5l8960x.dtsi index 0218ecac1d83..449c69d0d92f 100644 --- a/arch/arm64/boot/dts/apple/s5l8960x.dtsi +++ b/arch/arm64/boot/dts/apple/s5l8960x.dtsi @@ -33,6 +33,8 @@ cpu0: cpu@0 { compatible = "apple,cyclone"; reg = <0x0 0x0>; cpu-release-addr = <0 0>; /* To be filled by loader */ + operating-points-v2 = <&cyclone_opp>; + performance-domains = <&cpufreq>; enable-method = "spin-table"; device_type = "cpu"; }; @@ -41,6 +43,8 @@ cpu1: cpu@1 { compatible = "apple,cyclone"; reg = <0x0 0x1>; cpu-release-addr = <0 0>; /* To be filled by loader */ + operating-points-v2 = <&cyclone_opp>; + performance-domains = <&cpufreq>; enable-method = "spin-table"; device_type = "cpu"; }; @@ -53,6 +57,12 @@ soc { nonposted-mmio; ranges; + cpufreq: performance-controller@202220000 { + compatible = "apple,s5l8960x-cluster-cpufreq"; + reg = <0x2 0x02220000 0 0x1000>; + #performance-domain-cells = <0>; + }; + serial0: serial@20a0a0000 { compatible = "apple,s5l-uart"; reg = <0x2 0x0a0a0000 0x0 0x4000>; diff --git a/arch/arm64/boot/dts/apple/s5l8965x-opp.dtsi b/arch/arm64/boot/dts/apple/s5l8965x-opp.dtsi new file mode 100644 index 000000000000..d34dae74a90c --- /dev/null +++ b/arch/arm64/boot/dts/apple/s5l8965x-opp.dtsi @@ -0,0 +1,45 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Operating points for Apple S5L8965X "A7" Rev A SoC, Up to 1392 MHz + * + * target-type: J71, J72, J73 + * + * Copyright (c) 2024, Nick Chan + */ + +/ { + cyclone_opp: opp-table { + compatible = "operating-points-v2"; + + opp01 { + opp-hz = /bits/ 64 <300000000>; + opp-level = <1>; + clock-latency-ns = <10000>; + }; + opp02 { + opp-hz = /bits/ 64 <600000000>; + opp-level = <2>; + clock-latency-ns = <49000>; + }; + opp03 { + opp-hz = /bits/ 64 <840000000>; + opp-level = <3>; + clock-latency-ns = <30000>; + }; + opp04 { + opp-hz = /bits/ 64 <1128000000>; + opp-level = <4>; + clock-latency-ns = <39500>; + }; + opp05 { + opp-hz = /bits/ 64 <1296000000>; + opp-level = <5>; + clock-latency-ns = <45500>; + }; + opp06 { + opp-hz = /bits/ 64 <1392000000>; + opp-level = <6>; + clock-latency-ns = <46500>; + }; + }; +}; From patchwork Mon Feb 3 12:43:41 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nick Chan X-Patchwork-Id: 13957402 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1194AC02192 for ; Mon, 3 Feb 2025 12:52:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=OxMhVB4BuFZ5ApySWrQAxUEWGEe0HLRSWM8qzETXyfg=; b=H2f8VI+d0kg7aH67wvVK5JCP0y o+zAn+0HDCTic83KASWFFwKTbuR585pHmediYuDBAtnR5efUmPygU0nWT1PEslWCAL1EMrkYQqaSh 5afi5htFhniuHOO/DIclhTb5MMcEEAmwcwQXxacr5wVr5gnzok9seKAX4DQNs2qztFDtmzKZR3XSd o5K8+seCm0P8g2BtQtDRl0bxEGkKroubo8LnNc3FP/2GgTwwSrbGHZc8KyvdH2gSfV/0DaAPxt1Lm uoSnjM5ihVn9nibUFMvETQUoS32Xi8XAX1qszwe9cs+IFASHqhD6KktZ2EjH/+A4BHw/DfkNFyJFD 7p11OvCw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tevwN-0000000FQr9-0oGK; Mon, 03 Feb 2025 12:52:39 +0000 Received: from mail-pl1-x631.google.com ([2607:f8b0:4864:20::631]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tevsW-0000000FPd1-0VD9 for linux-arm-kernel@lists.infradead.org; Mon, 03 Feb 2025 12:48:41 +0000 Received: by mail-pl1-x631.google.com with SMTP id d9443c01a7336-21619108a6bso70894885ad.3 for ; Mon, 03 Feb 2025 04:48:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1738586919; x=1739191719; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=OxMhVB4BuFZ5ApySWrQAxUEWGEe0HLRSWM8qzETXyfg=; b=NWHwK7KZeyX8MLXuF0oh2EVVDX9jH0P4MoEekpD9kj64fyxvzk/OCZcc2K6oDmUR8r iX+4pcYgSQxFAC/XZMX2WhkfmuJvxsxmWCCD2z+b0mlkMaEbLkHmtnD7Eq+DQiR56H1L uy1x7pzFH4AILA4K9xWpg5phpDVSz47xD40zpjRc2ApfTGrjk6F6gGQJXgvW7oDVVLxs uT8DO9oHg8zZS11ufarxhN7Ai7zSHWsCcbKNtUyy8cjgRoQjrwIlmKFAYr2MD9w+t3+M T0ikX2kwv/mdpnumnJjRl2FysBoFJAhEXSmjkOGMBnZO7yLRqATvcHBGH9L2+JQLFWCg hnQQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738586919; x=1739191719; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=OxMhVB4BuFZ5ApySWrQAxUEWGEe0HLRSWM8qzETXyfg=; b=IznpbVT1f7ibR00AnhaSihUTs5dpc2iyFJxqWTKCLA/MAnR0vfA7XVzV0IbvdMhOSE oAscxaMY2CuKcP/1CFaVnqPgtFWCCbE5shZwEn37TJG02hfHKX6WEWRD+dkANwML/jO+ 7vOtVxysm4OQmUqZpq+zWiODGymImmjWr3mrBHspRPNL427s5RNJPqo6aPWlLtxmXBGX 0saLCW3Z69k7rSwYb7hKzxZEUw9zzaVpvRwF3NmvWBY7/gNxF9BclAWyqauBEYfhNJ6a EpT/+tH3hHVi5lohFUfgG2aQoXkwQbmp3VWS22HRdn0oJ2M/q8PT+QnP1wQvZzufoVv+ WBWg== X-Forwarded-Encrypted: i=1; AJvYcCWc2WekeaTNl+n0TBVz0k46Oy12vG2DQ2HAoU3SvVUJKIy3dlw+6tx8IxwpSIceDM9dApUswhK5qlHFM1+KVfkV@lists.infradead.org X-Gm-Message-State: AOJu0YyY2toZ7hgttJ0H6mFkngQLuFpQYnuCCSH52snDh8yRZijD/DRw dbR6Z1BGwqJfZ9vy0T/E8Tfb0wsamrNHaqao1vn4vKFOavaGRLyF X-Gm-Gg: ASbGncu4mqr9rhqY8WaEJ0l6r7C5jvu76VD4TSUJWiDn4AUgoPOg1LQRH/br/lxpITa Sr0jlgne95GkI9LhPhhJRzYIdcctZkrZqFdFp+zbeWXXZRCW2WN+denEzlLHXa+p9qbhKDA8e88 ZGBJj+ce7/NSWkPynxtGVhUmWt++XhvDBtjscYsxpaexXWu9BASAV6qcWWt3zQVrWR8GYrpYJlX pzBfv6A69o1+oq5GK4fF/x5+saWuApyH4wghiGBVhtAfHvRuszki3KKu5yM+y42CQIbX3wSSv6p sjGWCvnzJcnn6mpR X-Google-Smtp-Source: AGHT+IG51KC16Wbu1ERa4z+u0QYHDh0bJ/mjT2XKV4JUnCIVovlm0uf2m3P6dBWpNe7Neb6QdRPlxw== X-Received: by 2002:a05:6a00:9a6:b0:72f:c513:a5fc with SMTP id d2e1a72fcca58-72fd0c7c731mr32930105b3a.23.1738586919357; Mon, 03 Feb 2025 04:48:39 -0800 (PST) Received: from nick-mbp.. ([59.188.211.160]) by smtp.googlemail.com with ESMTPSA id 41be03b00d2f7-acebddbb0d4sm7835225a12.10.2025.02.03.04.48.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Feb 2025 04:48:39 -0800 (PST) From: Nick Chan To: Hector Martin , Sven Peter , Alyssa Rosenzweig , Rob Herring , Krzysztof Kozlowski , Conor Dooley , asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Nick Chan Subject: [PATCH RESEND 2/9] arm64: dts: apple: t7000: Add cpufreq nodes Date: Mon, 3 Feb 2025 20:43:41 +0800 Message-ID: <20250203124747.41541-3-towinchenmi@gmail.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250203124747.41541-1-towinchenmi@gmail.com> References: <20250203124747.41541-1-towinchenmi@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250203_044840_156281_744ABEC9 X-CRM114-Status: GOOD ( 12.03 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add cpufreq nodes for Apple A8 SoC. Signed-off-by: Nick Chan --- arch/arm64/boot/dts/apple/t7000-6.dtsi | 4 ++ arch/arm64/boot/dts/apple/t7000-j42d.dts | 4 ++ arch/arm64/boot/dts/apple/t7000-mini4.dtsi | 4 ++ arch/arm64/boot/dts/apple/t7000.dtsi | 46 ++++++++++++++++++++++ 4 files changed, 58 insertions(+) diff --git a/arch/arm64/boot/dts/apple/t7000-6.dtsi b/arch/arm64/boot/dts/apple/t7000-6.dtsi index f60ea4a4a387..0d08e2589449 100644 --- a/arch/arm64/boot/dts/apple/t7000-6.dtsi +++ b/arch/arm64/boot/dts/apple/t7000-6.dtsi @@ -48,3 +48,7 @@ switch-mute { }; }; }; + +&typhoon_opp06 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/apple/t7000-j42d.dts b/arch/arm64/boot/dts/apple/t7000-j42d.dts index 2231db6a739d..24fe5a99f3ab 100644 --- a/arch/arm64/boot/dts/apple/t7000-j42d.dts +++ b/arch/arm64/boot/dts/apple/t7000-j42d.dts @@ -29,3 +29,7 @@ framebuffer0: framebuffer@0 { &serial6 { status = "okay"; }; + +&typhoon_opp06 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/apple/t7000-mini4.dtsi b/arch/arm64/boot/dts/apple/t7000-mini4.dtsi index c64ddc402fda..773c69449902 100644 --- a/arch/arm64/boot/dts/apple/t7000-mini4.dtsi +++ b/arch/arm64/boot/dts/apple/t7000-mini4.dtsi @@ -49,3 +49,7 @@ switch-mute { }; }; }; + +&typhoon_opp06 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/apple/t7000.dtsi b/arch/arm64/boot/dts/apple/t7000.dtsi index a7cc29e84c84..4105cf70391b 100644 --- a/arch/arm64/boot/dts/apple/t7000.dtsi +++ b/arch/arm64/boot/dts/apple/t7000.dtsi @@ -33,6 +33,8 @@ cpu0: cpu@0 { compatible = "apple,typhoon"; reg = <0x0 0x0>; cpu-release-addr = <0 0>; /* To be filled in by loader */ + performance-domains = <&cpufreq>; + operating-points-v2 = <&typhoon_opp>; enable-method = "spin-table"; device_type = "cpu"; }; @@ -41,11 +43,49 @@ cpu1: cpu@1 { compatible = "apple,typhoon"; reg = <0x0 0x1>; cpu-release-addr = <0 0>; /* To be filled in by loader */ + performance-domains = <&cpufreq>; + operating-points-v2 = <&typhoon_opp>; enable-method = "spin-table"; device_type = "cpu"; }; }; + typhoon_opp: opp-table { + compatible = "operating-points-v2"; + + opp01 { + opp-hz = /bits/ 64 <300000000>; + opp-level = <1>; + clock-latency-ns = <300>; + }; + opp02 { + opp-hz = /bits/ 64 <396000000>; + opp-level = <2>; + clock-latency-ns = <50000>; + }; + opp03 { + opp-hz = /bits/ 64 <600000000>; + opp-level = <3>; + clock-latency-ns = <29000>; + }; + opp04 { + opp-hz = /bits/ 64 <840000000>; + opp-level = <4>; + clock-latency-ns = <29000>; + }; + opp05 { + opp-hz = /bits/ 64 <1128000000>; + opp-level = <5>; + clock-latency-ns = <36000>; + }; + typhoon_opp06: opp06 { + opp-hz = /bits/ 64 <1392000000>; + opp-level = <6>; + clock-latency-ns = <42000>; + status = "disabled"; /* Not available on N102 */ + }; + }; + soc { compatible = "simple-bus"; #address-cells = <2>; @@ -53,6 +93,12 @@ soc { nonposted-mmio; ranges; + cpufreq: performance-controller@202220000 { + compatible = "apple,t7000-cluster-cpufreq", "apple,s5l8960x-cluster-cpufreq"; + reg = <0x2 0x02220000 0 0x1000>; + #performance-domain-cells = <0>; + }; + serial0: serial@20a0c0000 { compatible = "apple,s5l-uart"; reg = <0x2 0x0a0c0000 0x0 0x4000>; From patchwork Mon Feb 3 12:43:42 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nick Chan X-Patchwork-Id: 13957403 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 34B25C02192 for ; Mon, 3 Feb 2025 12:54:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=/LkP12Dy2J2B7t0xjl9+9JD7vtd93pwtcrc12+hgZoc=; b=o5P39kxp1uaa2tEvVCUXzvVtyR UMJaoLkjzTfK2YFjtOEN2gSLj/5BU0EvEgaaDdFpPctLj+52E/Ia9u0ft/+vdgIO7kGINtaO7REub 59qgUvBrPXQwNaDH8OGWuseyfs7HYuRju4wdPaTEv2iZHfhiLcTmaclpwOdLyPWWO4frDPuh3SM02 8lhtnrO7IrnFQ7hO3npKWyxX1A7B68Xt/Cy4J9lyGFKn1fomZ69xSMWeESHJaXJfOW/BgAggadIF2 1+EqHhpo47W3kGCa9WJy05nhZg6+/CtiP2AWK7hjUOshGI9yJRhr9ccknbijVfub3CKFLwhWj2cTZ Derzh+RA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tevxf-0000000FR99-3aya; Mon, 03 Feb 2025 12:53:59 +0000 Received: from mail-pl1-x634.google.com ([2607:f8b0:4864:20::634]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tevsY-0000000FPdM-3JsJ for linux-arm-kernel@lists.infradead.org; Mon, 03 Feb 2025 12:48:43 +0000 Received: by mail-pl1-x634.google.com with SMTP id d9443c01a7336-2161eb94cceso50751215ad.2 for ; Mon, 03 Feb 2025 04:48:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1738586922; x=1739191722; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=/LkP12Dy2J2B7t0xjl9+9JD7vtd93pwtcrc12+hgZoc=; b=K+M92uU/uf7zRR08lOajIy4NPdUFhcZY9PZEv41kaQGfDa6PfI+W2Q2QY1Nuy1SZA4 6RE0GG/dm9D2Tt782pAwy6OqULigbhAZlc7Zxh/OerTI+3AxJ+JGuNam1v8DLodlee8g s4OyUcuLean0EwM6lCqRjnAZpsC3gKrtB+H4fChr7pE2DKvxvZHrs0Ij+G+BVCGoNBV4 ndwJxSVyyEGyTTkMdAjq4hD1x8wa0UVV+gklvqfsb0OAWM+zhE4viZssI7pqjgGVudFX LvWI7/U+m8dqX5gDuPilxQcMn12TtKuHt9t1XzjXOQ6FfYytVRpRTBTlWizHAIuGd2rJ eBgA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738586922; x=1739191722; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=/LkP12Dy2J2B7t0xjl9+9JD7vtd93pwtcrc12+hgZoc=; b=c6YVqKWnD7bkHug6HyGA6PbWQt8UbZI3HmT2QIB6G4mcKVCpUIrjl6SQY+bxa68+YV DVGjofjtMEk6325dCpar7OHWXxnwAQ6DyIubWRDx2w3x14euXMUKIzfC/YHEuyP2LxMo DHlK8CqiErRnykXWd9R/XPmMyo7PLhC3skTNpbJPhGIbCKygB0AjA/h5N0Zzm27qjlL8 txfFBacws51p7yzVPZVrIZoszvSkGTVF5+VglsdqFjpwf1SFNxtmczRoMm1UAWkhw6DJ xkCxAT4nvLg8nsutT+Ml56nOYtENLwN7j+7fgtY/MYUKFLC/4HRZYGM1P8Ifl7tDiIQP KWdg== X-Forwarded-Encrypted: i=1; AJvYcCWm9hYmScRKMxOd6EwBMjh77RE655BpbXqKaLyitP4S6A0/TOVEivtmZV96li7pi1HS9SW33OEK4jZapcHdrk3s@lists.infradead.org X-Gm-Message-State: AOJu0Yzo2iKlRxteqQVUYI31t/lsOEPAxApHxQsjVa8GSpMVkNO5nrZ2 Hg9ir1h5IVbi4Qr+A2jks7ebwUKxn4xVVTZI44x/ysKSYR2QYSxA X-Gm-Gg: ASbGncvSKmL14E0xdKT43SwN4QTOB8PKzwXRwjVo7FD/Uer29JS/87mvtf/6vyDNdIM b5xy1VCVicsth9g5K7jfQwujxlMtziYB2lFe9Sf2FK07D+qNZfuTIv+W8Sd18DgGtlYEbkjktmI hXpQzPl2pUFKiNwN+brI/oFLE4T0jXGbPSaRTSb5O1OPFch30D6pv8vRrtBE7402/mJrPjdjKnF lbxTP44xxlAKcSH4Ogb8iDb6a5/BCa6OBzByj0N57dVBZZJTcWAi3Z6JNTBbnZb5VVGH4Qg74pT gq3u0jxR7ip9GkX1 X-Google-Smtp-Source: AGHT+IGbtAfT5l94kOHzzGOxTNJFkUHwyUD0cdCtuhNKa/qwE630Sx/u+J6An+CM+1rznyqoo3fjCw== X-Received: by 2002:a17:902:d510:b0:216:2af7:a2a3 with SMTP id d9443c01a7336-21dd7e5a6f0mr368751385ad.53.1738586922124; Mon, 03 Feb 2025 04:48:42 -0800 (PST) Received: from nick-mbp.. ([59.188.211.160]) by smtp.googlemail.com with ESMTPSA id 41be03b00d2f7-acebddbb0d4sm7835225a12.10.2025.02.03.04.48.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Feb 2025 04:48:41 -0800 (PST) From: Nick Chan To: Hector Martin , Sven Peter , Alyssa Rosenzweig , Rob Herring , Krzysztof Kozlowski , Conor Dooley , asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Nick Chan Subject: [PATCH RESEND 3/9] arm64: dts: apple: t7001: Add cpufreq nodes Date: Mon, 3 Feb 2025 20:43:42 +0800 Message-ID: <20250203124747.41541-4-towinchenmi@gmail.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250203124747.41541-1-towinchenmi@gmail.com> References: <20250203124747.41541-1-towinchenmi@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250203_044842_828566_BDB35B21 X-CRM114-Status: GOOD ( 10.57 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add the cpufreq nodes for Apple A8X SoC. Signed-off-by: Nick Chan --- arch/arm64/boot/dts/apple/t7001.dtsi | 52 ++++++++++++++++++++++++++++ 1 file changed, 52 insertions(+) diff --git a/arch/arm64/boot/dts/apple/t7001.dtsi b/arch/arm64/boot/dts/apple/t7001.dtsi index a76e034c85e3..15fd91d12f30 100644 --- a/arch/arm64/boot/dts/apple/t7001.dtsi +++ b/arch/arm64/boot/dts/apple/t7001.dtsi @@ -35,6 +35,8 @@ cpu0: cpu@0 { compatible = "apple,typhoon"; reg = <0x0 0x0>; cpu-release-addr = <0 0>; /* To be filled in by loader */ + performance-domains = <&cpufreq>; + operating-points-v2 = <&typhoon_opp>; enable-method = "spin-table"; device_type = "cpu"; }; @@ -43,6 +45,8 @@ cpu1: cpu@1 { compatible = "apple,typhoon"; reg = <0x0 0x1>; cpu-release-addr = <0 0>; /* To be filled in by loader */ + performance-domains = <&cpufreq>; + operating-points-v2 = <&typhoon_opp>; enable-method = "spin-table"; device_type = "cpu"; }; @@ -51,11 +55,53 @@ cpu2: cpu@2 { compatible = "apple,typhoon"; reg = <0x0 0x2>; cpu-release-addr = <0 0>; /* To be filled by loader */ + performance-domains = <&cpufreq>; + operating-points-v2 = <&typhoon_opp>; enable-method = "spin-table"; device_type = "cpu"; }; }; + typhoon_opp: opp-table { + compatible = "operating-points-v2"; + + opp01 { + opp-hz = /bits/ 64 <300000000>; + opp-level = <1>; + clock-latency-ns = <300>; + }; + opp02 { + opp-hz = /bits/ 64 <396000000>; + opp-level = <2>; + clock-latency-ns = <49000>; + }; + opp03 { + opp-hz = /bits/ 64 <600000000>; + opp-level = <3>; + clock-latency-ns = <31000>; + }; + opp04 { + opp-hz = /bits/ 64 <840000000>; + opp-level = <4>; + clock-latency-ns = <32000>; + }; + opp05 { + opp-hz = /bits/ 64 <1128000000>; + opp-level = <5>; + clock-latency-ns = <32000>; + }; + opp06 { + opp-hz = /bits/ 64 <1392000000>; + opp-level = <6>; + clock-latency-ns = <37000>; + }; + opp07 { + opp-hz = /bits/ 64 <1512000000>; + opp-level = <7>; + clock-latency-ns = <41000>; + }; + }; + soc { compatible = "simple-bus"; #address-cells = <2>; @@ -63,6 +109,12 @@ soc { nonposted-mmio; ranges; + cpufreq: performance-controller@202220000 { + compatible = "apple,t7000-cluster-cpufreq", "apple,s5l8960x-cluster-cpufreq"; + reg = <0x2 0x02220000 0 0x1000>; + #performance-domain-cells = <0>; + }; + serial0: serial@20a0c0000 { compatible = "apple,s5l-uart"; reg = <0x2 0x0a0c0000 0x0 0x4000>; From patchwork Mon Feb 3 12:43:43 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nick Chan X-Patchwork-Id: 13957442 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 41168C02194 for ; Mon, 3 Feb 2025 12:55:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=pe3ZbblFRITfrVA5nsyP09ciBw9K7ZPZlBuPS3RmeY0=; b=Kq8Dvag/XQdkGPY8H06JEReLn1 3rPf2LzXfoxwkVDtIqNvYD2o/ntdVd7H55gRjb20QEmCiQi5QNkLdQMFRpIDDGSZhMrhGd5SG/338 OirkhGqwS4vuwQkRA9fi1/Rhxn0JWO0CIMeZMWc79nr1UwSYFAQakQLSMy03Sl61sL1YcYGzAhXWp HD/7cCxeod3oMvD+TZ6rG1S0aPmq5mhUhNruafAuG2fW4Jtzgkhowr73PW22rGI1naHldgcNYTb3A sg7bTre0HOLyWYqpvYKUypyoLUXJ1s4FRzHlVjVEUyNZnWfBCfUZ1xD0AK5n/QNZtdbYjcy80OFec csDTXjcg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tevyy-0000000FRQT-2T9z; Mon, 03 Feb 2025 12:55:20 +0000 Received: from mail-pl1-x632.google.com ([2607:f8b0:4864:20::632]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tevsb-0000000FPe1-2Q7M for linux-arm-kernel@lists.infradead.org; Mon, 03 Feb 2025 12:48:46 +0000 Received: by mail-pl1-x632.google.com with SMTP id d9443c01a7336-21628b3fe7dso76576545ad.3 for ; Mon, 03 Feb 2025 04:48:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1738586925; x=1739191725; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=pe3ZbblFRITfrVA5nsyP09ciBw9K7ZPZlBuPS3RmeY0=; b=gR8nCANDt/jJKFkE/5HKJLmi24UJ6pJo/z1wY+sdSZJs+QL8lIgMF7eD/+GsfJn9oS uWaDkMw2iLdmRxPBts+7wLie9cEux74n6m5Ad9YZd7rJA/0XLA7IraKvzssJFUTB1wU7 6HJeFIe7o7PksheQl/0ZOjAkCsf3L923m5n6z3HZaE53BGftbtzZWYb6EYl7613Swu9j E4B0UomZmhZhjmZQxjpTPtXnJmca+BfO0jlOcUD48bpjtVVkcX7qpFMFNrzlP5eU1Rt3 IUkSTqdNrI1qmxE/+xDIgGfZir25mMdkgjhG5CdaeMmgQdhx4nu0G8v2I82ddzuDL5zC pgHQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738586925; x=1739191725; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=pe3ZbblFRITfrVA5nsyP09ciBw9K7ZPZlBuPS3RmeY0=; b=trfrZ14N6yM5JVCMgRbQxpduxCWJ7X2+z5e/3KtYz2ekHDUdH3XMsYh1+AMA4H3yIT hYbXEdkqXLcRGI6UZG75LiPPwl//mHdhs31aKR+OeEshdKh0vp7MmBV9ifJIPhgs0u6K +OF+yY9SRG5aKFp0bo+oGrNqRJn9NqvsaukJnRm7iV1yw2BXK1SQ7h9P6wZv8XZmHnUy SMPFNbFISpH3twX+KzRzNPs2wTPIR+kQkMB8RHUkeUFEaT3ZuXZSR1I3NrDGHnQLX51v 9Qijj9U+72BjuN/o4yyFEEApdSPplyYpOZzTbX62cIxWGEquY5sKvxRHE/thcSlsyLMN nYNg== X-Forwarded-Encrypted: i=1; AJvYcCX2DV+J/mESZjQ61n1IE9OqnYhnarVCIOfumQhxvL3+aFdRgw+A/9s+Byn6M+WOpQmN6LDaZBLL3EOl/T/rSti0@lists.infradead.org X-Gm-Message-State: AOJu0YxRtM4TyHqeBTcx10ilYJj5zfnA594DwSAGMRAgvBIjzeGhjS/E 73O0c7LMgTpRq8rsDymcKF5p1GrEcRSl2B3A9Dwacl8jobLhnm9j X-Gm-Gg: ASbGncsTn7ikfNj8/XEyDuOU2SZbTNN5H4A5ZSCWJPESe8XFHgr6HAVcRT1yK5uyr3m 0n/GvViMLqsA8C3xTHCGNzidRYYGZHzTKlgBF9RYj4EJmER2gc7fGLI//y1pLbQr3k4sSu28AJh bjIXfxgXFpWUpYPVBgevuicgYvtrpsRSAvpPW/L75iecSybfia1UQx+kk+Gz170zVGznSDa6/+1 6QYU/6HcIJNG5JCsJdZS/pBdhLkzlk2TyszL5DiFDYgpG92YBL8q0ZBCW6cq+f59Y8vMzI3oHbZ tNQ/sAGwZm83pbOf X-Google-Smtp-Source: AGHT+IE6PRgepwkrjqG2OmOZ+7qNJydgJxtUoZkQAYGjXgBZv3DVPV0sBMuXLvPIDiaVI0vvtHLMCg== X-Received: by 2002:a05:6a21:6d88:b0:1e1:a75a:c452 with SMTP id adf61e73a8af0-1ed7a63866cmr37247460637.19.1738586924881; Mon, 03 Feb 2025 04:48:44 -0800 (PST) Received: from nick-mbp.. ([59.188.211.160]) by smtp.googlemail.com with ESMTPSA id 41be03b00d2f7-acebddbb0d4sm7835225a12.10.2025.02.03.04.48.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Feb 2025 04:48:44 -0800 (PST) From: Nick Chan To: Hector Martin , Sven Peter , Alyssa Rosenzweig , Rob Herring , Krzysztof Kozlowski , Conor Dooley , asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Nick Chan Subject: [PATCH RESEND 4/9] arm64: dts: apple: Add cpufreq nodes for S8000/S8003 Date: Mon, 3 Feb 2025 20:43:43 +0800 Message-ID: <20250203124747.41541-5-towinchenmi@gmail.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250203124747.41541-1-towinchenmi@gmail.com> References: <20250203124747.41541-1-towinchenmi@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250203_044845_627374_B0B69ADA X-CRM114-Status: GOOD ( 14.20 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add cpufreq nodes for the two variants of Apple A9 SoC. The difference is that S8000 is slower than S8003 in state transitions. Change the copyright information in s8000.dtsi and s8003.dtsi as well since these are now essentially new files with the original content now being in s800-0-3.dtsi. Signed-off-by: Nick Chan --- arch/arm64/boot/dts/apple/s800-0-3.dtsi | 10 +++++ arch/arm64/boot/dts/apple/s8000.dtsi | 53 ++++++++++++++++++++++++- arch/arm64/boot/dts/apple/s8003.dtsi | 53 ++++++++++++++++++++++++- 3 files changed, 114 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/apple/s800-0-3.dtsi b/arch/arm64/boot/dts/apple/s800-0-3.dtsi index 082e5b1733d0..382d7be3f8ce 100644 --- a/arch/arm64/boot/dts/apple/s800-0-3.dtsi +++ b/arch/arm64/boot/dts/apple/s800-0-3.dtsi @@ -32,6 +32,8 @@ cpu0: cpu@0 { compatible = "apple,twister"; reg = <0x0 0x0>; cpu-release-addr = <0 0>; /* To be filled in by loader */ + operating-points-v2 = <&twister_opp>; + performance-domains = <&cpufreq>; enable-method = "spin-table"; device_type = "cpu"; }; @@ -40,6 +42,8 @@ cpu1: cpu@1 { compatible = "apple,twister"; reg = <0x0 0x1>; cpu-release-addr = <0 0>; /* To be filled in by loader */ + operating-points-v2 = <&twister_opp>; + performance-domains = <&cpufreq>; enable-method = "spin-table"; device_type = "cpu"; }; @@ -52,6 +56,12 @@ soc { nonposted-mmio; ranges; + cpufreq: performance-controller@202220000 { + compatible = "apple,s8000-cluster-cpufreq", "apple,t8103-cluster-cpufreq", "apple,cluster-cpufreq"; + reg = <0x2 0x02220000 0 0x1000>; + #performance-domain-cells = <0>; + }; + serial0: serial@20a0c0000 { compatible = "apple,s5l-uart"; reg = <0x2 0x0a0c0000 0x0 0x4000>; diff --git a/arch/arm64/boot/dts/apple/s8000.dtsi b/arch/arm64/boot/dts/apple/s8000.dtsi index c7e39abda7e1..72322f5677ab 100644 --- a/arch/arm64/boot/dts/apple/s8000.dtsi +++ b/arch/arm64/boot/dts/apple/s8000.dtsi @@ -4,11 +4,62 @@ * * Other names: H8P, "Maui" * - * Copyright (c) 2022, Konrad Dybcio + * Copyright (c) 2024, Nick Chan */ #include "s800-0-3.dtsi" +/ { + twister_opp: opp-table { + compatible = "operating-points-v2"; + + opp01 { + opp-hz = /bits/ 64 <300000000>; + opp-level = <1>; + clock-latency-ns = <650>; + }; + opp02 { + opp-hz = /bits/ 64 <396000000>; + opp-level = <2>; + clock-latency-ns = <75000>; + }; + opp03 { + opp-hz = /bits/ 64 <600000000>; + opp-level = <3>; + clock-latency-ns = <27000>; + }; + opp04 { + opp-hz = /bits/ 64 <912000000>; + opp-level = <4>; + clock-latency-ns = <32000>; + }; + opp05 { + opp-hz = /bits/ 64 <1200000000>; + opp-level = <5>; + clock-latency-ns = <35000>; + }; + opp06 { + opp-hz = /bits/ 64 <1512000000>; + opp-level = <6>; + clock-latency-ns = <45000>; + }; + opp07 { + opp-hz = /bits/ 64 <1800000000>; + opp-level = <7>; + clock-latency-ns = <58000>; + }; +#if 0 + /* Not available until CPU deep sleep is implemented */ + opp08 { + opp-hz = /bits/ 64 <1844000000>; + opp-level = <8>; + clock-latency-ns = <58000>; + turbo-mode; + }; +#endif + }; +}; + /* * The A9 was made by two separate fabs on two different process * nodes: Samsung made the S8000 (APL0898) on 14nm and TSMC made diff --git a/arch/arm64/boot/dts/apple/s8003.dtsi b/arch/arm64/boot/dts/apple/s8003.dtsi index 807e3452f8a7..79df5c783260 100644 --- a/arch/arm64/boot/dts/apple/s8003.dtsi +++ b/arch/arm64/boot/dts/apple/s8003.dtsi @@ -4,11 +4,62 @@ * * Other names: H8P, "Malta" * - * Copyright (c) 2022, Konrad Dybcio + * Copyright (c) 2024, Nick Chan */ #include "s800-0-3.dtsi" +/ { + twister_opp: opp-table { + compatible = "operating-points-v2"; + + opp01 { + opp-hz = /bits/ 64 <300000000>; + opp-level = <1>; + clock-latency-ns = <500>; + }; + opp02 { + opp-hz = /bits/ 64 <396000000>; + opp-level = <2>; + clock-latency-ns = <45000>; + }; + opp03 { + opp-hz = /bits/ 64 <600000000>; + opp-level = <3>; + clock-latency-ns = <22000>; + }; + opp04 { + opp-hz = /bits/ 64 <912000000>; + opp-level = <4>; + clock-latency-ns = <25000>; + }; + opp05 { + opp-hz = /bits/ 64 <1200000000>; + opp-level = <5>; + clock-latency-ns = <28000>; + }; + opp06 { + opp-hz = /bits/ 64 <1512000000>; + opp-level = <6>; + clock-latency-ns = <35000>; + }; + opp07 { + opp-hz = /bits/ 64 <1800000000>; + opp-level = <7>; + clock-latency-ns = <38000>; + }; +#if 0 + /* Not available until CPU deep sleep is implemented */ + opp08 { + opp-hz = /bits/ 64 <1844000000>; + opp-level = <8>; + clock-latency-ns = <38000>; + turbo-mode; + }; +#endif + }; +}; + /* * The A9 was made by two separate fabs on two different process * nodes: Samsung made the S8000 (APL0898) on 14nm and TSMC made From patchwork Mon Feb 3 12:43:44 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nick Chan X-Patchwork-Id: 13957443 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E5005C02192 for ; Mon, 3 Feb 2025 12:56:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=Wm1vaCLADXIw6mjVBCZqzL8tPcYfqeyXVx72+uvDa1M=; b=09mm994Z9q3r0hpX3BaOnRJ0Dc wLtiZnIafawQpHnFiSYbYV865UmUff6+QDSdW9bS4GwFT4o+aIgYzPRWcWqae9bPP9P8aQ9k/cbbg JMvoZuqtBS24LpX0iuXzS+SvsrrLJED83hwwgd2917CP0M5GGPce4P5LhGeh0Tmhsp9B91ggwyvwR ze+0CPsNQXcBCxFOZoSRPkJe2Qmq6HekAqHC3T7MPDlfe7+aiBkiPqYnsUXknNtjhWMruHwjd3w1+ JW1mXobruNnn+1vIj136E29OOsFt7i/iz2O7IgfXta3nA+/ao5k+wix2PkbRNyFM4/rjF7MC/u3Sv Cr70EcBw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tew0H-0000000FRin-0uu2; Mon, 03 Feb 2025 12:56:41 +0000 Received: from mail-pl1-x633.google.com ([2607:f8b0:4864:20::633]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tevse-0000000FPfC-0pF9 for linux-arm-kernel@lists.infradead.org; Mon, 03 Feb 2025 12:48:49 +0000 Received: by mail-pl1-x633.google.com with SMTP id d9443c01a7336-2156e078563so60883335ad.2 for ; Mon, 03 Feb 2025 04:48:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1738586928; x=1739191728; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Wm1vaCLADXIw6mjVBCZqzL8tPcYfqeyXVx72+uvDa1M=; b=YCJUciUHBUqRhsPGKJWQq/bW1QEigd8INoPl8Rh7V65eQ9KA6sWPtqGK/K4I2/4Xcl u178gclUTryu4bJ39wY7pfin+b92oYyXgKVYPJIvjrvJYKabcNEyDNI6SG9Yx3r73hlT KPcC2PhyatigMlLjvLpuxeXAXDZ1QZGjkuHjWHPRpXMYc8qNTwsoG2K0K9MKG5jBIyym lcvppHBXh6iYTQQ085ynWB1/g/xHaGFgV1BAeIQJYRZXa5tOSE22ndLxKDUaeOh6c5Vj gwfDvEATLx2bmjVawYDrtfuqV9RBUels8CalhVX2tzikoMnJp9RTtrzvAhr/MBE2oP5A NRSA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738586928; x=1739191728; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Wm1vaCLADXIw6mjVBCZqzL8tPcYfqeyXVx72+uvDa1M=; b=BrX/t0OZe0kIP+UTMBmikJpLQ3q+oZxkanJ6GvYBgpy6a4nQ13d2RrJP9oMrGL8MFk 2AVFWjWSVJjKhOhvYYl0KWRPUV+yPHRLGQSv7g0nrXGq2/3zlEbMn7Tba7T3BWotBWL+ PsBz/HEfTa3ays9A9Fy5CrPoGYKxcm1e4RybSYM0DtjuAyLTZNtmV835OzEPDBFUqyrq SP4iHU9jA1LT2sl+KK+ESjASIyD89sQDzeuxKzvTENcjGodQtL9WfYGGJan4SulHxDKM Z86QD/9ZEX5dLUHqBxFGyc8SFDHkqsbqGvLRpW+bX3MyjZuZWNTACDKa4PaVu6dQAf0Q PRjA== X-Forwarded-Encrypted: i=1; AJvYcCWin2xCiNpxLhR689qV5iwjxUDCjI6I3DSRyzXF748bkk0EbJSCG9fdZF9q2tzdVbMDbZfYSHiYxQ5d3CBFvlC3@lists.infradead.org X-Gm-Message-State: AOJu0YxYzklxsVDyImY0kMsxy/sisadPi6VjJGb0rZZEBGCy47MDJ7Vp xV+ujOluqNyUUn7nYhTxVejfINYvG2OaAhWLgH/kYTy62LRBCdP1 X-Gm-Gg: ASbGnctZ3W4pUKi/hid92ge/Fy+WMwu/qbTV0A9iODQU8rJmp7kZsVmJ+Dr2UTNrlDM jFYwI8XLtxU2ux5oG9csp3YbwBcQ6REzoAio/cFuT+JQDsx+f2MYJ6dR+7dWotO4Lxh7gPA52R7 1GpYBVYa2LOqEq8tTOBBClKi1WXytNOiee1RdIfm8RfW8uOQxi8Amw+0QJFzsh9gesZhIvYQdPQ hmqlmo2WKjE4+mfAv71JVUAVdlmjpQ0fct4VHOYHouTnWG/6OFlpmk6CLkijICWfeB1pVEqWcRc 3XVKon8+lzpAwi0I X-Google-Smtp-Source: AGHT+IE97aEIk8J5W1tlC12SvmYrsDcjP5pgG5OzlyrxMufGM7t3dgewYKr55GaKek+1e4q6nn56sw== X-Received: by 2002:a05:6a21:4cc5:b0:1ea:f941:8da0 with SMTP id adf61e73a8af0-1ed7a640c2cmr37123084637.24.1738586927673; Mon, 03 Feb 2025 04:48:47 -0800 (PST) Received: from nick-mbp.. ([59.188.211.160]) by smtp.googlemail.com with ESMTPSA id 41be03b00d2f7-acebddbb0d4sm7835225a12.10.2025.02.03.04.48.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Feb 2025 04:48:47 -0800 (PST) From: Nick Chan To: Hector Martin , Sven Peter , Alyssa Rosenzweig , Rob Herring , Krzysztof Kozlowski , Conor Dooley , asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Nick Chan Subject: [PATCH RESEND 5/9] arm64: dts: apple: s8001: Add cpufreq nodes Date: Mon, 3 Feb 2025 20:43:44 +0800 Message-ID: <20250203124747.41541-6-towinchenmi@gmail.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250203124747.41541-1-towinchenmi@gmail.com> References: <20250203124747.41541-1-towinchenmi@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250203_044848_232437_11F9453A X-CRM114-Status: GOOD ( 10.88 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add cpufreq nodes for Apple A9X SoC. Signed-off-by: Nick Chan --- arch/arm64/boot/dts/apple/s8001.dtsi | 59 ++++++++++++++++++++++++++++ 1 file changed, 59 insertions(+) diff --git a/arch/arm64/boot/dts/apple/s8001.dtsi b/arch/arm64/boot/dts/apple/s8001.dtsi index 23ee3238844d..7f7cb8afd3d3 100644 --- a/arch/arm64/boot/dts/apple/s8001.dtsi +++ b/arch/arm64/boot/dts/apple/s8001.dtsi @@ -32,6 +32,8 @@ cpu0: cpu@0 { compatible = "apple,twister"; reg = <0x0 0x0>; cpu-release-addr = <0 0>; /* To be filled in by loader */ + operating-points-v2 = <&twister_opp>; + performance-domains = <&cpufreq>; enable-method = "spin-table"; device_type = "cpu"; }; @@ -40,11 +42,62 @@ cpu1: cpu@1 { compatible = "apple,twister"; reg = <0x0 0x1>; cpu-release-addr = <0 0>; /* To be filled in by loader */ + operating-points-v2 = <&twister_opp>; + performance-domains = <&cpufreq>; enable-method = "spin-table"; device_type = "cpu"; }; }; + twister_opp: opp-table { + compatible = "operating-points-v2"; + + opp01 { + opp-hz = /bits/ 64 <300000000>; + opp-level = <1>; + clock-latency-ns = <800>; + }; + opp02 { + opp-hz = /bits/ 64 <396000000>; + opp-level = <2>; + clock-latency-ns = <53000>; + }; + opp03 { + opp-hz = /bits/ 64 <792000000>; + opp-level = <3>; + clock-latency-ns = <18000>; + }; + opp04 { + opp-hz = /bits/ 64 <1080000000>; + opp-level = <4>; + clock-latency-ns = <21000>; + }; + opp05 { + opp-hz = /bits/ 64 <1440000000>; + opp-level = <5>; + clock-latency-ns = <25000>; + }; + opp06 { + opp-hz = /bits/ 64 <1800000000>; + opp-level = <6>; + clock-latency-ns = <33000>; + }; + opp07 { + opp-hz = /bits/ 64 <2160000000>; + opp-level = <7>; + clock-latency-ns = <45000>; + }; +#if 0 + /* Not available until CPU deep sleep is implemented */ + opp08 { + opp-hz = /bits/ 64 <2160000000>; + opp-level = <8>; + clock-latency-ns = <45000>; + turbo-mode; + }; +#endif + }; + soc { compatible = "simple-bus"; #address-cells = <2>; @@ -52,6 +105,12 @@ soc { nonposted-mmio; ranges; + cpufreq: performance-controller@202220000 { + compatible = "apple,s8000-cluster-cpufreq", "apple,t8103-cluster-cpufreq", "apple,cluster-cpufreq"; + reg = <0x2 0x02220000 0 0x1000>; + #performance-domain-cells = <0>; + }; + serial0: serial@20a0c0000 { compatible = "apple,s5l-uart"; reg = <0x2 0x0a0c0000 0x0 0x4000>; From patchwork Mon Feb 3 12:43:45 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nick Chan X-Patchwork-Id: 13957444 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 37D01C02192 for ; Mon, 3 Feb 2025 12:58:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=tjLsQQnQgoiVkYb0Cm8bLRBPR+XW6bRhPpST0RE8duM=; b=yrdKhbJx4Is0XoHGUdbuW4tL79 36MASQ4Og+KFIItanVQTBtC3IE3jIDcC4cRvVWpxV34qIYDGqhkuH5vziyCdmWQg9l+d014YPugMl 4X8sMCx3QFiEPcRgBqbu8HS6Ua03pZ+PUqnI6iofG0kPB+hT6qV5VbjUQQeY+jtl5+FJMNy1vvhnh uow60RKbhUWXTZuxff4vQR/DMFUUXz/nCOYaXXOyS/Oa7G/1KeZUv4BRyHZy0hPk+gpya1VZvAuhw KqS7sr2KjLztW3NVCuc2NO+BnAjRTzQN+lM3ianxoTWlR9aMuesv40kKU91PDq055km5xCty0RjDI Z4ns95SA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tew1Y-0000000FRuT-3d9T; Mon, 03 Feb 2025 12:58:00 +0000 Received: from mail-pl1-x633.google.com ([2607:f8b0:4864:20::633]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tevsh-0000000FPgS-0MTE for linux-arm-kernel@lists.infradead.org; Mon, 03 Feb 2025 12:48:52 +0000 Received: by mail-pl1-x633.google.com with SMTP id d9443c01a7336-2162c0f6a39so92365455ad.0 for ; Mon, 03 Feb 2025 04:48:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1738586930; x=1739191730; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=tjLsQQnQgoiVkYb0Cm8bLRBPR+XW6bRhPpST0RE8duM=; b=GGWl8vhUD0uYBgnhw0OXiKQf1KDKWO8koYsSzCbsZKTSuR1ddcMznQdQJWDP3NwNms he2ESeBNSdkbrbJRmqrqFFJljBYfDfkzIQiAbvuODOogU7iaSpkrEYyvbw0Ku4cNPR1m QUCon4HHSP4ORtWoTD50WpaJVqQ+bA0Ly/bG233jzC1YtkdZcKLFQMMLu93HH2Pne34+ hV0LF/3J296hfQfiO7xvZrPCpUzvM/kBuDt1qr/LatkPfHUFFpHdBrJN/moDY5k0F/Uf S2qQ9WsZ5wgU1yNduVrimOHqxr9XhQCU1i/bPij7rOVQSBAkxcmORts0s+RyQW3+d7wz 24+Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738586930; x=1739191730; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=tjLsQQnQgoiVkYb0Cm8bLRBPR+XW6bRhPpST0RE8duM=; b=tnBBnEbmiQDrbsccHPIX98eWSw0x+dpX2/lMeilnighrSc8aBUXmg6i4JVfQYQdNSD 3zCywfVJV3ydItaKu0EUQC69ZxQ0ciL8gVHQ47NxpRurxqmZJ6P0N+Vq2mL9LjZBfe1y iegYKaBHnf1yPATocQrRgbpn1/dyCinu1yI/b4ngpuiJnhjiTRD6FO+troZ8ZNxO0pW+ Fefh0zdV5QNz5VK67wyKx6fHdBr8rtZg5tsAOCDp3DwZzW8HKBxjKb+hNCqvJuyouwsY nivrFQt5LLVO0SumJRjK2aPfFZAyv3fB2HG90Rr83ZSf/iWgYdrX3C6jXH2aW2Fv5BY9 n1Uw== X-Forwarded-Encrypted: i=1; AJvYcCWt3OyaLZzjY28LI/6lnsGYdOFPVhsTEwj2xghByfLnkNsoBADh6oiH2IBthI7sFuy5yOAQIJdnLW9C79VIQRbE@lists.infradead.org X-Gm-Message-State: AOJu0Yx0UGVuBJIJO/ZlUS8o7sfsdCjN6QrjyJ/WhYI1OUc+HHpHtTYz JE+igXRLNEHQ64vgN+hx2TdN5TKYXSjhqGxjIzFhwj9VauE0n2AH X-Gm-Gg: ASbGncuO8x8wbtrwO1qMmohc6Hz/VNTuVonVqY1u5sVhzQkBEskarmKJnFL0t93s9Tn 43gX0ykhXn0hEJS9sCr+7K7XGCMFUuDz8YL6AcxMo+ezfQAmom2LizNknvEpFxyOw/iaOoP2Fg9 bhNAcQFZ1LdkUeDh+sy8xPP7hYNo2mFOROlxS3kAnfd48Xrb2JwS72dDoVKpj4VEkgu7cp3q0RI 8paOm3Wn4AuSzPlviR7Z7vyHO09ytZOYh/6p6+O8I9vX8t+ESTQ1XTnUeYTIR6ksScUSuK7YSz4 M023vdi1yO4v7q7n X-Google-Smtp-Source: AGHT+IG2gJDQV9ByXKH3jCoAUfKcG9AffDalAhNUFxq2O5PchU6Ikr4yuxy3gHVej9DOE0y0Nn8ySA== X-Received: by 2002:a05:6a20:12d2:b0:1ed:d35e:b6d7 with SMTP id adf61e73a8af0-1edd35eb796mr845104637.5.1738586930412; Mon, 03 Feb 2025 04:48:50 -0800 (PST) Received: from nick-mbp.. ([59.188.211.160]) by smtp.googlemail.com with ESMTPSA id 41be03b00d2f7-acebddbb0d4sm7835225a12.10.2025.02.03.04.48.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Feb 2025 04:48:50 -0800 (PST) From: Nick Chan To: Hector Martin , Sven Peter , Alyssa Rosenzweig , Rob Herring , Krzysztof Kozlowski , Conor Dooley , asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Nick Chan Subject: [PATCH RESEND 6/9] arm64: dts: apple: t8010: Add cpufreq nodes Date: Mon, 3 Feb 2025 20:43:45 +0800 Message-ID: <20250203124747.41541-7-towinchenmi@gmail.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250203124747.41541-1-towinchenmi@gmail.com> References: <20250203124747.41541-1-towinchenmi@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250203_044851_122451_D10415B0 X-CRM114-Status: GOOD ( 13.81 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add cpufreq nodes for Apple A10 SoC. There is a transparent hardware big.LITTLE switcher in this SoC. Spoof E-core p-state frequencies such that CPU capacity does not appear to change when switching between core types. Signed-off-by: Nick Chan --- arch/arm64/boot/dts/apple/t8010-7.dtsi | 8 ++ arch/arm64/boot/dts/apple/t8010-ipad6.dtsi | 8 ++ arch/arm64/boot/dts/apple/t8010.dtsi | 86 ++++++++++++++++++++++ 3 files changed, 102 insertions(+) diff --git a/arch/arm64/boot/dts/apple/t8010-7.dtsi b/arch/arm64/boot/dts/apple/t8010-7.dtsi index 1332fd73f50f..919e067ef073 100644 --- a/arch/arm64/boot/dts/apple/t8010-7.dtsi +++ b/arch/arm64/boot/dts/apple/t8010-7.dtsi @@ -41,3 +41,11 @@ switch-mute { }; }; }; + +&hurricane_opp09 { + status = "okay"; +}; + +&hurricane_opp10 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/apple/t8010-ipad6.dtsi b/arch/arm64/boot/dts/apple/t8010-ipad6.dtsi index 81696c6e302c..4ea8cf12e430 100644 --- a/arch/arm64/boot/dts/apple/t8010-ipad6.dtsi +++ b/arch/arm64/boot/dts/apple/t8010-ipad6.dtsi @@ -42,3 +42,11 @@ button-volup { }; }; }; + +&hurricane_opp09 { + status = "okay"; +}; + +&hurricane_opp10 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/apple/t8010.dtsi b/arch/arm64/boot/dts/apple/t8010.dtsi index e3d6a8354103..2547e8c60cad 100644 --- a/arch/arm64/boot/dts/apple/t8010.dtsi +++ b/arch/arm64/boot/dts/apple/t8010.dtsi @@ -32,6 +32,8 @@ cpu0: cpu@0 { compatible = "apple,hurricane-zephyr"; reg = <0x0 0x0>; cpu-release-addr = <0 0>; /* To be filled by loader */ + operating-points-v2 = <&fusion_opp>; + performance-domains = <&cpufreq>; enable-method = "spin-table"; device_type = "cpu"; }; @@ -40,11 +42,89 @@ cpu1: cpu@1 { compatible = "apple,hurricane-zephyr"; reg = <0x0 0x1>; cpu-release-addr = <0 0>; /* To be filled by loader */ + operating-points-v2 = <&fusion_opp>; + performance-domains = <&cpufreq>; enable-method = "spin-table"; device_type = "cpu"; }; }; + fusion_opp: opp-table { + compatible = "operating-points-v2"; + + /* + * Apple Fusion Architecture: Hardware big.LITTLE switcher + * that use p-state transitions to switch between cores. + * Only one type of core can be active at a given time. + * + * The E-core frequencies are adjusted so performance scales + * linearly with reported clock speed. + */ + + opp01 { + opp-hz = /bits/ 64 <172000000>; /* 300 MHz, E-core */ + opp-level = <1>; + clock-latency-ns = <11000>; + }; + opp02 { + opp-hz = /bits/ 64 <230000000>; /* 396 MHz, E-core */ + opp-level = <2>; + clock-latency-ns = <49000>; + }; + opp03 { + opp-hz = /bits/ 64 <425000000>; /* 732 MHz, E-core */ + opp-level = <3>; + clock-latency-ns = <13000>; + }; + opp04 { + opp-hz = /bits/ 64 <637000000>; /* 1092 MHz, E-core */ + opp-level = <4>; + clock-latency-ns = <18000>; + }; + opp05 { + opp-hz = /bits/ 64 <756000000>; + opp-level = <5>; + clock-latency-ns = <35000>; + }; + opp06 { + opp-hz = /bits/ 64 <1056000000>; + opp-level = <6>; + clock-latency-ns = <31000>; + }; + opp07 { + opp-hz = /bits/ 64 <1356000000>; + opp-level = <7>; + clock-latency-ns = <37000>; + }; + opp08 { + opp-hz = /bits/ 64 <1644000000>; + opp-level = <8>; + clock-latency-ns = <39500>; + }; + hurricane_opp09: opp09 { + opp-hz = /bits/ 64 <1944000000>; + opp-level = <9>; + clock-latency-ns = <46000>; + status = "disabled"; /* Not available on N112 */ + }; + hurricane_opp10: opp10 { + opp-hz = /bits/ 64 <2244000000>; + opp-level = <10>; + clock-latency-ns = <56000>; + status = "disabled"; /* Not available on N112 */ + }; +#if 0 + /* Not available until CPU deep sleep is implemented */ + hurricane_opp11: opp11 { + opp-hz = /bits/ 64 <2340000000>; + opp-level = <11>; + clock-latency-ns = <56000>; + turbo-mode; + status = "disabled"; /* Not available on N112 */ + }; +#endif + }; + soc { compatible = "simple-bus"; #address-cells = <2>; @@ -52,6 +132,12 @@ soc { nonposted-mmio; ranges; + cpufreq: performance-controller@202f20000 { + compatible = "apple,t8010-cluster-cpufreq", "apple,t8103-cluster-cpufreq", "apple,cluster-cpufreq"; + reg = <0x2 0x02f20000 0 0x1000>; + #performance-domain-cells = <0>; + }; + serial0: serial@20a0c0000 { compatible = "apple,s5l-uart"; reg = <0x2 0x0a0c0000 0x0 0x4000>; From patchwork Mon Feb 3 12:43:46 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nick Chan X-Patchwork-Id: 13957449 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9B8B1C02192 for ; Mon, 3 Feb 2025 12:59:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=YJUClOvadSj6QX58oHurrlBpkJQ7IYPBO0FnNkQK6nA=; b=VgdQwMdjh1jTOi8ZbtKinujUeZ 54TO/qra507dl33iayWxYFih5GCqSd82pOxta0g6VFhztGVlluy7OqvMpFCOUxJWc8J1Y2E/iGv9o DtmxmCo7Tim/Nqi/FLsj7RLia4ubTnsuMiN+m5tgM1LSS1oVxHcdTgAVCP6oFqKa4T6TFblg2mFTv UTI98xMvM8Hq4C0a9xqit369wMAriUJFriPh80UYmTpU6LvqubRbY6VOuRouf0FGRBg/Qe6wXborj 8dHzkttx6Jd4/BGlvKm9JS2IjucWhw4WJ0USvzL59i+SAe6bzShFIOFwVdLFMuRqIPVzdvqAS/5Qo PpZ9Jd8A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tew2r-0000000FS6v-23Bz; Mon, 03 Feb 2025 12:59:21 +0000 Received: from mail-pl1-x634.google.com ([2607:f8b0:4864:20::634]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tevsj-0000000FPhf-3789 for linux-arm-kernel@lists.infradead.org; Mon, 03 Feb 2025 12:48:54 +0000 Received: by mail-pl1-x634.google.com with SMTP id d9443c01a7336-21636268e43so95283895ad.2 for ; Mon, 03 Feb 2025 04:48:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1738586933; x=1739191733; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=YJUClOvadSj6QX58oHurrlBpkJQ7IYPBO0FnNkQK6nA=; b=kImjar73HGYCqaiCe1zQ8iMuaP9MvSW/Zoptgzm+pj5zUq4j6/7vYc9O4bw18t44Na ZUfi6EP0jmBo6NTobuJ+RQ4ejlB9urFnwrYuVx78c8IJH1a2a0mxx7HYPzRawraMI05z RWefdC3yjTBDusd6khUtDq5lpBcqSpMS+trTdI2oOjVGIPfYcVTpON01kkoabWtetSpY ZI+0zzZB2/NgbmivIz+xYtAq1BvfKNttzjIlYAo1gujsQ7eTZy+OtNY5F/+iPPT8ZjGF /Iwy8Ufef+EgKrjkaqqd1nIbJwwtEols19ygrH8eTOMqYT4hd2GpbKsF0hXxg0IcsDLi uEbA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738586933; x=1739191733; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=YJUClOvadSj6QX58oHurrlBpkJQ7IYPBO0FnNkQK6nA=; b=fDWQiWww1gS/kU02f+BaidpnxGqsA8KcqowWsaSBatYqk+ERLXKQOq8Q7eMGRaELmf CngwBqIPlLbR2RxmgwmKWPEgDgPnHQwmzi3Eq7C6LEimeX7lRvBmn8m9HnCcpxKNDhca BrH6i3O7pgCCy1FNIP1a6Mrx/pK5A2VUrM5qFteOY0j7jz82J3xVjSgr/dPWl47nC4fQ F07cBxbUDUgDFdHWQx+iy6G1lKGKYrTwm+Lxh8nGjcBNI+OfRCDBiKKtUzqTPp4tFkgj FwjJbNSB83lNgGWZ+3YbKr+Sb3pqVS2uzFBFeQ6ut8g7ZhV0ktLNw4Z0ejqekIdDi0/D FFdQ== X-Forwarded-Encrypted: i=1; AJvYcCX5285sRIK6PwIBGQBtlUVfswBIjCIuyDaS4E8++Zxye58EWP7Fh2ZvdFt+Ex0zakfuiu50gJhbHdm+ooLqj6nM@lists.infradead.org X-Gm-Message-State: AOJu0Yz7Th/9J5OhPxFX78aY080mKmYKNNbfXcFQTZdpnFAIbnJ0JPnu MhNTSub3eEqVBFr4mYomlPVrJyRFKZEqGBnVKLW0sqBYDxVpepGZurg5JG5g X-Gm-Gg: ASbGncvs2HxXlVo+pn98aRYKDLADKDWz8tuIQgLLBn8d8+Dwl4cJ88uNrrBT8vcINCY eQhNwhQw03adVakZJKnhz1pejY/NNmHkah852HEVABWtQ5er980HchDbrhTDH/2nX5eqp8cG/id hrQgj/ThJ4r3QNer8K+N1umVekImlQLvWaTaK7iHJNvjSWqdHheghTbXkESTLbs/SEK0PK2mRfb TR75I2SA5UIE9D2IYNqDoiXyTk5QtoamtNz6cW8GWYVObld4afD+Wa7fFvky+XUnVF+R5Svvdq1 Idpw86gDEH0HJ5BP X-Google-Smtp-Source: AGHT+IHLS6dbll/fZOAVWOMkLyYlVa8KGHl3l8e4OXqDcFOAKzegus2Ld1uPVya/4zL+Xr1xYMnk0g== X-Received: by 2002:a05:6a21:6d88:b0:1e1:ac4f:d322 with SMTP id adf61e73a8af0-1ed7a5f947dmr39422757637.14.1738586933175; Mon, 03 Feb 2025 04:48:53 -0800 (PST) Received: from nick-mbp.. ([59.188.211.160]) by smtp.googlemail.com with ESMTPSA id 41be03b00d2f7-acebddbb0d4sm7835225a12.10.2025.02.03.04.48.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Feb 2025 04:48:52 -0800 (PST) From: Nick Chan To: Hector Martin , Sven Peter , Alyssa Rosenzweig , Rob Herring , Krzysztof Kozlowski , Conor Dooley , asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Nick Chan Subject: [PATCH RESEND 7/9] arm64: dts: apple: t8011: Add cpufreq nodes Date: Mon, 3 Feb 2025 20:43:46 +0800 Message-ID: <20250203124747.41541-8-towinchenmi@gmail.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250203124747.41541-1-towinchenmi@gmail.com> References: <20250203124747.41541-1-towinchenmi@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250203_044853_777930_6DC131E3 X-CRM114-Status: GOOD ( 12.54 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add cpufreq nodes for Apple A10 SoC. There is a transparent hardware big.LITTLE switcher in this SoC. Spoof E-core p-state frequencies such that CPU capacity does not appear to change when switching between core types. Signed-off-by: Nick Chan --- arch/arm64/boot/dts/apple/t8011.dtsi | 79 ++++++++++++++++++++++++++++ 1 file changed, 79 insertions(+) diff --git a/arch/arm64/boot/dts/apple/t8011.dtsi b/arch/arm64/boot/dts/apple/t8011.dtsi index 6c4ed9dc4a50..3a3d5b615a6a 100644 --- a/arch/arm64/boot/dts/apple/t8011.dtsi +++ b/arch/arm64/boot/dts/apple/t8011.dtsi @@ -32,6 +32,8 @@ cpu0: cpu@0 { compatible = "apple,hurricane-zephyr"; reg = <0x0 0x0>; cpu-release-addr = <0 0>; /* To be filled by loader */ + operating-points-v2 = <&fusion_opp>; + performance-domains = <&cpufreq>; enable-method = "spin-table"; device_type = "cpu"; }; @@ -40,6 +42,8 @@ cpu1: cpu@1 { compatible = "apple,hurricane-zephyr"; reg = <0x0 0x1>; cpu-release-addr = <0 0>; /* To be filled by loader */ + operating-points-v2 = <&fusion_opp>; + performance-domains = <&cpufreq>; enable-method = "spin-table"; device_type = "cpu"; }; @@ -48,11 +52,80 @@ cpu2: cpu@2 { compatible = "apple,hurricane-zephyr"; reg = <0x0 0x2>; cpu-release-addr = <0 0>; /* To be filled by loader */ + operating-points-v2 = <&fusion_opp>; + performance-domains = <&cpufreq>; enable-method = "spin-table"; device_type = "cpu"; }; }; + fusion_opp: opp-table { + compatible = "operating-points-v2"; + + /* + * Apple Fusion Architecture: Hardwired big.LITTLE switcher + * that use p-state transitions to switch between cores. + * + * The E-core frequencies are adjusted so performance scales + * linearly with reported clock speed. + */ + + opp01 { + opp-hz = /bits/ 64 <172000000>; /* 300 MHz, E-core */ + opp-level = <1>; + clock-latency-ns = <12000>; + }; + opp02 { + opp-hz = /bits/ 64 <230000000>; /* 396 MHz, E-core */ + opp-level = <2>; + clock-latency-ns = <135000>; + }; + opp03 { + opp-hz = /bits/ 64 <448000000>; /* 768 MHz, E-core */ + opp-level = <3>; + clock-latency-ns = <105000>; + }; + opp04 { + opp-hz = /bits/ 64 <662000000>; /* 1152 MHz, E-core */ + opp-level = <4>; + clock-latency-ns = <115000>; + }; + opp05 { + opp-hz = /bits/ 64 <804000000>; + opp-level = <5>; + clock-latency-ns = <122000>; + }; + opp06 { + opp-hz = /bits/ 64 <1140000000>; + opp-level = <6>; + clock-latency-ns = <120000>; + }; + opp07 { + opp-hz = /bits/ 64 <1548000000>; + opp-level = <7>; + clock-latency-ns = <125000>; + }; + opp08 { + opp-hz = /bits/ 64 <1956000000>; + opp-level = <8>; + clock-latency-ns = <135000>; + }; + opp09 { + opp-hz = /bits/ 64 <2316000000>; + opp-level = <9>; + clock-latency-ns = <140000>; + }; +#if 0 + /* Not available until CPU deep sleep is implemented */ + opp10 { + opp-hz = /bits/ 64 <2400000000>; + opp-level = <10>; + clock-latency-ns = <140000>; + turbo-mode; + }; +#endif + }; + soc { compatible = "simple-bus"; #address-cells = <2>; @@ -60,6 +133,12 @@ soc { nonposted-mmio; ranges; + cpufreq: performance-controller@202f20000 { + compatible = "apple,t8010-cluster-cpufreq", "apple,t8103-cluster-cpufreq", "apple,cluster-cpufreq"; + reg = <0x2 0x02f20000 0 0x1000>; + #performance-domain-cells = <0>; + }; + serial0: serial@20a0c0000 { compatible = "apple,s5l-uart"; reg = <0x2 0x0a0c0000 0x0 0x4000>; From patchwork Mon Feb 3 12:43:47 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nick Chan X-Patchwork-Id: 13957450 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C4CD3C02194 for ; Mon, 3 Feb 2025 13:00:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=8lIMfLDS7ciYVJaacV/5/yNLSo2GoGCnILtlvH/Xs18=; b=n2z/WtyK9vublzEqLaUF7hp31b 0WK3Gi1vG7PeTgLh+Df5PUZGf3JQAuIasK7o/1+Ire0QVADmzvniiQpQEYk2QX42rUCs2IfwDvIzy qaF4dTqWTIlxTwVLjdQXmPhopNz/MGK9pIx6cnGkxxP9MCIu2pP+TNZKppkMAPWA5G24qB7tZ+Nba 9cGWIPNzg+Ru491gxgzLUWzkEYv6XS08uc2y6naN6AGpsn/Aq0IWVDW72IqtbOSBQaCOsN8VG++T2 d7kmwODmEjeGvqwkaQQenoB+W9SU2jGZyDGZ4zV0pajO/nV5YDvgf3CFylK90J4D20Q45VcBn1D21 axH/iVYg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tew4A-0000000FSKv-0uoK; Mon, 03 Feb 2025 13:00:42 +0000 Received: from mail-pl1-x629.google.com ([2607:f8b0:4864:20::629]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tevsm-0000000FPiz-31fx for linux-arm-kernel@lists.infradead.org; Mon, 03 Feb 2025 12:48:57 +0000 Received: by mail-pl1-x629.google.com with SMTP id d9443c01a7336-21628b3fe7dso76580275ad.3 for ; Mon, 03 Feb 2025 04:48:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1738586936; x=1739191736; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=8lIMfLDS7ciYVJaacV/5/yNLSo2GoGCnILtlvH/Xs18=; b=m6QR/SFyXkU8RCUTeO43sBmg+Y4SwjEvTW+BZFqZ+PA8AdjajSAO3E3jxaR+C3cRpb VavNE9igwbzq3FvaLhS3u9jnkThMfX9B4UXIFDpXEf1QaQ0fmM3F1pBrf73DqxZ7ae7F oQaRiTcYw7BWuWuAz0lR9kNcErkfHxJ7zFcWVQBxUWWEZOwVxGF9cD7LJStTSX8iaM56 yisWXjGky7oJ65S8AbZdMKIKnEZeEd8uYFUKuyomOXLgTDfERRYdn7LDALf/n6Qajepn RC4BVRkQYS4LQ/IM0Dbptkn1QggsiDDNMDzlRZat/iuz1ljTaU9rnDZ5f0TzicvHXMJl J3Aw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738586936; x=1739191736; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=8lIMfLDS7ciYVJaacV/5/yNLSo2GoGCnILtlvH/Xs18=; b=Uzyxq9SV32S5CoN3IvzdoQS+WEv1q+EpWPdttfDAFaTgV38dQP0Ztxx5mzXQRtRKNQ slwZxdlc2tAvU7xSarD9amv+F1h1FyVci1yfj4MlW6bDnRTKnE49cV4GxXva0DvmuZz5 hGJR55dxvr+1LzDH+xy3GgHzsG8etrBSr08P98AIFYH7iC6sWmsan3yO+B9Q1GhLnF5S pO8oYKwMoRnKegH3iFXE0++pRYzFNnsbFEwOyraNrswEohZrhQZYvdrtvhNjxT3VC4if EQknEGZ4MYXfF9o+ZoPwCh4t2LPZMib7/Y3VXy8jg3BkHNdmXgFVwkmMW7g361linVSh 0x5A== X-Forwarded-Encrypted: i=1; AJvYcCWfyi3nO5SVtqijmtb140p3K+tVgRET2mqTkHfNXTOdbKqo8EAnp3F7nSNnqUCD/kywzZO8NzifMjf52MH0vkMR@lists.infradead.org X-Gm-Message-State: AOJu0Yxed08/YjfNV1qXnF4eVC0hu/FUE1ENpJQ4r/zlTbT0QzZtuJjN A6+f03shliPLu6LZHh/38Fdw+O6AlPtNBJoh2fxdWrIZPces9qDs X-Gm-Gg: ASbGncsW2owe+JGeYfIzDO6noVzuGsfmoN1MLL6PZueGO+IjPlNIbxY2uSolnS2LxMt QnrmhJMdL0/5GQyuRIa0OM4LH8iggpvIgcdude3Wfs6Z8fsQ+gJULVNeOBrcENb9Ul45M9yLRD+ 6YpcBhKZGj6yrndbvvL/CH3ohTwMMY+1ciqvLEr2YQ712oUF/raYO1/dL+22OcgV2Wz/m2OGe5l 9SER7SF7lMSjNnBSyukSakF3sNGt6NRd78Vbp0oOF29BzcV7lvPxroLjcaaA/pojCIVX39diDne l4u6MYiZ//MGRrgg X-Google-Smtp-Source: AGHT+IE5O/mt84A13nB307MWJ2yfB1DTRAXfmTvFWwSh6qD7FLx3uNUv+6iuiz/FJYYQN/49HMcc7Q== X-Received: by 2002:a05:6a00:3a19:b0:727:d55e:4bee with SMTP id d2e1a72fcca58-72fd0bcdb7fmr27092002b3a.1.1738586935972; Mon, 03 Feb 2025 04:48:55 -0800 (PST) Received: from nick-mbp.. ([59.188.211.160]) by smtp.googlemail.com with ESMTPSA id 41be03b00d2f7-acebddbb0d4sm7835225a12.10.2025.02.03.04.48.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Feb 2025 04:48:55 -0800 (PST) From: Nick Chan To: Hector Martin , Sven Peter , Alyssa Rosenzweig , Rob Herring , Krzysztof Kozlowski , Conor Dooley , asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Nick Chan Subject: [PATCH RESEND 8/9] arm64: dts: apple: t8012: Add cpufreq nodes Date: Mon, 3 Feb 2025 20:43:47 +0800 Message-ID: <20250203124747.41541-9-towinchenmi@gmail.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250203124747.41541-1-towinchenmi@gmail.com> References: <20250203124747.41541-1-towinchenmi@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250203_044856_757570_09038A58 X-CRM114-Status: GOOD ( 12.86 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add cpufreq nodes for Apple A10 SoC. There is a transparent hardware big.LITTLE switcher in this SoC. Spoof E-core p-state frequencies such that CPU capacity does not appear to change when switching between core types. Signed-off-by: Nick Chan --- arch/arm64/boot/dts/apple/t8012.dtsi | 83 ++++++++++++++++++++++++++++ 1 file changed, 83 insertions(+) diff --git a/arch/arm64/boot/dts/apple/t8012.dtsi b/arch/arm64/boot/dts/apple/t8012.dtsi index 45d24ca091b0..0a3d5a6bd047 100644 --- a/arch/arm64/boot/dts/apple/t8012.dtsi +++ b/arch/arm64/boot/dts/apple/t8012.dtsi @@ -32,6 +32,8 @@ cpu0: cpu@10000 { compatible = "apple,hurricane-zephyr"; reg = <0x0 0x10000>; cpu-release-addr = <0 0>; /* To be filled by loader */ + operating-points-v2 = <&fusion_opp>; + performance-domains = <&cpufreq>; enable-method = "spin-table"; device_type = "cpu"; }; @@ -40,11 +42,86 @@ cpu1: cpu@10001 { compatible = "apple,hurricane-zephyr"; reg = <0x0 0x10001>; cpu-release-addr = <0 0>; /* To be filled by loader */ + operating-points-v2 = <&fusion_opp>; + performance-domains = <&cpufreq>; enable-method = "spin-table"; device_type = "cpu"; }; }; + fusion_opp: opp-table { + compatible = "operating-points-v2"; + + /* + * Apple Fusion Architecture: Hardware big.LITTLE switcher + * that use p-state transitions to switch between cores. + * Only one type of core can be active at a given time. + * + * The E-core frequencies are adjusted so performance scales + * linearly with reported clock speed. + */ + + opp01 { + opp-hz = /bits/ 64 <172000000>; /* 300 MHz, E-core */ + opp-level = <1>; + clock-latency-ns = <11000>; + }; + opp02 { + opp-hz = /bits/ 64 <230000000>; /* 396 MHz, E-core */ + opp-level = <2>; + clock-latency-ns = <140000>; + }; + opp03 { + opp-hz = /bits/ 64 <425000000>; /* 732 MHz, E-core */ + opp-level = <3>; + clock-latency-ns = <110000>; + }; + opp04 { + opp-hz = /bits/ 64 <637000000>; /* 1092 MHz, E-core */ + opp-level = <4>; + clock-latency-ns = <130000>; + }; + opp05 { + opp-hz = /bits/ 64 <756000000>; + opp-level = <5>; + clock-latency-ns = <130000>; + }; + opp06 { + opp-hz = /bits/ 64 <1056000000>; + opp-level = <6>; + clock-latency-ns = <130000>; + }; + opp07 { + opp-hz = /bits/ 64 <1356000000>; + opp-level = <7>; + clock-latency-ns = <130000>; + }; + opp08 { + opp-hz = /bits/ 64 <1644000000>; + opp-level = <8>; + clock-latency-ns = <135000>; + }; + opp09 { + opp-hz = /bits/ 64 <1944000000>; + opp-level = <9>; + clock-latency-ns = <140000>; + }; + opp10 { + opp-hz = /bits/ 64 <2244000000>; + opp-level = <10>; + clock-latency-ns = <150000>; + }; +#if 0 + /* Not available until CPU deep sleep is implemented */ + opp11 { + opp-hz = /bits/ 64 <2340000000>; + opp-level = <11>; + clock-latency-ns = <150000>; + turbo-mode; + }; +#endif + }; + soc { compatible = "simple-bus"; #address-cells = <2>; @@ -52,6 +129,12 @@ soc { nonposted-mmio; ranges; + cpufreq: performance-controller@202f20000 { + compatible = "apple,t8010-cluster-cpufreq", "apple,t8103-cluster-cpufreq", "apple,cluster-cpufreq"; + reg = <0x2 0x02f20000 0 0x1000>; + #performance-domain-cells = <0>; + }; + serial0: serial@20a600000 { compatible = "apple,s5l-uart"; reg = <0x2 0x0a600000 0x0 0x4000>; From patchwork Mon Feb 3 12:43:48 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nick Chan X-Patchwork-Id: 13957451 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7D2CCC02192 for ; Mon, 3 Feb 2025 13:02:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=ByLWdj9po7I8QCmIxQThyezzisERxr+NIkivv2+pP3U=; b=UJqxOQywXIdzQVnJiulOxZTGca EfCqArm/TFg5BKQ5Yk2h2xaITVowef4nMKAp3WgADvIV3GhQdtq3La9VRpw5R7QHxD/AvmbtDpJLg GXUYc/+BT/+fWir3FswLeg6w2rvK1KeOVi3WvQquWAchtwK/mPmcEHnLWCR5HWtNH21VoZlaMzlui eyuSNP/bjEJMEE1tpPWWSRPX9rUEDSGRW/+rJEFtjhFcz7e4Y6YzUQygpQMCPiIoSHXYW5FjJY0T6 4lfpU9M+DWuJRnpk0KNJxy1hxjrhzOMUEdfYsHu+rbY880KNcWH7oL1YeQSweqBRfzodw0VXRpVMV TvomKxBA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tew5S-0000000FSaA-3Uf1; Mon, 03 Feb 2025 13:02:02 +0000 Received: from mail-pl1-x630.google.com ([2607:f8b0:4864:20::630]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tevsp-0000000FPjy-1Qk6 for linux-arm-kernel@lists.infradead.org; Mon, 03 Feb 2025 12:49:00 +0000 Received: by mail-pl1-x630.google.com with SMTP id d9443c01a7336-2166360285dso69734045ad.1 for ; Mon, 03 Feb 2025 04:48:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1738586939; x=1739191739; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ByLWdj9po7I8QCmIxQThyezzisERxr+NIkivv2+pP3U=; b=FVcZdLtdcbdaLRPIDfksCsd0q8i+lJbGDgGdOATX6FZJClcPPJXJHEg2q/CUTbPFUV uIh38b0ybKoj3fXQo51CwXOkX61UHoBgTV8Vgc6LY8cSGb9zkqMKwS5HvDlwI/6K1KxF QTunmfNb7FF6xDLCPGag4MsVgrXao6Y3Ej9Bb1NxgmL7FsYJu32W4zm0gdidg99qMDkN BCQ9L8sQTDi+wDEKbFfymIdqenhOH3Osini7eGq4PL4L6QgT4O+7S/QJ2QF9opYXFcSx +GS9Z8+utttcFgi+zHSHIIJbXIWlqM6l/D3y6eToCCXG6RXaS5ScSsMcRljH2Psckhvj 9x1w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738586939; x=1739191739; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ByLWdj9po7I8QCmIxQThyezzisERxr+NIkivv2+pP3U=; b=f6f4DC3zlgZ1JTRLQ4pK5RKQmHTJuA3S8ACUBabl2/GK15Jztko3CgmRYSWy3DG3Fx qB55lnmhPYTf9LewrL5Cus1FM7ZkGyhaqWo5ajrvMckJNXgKsr33Dtvk52jiRQ8s4+n1 7i32ofK050LH4KXpsvCN/soHcWw5cNI0YZ6klUwQF6poOoZtcen0cPsKCLmTPvoC9vP5 /gzNc4NmNoDfN/ML542yJ4lcGpuJrTqbUrkOuBdEmYG4nN3gNQZh/JEHM7VF1TmDhib7 GfeUQXOr4L53ihjdVLcclPJ/zMU8Xt9bt/X2bUfemCJX7pwa4div7wQHpMfnTs2orpGP crLg== X-Forwarded-Encrypted: i=1; AJvYcCVclnHeOSRbSeL8nzr1mKPFkdkGnZ54u4Uvq3pgNAzP0GEYVFH/J94fR/0VrPBYE/FiB7xqQMe3gps1X7JYdNi9@lists.infradead.org X-Gm-Message-State: AOJu0YxSvBsrLv7/EpRW2Qhd6/nolWM7vwtqCaFlLhCVX4cYb+3U3/Tk mw24sDxJMOcFaVI1UGwMFKv3sI55OlKMUY2mwdUyAcphvKcnU2ob X-Gm-Gg: ASbGnctswJprBx140ONoPqLqEwwnccDUgqMVODHljsK2itqE4sAonXpWvQ8iEhoPWtV 416anZx018R8M31mWnfxXhCVSsZv8gBWXrfchb2TCMHd2tSrj4VNfA64+7rlc9nHt57ekyVtkpG U0RCRm7d4GUh0JShfLGr8TOx51QRjKcUmzs/0GOwBG6AnGfwj42iOyuIUqsSDsK2tcjPGTsnhjf ph+4YPHltU0t4KCtv0+tYMgVYF4APrYrZ1EJDZvkmbdTvLJZ1rZs7OwCwbAwkV6IFk/6z8MUxYo rNrrvOZvBG0Kcn14 X-Google-Smtp-Source: AGHT+IE+t0KDXYMwTSpBWi+pdAH/0ma6AXc8iXrbj2Cn/KnYaFBskDaPtkynAvbjwmSIRdQbgXHSCg== X-Received: by 2002:a05:6a20:6a1a:b0:1e3:e6f3:6372 with SMTP id adf61e73a8af0-1ed7a6b78a2mr35007064637.27.1738586938754; Mon, 03 Feb 2025 04:48:58 -0800 (PST) Received: from nick-mbp.. ([59.188.211.160]) by smtp.googlemail.com with ESMTPSA id 41be03b00d2f7-acebddbb0d4sm7835225a12.10.2025.02.03.04.48.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Feb 2025 04:48:58 -0800 (PST) From: Nick Chan To: Hector Martin , Sven Peter , Alyssa Rosenzweig , Rob Herring , Krzysztof Kozlowski , Conor Dooley , asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Nick Chan Subject: [PATCH RESEND 9/9] arm64: dts: apple: t8015: Add cpufreq nodes Date: Mon, 3 Feb 2025 20:43:48 +0800 Message-ID: <20250203124747.41541-10-towinchenmi@gmail.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250203124747.41541-1-towinchenmi@gmail.com> References: <20250203124747.41541-1-towinchenmi@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250203_044859_378374_43924228 X-CRM114-Status: GOOD ( 10.82 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add cpufreq nodes for Apple A11 SoC. Signed-off-by: Nick Chan --- arch/arm64/boot/dts/apple/t8015.dtsi | 123 +++++++++++++++++++++++++++ 1 file changed, 123 insertions(+) diff --git a/arch/arm64/boot/dts/apple/t8015.dtsi b/arch/arm64/boot/dts/apple/t8015.dtsi index 8828d830e5be..f93ce2c8b251 100644 --- a/arch/arm64/boot/dts/apple/t8015.dtsi +++ b/arch/arm64/boot/dts/apple/t8015.dtsi @@ -58,6 +58,9 @@ cpu_e0: cpu@0 { compatible = "apple,mistral"; reg = <0x0 0x0>; cpu-release-addr = <0 0>; /* To be filled by loader */ + performance-domains = <&cpufreq_e>; + operating-points-v2 = <&mistral_opp>; + capacity-dmips-mhz = <633>; enable-method = "spin-table"; device_type = "cpu"; }; @@ -66,6 +69,9 @@ cpu_e1: cpu@1 { compatible = "apple,mistral"; reg = <0x0 0x1>; cpu-release-addr = <0 0>; /* To be filled by loader */ + performance-domains = <&cpufreq_e>; + operating-points-v2 = <&mistral_opp>; + capacity-dmips-mhz = <633>; enable-method = "spin-table"; device_type = "cpu"; }; @@ -74,6 +80,9 @@ cpu_e2: cpu@2 { compatible = "apple,mistral"; reg = <0x0 0x2>; cpu-release-addr = <0 0>; /* To be filled by loader */ + performance-domains = <&cpufreq_e>; + operating-points-v2 = <&mistral_opp>; + capacity-dmips-mhz = <633>; enable-method = "spin-table"; device_type = "cpu"; }; @@ -82,6 +91,9 @@ cpu_e3: cpu@3 { compatible = "apple,mistral"; reg = <0x0 0x3>; cpu-release-addr = <0 0>; /* To be filled by loader */ + performance-domains = <&cpufreq_e>; + operating-points-v2 = <&mistral_opp>; + capacity-dmips-mhz = <633>; enable-method = "spin-table"; device_type = "cpu"; }; @@ -90,6 +102,9 @@ cpu_p0: cpu@10004 { compatible = "apple,monsoon"; reg = <0x0 0x10004>; cpu-release-addr = <0 0>; /* To be filled by loader */ + performance-domains = <&cpufreq_p>; + operating-points-v2 = <&monsoon_opp>; + capacity-dmips-mhz = <1024>; enable-method = "spin-table"; device_type = "cpu"; }; @@ -98,11 +113,107 @@ cpu_p1: cpu@10005 { compatible = "apple,monsoon"; reg = <0x0 0x10005>; cpu-release-addr = <0 0>; /* To be filled by loader */ + performance-domains = <&cpufreq_p>; + operating-points-v2 = <&monsoon_opp>; + capacity-dmips-mhz = <1024>; enable-method = "spin-table"; device_type = "cpu"; }; }; + mistral_opp: opp-table-0 { + compatible = "operating-points-v2"; + + opp01 { + opp-hz = /bits/ 64 <300000000>; + opp-level = <1>; + clock-latency-ns = <1800>; + }; + opp02 { + opp-hz = /bits/ 64 <453000000>; + opp-level = <2>; + clock-latency-ns = <140000>; + }; + opp03 { + opp-hz = /bits/ 64 <672000000>; + opp-level = <3>; + clock-latency-ns = <105000>; + }; + opp04 { + opp-hz = /bits/ 64 <972000000>; + opp-level = <4>; + clock-latency-ns = <115000>; + }; + opp05 { + opp-hz = /bits/ 64 <1272000000>; + opp-level = <5>; + clock-latency-ns = <125000>; + }; + opp06 { + opp-hz = /bits/ 64 <1572000000>; + opp-level = <6>; + clock-latency-ns = <135000>; + }; +#if 0 + /* Not available until CPU deep sleep is implemented */ + opp07 { + opp-hz = /bits/ 64 <1680000000>; + opp-level = <7>; + clock-latency-ns = <135000>; + turbo-mode; + }; +#endif + }; + + monsoon_opp: opp-table-1 { + compatible = "operating-points-v2"; + + opp01 { + opp-hz = /bits/ 64 <300000000>; + opp-level = <1>; + clock-latency-ns = <1400>; + }; + opp02 { + opp-hz = /bits/ 64 <453000000>; + opp-level = <2>; + clock-latency-ns = <140000>; + }; + opp03 { + opp-hz = /bits/ 64 <853000000>; + opp-level = <3>; + clock-latency-ns = <110000>; + }; + opp04 { + opp-hz = /bits/ 64 <1332000000>; + opp-level = <4>; + clock-latency-ns = <110000>; + }; + opp05 { + opp-hz = /bits/ 64 <1812000000>; + opp-level = <5>; + clock-latency-ns = <125000>; + }; + opp06 { + opp-hz = /bits/ 64 <2064000000>; + opp-level = <6>; + clock-latency-ns = <130000>; + }; + opp07 { + opp-hz = /bits/ 64 <2304000000>; + opp-level = <7>; + clock-latency-ns = <140000>; + }; +#if 0 + /* Not available until CPU deep sleep is implemented */ + opp08 { + opp-hz = /bits/ 64 <2376000000>; + opp-level = <8>; + clock-latency-ns = <140000>; + turbo-mode; + }; +#endif + }; + soc { compatible = "simple-bus"; #address-cells = <2>; @@ -110,6 +221,18 @@ soc { nonposted-mmio; ranges; + cpufreq_e: performance-controller@208e20000 { + compatible = "apple,t8015-cluster-cpufreq", "apple,t8103-cluster-cpufreq", "apple,cluster-cpufreq"; + reg = <0x2 0x08e20000 0 0x1000>; + #performance-domain-cells = <0>; + }; + + cpufreq_p: performance-controller@208ea0000 { + compatible = "apple,t8015-cluster-cpufreq", "apple,t8103-cluster-cpufreq", "apple,cluster-cpufreq"; + reg = <0x2 0x08ea0000 0 0x1000>; + #performance-domain-cells = <0>; + }; + serial0: serial@22e600000 { compatible = "apple,s5l-uart"; reg = <0x2 0x2e600000 0x0 0x4000>;