From patchwork Mon Feb 3 17:18:00 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurentiu Mihalcea X-Patchwork-Id: 13957919 Received: from mail-ej1-f50.google.com (mail-ej1-f50.google.com [209.85.218.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F27F020C46A for ; Mon, 3 Feb 2025 17:19:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.50 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738603146; cv=none; b=uoR/051ZboQu4GHWNakKyOO6oxrwWQFjj7vcbpJBPPIAa1EBficu87UgjniAji6ZhZIePSMy1II4GmpSmhYBm4ub4MGfKkvW+dMTR1zS9uBiUCiYfucdo/PCUZ7lzS4Zee9ZItIm45eWLRUK3OlValnXzPS1RFrDYQFpdG2T6qo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738603146; c=relaxed/simple; bh=Zd6IVFEGSSOnjbx+mn13I602SNeLWjo7HIZAI+NPFpc=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=KmXQVKdweqRnuklBx6OZBDx9W2Kx/MNU+Aj7fCzBjfJL9+CBV/EK22Rs7uKbN1SQT/xGyifTcCkQfzpFcHd+HbHM5FKKDcXtbHmuGfVyO1k2jfgLUAL0AIJmdMq7HVI7MA2VtdCERWjjLBaRSTKFAzti2KaaXO6QLkGS12dv5g4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=QbSAFK5s; arc=none smtp.client-ip=209.85.218.50 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="QbSAFK5s" Received: by mail-ej1-f50.google.com with SMTP id a640c23a62f3a-a9e44654ae3so750159066b.1 for ; Mon, 03 Feb 2025 09:19:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1738603142; x=1739207942; darn=lists.linux.dev; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=NpZLlDlkXCZqzWT1t+JrLtGXGsGrm+uqJFu2FBL5Lqc=; b=QbSAFK5s+BFlsTUgHBXXjIf4/0sl4PFL8reoout5ZgcHsvhqx5JgmjCsK6JqCedaZ9 /ghU9skubZFZEi8oa482Poqo3CgQpYZDQA770zlk3mjiV4l4R3dCmObDYZRsrJZtVywb 34m4mnPM/QD6LvG6MoTqBgQYBRX0ap832+QAQggJ8znXG0/Gsj01F6NZihhfvP7BA1St 1+FZQ4d/BXr0MKxeC3czjMRtWqMNm6jTwNw+jBrZeGUiJ7/vpHN2b3gVhuJ+tGE3sQoL G8UyXo5xKvC4JK1AxyWuAdUTvb2dl0VVxPfzEcuxrNWgsGqA9wU/NJ25pFavEUQE+Fvt ks0A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738603142; x=1739207942; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=NpZLlDlkXCZqzWT1t+JrLtGXGsGrm+uqJFu2FBL5Lqc=; b=ubcX4vnHWVoQDShRlZXp4t0kQY05Z3c8w9xd4xRl/9zc8SWZ79OI4R/PXfw2DXtmm1 5RAnApkmw07bcnWV0qYE166212S7Nri/foi3K10+jnET5M7JHAuIAaaSGr1PUbe5xhwP gYWVtRNiBSpUN/sEXumcqyqWAgl4Z93uFTjNKzA3tmh6o/wWe/wJA0cRdc1YTr9mQP9i Z07d1Q9qaZ4ad29QkqA+CS2kvi7iA9ZMSHtK+GQzKIbMqDQEP/EVm+qAK7NWF6bCUuhv dajTxXLLCToKojnzgu48Rg7O1AALIRqI9GHgfGqDO+5Z+CDSX69MFFtEdmWyFXHeYqIE nAWg== X-Forwarded-Encrypted: i=1; AJvYcCWCdl6OsLRBs1BcPF6ENNssD0uKtcdkDR7PgOQmiiN7GaQyxPF5xrNXjGSpHY+lmHORaiA=@lists.linux.dev X-Gm-Message-State: AOJu0YwvrLcmY7uoWluvs+iSTHwv2eL84vxshfFET6gn5ZhmlHvat8lv juMKMOJfGaJ30TqM87IjoLurWN6VsL/Te7cac2pIi/gbR6A8JVmo X-Gm-Gg: ASbGncvAEYHv8zxdKhMmRLNkLKgBKvXmyIpipAEInZmS7lqPhdhkJKcJDZ3/+PapZOm BpL1nCgqIDBbXqrKuhB3zt5eSOMC9DGe4BvOTCbb2mmfCCO7wecmV1iTKF7LfuKdAvjj4gChuBs OSjyHTdzh+pDipcRDqI0GAbkntmHQ5W74lNAY6P6iPCfRm494hmlPeq8G3sTAltHW524YIHTLau 0fkFxyAwLEd1YF6LhIJsR4I8s0PO86fa3PvLDKUnuOCzEKWlaE9drNvOdWKbO2WsB1qbr61OWHr WJIMlqL23NUwkp5T1mIa9IZhsUc2XM+kgggr+dIIaiYDGia7vQ== X-Google-Smtp-Source: AGHT+IExLhI2ZOqcBBvUUEvVXS9+XyxNSY/Qao3rL1W27EGnioY1yAF1LM0YwH7WdkRhg4fSw6oAbQ== X-Received: by 2002:a17:907:3d8d:b0:ab2:c208:732d with SMTP id a640c23a62f3a-ab6cfdbc500mr2597881966b.40.1738603141836; Mon, 03 Feb 2025 09:19:01 -0800 (PST) Received: from playground.localdomain ([92.120.5.2]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ab6e47d21aasm784253866b.74.2025.02.03.09.19.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Feb 2025 09:19:01 -0800 (PST) From: Laurentiu Mihalcea To: Bard Liao , Daniel Baluta , Iuliana Prodan , Jaroslav Kysela , Takashi Iwai , Mark Brown Cc: linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org, imx@lists.linux.dev Subject: [PATCH 1/9] ASoC: SOF: imx: introduce more common structures and functions Date: Mon, 3 Feb 2025 12:18:00 -0500 Message-Id: <20250203171808.4108-2-laurentiumihalcea111@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250203171808.4108-1-laurentiumihalcea111@gmail.com> References: <20250203171808.4108-1-laurentiumihalcea111@gmail.com> Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Laurentiu Mihalcea The SOF drivers for imx chips have a lot of duplicate code and routines/code snippets that could certainly be reused among drivers. As such, introduce a new set of structures and functions that will help eliminate the redundancy and code size of the drivers. Signed-off-by: Laurentiu Mihalcea Reviewed-by: Daniel Baluta Reviewed-by: Iuliana Prodan --- sound/soc/sof/imx/imx-common.c | 419 ++++++++++++++++++++++++++++++++- sound/soc/sof/imx/imx-common.h | 149 ++++++++++++ 2 files changed, 567 insertions(+), 1 deletion(-) diff --git a/sound/soc/sof/imx/imx-common.c b/sound/soc/sof/imx/imx-common.c index fce6d9cf6a6b..5921900335c8 100644 --- a/sound/soc/sof/imx/imx-common.c +++ b/sound/soc/sof/imx/imx-common.c @@ -1,11 +1,16 @@ // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) // -// Copyright 2020 NXP +// Copyright 2020-2025 NXP // // Common helpers for the audio DSP on i.MX8 +#include #include +#include +#include +#include #include + #include "../ops.h" #include "imx-common.h" @@ -74,5 +79,417 @@ void imx8_dump(struct snd_sof_dev *sdev, u32 flags) } EXPORT_SYMBOL(imx8_dump); +static void imx_handle_reply(struct imx_dsp_ipc *ipc) +{ + unsigned long flags; + struct snd_sof_dev *sdev = imx_dsp_get_data(ipc); + + spin_lock_irqsave(&sdev->ipc_lock, flags); + snd_sof_ipc_process_reply(sdev, 0); + spin_unlock_irqrestore(&sdev->ipc_lock, flags); +} + +static void imx_handle_request(struct imx_dsp_ipc *ipc) +{ + struct snd_sof_dev *sdev; + u32 panic_code; + + sdev = imx_dsp_get_data(ipc); + + if (get_chip_info(sdev)->ipc_info.has_panic_code) { + sof_mailbox_read(sdev, sdev->debug_box.offset + 0x4, + &panic_code, + sizeof(panic_code)); + + if ((panic_code & SOF_IPC_PANIC_MAGIC_MASK) == SOF_IPC_PANIC_MAGIC) { + snd_sof_dsp_panic(sdev, panic_code, true); + return; + } + } + + snd_sof_ipc_msgs_rx(sdev); +} + +static struct imx_dsp_ops imx_ipc_ops = { + .handle_reply = imx_handle_reply, + .handle_request = imx_handle_request, +}; + +static int imx_send_msg(struct snd_sof_dev *sdev, struct snd_sof_ipc_msg *msg) +{ + struct imx_common_data *common = sdev->pdata->hw_pdata; + + sof_mailbox_write(sdev, sdev->host_box.offset, msg->msg_data, msg->msg_size); + imx_dsp_ring_doorbell(common->ipc_handle, 0x0); + + return 0; +} + +static int imx_get_bar_index(struct snd_sof_dev *sdev, u32 type) +{ + switch (type) { + case SOF_FW_BLK_TYPE_IRAM: + case SOF_FW_BLK_TYPE_SRAM: + return type; + default: + return -EINVAL; + } +} + +static int imx_get_mailbox_offset(struct snd_sof_dev *sdev) +{ + return get_chip_info(sdev)->ipc_info.boot_mbox_offset; +} + +static int imx_get_window_offset(struct snd_sof_dev *sdev, u32 id) +{ + return get_chip_info(sdev)->ipc_info.window_offset; +} + +static int imx_set_power_state(struct snd_sof_dev *sdev, + const struct sof_dsp_power_state *target) +{ + sdev->dsp_power_state = *target; + return 0; +} + +static int imx_common_resume(struct snd_sof_dev *sdev) +{ + struct imx_common_data *common; + int ret, i; + + common = sdev->pdata->hw_pdata; + + ret = clk_bulk_prepare_enable(common->clk_num, common->clks); + if (ret) + dev_err(sdev->dev, "failed to enable clocks: %d\n", ret); + + for (i = 0; i < DSP_MU_CHAN_NUM; i++) + imx_dsp_request_channel(common->ipc_handle, i); + + /* done. If need be, core will be started by SOF core immediately after */ + return 0; +} + +static int imx_common_suspend(struct snd_sof_dev *sdev) +{ + struct imx_common_data *common; + int i, ret; + + common = sdev->pdata->hw_pdata; + + ret = imx_chip_core_shutdown(sdev); + if (ret < 0) { + dev_err(sdev->dev, "failed to shutdown core: %d\n", ret); + return ret; + } + + for (i = 0; i < DSP_MU_CHAN_NUM; i++) + imx_dsp_free_channel(common->ipc_handle, i); + + clk_bulk_disable_unprepare(common->clk_num, common->clks); + + return 0; +} + +static int imx_runtime_resume(struct snd_sof_dev *sdev) +{ + int ret; + const struct sof_dsp_power_state target_state = { + .state = SOF_DSP_PM_D0, + }; + + ret = imx_common_resume(sdev); + if (ret < 0) { + dev_err(sdev->dev, "failed to runtime common resume: %d\n", ret); + return ret; + } + + return snd_sof_dsp_set_power_state(sdev, &target_state); +} + +static int imx_resume(struct snd_sof_dev *sdev) +{ + int ret; + const struct sof_dsp_power_state target_state = { + .state = SOF_DSP_PM_D0, + }; + + ret = imx_common_resume(sdev); + if (ret < 0) { + dev_err(sdev->dev, "failed to common resume: %d\n", ret); + return ret; + } + + if (pm_runtime_suspended(sdev->dev)) { + pm_runtime_disable(sdev->dev); + pm_runtime_set_active(sdev->dev); + pm_runtime_mark_last_busy(sdev->dev); + pm_runtime_enable(sdev->dev); + pm_runtime_idle(sdev->dev); + } + + return snd_sof_dsp_set_power_state(sdev, &target_state); +} + +static int imx_runtime_suspend(struct snd_sof_dev *sdev) +{ + int ret; + const struct sof_dsp_power_state target_state = { + .state = SOF_DSP_PM_D3, + }; + + ret = imx_common_suspend(sdev); + if (ret < 0) + dev_err(sdev->dev, "failed to runtime common suspend: %d\n", ret); + + return snd_sof_dsp_set_power_state(sdev, &target_state); +} + +static int imx_suspend(struct snd_sof_dev *sdev, unsigned int target_state) +{ + int ret; + const struct sof_dsp_power_state target_power_state = { + .state = target_state, + }; + + if (!pm_runtime_suspended(sdev->dev)) { + ret = imx_common_suspend(sdev); + if (ret < 0) { + dev_err(sdev->dev, "failed to common suspend: %d\n", ret); + return ret; + } + } + + return snd_sof_dsp_set_power_state(sdev, &target_power_state); +} + +static int imx_region_name_to_blk_type(const char *region_name) +{ + if (!strcmp(region_name, "iram")) + return SOF_FW_BLK_TYPE_IRAM; + else if (!strcmp(region_name, "dram")) + return SOF_FW_BLK_TYPE_DRAM; + else if (!strcmp(region_name, "sram")) + return SOF_FW_BLK_TYPE_SRAM; + else + return -EINVAL; +} + +static int imx_parse_ioremap_memory(struct snd_sof_dev *sdev) +{ + struct platform_device *pdev; + const struct imx_chip_info *chip_info; + phys_addr_t base, size; + struct resource *res; + struct reserved_mem *reserved; + struct device_node *res_np; + int i, blk_type, ret; + + pdev = to_platform_device(sdev->dev); + chip_info = get_chip_info(sdev); + + for (i = 0; chip_info->memory[i].name; i++) { + blk_type = imx_region_name_to_blk_type(chip_info->memory[i].name); + if (blk_type < 0) + return dev_err_probe(sdev->dev, blk_type, + "no blk type for region %s\n", + chip_info->memory[i].name); + + if (!chip_info->memory[i].reserved) { + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, + chip_info->memory[i].name); + if (!res) + return dev_err_probe(sdev->dev, -ENODEV, + "failed to fetch %s resource\n", + chip_info->memory[i].name); + + base = res->start; + size = resource_size(res); + } else { + ret = of_property_match_string(pdev->dev.of_node, + "memory-region-names", + chip_info->memory[i].name); + if (ret < 0) + return dev_err_probe(sdev->dev, ret, + "no valid index for %s\n", + chip_info->memory[i].name); + + res_np = of_parse_phandle(pdev->dev.of_node, + "memory-region", + ret); + if (!res_np) + return dev_err_probe(sdev->dev, -ENODEV, + "failed to parse phandle %s\n", + chip_info->memory[i].name); + + reserved = of_reserved_mem_lookup(res_np); + of_node_put(res_np); + if (!reserved) + return dev_err_probe(sdev->dev, -ENODEV, + "failed to get %s reserved\n", + chip_info->memory[i].name); + + base = reserved->base; + size = reserved->size; + } + + sdev->bar[blk_type] = devm_ioremap(sdev->dev, base, size); + if (IS_ERR(sdev->bar[blk_type])) + return dev_err_probe(sdev->dev, + PTR_ERR(sdev->bar[blk_type]), + "failed to ioremap %s region\n", + chip_info->memory[i].name); + } + + return 0; +} + +static void imx_unregister_action(void *data) +{ + platform_device_unregister(data); +} + +static int imx_probe(struct snd_sof_dev *sdev) +{ + int ret; + struct platform_device *pdev; + struct imx_common_data *common; + struct dev_pm_domain_attach_data domain_data = { + .pd_names = NULL, /* no filtering */ + .pd_flags = PD_FLAG_DEV_LINK_ON, + }; + + pdev = to_platform_device(sdev->dev); + + common = devm_kzalloc(sdev->dev, sizeof(*common), GFP_KERNEL); + if (!common) + return dev_err_probe(sdev->dev, -ENOMEM, + "failed to allocate common data\n"); + + common->ipc_dev = platform_device_register_data(sdev->dev, "imx-dsp", + PLATFORM_DEVID_NONE, + pdev, sizeof(*pdev)); + if (IS_ERR(common->ipc_dev)) + return dev_err_probe(sdev->dev, PTR_ERR(common->ipc_dev), + "failed to create IPC device\n"); + + /* let the devres API take care of unregistering this platform + * driver when no longer required. + */ + ret = devm_add_action_or_reset(sdev->dev, + imx_unregister_action, + common->ipc_dev); + if (ret) + return dev_err_probe(sdev->dev, ret, "failed to add devm action\n"); + + common->ipc_handle = dev_get_drvdata(&common->ipc_dev->dev); + if (!common->ipc_handle) + return dev_err_probe(sdev->dev, -EPROBE_DEFER, + "failed to fetch IPC handle\n"); + + ret = imx_parse_ioremap_memory(sdev); + if (ret < 0) + return dev_err_probe(sdev->dev, ret, + "failed to parse/ioremap memory regions\n"); + + if (get_chip_info(sdev)->has_dma_reserved) { + ret = of_reserved_mem_device_init_by_name(sdev->dev, + pdev->dev.of_node, + "dma"); + if (ret) + return dev_err_probe(sdev->dev, ret, + "failed to bind DMA region\n"); + } + + if (!sdev->dev->pm_domain) { + ret = devm_pm_domain_attach_list(sdev->dev, + &domain_data, &common->pd_list); + if (ret < 0) + return dev_err_probe(sdev->dev, ret, "failed to attach PDs\n"); + } + + ret = devm_clk_bulk_get_all(sdev->dev, &common->clks); + if (ret < 0) + return dev_err_probe(sdev->dev, common->clk_num, + "failed to fetch clocks\n"); + common->clk_num = ret; + + /* no effect if number of clocks is 0 */ + ret = clk_bulk_prepare_enable(common->clk_num, common->clks); + if (ret < 0) + return dev_err_probe(sdev->dev, ret, "failed to enable clocks\n"); + + common->ipc_handle->ops = &imx_ipc_ops; + imx_dsp_set_data(common->ipc_handle, sdev); + + sdev->num_cores = 1; + sdev->pdata->hw_pdata = common; + sdev->mailbox_bar = SOF_FW_BLK_TYPE_SRAM; + sdev->dsp_box.offset = get_chip_info(sdev)->ipc_info.boot_mbox_offset; + + return imx_chip_probe(sdev); +} + +static void imx_remove(struct snd_sof_dev *sdev) +{ + struct imx_common_data *common = sdev->pdata->hw_pdata; + int ret; + + common = sdev->pdata->hw_pdata; + + if (!pm_runtime_suspended(sdev->dev)) { + ret = imx_chip_core_shutdown(sdev); + if (ret < 0) + dev_err(sdev->dev, "failed to shutdown core: %d\n", ret); + + clk_bulk_disable_unprepare(common->clk_num, common->clks); + } +} + +const struct snd_sof_dsp_ops sof_imx_ops = { + .probe = imx_probe, + .remove = imx_remove, + + .run = imx_chip_core_kick, + .reset = imx_chip_core_reset, + + .block_read = sof_block_read, + .block_write = sof_block_write, + + .mailbox_read = sof_mailbox_read, + .mailbox_write = sof_mailbox_write, + + .send_msg = imx_send_msg, + .get_mailbox_offset = imx_get_mailbox_offset, + .get_window_offset = imx_get_window_offset, + + .ipc_msg_data = sof_ipc_msg_data, + .set_stream_data_offset = sof_set_stream_data_offset, + + .get_bar_index = imx_get_bar_index, + .load_firmware = snd_sof_load_firmware_memcpy, + + .debugfs_add_region_item = snd_sof_debugfs_add_region_item_iomem, + + .pcm_open = sof_stream_pcm_open, + .pcm_close = sof_stream_pcm_close, + + .runtime_suspend = imx_runtime_suspend, + .runtime_resume = imx_runtime_resume, + .suspend = imx_suspend, + .resume = imx_resume, + + .set_power_state = imx_set_power_state, + + .hw_info = SNDRV_PCM_INFO_MMAP | + SNDRV_PCM_INFO_MMAP_VALID | + SNDRV_PCM_INFO_INTERLEAVED | + SNDRV_PCM_INFO_PAUSE | + SNDRV_PCM_INFO_BATCH | + SNDRV_PCM_INFO_NO_PERIOD_WAKEUP, +}; +EXPORT_SYMBOL(sof_imx_ops); + MODULE_LICENSE("Dual BSD/GPL"); MODULE_DESCRIPTION("SOF helpers for IMX platforms"); diff --git a/sound/soc/sof/imx/imx-common.h b/sound/soc/sof/imx/imx-common.h index 13d7f3ef675e..b31898866681 100644 --- a/sound/soc/sof/imx/imx-common.h +++ b/sound/soc/sof/imx/imx-common.h @@ -4,10 +4,157 @@ #define __IMX_COMMON_H__ #include +#include +#include + +#include "../sof-of-dev.h" +#include "../ops.h" #define EXCEPT_MAX_HDR_SIZE 0x400 #define IMX8_STACK_DUMP_SIZE 32 +/* chip_info refers to the data stored in struct sof_dev_desc's chip_info */ +#define get_chip_info(sdev)\ + ((const struct imx_chip_info *)((sdev)->pdata->desc->chip_info)) + +/* chip_pdata refers to the data stored in struct imx_common_data's chip_pdata */ +#define get_chip_pdata(sdev)\ + (((struct imx_common_data *)((sdev)->pdata->hw_pdata))->chip_pdata) + +/* can be used if: + * 1) The only supported IPC version is IPC3. + * 2) The default paths/FW name match values below. + * + * otherwise, just explicitly declare the structure + */ +#define IMX_SOF_DEV_DESC(mach_name, of_machs, \ + mach_chip_info, mach_ops, mach_ops_init) \ +static struct sof_dev_desc sof_of_##mach_name##_desc = { \ + .of_machines = of_machs, \ + .chip_info = mach_chip_info, \ + .ipc_supported_mask = BIT(SOF_IPC_TYPE_3), \ + .ipc_default = SOF_IPC_TYPE_3, \ + .default_fw_path = { \ + [SOF_IPC_TYPE_3] = "imx/sof", \ + }, \ + .default_tplg_path = { \ + [SOF_IPC_TYPE_3] = "imx/sof-tplg", \ + }, \ + .default_fw_filename = { \ + [SOF_IPC_TYPE_3] = "sof-" #mach_name ".ri", \ + }, \ + .ops = mach_ops, \ + .ops_init = mach_ops_init, \ +} + +/* to be used alongside IMX_SOF_DEV_DESC() */ +#define IMX_SOF_DEV_DESC_NAME(mach_name) sof_of_##mach_name##_desc + +/* dai driver entry w/ playback and capture caps. If one direction is missing + * then set the channels to 0. + */ +#define IMX_SOF_DAI_DRV_ENTRY(dai_name, pb_cmin, pb_cmax, cap_cmin, cap_cmax) \ +{ \ + .name = dai_name, \ + .playback = { \ + .channels_min = pb_cmin, \ + .channels_max = pb_cmax, \ + }, \ + .capture = { \ + .channels_min = cap_cmin, \ + .channels_max = cap_cmax, \ + }, \ +} + +/* use if playback and capture have the same min/max channel count */ +#define IMX_SOF_DAI_DRV_ENTRY_BIDIR(dai_name, cmin, cmax)\ + IMX_SOF_DAI_DRV_ENTRY(dai_name, cmin, cmax, cmin, cmax) + +struct imx_ipc_info { + /* true if core is able to write a panic code to the debug box */ + bool has_panic_code; + /* offset to mailbox in which firmware initially writes FW_READY */ + int boot_mbox_offset; + /* offset to region at which the mailboxes start */ + int window_offset; +}; + +struct imx_chip_ops { + /* called after clocks and PDs are enabled */ + int (*probe)(struct snd_sof_dev *sdev); + /* used directly by the SOF core */ + int (*core_kick)(struct snd_sof_dev *sdev); + /* called during suspend()/remove() before clocks are disabled */ + int (*core_shutdown)(struct snd_sof_dev *sdev); + /* used directly by the SOF core */ + int (*core_reset)(struct snd_sof_dev *sdev); +}; + +struct imx_memory_info { + const char *name; + bool reserved; +}; + +struct imx_chip_info { + struct imx_ipc_info ipc_info; + /* does the chip have a reserved memory region for DMA? */ + bool has_dma_reserved; + struct imx_memory_info *memory; + /* optional */ + const struct imx_chip_ops *ops; +}; + +struct imx_common_data { + struct platform_device *ipc_dev; + struct imx_dsp_ipc *ipc_handle; + /* core may have no clocks */ + struct clk_bulk_data *clks; + int clk_num; + /* core may have no PDs */ + struct dev_pm_domain_list *pd_list; + void *chip_pdata; +}; + +static inline int imx_chip_core_kick(struct snd_sof_dev *sdev) +{ + const struct imx_chip_ops *ops = get_chip_info(sdev)->ops; + + if (ops && ops->core_kick) + return ops->core_kick(sdev); + + return 0; +} + +static inline int imx_chip_core_shutdown(struct snd_sof_dev *sdev) +{ + const struct imx_chip_ops *ops = get_chip_info(sdev)->ops; + + if (ops && ops->core_shutdown) + return ops->core_shutdown(sdev); + + return 0; +} + +static inline int imx_chip_core_reset(struct snd_sof_dev *sdev) +{ + const struct imx_chip_ops *ops = get_chip_info(sdev)->ops; + + if (ops && ops->core_reset) + return ops->core_reset(sdev); + + return 0; +} + +static inline int imx_chip_probe(struct snd_sof_dev *sdev) +{ + const struct imx_chip_ops *ops = get_chip_info(sdev)->ops; + + if (ops && ops->probe) + return ops->probe(sdev); + + return 0; +} + void imx8_get_registers(struct snd_sof_dev *sdev, struct sof_ipc_dsp_oops_xtensa *xoops, struct sof_ipc_panic_info *panic_info, @@ -15,4 +162,6 @@ void imx8_get_registers(struct snd_sof_dev *sdev, void imx8_dump(struct snd_sof_dev *sdev, u32 flags); +extern const struct snd_sof_dsp_ops sof_imx_ops; + #endif From patchwork Mon Feb 3 17:18:01 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurentiu Mihalcea X-Patchwork-Id: 13957920 Received: from mail-ej1-f48.google.com (mail-ej1-f48.google.com [209.85.218.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 92E1120A5F3 for ; Mon, 3 Feb 2025 17:19:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.48 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738603149; cv=none; b=Lb7BU+nQz1VwULlEsTEmhz4m1PtESIRklBr9V0EMdbgP+DJSSI9U0wKLWgSfrvBSYqnuhXaXQTrz04MCDZ+4seYzyDzs+xjRQKfFI4Cl3s+ByKpJWDmyTor3byU17qOjfMyxmPoxuMENAmKI0ggWVRHMQ/w89wyVPfwaK5mHA9I= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738603149; c=relaxed/simple; bh=PVvl3ZILjWkI7U46i54KgKS5eT74EzOFK6itJpKAw48=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=YMo/CqNf8qyw3PoOuHYdZIiAIMRLBEmRak9SDcu5Ty5ySoSR9H/J5zQLxEKYanVUXZH81wMZTnwFAlwa5pf0S8yeMYkw4jwHlnHCXmOlZbKzkrkARDN37MzP4U9JjOgiPfFxWzqegDj3/4XHq2Uh+POrOhOEYXckZrZbKAuS8gI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=NZRFkcor; arc=none smtp.client-ip=209.85.218.48 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="NZRFkcor" Received: by mail-ej1-f48.google.com with SMTP id a640c23a62f3a-aaf60d85238so724551766b.0 for ; Mon, 03 Feb 2025 09:19:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1738603145; x=1739207945; darn=lists.linux.dev; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=xqeb2Rtguh/UmNsLWSk3RLADQiHhXUTZP7kx5iJeb5M=; b=NZRFkcorBZYvBch3aX503mlq0w48qU5g+rwPaQEwf7Ca9k2PTsHGNPsetnE3zqBEgU dpY0iKwGXPObSH2ge+SRaLHknx80vtKHNAA4iU3GAH0zzcOkrnH08Cmvq/gyd3npQYfW F2qwsgdS2ObSUYnl6qfoG+YtzxlmIYjyAT8nSHV+ZDKnmIlZfZe8JbNxMQ0a+TnfXFlt B/HiABh0pFCZ6nRBiOGzli+QuPKFsZIf0llq4OtGGzTHBI4iQemKmIMoZ5pmH8uK+GhX SQeQEt6j/9Wup2MXEcg6YEOFEtTxeG3dcGdFJus3sM+zEOb4PXB8ybb2sOqGn1QbVRPp gzOw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738603145; x=1739207945; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=xqeb2Rtguh/UmNsLWSk3RLADQiHhXUTZP7kx5iJeb5M=; b=UmAbu24c4KmbV4nC/9IYk+P+I256Hn+Rst3/DLx9i/mUOsK2weVhzhG2G6v3CZYrTc czlydJOnVn4JXnetdPasPUMyxwPse+ARKEKRXFOci6MRRHdkFoVQVyU3h0oX3iy/gZzd SY7q7EH6v+HJYaig7s6f7xfVcSK5iBI1hpsIQ9t5ToE9qiKdFFTBPREcHzeEqSKE+AWa mcM/BE7msXWKgAo+hKu2Zkt2anX2vPXFlMBymI67bqXqAM9sksHHpUKhq5jtyIk/RsXk AKF8ZyKwgmU2MT/zPWr76BywtzDDfcI/D0sYqXwYUYaE9QMWAxaikt7nOvq267pcgJ3W zjFg== X-Forwarded-Encrypted: i=1; AJvYcCUNGn6QSWnr2LTSMtOXQcWi5wBFO31lcWawnoiTasQ/poZ5OWc05yLIB7XDiKRbce1nisk=@lists.linux.dev X-Gm-Message-State: AOJu0YyjF3/oD7GC9D7zKl/XcoBrOeO2b+70JMBErNVp21ZIKrJe9io4 YOjXZng0q3MziU6mZpCKys7yqRYxQ9ke3Zvd9NN2Z7c6lpkoC2aQ X-Gm-Gg: ASbGnctESb2eSGxWwtnX0vacWFFMY77qx+cVPchKBHNdXyYR8Rfwh3SFNIP1ZYwgqRs omyhpvHLjmLMh0gnPISFxjp4FED9iIM4u3cyPhQQo77j+/zUoPgpVerELx/lDs81i7X88mSVF8H puEQRqyH/F/3dtqdunwnINGMZ5m+3X1SuC58vSCVL+3g0bKTHMJ2QdD9fOvlEbFX9wVvI3cfMR6 fOLRCQo5C9m5lGlVc0eb52XlmkrOBaCYNBX4lIxcVIaHjgYw2UBBYWpCDwQjP/nhhaGwoOY59to b2yUK7iWNw6tzGc/JoIPnfl0L/jfMyaD3rifLg7e/3rt7PYQtw== X-Google-Smtp-Source: AGHT+IEGiJcMfXEeOyO0IvB7aI5f5iCigTiacWzTL8J6vJuKee0/qwHHspt4hoHr7iPRrZ+zHXblJQ== X-Received: by 2002:a17:907:1ca7:b0:ab6:daaf:eb46 with SMTP id a640c23a62f3a-ab6daaff070mr2228820166b.13.1738603144273; Mon, 03 Feb 2025 09:19:04 -0800 (PST) Received: from playground.localdomain ([92.120.5.2]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ab6e47d21aasm784253866b.74.2025.02.03.09.19.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Feb 2025 09:19:03 -0800 (PST) From: Laurentiu Mihalcea To: Bard Liao , Daniel Baluta , Iuliana Prodan , Jaroslav Kysela , Takashi Iwai , Mark Brown Cc: linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org, imx@lists.linux.dev Subject: [PATCH 2/9] ASoC: SOF: imx8: use common imx chip interface Date: Mon, 3 Feb 2025 12:18:01 -0500 Message-Id: <20250203171808.4108-3-laurentiumihalcea111@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250203171808.4108-1-laurentiumihalcea111@gmail.com> References: <20250203171808.4108-1-laurentiumihalcea111@gmail.com> Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Laurentiu Mihalcea The common interface for imx chips (defined in imx-common.c) contains the definitions for a lot of functions required by the SOF core. As such, the platform driver can just use the common definitions instead of duplicating code by re-defining aforementioned functions. Make the transition to the new common interface. This consists of: 1) Removing unneeded functions, which are already defined in the common interface. 2) Defining some chip-specific operations/structures required by the interface to work. 3) Dropping structure definitions that are no longer needed. 4) Adapting some existing functions to the new interface. Signed-off-by: Laurentiu Mihalcea Reviewed-by: Daniel Baluta Reviewed-by: Iuliana Prodan --- sound/soc/sof/imx/imx8.c | 526 +++++---------------------------------- 1 file changed, 65 insertions(+), 461 deletions(-) diff --git a/sound/soc/sof/imx/imx8.c b/sound/soc/sof/imx/imx8.c index 1e7bf00d7c46..a44c3004a537 100644 --- a/sound/soc/sof/imx/imx8.c +++ b/sound/soc/sof/imx/imx8.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) // -// Copyright 2019 NXP +// Copyright 2019-2025 NXP // // Author: Daniel Baluta // @@ -41,100 +41,28 @@ #define MBOX_OFFSET 0x800000 #define MBOX_SIZE 0x1000 -struct imx8_priv { - struct device *dev; - struct snd_sof_dev *sdev; - - /* DSP IPC handler */ - struct imx_dsp_ipc *dsp_ipc; - struct platform_device *ipc_dev; - - /* System Controller IPC handler */ - struct imx_sc_ipc *sc_ipc; - - /* Power domain handling */ - int num_domains; - struct device **pd_dev; - struct device_link **link; - - struct clk_bulk_data *clks; - int clk_num; -}; - -static int imx8_get_mailbox_offset(struct snd_sof_dev *sdev) -{ - return MBOX_OFFSET; -} - -static int imx8_get_window_offset(struct snd_sof_dev *sdev, u32 id) -{ - return MBOX_OFFSET; -} - -static void imx8_dsp_handle_reply(struct imx_dsp_ipc *ipc) -{ - struct imx8_priv *priv = imx_dsp_get_data(ipc); - unsigned long flags; - - spin_lock_irqsave(&priv->sdev->ipc_lock, flags); - snd_sof_ipc_process_reply(priv->sdev, 0); - spin_unlock_irqrestore(&priv->sdev->ipc_lock, flags); -} - -static void imx8_dsp_handle_request(struct imx_dsp_ipc *ipc) -{ - struct imx8_priv *priv = imx_dsp_get_data(ipc); - u32 p; /* panic code */ - - /* Read the message from the debug box. */ - sof_mailbox_read(priv->sdev, priv->sdev->debug_box.offset + 4, &p, sizeof(p)); - - /* Check to see if the message is a panic code (0x0dead***) */ - if ((p & SOF_IPC_PANIC_MAGIC_MASK) == SOF_IPC_PANIC_MAGIC) - snd_sof_dsp_panic(priv->sdev, p, true); - else - snd_sof_ipc_msgs_rx(priv->sdev); -} - -static struct imx_dsp_ops dsp_ops = { - .handle_reply = imx8_dsp_handle_reply, - .handle_request = imx8_dsp_handle_request, -}; - -static int imx8_send_msg(struct snd_sof_dev *sdev, struct snd_sof_ipc_msg *msg) -{ - struct imx8_priv *priv = sdev->pdata->hw_pdata; - - sof_mailbox_write(sdev, sdev->host_box.offset, msg->msg_data, - msg->msg_size); - imx_dsp_ring_doorbell(priv->dsp_ipc, 0); - - return 0; -} - /* * DSP control. */ static int imx8x_run(struct snd_sof_dev *sdev) { - struct imx8_priv *dsp_priv = sdev->pdata->hw_pdata; int ret; - ret = imx_sc_misc_set_control(dsp_priv->sc_ipc, IMX_SC_R_DSP, + ret = imx_sc_misc_set_control(get_chip_pdata(sdev), IMX_SC_R_DSP, IMX_SC_C_OFS_SEL, 1); if (ret < 0) { dev_err(sdev->dev, "Error system address offset source select\n"); return ret; } - ret = imx_sc_misc_set_control(dsp_priv->sc_ipc, IMX_SC_R_DSP, + ret = imx_sc_misc_set_control(get_chip_pdata(sdev), IMX_SC_R_DSP, IMX_SC_C_OFS_AUDIO, 0x80); if (ret < 0) { dev_err(sdev->dev, "Error system address offset of AUDIO\n"); return ret; } - ret = imx_sc_misc_set_control(dsp_priv->sc_ipc, IMX_SC_R_DSP, + ret = imx_sc_misc_set_control(get_chip_pdata(sdev), IMX_SC_R_DSP, IMX_SC_C_OFS_PERIPH, 0x5A); if (ret < 0) { dev_err(sdev->dev, "Error system address offset of PERIPH %d\n", @@ -142,14 +70,14 @@ static int imx8x_run(struct snd_sof_dev *sdev) return ret; } - ret = imx_sc_misc_set_control(dsp_priv->sc_ipc, IMX_SC_R_DSP, + ret = imx_sc_misc_set_control(get_chip_pdata(sdev), IMX_SC_R_DSP, IMX_SC_C_OFS_IRQ, 0x51); if (ret < 0) { dev_err(sdev->dev, "Error system address offset of IRQ\n"); return ret; } - imx_sc_pm_cpu_start(dsp_priv->sc_ipc, IMX_SC_R_DSP, true, + imx_sc_pm_cpu_start(get_chip_pdata(sdev), IMX_SC_R_DSP, true, RESET_VECTOR_VADDR); return 0; @@ -157,17 +85,16 @@ static int imx8x_run(struct snd_sof_dev *sdev) static int imx8_run(struct snd_sof_dev *sdev) { - struct imx8_priv *dsp_priv = sdev->pdata->hw_pdata; int ret; - ret = imx_sc_misc_set_control(dsp_priv->sc_ipc, IMX_SC_R_DSP, + ret = imx_sc_misc_set_control(get_chip_pdata(sdev), IMX_SC_R_DSP, IMX_SC_C_OFS_SEL, 0); if (ret < 0) { dev_err(sdev->dev, "Error system address offset source select\n"); return ret; } - imx_sc_pm_cpu_start(dsp_priv->sc_ipc, IMX_SC_R_DSP, true, + imx_sc_pm_cpu_start(get_chip_pdata(sdev), IMX_SC_R_DSP, true, RESET_VECTOR_VADDR); return 0; @@ -175,272 +102,20 @@ static int imx8_run(struct snd_sof_dev *sdev) static int imx8_probe(struct snd_sof_dev *sdev) { - struct platform_device *pdev = to_platform_device(sdev->dev); - struct device_node *np = pdev->dev.of_node; - struct device_node *res_node; - struct resource *mmio; - struct imx8_priv *priv; - struct resource res; - u32 base, size; - int ret = 0; - int i; - - priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); - if (!priv) - return -ENOMEM; - - sdev->num_cores = 1; - sdev->pdata->hw_pdata = priv; - priv->dev = sdev->dev; - priv->sdev = sdev; - - /* power up device associated power domains */ - priv->num_domains = of_count_phandle_with_args(np, "power-domains", - "#power-domain-cells"); - if (priv->num_domains < 0) { - dev_err(sdev->dev, "no power-domains property in %pOF\n", np); - return priv->num_domains; - } - - priv->pd_dev = devm_kmalloc_array(&pdev->dev, priv->num_domains, - sizeof(*priv->pd_dev), GFP_KERNEL); - if (!priv->pd_dev) - return -ENOMEM; - - priv->link = devm_kmalloc_array(&pdev->dev, priv->num_domains, - sizeof(*priv->link), GFP_KERNEL); - if (!priv->link) - return -ENOMEM; - - for (i = 0; i < priv->num_domains; i++) { - priv->pd_dev[i] = dev_pm_domain_attach_by_id(&pdev->dev, i); - if (IS_ERR(priv->pd_dev[i])) { - ret = PTR_ERR(priv->pd_dev[i]); - goto exit_unroll_pm; - } - priv->link[i] = device_link_add(&pdev->dev, priv->pd_dev[i], - DL_FLAG_STATELESS | - DL_FLAG_PM_RUNTIME | - DL_FLAG_RPM_ACTIVE); - if (!priv->link[i]) { - ret = -ENOMEM; - dev_pm_domain_detach(priv->pd_dev[i], false); - goto exit_unroll_pm; - } - } - - ret = imx_scu_get_handle(&priv->sc_ipc); - if (ret) { - dev_err(sdev->dev, "Cannot obtain SCU handle (err = %d)\n", - ret); - goto exit_unroll_pm; - } - - priv->ipc_dev = platform_device_register_data(sdev->dev, "imx-dsp", - PLATFORM_DEVID_NONE, - pdev, sizeof(*pdev)); - if (IS_ERR(priv->ipc_dev)) { - ret = PTR_ERR(priv->ipc_dev); - goto exit_unroll_pm; - } - - priv->dsp_ipc = dev_get_drvdata(&priv->ipc_dev->dev); - if (!priv->dsp_ipc) { - /* DSP IPC driver not probed yet, try later */ - ret = -EPROBE_DEFER; - dev_err(sdev->dev, "Failed to get drvdata\n"); - goto exit_pdev_unregister; - } - - imx_dsp_set_data(priv->dsp_ipc, priv); - priv->dsp_ipc->ops = &dsp_ops; - - /* DSP base */ - mmio = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (mmio) { - base = mmio->start; - size = resource_size(mmio); - } else { - dev_err(sdev->dev, "error: failed to get DSP base at idx 0\n"); - ret = -EINVAL; - goto exit_pdev_unregister; - } - - sdev->bar[SOF_FW_BLK_TYPE_IRAM] = devm_ioremap(sdev->dev, base, size); - if (!sdev->bar[SOF_FW_BLK_TYPE_IRAM]) { - dev_err(sdev->dev, "failed to ioremap base 0x%x size 0x%x\n", - base, size); - ret = -ENODEV; - goto exit_pdev_unregister; - } - sdev->mmio_bar = SOF_FW_BLK_TYPE_IRAM; - - res_node = of_parse_phandle(np, "memory-region", 0); - if (!res_node) { - dev_err(&pdev->dev, "failed to get memory region node\n"); - ret = -ENODEV; - goto exit_pdev_unregister; - } - - ret = of_address_to_resource(res_node, 0, &res); - of_node_put(res_node); - if (ret) { - dev_err(&pdev->dev, "failed to get reserved region address\n"); - goto exit_pdev_unregister; - } - - sdev->bar[SOF_FW_BLK_TYPE_SRAM] = devm_ioremap_wc(sdev->dev, res.start, - resource_size(&res)); - if (!sdev->bar[SOF_FW_BLK_TYPE_SRAM]) { - dev_err(sdev->dev, "failed to ioremap mem 0x%x size 0x%x\n", - base, size); - ret = -ENOMEM; - goto exit_pdev_unregister; - } - sdev->mailbox_bar = SOF_FW_BLK_TYPE_SRAM; - - /* set default mailbox offset for FW ready message */ - sdev->dsp_box.offset = MBOX_OFFSET; - - ret = devm_clk_bulk_get_all(sdev->dev, &priv->clks); - if (ret < 0) { - dev_err(sdev->dev, "failed to fetch clocks: %d\n", ret); - goto exit_pdev_unregister; - } - priv->clk_num = ret; - - ret = clk_bulk_prepare_enable(priv->clk_num, priv->clks); - if (ret < 0) { - dev_err(sdev->dev, "failed to enable clocks: %d\n", ret); - goto exit_pdev_unregister; - } - - return 0; - -exit_pdev_unregister: - platform_device_unregister(priv->ipc_dev); -exit_unroll_pm: - while (--i >= 0) { - device_link_del(priv->link[i]); - dev_pm_domain_detach(priv->pd_dev[i], false); - } - - return ret; -} - -static void imx8_remove(struct snd_sof_dev *sdev) -{ - struct imx8_priv *priv = sdev->pdata->hw_pdata; - int i; - - clk_bulk_disable_unprepare(priv->clk_num, priv->clks); - platform_device_unregister(priv->ipc_dev); - - for (i = 0; i < priv->num_domains; i++) { - device_link_del(priv->link[i]); - dev_pm_domain_detach(priv->pd_dev[i], false); - } -} - -/* on i.MX8 there is 1 to 1 match between type and BAR idx */ -static int imx8_get_bar_index(struct snd_sof_dev *sdev, u32 type) -{ - /* Only IRAM and SRAM bars are valid */ - switch (type) { - case SOF_FW_BLK_TYPE_IRAM: - case SOF_FW_BLK_TYPE_SRAM: - return type; - default: - return -EINVAL; - } -} - -static void imx8_suspend(struct snd_sof_dev *sdev) -{ - int i; - struct imx8_priv *priv = (struct imx8_priv *)sdev->pdata->hw_pdata; - - for (i = 0; i < DSP_MU_CHAN_NUM; i++) - imx_dsp_free_channel(priv->dsp_ipc, i); - - clk_bulk_disable_unprepare(priv->clk_num, priv->clks); -} - -static int imx8_resume(struct snd_sof_dev *sdev) -{ - struct imx8_priv *priv = (struct imx8_priv *)sdev->pdata->hw_pdata; - int ret; - int i; - - ret = clk_bulk_prepare_enable(priv->clk_num, priv->clks); - if (ret < 0) { - dev_err(sdev->dev, "failed to enable clocks: %d\n", ret); - return ret; - } - - for (i = 0; i < DSP_MU_CHAN_NUM; i++) - imx_dsp_request_channel(priv->dsp_ipc, i); - - return 0; -} - -static int imx8_dsp_runtime_resume(struct snd_sof_dev *sdev) -{ + struct imx_common_data *common; + struct imx_sc_ipc *sc_ipc_handle; int ret; - const struct sof_dsp_power_state target_dsp_state = { - .state = SOF_DSP_PM_D0, - }; - - ret = imx8_resume(sdev); - if (ret < 0) - return ret; - - return snd_sof_dsp_set_power_state(sdev, &target_dsp_state); -} - -static int imx8_dsp_runtime_suspend(struct snd_sof_dev *sdev) -{ - const struct sof_dsp_power_state target_dsp_state = { - .state = SOF_DSP_PM_D3, - }; - - imx8_suspend(sdev); - - return snd_sof_dsp_set_power_state(sdev, &target_dsp_state); -} -static int imx8_dsp_suspend(struct snd_sof_dev *sdev, unsigned int target_state) -{ - const struct sof_dsp_power_state target_dsp_state = { - .state = target_state, - }; - - if (!pm_runtime_suspended(sdev->dev)) - imx8_suspend(sdev); + common = sdev->pdata->hw_pdata; - return snd_sof_dsp_set_power_state(sdev, &target_dsp_state); -} - -static int imx8_dsp_resume(struct snd_sof_dev *sdev) -{ - int ret; - const struct sof_dsp_power_state target_dsp_state = { - .state = SOF_DSP_PM_D0, - }; - - ret = imx8_resume(sdev); + ret = imx_scu_get_handle(&sc_ipc_handle); if (ret < 0) - return ret; + return dev_err_probe(sdev->dev, ret, + "failed to fetch SC IPC handle\n"); - if (pm_runtime_suspended(sdev->dev)) { - pm_runtime_disable(sdev->dev); - pm_runtime_set_active(sdev->dev); - pm_runtime_mark_last_busy(sdev->dev); - pm_runtime_enable(sdev->dev); - pm_runtime_idle(sdev->dev); - } + common->chip_pdata = sc_ipc_handle; - return snd_sof_dsp_set_power_state(sdev, &target_dsp_state); + return 0; } static struct snd_soc_dai_driver imx8_dai[] = { @@ -468,135 +143,60 @@ static struct snd_soc_dai_driver imx8_dai[] = { }, }; -static int imx8_dsp_set_power_state(struct snd_sof_dev *sdev, - const struct sof_dsp_power_state *target_state) -{ - sdev->dsp_power_state = *target_state; - - return 0; -} - -/* i.MX8 ops */ -static const struct snd_sof_dsp_ops sof_imx8_ops = { - /* probe and remove */ - .probe = imx8_probe, - .remove = imx8_remove, - /* DSP core boot */ - .run = imx8_run, - - /* Block IO */ - .block_read = sof_block_read, - .block_write = sof_block_write, - - /* Mailbox IO */ - .mailbox_read = sof_mailbox_read, - .mailbox_write = sof_mailbox_write, - - /* ipc */ - .send_msg = imx8_send_msg, - .get_mailbox_offset = imx8_get_mailbox_offset, - .get_window_offset = imx8_get_window_offset, +static struct snd_sof_dsp_ops sof_imx8_ops; - .ipc_msg_data = sof_ipc_msg_data, - .set_stream_data_offset = sof_set_stream_data_offset, - - .get_bar_index = imx8_get_bar_index, - - /* firmware loading */ - .load_firmware = snd_sof_load_firmware_memcpy, - - /* Debug information */ - .dbg_dump = imx8_dump, - .debugfs_add_region_item = snd_sof_debugfs_add_region_item_iomem, - - /* stream callbacks */ - .pcm_open = sof_stream_pcm_open, - .pcm_close = sof_stream_pcm_close, - - /* Firmware ops */ - .dsp_arch_ops = &sof_xtensa_arch_ops, - - /* DAI drivers */ - .drv = imx8_dai, - .num_drv = ARRAY_SIZE(imx8_dai), +static int imx8_ops_init(struct snd_sof_dev *sdev) +{ + /* first copy from template */ + memcpy(&sof_imx8_ops, &sof_imx_ops, sizeof(sof_imx_ops)); - /* ALSA HW info flags */ - .hw_info = SNDRV_PCM_INFO_MMAP | - SNDRV_PCM_INFO_MMAP_VALID | - SNDRV_PCM_INFO_INTERLEAVED | - SNDRV_PCM_INFO_PAUSE | - SNDRV_PCM_INFO_NO_PERIOD_WAKEUP, + /* then set common imx8 ops */ + sof_imx8_ops.dbg_dump = imx8_dump; + sof_imx8_ops.dsp_arch_ops = &sof_xtensa_arch_ops; + sof_imx8_ops.debugfs_add_region_item = + snd_sof_debugfs_add_region_item_iomem; - /* PM */ - .runtime_suspend = imx8_dsp_runtime_suspend, - .runtime_resume = imx8_dsp_runtime_resume, + /* ... and finally set DAI driver */ + sof_imx8_ops.drv = imx8_dai; + sof_imx8_ops.num_drv = ARRAY_SIZE(imx8_dai); - .suspend = imx8_dsp_suspend, - .resume = imx8_dsp_resume, + return 0; +} - .set_power_state = imx8_dsp_set_power_state, +static const struct imx_chip_ops imx8_chip_ops = { + .probe = imx8_probe, + .core_kick = imx8_run, }; -/* i.MX8X ops */ -static const struct snd_sof_dsp_ops sof_imx8x_ops = { - /* probe and remove */ - .probe = imx8_probe, - .remove = imx8_remove, - /* DSP core boot */ - .run = imx8x_run, - - /* Block IO */ - .block_read = sof_block_read, - .block_write = sof_block_write, - - /* Mailbox IO */ - .mailbox_read = sof_mailbox_read, - .mailbox_write = sof_mailbox_write, - - /* ipc */ - .send_msg = imx8_send_msg, - .get_mailbox_offset = imx8_get_mailbox_offset, - .get_window_offset = imx8_get_window_offset, - - .ipc_msg_data = sof_ipc_msg_data, - .set_stream_data_offset = sof_set_stream_data_offset, - - .get_bar_index = imx8_get_bar_index, - - /* firmware loading */ - .load_firmware = snd_sof_load_firmware_memcpy, - - /* Debug information */ - .dbg_dump = imx8_dump, - .debugfs_add_region_item = snd_sof_debugfs_add_region_item_iomem, - - /* stream callbacks */ - .pcm_open = sof_stream_pcm_open, - .pcm_close = sof_stream_pcm_close, - - /* Firmware ops */ - .dsp_arch_ops = &sof_xtensa_arch_ops, - - /* DAI drivers */ - .drv = imx8_dai, - .num_drv = ARRAY_SIZE(imx8_dai), - - /* PM */ - .runtime_suspend = imx8_dsp_runtime_suspend, - .runtime_resume = imx8_dsp_runtime_resume, +static const struct imx_chip_ops imx8x_chip_ops = { + .probe = imx8_probe, + .core_kick = imx8x_run, +}; - .suspend = imx8_dsp_suspend, - .resume = imx8_dsp_resume, +static struct imx_memory_info imx8_memory_regions[] = { + { .name = "iram", .reserved = false }, + { .name = "sram", .reserved = true }, + { } +}; - .set_power_state = imx8_dsp_set_power_state, +static const struct imx_chip_info imx8_chip_info = { + .ipc_info = { + .has_panic_code = true, + .boot_mbox_offset = 0x800000, + .window_offset = 0x800000, + }, + .memory = imx8_memory_regions, + .ops = &imx8_chip_ops, +}; - /* ALSA HW info flags */ - .hw_info = SNDRV_PCM_INFO_MMAP | - SNDRV_PCM_INFO_MMAP_VALID | - SNDRV_PCM_INFO_INTERLEAVED | - SNDRV_PCM_INFO_PAUSE | - SNDRV_PCM_INFO_BATCH | - SNDRV_PCM_INFO_NO_PERIOD_WAKEUP +static const struct imx_chip_info imx8x_chip_info = { + .ipc_info = { + .has_panic_code = true, + .boot_mbox_offset = 0x800000, + .window_offset = 0x800000, + }, + .memory = imx8_memory_regions, + .ops = &imx8x_chip_ops, }; static struct snd_sof_of_mach sof_imx8_machs[] = { @@ -636,6 +236,7 @@ static struct snd_sof_of_mach sof_imx8_machs[] = { static struct sof_dev_desc sof_of_imx8qxp_desc = { .of_machines = sof_imx8_machs, + .chip_info = &imx8x_chip_info, .ipc_supported_mask = BIT(SOF_IPC_TYPE_3), .ipc_default = SOF_IPC_TYPE_3, .default_fw_path = { @@ -648,11 +249,13 @@ static struct sof_dev_desc sof_of_imx8qxp_desc = { [SOF_IPC_TYPE_3] = "sof-imx8x.ri", }, .nocodec_tplg_filename = "sof-imx8-nocodec.tplg", - .ops = &sof_imx8x_ops, + .ops = &sof_imx8_ops, + .ops_init = imx8_ops_init, }; static struct sof_dev_desc sof_of_imx8qm_desc = { .of_machines = sof_imx8_machs, + .chip_info = &imx8_chip_info, .ipc_supported_mask = BIT(SOF_IPC_TYPE_3), .ipc_default = SOF_IPC_TYPE_3, .default_fw_path = { @@ -666,6 +269,7 @@ static struct sof_dev_desc sof_of_imx8qm_desc = { }, .nocodec_tplg_filename = "sof-imx8-nocodec.tplg", .ops = &sof_imx8_ops, + .ops_init = imx8_ops_init, }; static const struct of_device_id sof_of_imx8_ids[] = { From patchwork Mon Feb 3 17:18:02 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurentiu Mihalcea X-Patchwork-Id: 13957921 Received: from mail-ej1-f46.google.com (mail-ej1-f46.google.com [209.85.218.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4FFB820D512 for ; Mon, 3 Feb 2025 17:19:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.46 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738603150; cv=none; b=Y4aCwUy42u7Xt0Ud92rIM8ih/xntFjHN11G0nADqZ3svAO2MBUkfcdP4MG+lAWAtLXOybTMAVo5kXXSUVcciX361fGhY9Hw8XrgTEGc7AXbk6zEPKbOEaIkLhQKfYwU6ggQLvjoU67bgJuX1Sswb2CtmbpPW4VpXVFdn9KOItfg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738603150; c=relaxed/simple; bh=VNs1yTCL8ASYwgaEioSkbavqaPwUFc/eFJ0jyKYTTC4=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=sW53jXCOShWhg93uv5OWQqOZ8m4Gj4Ks13RXOBBg1tQm5ZHiANd1onoK5yIFb0h540k0W78+0fjcrtXK/glNoe4zsLvBEX9Cp9labxNkQCoIj5kYu2KVjWKQ4ivboOGKLgv8YeqYEhNzVmrFjqyR32GWsLpl1HMS9oFUo/Cne20= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=L8euEKFX; arc=none smtp.client-ip=209.85.218.46 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="L8euEKFX" Received: by mail-ej1-f46.google.com with SMTP id a640c23a62f3a-aafc9d75f8bso934218366b.2 for ; Mon, 03 Feb 2025 09:19:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1738603147; x=1739207947; darn=lists.linux.dev; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=P34NMvrc2uhxkk2+6CwvtqHEG5loNfpYNkGJ1/e/fKQ=; b=L8euEKFXbRBs+CHxTLsq3L4KKOG13TsqfXa0uyBU3GyMTviWO5XEHSkEgPVOA+R2C4 wtKq8dUS8hn0dYzOIoewtp8i19vWpVKfK84u7lnSSwPndlW16rSxbQ9imRkuCL2wvknc 4O2iJr2+oWjKMg4cZBGO92Kn5v6EdD++BPFF0J7i8rv47pE5lgq8D327EfjFVLnjLLD9 ztlgFcuqADYBLYJXLQEDYcZjk8XERzwKhGkcS3a6ReL3e7hKyeaBCNquy1Be42LznJkj iXA5r2KRQr9HBUc803Y2EJhgdDpuxm1ZTt2mj0gMRJSIMXORJ/C7Anz0cgvoZOcNMMT+ /Dtg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738603147; x=1739207947; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=P34NMvrc2uhxkk2+6CwvtqHEG5loNfpYNkGJ1/e/fKQ=; b=NV5f7zCzngcOWYzqnnn2I5N7VEFPxgvNXyglzPQ44xo/RoNMi/o8vp/5ozgtjkqa5n OY29Uwum07KjJcFximjPDUVv4oOl0NDFjOz+0Yil6pNcUUsr6T5oko1MV7TUUZ34yFrX Dozttf58k/+E+UM6j6ARldhxJJbYLKdwYULZe0abWPTtJiynbUwf4e1DAX7bGhlwoved qchxx/YXaIRF0VwDVEZzPpId41qvC9B/4xeKaLexrcQN6+Npy0Jdj86myyNj1qUCqD47 NeqS3QpkRzlrO5IIU4Vnrbfsh+sJ69/l1gmqXgq4VmHdEveyrVPZHG4eQ3Fv6eT/V7O0 sidQ== X-Forwarded-Encrypted: i=1; AJvYcCVvAMNUbzksQR+PDXihq/mOzp0GtrZBe4fn8szBoirte50rgjvtECqTHuUfnbiuLNRQuBg=@lists.linux.dev X-Gm-Message-State: AOJu0Yw5dhU+1tDwSv0i8MFB5j3mC4kdIQOpZgzMeKJnq6LEaKU3jAbe RPGtQ1YGw0E9sekv2sdsCwKJN81ocvsqGaBtUMpY8s2ssrOq80L8 X-Gm-Gg: ASbGnctU2iu2PRJ0Erkwc338JinZ4DOQUIfm69gZJC8XIL1Msn3GTImTa1TjTCBOkIr /Nzg8+9pnS16SnYQqK5/v4X23axLl6yfHtJKOOQNMHzULUODYwF8jjjHdGqTkb3vouUvbTTiZ1M USC2IMNzJo0l6Y8IaVRyfIKW2fY2werd5lUMHlogEj862qnr+jFjSzvnLw0HU1wv3YYhX44SV10 /nneZL9kUnm8lmYEH7OYptZ0hVlqhNe56UkcD9OgcE2H3WZneSYzGyavGqb6Ywb3QAP8Vu26mne mA0NQc1aNyt/jiwh/QtULI211+ut30u4gCObcnxcypb8d4BAVg== X-Google-Smtp-Source: AGHT+IEdHXc+fPM0xVNULF/V/H9tGXzO0UkrXEfKGHXOEa7lVWvXt/Sg1j5c1jXanaNrw8TTK2W3kg== X-Received: by 2002:a17:906:6a17:b0:ab3:2b85:5d5 with SMTP id a640c23a62f3a-ab6cfdc6186mr2164326366b.49.1738603146473; Mon, 03 Feb 2025 09:19:06 -0800 (PST) Received: from playground.localdomain ([92.120.5.2]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ab6e47d21aasm784253866b.74.2025.02.03.09.19.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Feb 2025 09:19:05 -0800 (PST) From: Laurentiu Mihalcea To: Bard Liao , Daniel Baluta , Iuliana Prodan , Jaroslav Kysela , Takashi Iwai , Mark Brown Cc: linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org, imx@lists.linux.dev Subject: [PATCH 3/9] ASoC: SOF: imx8: use IMX_SOF_* macros Date: Mon, 3 Feb 2025 12:18:02 -0500 Message-Id: <20250203171808.4108-4-laurentiumihalcea111@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250203171808.4108-1-laurentiumihalcea111@gmail.com> References: <20250203171808.4108-1-laurentiumihalcea111@gmail.com> Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Laurentiu Mihalcea The definition of 'struct sof_dev_desc' has the following properties for imx chips: 1) FW path is the same for all chips. 2) Topology path is the same for all chips. 3) FW name can be written as: "sof-${machine_name}.ri" 4) IPC3 is the only supported protocol The structure takes quite a few lines of code. Since the intention is to add support for more imx8 chips in the same driver, we need to try and reduce the number of lines taken by information that's not particularly useful. As such, we can use 'IMX_SOF_DEV_DESC()' to reduce the declaration of the structure to just one line. The only information that's particularly useful can be seen from the parameters of the macro. Of course, if any of the assumptions don't apply anymore, driver writers can simply declare the 'struct sof_dev_desc' the "old fashioned way". No reason to make the macro suit multiple needs. The same logic applies to the array of 'struct snd_soc_dai_driver'. Signed-off-by: Laurentiu Mihalcea Reviewed-by: Daniel Baluta Reviewed-by: Iuliana Prodan --- sound/soc/sof/imx/imx8.c | 71 +++++++--------------------------------- 1 file changed, 11 insertions(+), 60 deletions(-) diff --git a/sound/soc/sof/imx/imx8.c b/sound/soc/sof/imx/imx8.c index a44c3004a537..05c4d70cd116 100644 --- a/sound/soc/sof/imx/imx8.c +++ b/sound/soc/sof/imx/imx8.c @@ -119,28 +119,8 @@ static int imx8_probe(struct snd_sof_dev *sdev) } static struct snd_soc_dai_driver imx8_dai[] = { -{ - .name = "esai0", - .playback = { - .channels_min = 1, - .channels_max = 8, - }, - .capture = { - .channels_min = 1, - .channels_max = 8, - }, -}, -{ - .name = "sai1", - .playback = { - .channels_min = 1, - .channels_max = 32, - }, - .capture = { - .channels_min = 1, - .channels_max = 32, - }, -}, + IMX_SOF_DAI_DRV_ENTRY_BIDIR("esai0", 1, 8), + IMX_SOF_DAI_DRV_ENTRY_BIDIR("sai1", 1, 32), }; static struct snd_sof_dsp_ops sof_imx8_ops; @@ -234,47 +214,18 @@ static struct snd_sof_of_mach sof_imx8_machs[] = { {} }; -static struct sof_dev_desc sof_of_imx8qxp_desc = { - .of_machines = sof_imx8_machs, - .chip_info = &imx8x_chip_info, - .ipc_supported_mask = BIT(SOF_IPC_TYPE_3), - .ipc_default = SOF_IPC_TYPE_3, - .default_fw_path = { - [SOF_IPC_TYPE_3] = "imx/sof", - }, - .default_tplg_path = { - [SOF_IPC_TYPE_3] = "imx/sof-tplg", - }, - .default_fw_filename = { - [SOF_IPC_TYPE_3] = "sof-imx8x.ri", - }, - .nocodec_tplg_filename = "sof-imx8-nocodec.tplg", - .ops = &sof_imx8_ops, - .ops_init = imx8_ops_init, -}; +IMX_SOF_DEV_DESC(imx8, sof_imx8_machs, &imx8_chip_info, &sof_imx8_ops, imx8_ops_init); +IMX_SOF_DEV_DESC(imx8x, sof_imx8_machs, &imx8x_chip_info, &sof_imx8_ops, imx8_ops_init); -static struct sof_dev_desc sof_of_imx8qm_desc = { - .of_machines = sof_imx8_machs, - .chip_info = &imx8_chip_info, - .ipc_supported_mask = BIT(SOF_IPC_TYPE_3), - .ipc_default = SOF_IPC_TYPE_3, - .default_fw_path = { - [SOF_IPC_TYPE_3] = "imx/sof", - }, - .default_tplg_path = { - [SOF_IPC_TYPE_3] = "imx/sof-tplg", +static const struct of_device_id sof_of_imx8_ids[] = { + { + .compatible = "fsl,imx8qxp-dsp", + .data = &IMX_SOF_DEV_DESC_NAME(imx8x), }, - .default_fw_filename = { - [SOF_IPC_TYPE_3] = "sof-imx8.ri", + { + .compatible = "fsl,imx8qm-dsp", + .data = &IMX_SOF_DEV_DESC_NAME(imx8), }, - .nocodec_tplg_filename = "sof-imx8-nocodec.tplg", - .ops = &sof_imx8_ops, - .ops_init = imx8_ops_init, -}; - -static const struct of_device_id sof_of_imx8_ids[] = { - { .compatible = "fsl,imx8qxp-dsp", .data = &sof_of_imx8qxp_desc}, - { .compatible = "fsl,imx8qm-dsp", .data = &sof_of_imx8qm_desc}, { } }; MODULE_DEVICE_TABLE(of, sof_of_imx8_ids); From patchwork Mon Feb 3 17:18:03 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurentiu Mihalcea X-Patchwork-Id: 13957922 Received: from mail-ej1-f52.google.com (mail-ej1-f52.google.com [209.85.218.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3D2E220E005 for ; Mon, 3 Feb 2025 17:19:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.52 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738603152; cv=none; b=X98S2d5mv80UstrGwS8P9AkcTqppxVexDn1tEE3H+r5J6BO40GCoisDXRDRhfze3T+jOrTNLe6tSD00sg/o+0d+lTVRQitG8igpQuQE+DypZeAr55Qnkt/uKUkTcuK/I5DhgySvRDcKLEX6aYzCyliobmBZzZRgB4tG0bDaetQs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738603152; c=relaxed/simple; bh=c/87/Tqegwrt/2Kl9lHnm/e1ty+fIyN0gPiFt760Fno=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=fGrN/tJqNIKOL7oLrT4V+LWAT0vtjZOVQD0gN5ODFSl4Mnlj1p5F5sq8qW3yzymtNVUndvy5SfLdQomjf63Bc5Dlj7Xx/K53+BvfsTnClqte8ScOnO7q9Tle4iNJO2ct4G7rg0YuepFeLJMxx+qW73V4XOVEwcsUCF5oSAau40k= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=A/cnRMxi; arc=none smtp.client-ip=209.85.218.52 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="A/cnRMxi" Received: by mail-ej1-f52.google.com with SMTP id a640c23a62f3a-aa68b513abcso827592666b.0 for ; Mon, 03 Feb 2025 09:19:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1738603148; x=1739207948; darn=lists.linux.dev; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=8HDJU/hlw9VtUZBjKQe881/LPWYIHVX4wwVTE4H2RZk=; b=A/cnRMxi9EXk0dmDzWYGz5rAbUJ803E11OCEOT6yJw32c4ukUy40rNnzjZ6apreCqZ CrqQMwhBycgSUkJKB2BOusMxRKgAgG7AmDWFFxwv3wzI/a5Veb4hRubKEyfBBM8Chq4p zpnz1QpD2vzVGUecnyhDCP9HyO/BzdA1kJvKj2UhorYzO3WlL3G/9sq9Jhi9vc+U69dp t5ZN1hmASCxH/C5lXG93XwlOQp38dJX3CS1tlkJCbmV2PNSgzk0rH0DqFiE6Fa0M5ZHW PQBOASjblnqWxakfWbY1vU1E82R8sianmrYXlMGIEVQV4H7nuZD5xc8dKoUWJwWUIjez f0kw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738603148; x=1739207948; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=8HDJU/hlw9VtUZBjKQe881/LPWYIHVX4wwVTE4H2RZk=; b=GyJGkAuY/nhDqnsmZs3j9GbjKOf2KnkA+q/7uJYmgDCS7DDPvIQG1E10jH9hqCLrDE kInRt/WeIEMhhiagmlVCAFayHkoea2rTNkkCTB7omzrjVFXnZnpcgYabS7fI7WXpAEWV pNTkvMbakH0rUo7p/s301yZKT6kApHTwwBG65BzY+JINU2/LGgmn0IhTgZush+LXwsBR 203AASF8Qx/NzJhYM27dX1dVRZWFhgrCDG77CoQlTrthFwFE30/vu6BrXTWjD/ViM0mA o3/CsR6h06+a+suwoOPCdxhTHcuNSkv74BRBIh1TtRXJnHgU1HtQatiIEGmJ4wXLe4SL E6QQ== X-Forwarded-Encrypted: i=1; AJvYcCWDuePsVF5TfMz1VH4pDOwjhUEd49d0AxpOnhRQmSE4PT3Erh4wc0q6gPkqJbZlbCYG+XQ=@lists.linux.dev X-Gm-Message-State: AOJu0Yx5/LZcL/crLkjK1LT+ngnihttN5Xb4SlJMDFjPLJFgBfJjuLcY lMjpHoVPt5mWZ5eIcrgFB9LyF0spVxs73oj/ThlIBAzfBoOCwZvg X-Gm-Gg: ASbGncsI1B7wKolE/cyl/Zeb1DrjndlGaOwLCBcJioS/a9K1rgS3Ve50V48YQZxVXp/ j3PHHAZN0giBtnMnu3XRX3qBBWxcnirvgVseKlftIEiodZYS/DCHzabH4ktZwYjgyZqVeZnWnSr sCzk1yleZFfMqnQWgLB0a3W3sSAfUx4GM7/2ASWWgYdfDCr2Q5L87HHcxF7Rug5dOqOdEG0sl3b vBmcFNGdIwr5pWoJngJUMkfZbkJ0SYZ3xaQmBkhaPDSj3PO58uF1l3QcuceqrEVnX9XhOkbHBiF zhfZSIgJcUI5POVpyvuWb37pX6+cN9NEyjGqPl4DGOBzCP9vaA== X-Google-Smtp-Source: AGHT+IHqGG7FODmJuqkyhO/fPMpoBjkJnej9dmtGBBBibBSaKHHWSfPqxSu3cw+Gk6EJGBDRs/8G8Q== X-Received: by 2002:a17:907:1c95:b0:ab7:992:7f42 with SMTP id a640c23a62f3a-ab709927f70mr1262532566b.34.1738603148425; Mon, 03 Feb 2025 09:19:08 -0800 (PST) Received: from playground.localdomain ([92.120.5.2]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ab6e47d21aasm784253866b.74.2025.02.03.09.19.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Feb 2025 09:19:07 -0800 (PST) From: Laurentiu Mihalcea To: Bard Liao , Daniel Baluta , Iuliana Prodan , Jaroslav Kysela , Takashi Iwai , Mark Brown Cc: linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org, imx@lists.linux.dev Subject: [PATCH 4/9] ASoC: SOF: imx8: shuffle structure and function definitions Date: Mon, 3 Feb 2025 12:18:03 -0500 Message-Id: <20250203171808.4108-5-laurentiumihalcea111@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250203171808.4108-1-laurentiumihalcea111@gmail.com> References: <20250203171808.4108-1-laurentiumihalcea111@gmail.com> Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Laurentiu Mihalcea Shuffle the definitions of some structures and functions such that they are better grouped. This is purely a cosmetic change. Signed-off-by: Laurentiu Mihalcea Reviewed-by: Daniel Baluta Reviewed-by: Iuliana Prodan --- sound/soc/sof/imx/imx8.c | 85 ++++++++++++++++++++-------------------- 1 file changed, 43 insertions(+), 42 deletions(-) diff --git a/sound/soc/sof/imx/imx8.c b/sound/soc/sof/imx/imx8.c index 05c4d70cd116..93968f077d52 100644 --- a/sound/soc/sof/imx/imx8.c +++ b/sound/soc/sof/imx/imx8.c @@ -41,6 +41,49 @@ #define MBOX_OFFSET 0x800000 #define MBOX_SIZE 0x1000 +static struct snd_soc_dai_driver imx8_dai[] = { + IMX_SOF_DAI_DRV_ENTRY_BIDIR("esai0", 1, 8), + IMX_SOF_DAI_DRV_ENTRY_BIDIR("sai1", 1, 32), +}; + +static struct snd_sof_dsp_ops sof_imx8_ops; + +static int imx8_ops_init(struct snd_sof_dev *sdev) +{ + /* first copy from template */ + memcpy(&sof_imx8_ops, &sof_imx_ops, sizeof(sof_imx_ops)); + + /* then set common imx8 ops */ + sof_imx8_ops.dbg_dump = imx8_dump; + sof_imx8_ops.dsp_arch_ops = &sof_xtensa_arch_ops; + sof_imx8_ops.debugfs_add_region_item = + snd_sof_debugfs_add_region_item_iomem; + + /* ... and finally set DAI driver */ + sof_imx8_ops.drv = imx8_dai; + sof_imx8_ops.num_drv = ARRAY_SIZE(imx8_dai); + + return 0; +} + +static int imx8_probe(struct snd_sof_dev *sdev) +{ + struct imx_common_data *common; + struct imx_sc_ipc *sc_ipc_handle; + int ret; + + common = sdev->pdata->hw_pdata; + + ret = imx_scu_get_handle(&sc_ipc_handle); + if (ret < 0) + return dev_err_probe(sdev->dev, ret, + "failed to fetch SC IPC handle\n"); + + common->chip_pdata = sc_ipc_handle; + + return 0; +} + /* * DSP control. */ @@ -100,48 +143,6 @@ static int imx8_run(struct snd_sof_dev *sdev) return 0; } -static int imx8_probe(struct snd_sof_dev *sdev) -{ - struct imx_common_data *common; - struct imx_sc_ipc *sc_ipc_handle; - int ret; - - common = sdev->pdata->hw_pdata; - - ret = imx_scu_get_handle(&sc_ipc_handle); - if (ret < 0) - return dev_err_probe(sdev->dev, ret, - "failed to fetch SC IPC handle\n"); - - common->chip_pdata = sc_ipc_handle; - - return 0; -} - -static struct snd_soc_dai_driver imx8_dai[] = { - IMX_SOF_DAI_DRV_ENTRY_BIDIR("esai0", 1, 8), - IMX_SOF_DAI_DRV_ENTRY_BIDIR("sai1", 1, 32), -}; - -static struct snd_sof_dsp_ops sof_imx8_ops; - -static int imx8_ops_init(struct snd_sof_dev *sdev) -{ - /* first copy from template */ - memcpy(&sof_imx8_ops, &sof_imx_ops, sizeof(sof_imx_ops)); - - /* then set common imx8 ops */ - sof_imx8_ops.dbg_dump = imx8_dump; - sof_imx8_ops.dsp_arch_ops = &sof_xtensa_arch_ops; - sof_imx8_ops.debugfs_add_region_item = - snd_sof_debugfs_add_region_item_iomem; - - /* ... and finally set DAI driver */ - sof_imx8_ops.drv = imx8_dai; - sof_imx8_ops.num_drv = ARRAY_SIZE(imx8_dai); - - return 0; -} static const struct imx_chip_ops imx8_chip_ops = { .probe = imx8_probe, From patchwork Mon Feb 3 17:18:04 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurentiu Mihalcea X-Patchwork-Id: 13957923 Received: from mail-ej1-f51.google.com (mail-ej1-f51.google.com [209.85.218.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5996A20E030 for ; Mon, 3 Feb 2025 17:19:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.51 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738603154; cv=none; b=N9dSvwSyWWgGjoGR+5iO2ahnAgDhfRmgX3udKDTPtikLeF+N9wq1x59h8BGTHianZqAaSiSiT7ZqQQo0EuIZbX+Lf8w/+FXn/ZSdCxNHMiMrve3wvxKMmn0LMG3OeC2dz0j3yxfJ1xv3jDbgf5j5Z8UfDOa5N9oNS0/u/6zE8rg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738603154; c=relaxed/simple; bh=105ztv0GxeKGez2Y1scHpelgc9Xdh5IcIC+jWLs7RP8=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=P9HJI0pUcraMrF/uTR/6YqRnskk527YhsQiiqc2TSey5oiWoRRxfTl99GFVp+xm6YBAnHnjIWUqUiQiSE/tlIyu4wvmWIv8son7KLhG+bKqcIl/T0HIebOeFpFDlS+cC2mwHCpAAehCzliVk2oyjuAAaMZBbjM7KGDjZfMsh/Es= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=ldqZYPMI; arc=none smtp.client-ip=209.85.218.51 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="ldqZYPMI" Received: by mail-ej1-f51.google.com with SMTP id a640c23a62f3a-a9e44654ae3so750181766b.1 for ; Mon, 03 Feb 2025 09:19:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1738603151; x=1739207951; darn=lists.linux.dev; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=LVLkWQiYUuhhhsdwpTyM3ZsFW0DY+2FMF1nD3WQqkOg=; b=ldqZYPMI802kYvGpR4Wrr2V4R3WXZYK0Wsjy+FdS3pobQAFmb20YuTuz9src6d5ajc mKKGJPetkCA4f8cNsA+hbDxAR1AD8TBT5U55Uh0V5bnmfIp+F7AjSyckRPjeT/8dzgvZ 1WrC1EseWQ+HIbGeRtpC4nSVH6QyPYu0aOYbiJeIG7JiK8CtQKYfQRVKnAiVOSEAlwKX ohTH6AewQBTObOrQqfXteZd2pgPTWrzoBx7H2ArS4VMdijZVa3e82yz4BOzahknR58Cr ngsRMkKWVqcRuW042dbyBAY26rUXoj2SViwgtCCEG13JU8jyecPZN3gGJc2LffS6C8aa l9dQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738603151; x=1739207951; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=LVLkWQiYUuhhhsdwpTyM3ZsFW0DY+2FMF1nD3WQqkOg=; b=YPi/15yGs0vQkavS6CNnCcinWEmT2QJzS3lk8A4PFjBN4/bm4QH/ImTonNpTRfEtRm oButCc1mAbpYcIqC8qyiGJh2vb77zjM6fkcwcFG+CwWy9ydTXj2Zbx15SudroWPC9n8F mL+0UFq7q47a4NKXVkcnRkWmcspwyfub002ZWYiDECcTw+usJ7q8PZQFhmBR4gEL0eaF luHPG3MRrGlgemxmjo6NuRr0FdV0vAGQIhgQzLAcs7czE9AWJztzPXyMBzFwbnYGtZ32 z/W5ipGrZ0+QrjIwIVkWisPQ3P5tpt6lTo8MkXcEJG3/8l6EXESZCh9km0wgENmmYuCA hzXw== X-Forwarded-Encrypted: i=1; AJvYcCWuP1V8en+b4rBcCI021OPgsQHRKFqiovvk19KzYpmPGwlhXdBvvMVqJ03HqPqEe+vbifI=@lists.linux.dev X-Gm-Message-State: AOJu0YwpO9fAimWxSmnlN1MifVbExKirFFHNgaJwzzoGe0Y6v/dT/6Lh r38XAC/w4fDZi6qs5DkinZl4ATI8ZxwwSQpeiJQ2GTywipSbf5/hoeT/3A1U X-Gm-Gg: ASbGncsCitUIzsVcjrxvDhiqpQLqC3mhFgfEOVzhSNGFnN24j/DhfhMEGh2+uzUaT+i UlxP5d4mAqqkCpaIw9tCPTcxs41PGPBDXEdhxMmLvQeH6DOotNE2I9JBExrupE/aOq9HXHT7x+2 uBloP3QGHQsT5x4uuLUg+gkIJL7+svWAabEYTLmtAJy7ga0utWDPrZSV68z7SHxbaFTzyxx3Wgp UNc7j4z84zH5TG2LHHsWQCyfEvm8a6+1itPgQ1F84sqWbCZBRMc4zXeNvxK7FL4wSu5oTJw7qYf 8cHeZakjz4dEDLXWhFoSlehuO8dUJxVUBYJWpfY8oWzbQzMXag== X-Google-Smtp-Source: AGHT+IFWBtIzBa55lZGBmGM864Rxc9R4mw2rCLQdHmq6rtMQaJzvFs8EjxgL0A6Ds+KOpWrF0JHfSg== X-Received: by 2002:a17:907:961a:b0:aac:2128:c89e with SMTP id a640c23a62f3a-ab6cfdbc4d3mr2826766466b.43.1738603150375; Mon, 03 Feb 2025 09:19:10 -0800 (PST) Received: from playground.localdomain ([92.120.5.2]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ab6e47d21aasm784253866b.74.2025.02.03.09.19.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Feb 2025 09:19:09 -0800 (PST) From: Laurentiu Mihalcea To: Bard Liao , Daniel Baluta , Iuliana Prodan , Jaroslav Kysela , Takashi Iwai , Mark Brown Cc: linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org, imx@lists.linux.dev Subject: [PATCH 5/9] ASoC: SOF: imx8: drop unneeded/unused macros/header includes Date: Mon, 3 Feb 2025 12:18:04 -0500 Message-Id: <20250203171808.4108-6-laurentiumihalcea111@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250203171808.4108-1-laurentiumihalcea111@gmail.com> References: <20250203171808.4108-1-laurentiumihalcea111@gmail.com> Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Laurentiu Mihalcea Drop some unneeded/unused macro definitions and header includes. Signed-off-by: Laurentiu Mihalcea Reviewed-by: Daniel Baluta Reviewed-by: Iuliana Prodan --- sound/soc/sof/imx/imx8.c | 29 ----------------------------- 1 file changed, 29 deletions(-) diff --git a/sound/soc/sof/imx/imx8.c b/sound/soc/sof/imx/imx8.c index 93968f077d52..1efdb169cf07 100644 --- a/sound/soc/sof/imx/imx8.c +++ b/sound/soc/sof/imx/imx8.c @@ -6,41 +6,12 @@ // // Hardware interface for audio DSP on i.MX8 -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - #include #include -#include "../ops.h" -#include "../sof-of-dev.h" #include "imx-common.h" -/* DSP memories */ -#define IRAM_OFFSET 0x10000 -#define IRAM_SIZE (2 * 1024) -#define DRAM0_OFFSET 0x0 -#define DRAM0_SIZE (32 * 1024) -#define DRAM1_OFFSET 0x8000 -#define DRAM1_SIZE (32 * 1024) -#define SYSRAM_OFFSET 0x18000 -#define SYSRAM_SIZE (256 * 1024) -#define SYSROM_OFFSET 0x58000 -#define SYSROM_SIZE (192 * 1024) - #define RESET_VECTOR_VADDR 0x596f8000 -#define MBOX_OFFSET 0x800000 -#define MBOX_SIZE 0x1000 - static struct snd_soc_dai_driver imx8_dai[] = { IMX_SOF_DAI_DRV_ENTRY_BIDIR("esai0", 1, 8), IMX_SOF_DAI_DRV_ENTRY_BIDIR("sai1", 1, 32), From patchwork Mon Feb 3 17:18:05 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurentiu Mihalcea X-Patchwork-Id: 13957924 Received: from mail-ej1-f43.google.com (mail-ej1-f43.google.com [209.85.218.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D68DD20E313 for ; Mon, 3 Feb 2025 17:19:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.43 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738603155; cv=none; b=qT0jJykbr3NPai/WdZHrS0FoQuRFjHr+kthBLPyChozkTOKTcjDJBHSdy2l9j3IiPrffnUbEhZpjhUlXv/b3Fwah+wJ90Ozc+6vxYaG6Zke6bXKubV8LdP9ugjQwJOrfSrqN+pMUIpQxiAJG+6ghPYqDjFM9cwSBjKyRodH5vqA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738603155; c=relaxed/simple; bh=PeuxyZN5kjCrUQCHuJkw757DhnqFYnYetNHttqFX2YM=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=Hu8tNKrjMerZT5ZmLIODJFPRTf2bMNxqriwYHTd7dEpwpKec9EBpQQ3MyxAc6JPP9WsYWWagX8h0mt4LrgclWQ3xheOo9AmOiMax24SiJBsayfsEO/GP08rNvRlLFJ/2ClVE7WOh5zWlLw/4N7PYIvJSpwQYQotjsZmR66x6lLA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=mhg07iC0; arc=none smtp.client-ip=209.85.218.43 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="mhg07iC0" Received: by mail-ej1-f43.google.com with SMTP id a640c23a62f3a-aaec61d0f65so790945966b.1 for ; Mon, 03 Feb 2025 09:19:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1738603152; x=1739207952; darn=lists.linux.dev; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=s1Pbs/J8b4Igknc5yqniTBPJ77aem92hsd265K55YQo=; b=mhg07iC033KAJ6OHzbqcI7JeyQEFuQsgD5gSAz7oWRqrZKWnJWa5B9MV+Uamtkj0Fo taFbRyR/RYKJ2jJL9YKgmuXuSJ86Ro27VkW46/rF0PMUQNlSyaPB8h7YS6DJXw5n4kvg R5ekCL3uVSLvtXyPbErkpn6kPpOFZQHx/uRGFKhjSf0gZFULUmQt0mhKXV2jfKzYBlTD WkSSX0OmVJR32EIMozkhoxFuo5zycxxtBaMTfN4lHk0qdkKKqAU3p5005lLT/GP3ZYvA SlgG1yrqGd1Lu3zxJg7A4YzDqsz6KitvKtIJ1nGzyMXnpDAbN1VmO1GwMNgHcO2GVUuT 90Jw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738603152; x=1739207952; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=s1Pbs/J8b4Igknc5yqniTBPJ77aem92hsd265K55YQo=; b=ZhUjZM5XgJiKdouOhCo2MzhQHKPGg6TXbuwr7vl5fnHhFtQrajAVhhTqJRCUnvoguP 3j586QttBz1gZkVQI3dPHQ8YPTm5meA8eBYHnO4Db93eN7D3c0dzhbJP9YGutIdOyZk1 1bjSyMol1bCOB6Yy4MvJnn30n4P7lzi2IIh7KHGtrt5Ff89VJEkqSZpORbnJsHSLoo3v NEeWzSltt2e4B73RfJqOXqWZ8QhPmT8gk21e9xo+bYrwEcB/1SX3n9yLvvvOG/FuM4zP ySRQBZvoYn4TW6nXlv4e+S6h3XYuc62UR3em243QoHZZ+41DyKp0C8QOdXhORgK9udK7 lzYg== X-Forwarded-Encrypted: i=1; AJvYcCXj4nd7/iQ9S2CE89oSrE9/+fvdhukr8P80IFHouzjUvs+TPoPW1VW8nI3tXhQn1eDzRuM=@lists.linux.dev X-Gm-Message-State: AOJu0Yxns79iJxDgrQBvMVWUf772iJe//Uz0AMyWTHDXHKa3INpt4qi0 ACpXzcW41MNoJHSLYHBS/ySeHGcqMTDJ4H7Hl/uI+nbpQ7ujRenuT+iVlJaO X-Gm-Gg: ASbGncs+hBwav88R+oZxt81TBeRx68aS6mD4yeeoYaG9wsITSkpKByaAN2Dh8bD4p8/ hgDCpHhDivKQb3nJNXbg8/Dh1JHvDj7P0pERDJkO8l1cDyKY5zhgju4SsMBWo041xed6B+t57gu ykBBiR6iMPWNMDta7VSceQsDXvszfTXs9krie/jBQ5aMLla7fkm3K24ZqvvvcIEs7IbqwN2Ofq7 m2i9muvKfSNPSrzOhrhbHnxger+SyW1C4UmeXFAdKJfVDh97SuSnhxYfnMH34MCA7wMuhPgfqCU dXp5Lsq+e+COkQ0COfSS6yGNDFCuqpHuf0t2OV6XtIYNossvYA== X-Google-Smtp-Source: AGHT+IHsj5TahE0cdQFShWYL7mrK3YS4ctKQ2+LW9xf64gfjtdYuf+utJWLoKhoy+U8GkXjrFnKn1g== X-Received: by 2002:a17:906:c10b:b0:aa6:6ea7:e5a7 with SMTP id a640c23a62f3a-ab6cfd0e4c4mr2419127566b.28.1738603152154; Mon, 03 Feb 2025 09:19:12 -0800 (PST) Received: from playground.localdomain ([92.120.5.2]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ab6e47d21aasm784253866b.74.2025.02.03.09.19.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Feb 2025 09:19:11 -0800 (PST) From: Laurentiu Mihalcea To: Bard Liao , Daniel Baluta , Iuliana Prodan , Jaroslav Kysela , Takashi Iwai , Mark Brown Cc: linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org, imx@lists.linux.dev Subject: [PATCH 6/9] ASoC: SOF: imx8: make imx8_ops_init() an util function Date: Mon, 3 Feb 2025 12:18:05 -0500 Message-Id: <20250203171808.4108-7-laurentiumihalcea111@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250203171808.4108-1-laurentiumihalcea111@gmail.com> References: <20250203171808.4108-1-laurentiumihalcea111@gmail.com> Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Laurentiu Mihalcea The definition for the ops_init() operation is similar among the imx8 chips (namely: imx8, imx8x, imx8m, and imx8ulp). The only difference is the name of the 'struct snd_soc_dai_driver' array used to fill the SOF ops structure. As such, 'imx8_ops_init()' can be made into an utility function that takes the 'struct snd_soc_dai_driver' array and its size as parameters and fills the SOF ops structure fields accordingly. This will allow us to reuse this function when the other drivers (imx8m, imx8ulp) are merged into this one. Since the definition of the function is changed, it can no longer be used directly by the SOF core. Therefore, also introduce a wrapper: 'imx_ops_init()' that will call 'imx8_ops_init()' with the right parameters based on the chip. Signed-off-by: Laurentiu Mihalcea Reviewed-by: Daniel Baluta Reviewed-by: Iuliana Prodan --- sound/soc/sof/imx/imx8.c | 20 +++++++++++++++----- 1 file changed, 15 insertions(+), 5 deletions(-) diff --git a/sound/soc/sof/imx/imx8.c b/sound/soc/sof/imx/imx8.c index 1efdb169cf07..3ad20df351c2 100644 --- a/sound/soc/sof/imx/imx8.c +++ b/sound/soc/sof/imx/imx8.c @@ -19,7 +19,7 @@ static struct snd_soc_dai_driver imx8_dai[] = { static struct snd_sof_dsp_ops sof_imx8_ops; -static int imx8_ops_init(struct snd_sof_dev *sdev) +static void imx8_ops_init(struct snd_soc_dai_driver *dai_drv, uint32_t num_drv) { /* first copy from template */ memcpy(&sof_imx8_ops, &sof_imx_ops, sizeof(sof_imx_ops)); @@ -31,8 +31,18 @@ static int imx8_ops_init(struct snd_sof_dev *sdev) snd_sof_debugfs_add_region_item_iomem; /* ... and finally set DAI driver */ - sof_imx8_ops.drv = imx8_dai; - sof_imx8_ops.num_drv = ARRAY_SIZE(imx8_dai); + sof_imx8_ops.drv = dai_drv; + sof_imx8_ops.num_drv = num_drv; +} + +static int imx_ops_init(struct snd_sof_dev *sdev) +{ + if (of_device_is_compatible(sdev->dev->of_node, "fsl,imx8qm-dsp") || + of_device_is_compatible(sdev->dev->of_node, "fsl,imx8qxp-dsp")) { + imx8_ops_init(imx8_dai, ARRAY_SIZE(imx8_dai)); + } else { + return -EINVAL; + } return 0; } @@ -186,8 +196,8 @@ static struct snd_sof_of_mach sof_imx8_machs[] = { {} }; -IMX_SOF_DEV_DESC(imx8, sof_imx8_machs, &imx8_chip_info, &sof_imx8_ops, imx8_ops_init); -IMX_SOF_DEV_DESC(imx8x, sof_imx8_machs, &imx8x_chip_info, &sof_imx8_ops, imx8_ops_init); +IMX_SOF_DEV_DESC(imx8, sof_imx8_machs, &imx8_chip_info, &sof_imx8_ops, imx_ops_init); +IMX_SOF_DEV_DESC(imx8x, sof_imx8_machs, &imx8x_chip_info, &sof_imx8_ops, imx_ops_init); static const struct of_device_id sof_of_imx8_ids[] = { { From patchwork Mon Feb 3 17:18:06 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurentiu Mihalcea X-Patchwork-Id: 13957925 Received: from mail-ej1-f47.google.com (mail-ej1-f47.google.com [209.85.218.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1CE0620E6E3 for ; Mon, 3 Feb 2025 17:19:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.47 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738603158; cv=none; b=guqKZBhfgk7AYjGhkheDdIZ+sehL6dsgi0q467nAvTfHJnrgrimKJf0oyFEqCPZPvUu0AFR8AaB/vU5lgpVzsHVjdHKGowVZZbsTtmIqcJCl/TCEogESET49NbK/rzZ3cZatC8JuBV/RmL+syamUKpKUF7ph3XRS3rI6TD7blOE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738603158; c=relaxed/simple; bh=JQ9hq+CPEOSHCnRDU6JG3h1V/RRBKdZpgpjGaD3ZW/A=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=UJ6cuf+K3NwDZQTHssml/MYYTB06bByr5yVypJ1aWdYU7d8IX3GfTptfnIMZKif4JgJsc1PQotD/zBMGnbwoQinwotlEqqrJjqHfrCnxpPyMZBztWar/NbwQgdrswZLkWnMPDKSo153s+vr6ifIRhB50qw1TZJlrBfDN1yA+XUM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=L1acE7GN; arc=none smtp.client-ip=209.85.218.47 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="L1acE7GN" Received: by mail-ej1-f47.google.com with SMTP id a640c23a62f3a-aaecf50578eso919177566b.2 for ; Mon, 03 Feb 2025 09:19:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1738603154; x=1739207954; darn=lists.linux.dev; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=mMbO1X/ZrHEonWOqnVL8JbIXh15GT1BdmsSCwvU+0po=; b=L1acE7GNzh9h2XR2YweWZUBMLBVYu6zjrce3ORRoTC+mpY0wp2eOqpexoVmvNT6Btr dmCNb7dr4xlcYFidpjK9D2gCgIsGBq267lXcncr32mhcnII2QGRb0MrZcCqKwEjR+g+U SRQWQxAeWury6hIYJAeNIb8D8OdZxDKHd0qdlRCGVjDyvB9uySPicmFzAWDg7UqFi9BX OzKAUY4lbIArt45oeCVm6cehsTuHNe7U5kX/F26GmeekZt5K41WNHLAXgMLCN+Vh92kn BDiGkBGLKzM6586kIcF0ae1mbMqjfytmRpC+jjgy50p2JjDXeSI2OQ9N+sswtvMG580Z vLMA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738603154; x=1739207954; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=mMbO1X/ZrHEonWOqnVL8JbIXh15GT1BdmsSCwvU+0po=; b=O7ilfTSTidnUHqezf7HW8mtg+mvZZfBS0s/cYa2HuVPKGcGSQyMyg1GxyUwdw20Mse d4kHv2PsXUpcxa6gNwV2we6ouZZzb8tROip+e1pi1dbNObGL5U3HuWTQsyj3sLzHjl8A Bzowh3vqf553A3Em/HmGTIvZuD2A+pJhNBf9BGGQqYOSGcvjS8PVdbZYpRtJEEOqjBRv 5HC4C9ScO/vmnuGV9ntDFIerD0r6t61Gzv62rpt2xIshcJuROmxosEe7ifBwBn25qXrF 34ohDiR5uriF3jLGxuvrpjIdKumfdvoz9Quftb5RXkR0qZUxq71Um6QgK2jqUo/Z4qEY LqZA== X-Forwarded-Encrypted: i=1; AJvYcCXfQb5v1sGZmAa2iWDmCAwUHaCXDOBU75eEKD09jzqx2T6/7rra6XwyPOXOFRgWYgYwt3Q=@lists.linux.dev X-Gm-Message-State: AOJu0Yy62WCRp4WgcTxBb9DF+sFZA4HBH6jnj2VvsX20YNBPJ7L3RF1g 1aIEJqlYNg9k0PLqhW11QoExDWqHGmteGKhjLdr06n16z1ikx1wb X-Gm-Gg: ASbGncs6z8MxT9qycs7Yc9UMzNp+OZ3ATOP7cp3D/nhYpSxq9RQWcVpR5DEBKONKWhZ m6wt8l+foLXBV5M3tmIuQSAkywPY9HTPSOqWsTA86Dbc1d5gwM4m+rFD3f8deehW/v3ijnb7tlW srUw2d26RmX0PS/Dpxy8orP91PGW3ATfNz5pGPBH16Obn32UltFyiRMSm2Imqi5OpHZpkpMcdNj XdXhUPKx3BTl8CZFRrCZM7JmbWyO7McL+7epv2Jlp0C1tiZZMegpPJ2cUW3A7MobtrDWWzARRlM r+ZE/rkzYAODeKHElNnv/jmQ5OpeCf/e9waGLrhGPLUF9GRryg== X-Google-Smtp-Source: AGHT+IGdIkEjnBtkBhuQ0tpFGPj9P0cga8NAllGymctQrwqzUHaEQ3/yzOqdBKv3WabyUNZQYdS7aA== X-Received: by 2002:a17:907:c0d:b0:aac:4325:a604 with SMTP id a640c23a62f3a-ab6cfe25cd0mr2454376266b.49.1738603154089; Mon, 03 Feb 2025 09:19:14 -0800 (PST) Received: from playground.localdomain ([92.120.5.2]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ab6e47d21aasm784253866b.74.2025.02.03.09.19.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Feb 2025 09:19:13 -0800 (PST) From: Laurentiu Mihalcea To: Bard Liao , Daniel Baluta , Iuliana Prodan , Jaroslav Kysela , Takashi Iwai , Mark Brown Cc: linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org, imx@lists.linux.dev Subject: [PATCH 7/9] ASoC: SOF: imx: merge imx8 and imx8m drivers Date: Mon, 3 Feb 2025 12:18:06 -0500 Message-Id: <20250203171808.4108-8-laurentiumihalcea111@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250203171808.4108-1-laurentiumihalcea111@gmail.com> References: <20250203171808.4108-1-laurentiumihalcea111@gmail.com> Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Laurentiu Mihalcea Now that the common interface for imx chip has been introduced, there's no longer a need to have a separate platform driver for imx8m. As such, merge the driver with the imx8 driver. Furthermore, delete the old driver as it's no longer useful. Signed-off-by: Laurentiu Mihalcea Reviewed-by: Daniel Baluta Reviewed-by: Iuliana Prodan --- sound/soc/sof/imx/Kconfig | 9 - sound/soc/sof/imx/Makefile | 2 - sound/soc/sof/imx/imx8.c | 135 ++++++++- sound/soc/sof/imx/imx8m.c | 567 ------------------------------------- 4 files changed, 133 insertions(+), 580 deletions(-) delete mode 100644 sound/soc/sof/imx/imx8m.c diff --git a/sound/soc/sof/imx/Kconfig b/sound/soc/sof/imx/Kconfig index 4751b04d5e6f..92fdf80d6e51 100644 --- a/sound/soc/sof/imx/Kconfig +++ b/sound/soc/sof/imx/Kconfig @@ -32,15 +32,6 @@ config SND_SOC_SOF_IMX8 Say Y if you have such a device. If unsure select "N". -config SND_SOC_SOF_IMX8M - tristate "SOF support for i.MX8M" - depends on IMX_DSP - select SND_SOC_SOF_IMX_COMMON - help - This adds support for Sound Open Firmware for NXP i.MX8M platforms. - Say Y if you have such a device. - If unsure select "N". - config SND_SOC_SOF_IMX8ULP tristate "SOF support for i.MX8ULP" depends on IMX_DSP diff --git a/sound/soc/sof/imx/Makefile b/sound/soc/sof/imx/Makefile index be0bf0736dfa..852140bb8104 100644 --- a/sound/soc/sof/imx/Makefile +++ b/sound/soc/sof/imx/Makefile @@ -1,11 +1,9 @@ # SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) snd-sof-imx8-y := imx8.o -snd-sof-imx8m-y := imx8m.o snd-sof-imx8ulp-y := imx8ulp.o snd-sof-imx-common-y := imx-common.o obj-$(CONFIG_SND_SOC_SOF_IMX8) += snd-sof-imx8.o -obj-$(CONFIG_SND_SOC_SOF_IMX8M) += snd-sof-imx8m.o obj-$(CONFIG_SND_SOC_SOF_IMX8ULP) += snd-sof-imx8ulp.o obj-$(CONFIG_SND_SOC_SOF_IMX_COMMON) += imx-common.o diff --git a/sound/soc/sof/imx/imx8.c b/sound/soc/sof/imx/imx8.c index 3ad20df351c2..015ba496863e 100644 --- a/sound/soc/sof/imx/imx8.c +++ b/sound/soc/sof/imx/imx8.c @@ -6,17 +6,49 @@ // // Hardware interface for audio DSP on i.MX8 -#include #include + +#include +#include + #include "imx-common.h" +/* imx8/imx8x macros */ #define RESET_VECTOR_VADDR 0x596f8000 +/* imx8m macros */ +#define IMX8M_DAP_DEBUG 0x28800000 +#define IMX8M_DAP_DEBUG_SIZE (64 * 1024) +#define IMX8M_DAP_PWRCTL (0x4000 + 0x3020) +#define IMX8M_PWRCTL_CORERESET BIT(16) + +#define AudioDSP_REG0 0x100 +#define AudioDSP_REG1 0x104 +#define AudioDSP_REG2 0x108 +#define AudioDSP_REG3 0x10c + +#define AudioDSP_REG2_RUNSTALL BIT(5) + +struct imx8m_chip_data { + void __iomem *dap; + struct regmap *regmap; +}; + static struct snd_soc_dai_driver imx8_dai[] = { IMX_SOF_DAI_DRV_ENTRY_BIDIR("esai0", 1, 8), IMX_SOF_DAI_DRV_ENTRY_BIDIR("sai1", 1, 32), }; +static struct snd_soc_dai_driver imx8m_dai[] = { + IMX_SOF_DAI_DRV_ENTRY_BIDIR("sai1", 1, 32), + IMX_SOF_DAI_DRV_ENTRY_BIDIR("sai2", 1, 32), + IMX_SOF_DAI_DRV_ENTRY_BIDIR("sai3", 1, 32), + IMX_SOF_DAI_DRV_ENTRY_BIDIR("sai5", 1, 32), + IMX_SOF_DAI_DRV_ENTRY_BIDIR("sai6", 1, 32), + IMX_SOF_DAI_DRV_ENTRY_BIDIR("sai7", 1, 32), + IMX_SOF_DAI_DRV_ENTRY("micfil", 0, 0, 1, 8), +}; + static struct snd_sof_dsp_ops sof_imx8_ops; static void imx8_ops_init(struct snd_soc_dai_driver *dai_drv, uint32_t num_drv) @@ -40,6 +72,8 @@ static int imx_ops_init(struct snd_sof_dev *sdev) if (of_device_is_compatible(sdev->dev->of_node, "fsl,imx8qm-dsp") || of_device_is_compatible(sdev->dev->of_node, "fsl,imx8qxp-dsp")) { imx8_ops_init(imx8_dai, ARRAY_SIZE(imx8_dai)); + } else if (of_device_is_compatible(sdev->dev->of_node, "fsl,imx8mp-dsp")) { + imx8_ops_init(imx8m_dai, ARRAY_SIZE(imx8m_dai)); } else { return -EINVAL; } @@ -124,6 +158,67 @@ static int imx8_run(struct snd_sof_dev *sdev) return 0; } +static int imx8m_probe(struct snd_sof_dev *sdev) +{ + struct imx_common_data *common; + struct imx8m_chip_data *chip; + + common = sdev->pdata->hw_pdata; + + chip = devm_kzalloc(sdev->dev, sizeof(*chip), GFP_KERNEL); + if (!chip) + return dev_err_probe(sdev->dev, -ENOMEM, + "failed to allocate chip data\n"); + + chip->dap = devm_ioremap(sdev->dev, IMX8M_DAP_DEBUG, IMX8M_DAP_DEBUG_SIZE); + if (!chip->dap) + return dev_err_probe(sdev->dev, -ENODEV, + "failed to ioremap DAP\n"); + + chip->regmap = syscon_regmap_lookup_by_phandle(sdev->dev->of_node, "fsl,dsp-ctrl"); + if (IS_ERR(chip->regmap)) + return dev_err_probe(sdev->dev, PTR_ERR(chip->regmap), + "failed to fetch dsp ctrl regmap\n"); + + common->chip_pdata = chip; + + return 0; +} + +static int imx8m_reset(struct snd_sof_dev *sdev) +{ + struct imx8m_chip_data *chip; + u32 pwrctl; + + chip = get_chip_pdata(sdev); + + /* put DSP into reset and stall */ + pwrctl = readl(chip->dap + IMX8M_DAP_PWRCTL); + pwrctl |= IMX8M_PWRCTL_CORERESET; + writel(pwrctl, chip->dap + IMX8M_DAP_PWRCTL); + + /* keep reset asserted for 10 cycles */ + usleep_range(1, 2); + + regmap_update_bits(chip->regmap, AudioDSP_REG2, + AudioDSP_REG2_RUNSTALL, AudioDSP_REG2_RUNSTALL); + + /* take the DSP out of reset and keep stalled for FW loading */ + pwrctl = readl(chip->dap + IMX8M_DAP_PWRCTL); + pwrctl &= ~IMX8M_PWRCTL_CORERESET; + writel(pwrctl, chip->dap + IMX8M_DAP_PWRCTL); + + return 0; +} + +static int imx8m_run(struct snd_sof_dev *sdev) +{ + struct imx8m_chip_data *chip = get_chip_pdata(sdev); + + regmap_update_bits(chip->regmap, AudioDSP_REG2, AudioDSP_REG2_RUNSTALL, 0); + + return 0; +} static const struct imx_chip_ops imx8_chip_ops = { .probe = imx8_probe, @@ -135,12 +230,24 @@ static const struct imx_chip_ops imx8x_chip_ops = { .core_kick = imx8x_run, }; +static const struct imx_chip_ops imx8m_chip_ops = { + .probe = imx8m_probe, + .core_kick = imx8m_run, + .core_reset = imx8m_reset, +}; + static struct imx_memory_info imx8_memory_regions[] = { { .name = "iram", .reserved = false }, { .name = "sram", .reserved = true }, { } }; +static struct imx_memory_info imx8m_memory_regions[] = { + { .name = "iram", .reserved = false }, + { .name = "sram", .reserved = true }, + { } +}; + static const struct imx_chip_info imx8_chip_info = { .ipc_info = { .has_panic_code = true, @@ -161,6 +268,16 @@ static const struct imx_chip_info imx8x_chip_info = { .ops = &imx8x_chip_ops, }; +static const struct imx_chip_info imx8m_chip_info = { + .ipc_info = { + .has_panic_code = true, + .boot_mbox_offset = 0x800000, + .window_offset = 0x800000, + }, + .memory = imx8m_memory_regions, + .ops = &imx8m_chip_ops, +}; + static struct snd_sof_of_mach sof_imx8_machs[] = { { .compatible = "fsl,imx8qxp-mek", @@ -192,12 +309,22 @@ static struct snd_sof_of_mach sof_imx8_machs[] = { .sof_tplg_filename = "sof-imx8-cs42888.tplg", .drv_name = "asoc-audio-graph-card2", }, - + { + .compatible = "fsl,imx8mp-evk", + .sof_tplg_filename = "sof-imx8mp-wm8960.tplg", + .drv_name = "asoc-audio-graph-card2", + }, + { + .compatible = "fsl,imx8mp-evk-revb4", + .sof_tplg_filename = "sof-imx8mp-wm8962.tplg", + .drv_name = "asoc-audio-graph-card2", + }, {} }; IMX_SOF_DEV_DESC(imx8, sof_imx8_machs, &imx8_chip_info, &sof_imx8_ops, imx_ops_init); IMX_SOF_DEV_DESC(imx8x, sof_imx8_machs, &imx8x_chip_info, &sof_imx8_ops, imx_ops_init); +IMX_SOF_DEV_DESC(imx8m, sof_imx8_machs, &imx8m_chip_info, &sof_imx8_ops, imx_ops_init); static const struct of_device_id sof_of_imx8_ids[] = { { @@ -208,6 +335,10 @@ static const struct of_device_id sof_of_imx8_ids[] = { .compatible = "fsl,imx8qm-dsp", .data = &IMX_SOF_DEV_DESC_NAME(imx8), }, + { + .compatible = "fsl,imx8mp-dsp", + .data = &IMX_SOF_DEV_DESC_NAME(imx8m), + }, { } }; MODULE_DEVICE_TABLE(of, sof_of_imx8_ids); diff --git a/sound/soc/sof/imx/imx8m.c b/sound/soc/sof/imx/imx8m.c deleted file mode 100644 index 3cabdebac558..000000000000 --- a/sound/soc/sof/imx/imx8m.c +++ /dev/null @@ -1,567 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) -// -// Copyright 2020 NXP -// -// Author: Daniel Baluta -// -// Hardware interface for audio DSP on i.MX8M - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include "../ops.h" -#include "../sof-of-dev.h" -#include "imx-common.h" - -#define MBOX_OFFSET 0x800000 -#define MBOX_SIZE 0x1000 - -/* DAP registers */ -#define IMX8M_DAP_DEBUG 0x28800000 -#define IMX8M_DAP_DEBUG_SIZE (64 * 1024) -#define IMX8M_DAP_PWRCTL (0x4000 + 0x3020) -#define IMX8M_PWRCTL_CORERESET BIT(16) - -/* DSP audio mix registers */ -#define AudioDSP_REG0 0x100 -#define AudioDSP_REG1 0x104 -#define AudioDSP_REG2 0x108 -#define AudioDSP_REG3 0x10c - -#define AudioDSP_REG2_RUNSTALL BIT(5) - -struct imx8m_priv { - struct device *dev; - struct snd_sof_dev *sdev; - - /* DSP IPC handler */ - struct imx_dsp_ipc *dsp_ipc; - struct platform_device *ipc_dev; - - struct clk_bulk_data *clks; - int clk_num; - - void __iomem *dap; - struct regmap *regmap; -}; - -static int imx8m_get_mailbox_offset(struct snd_sof_dev *sdev) -{ - return MBOX_OFFSET; -} - -static int imx8m_get_window_offset(struct snd_sof_dev *sdev, u32 id) -{ - return MBOX_OFFSET; -} - -static void imx8m_dsp_handle_reply(struct imx_dsp_ipc *ipc) -{ - struct imx8m_priv *priv = imx_dsp_get_data(ipc); - unsigned long flags; - - spin_lock_irqsave(&priv->sdev->ipc_lock, flags); - snd_sof_ipc_process_reply(priv->sdev, 0); - spin_unlock_irqrestore(&priv->sdev->ipc_lock, flags); -} - -static void imx8m_dsp_handle_request(struct imx_dsp_ipc *ipc) -{ - struct imx8m_priv *priv = imx_dsp_get_data(ipc); - u32 p; /* Panic code */ - - /* Read the message from the debug box. */ - sof_mailbox_read(priv->sdev, priv->sdev->debug_box.offset + 4, &p, sizeof(p)); - - /* Check to see if the message is a panic code (0x0dead***) */ - if ((p & SOF_IPC_PANIC_MAGIC_MASK) == SOF_IPC_PANIC_MAGIC) - snd_sof_dsp_panic(priv->sdev, p, true); - else - snd_sof_ipc_msgs_rx(priv->sdev); -} - -static struct imx_dsp_ops imx8m_dsp_ops = { - .handle_reply = imx8m_dsp_handle_reply, - .handle_request = imx8m_dsp_handle_request, -}; - -static int imx8m_send_msg(struct snd_sof_dev *sdev, struct snd_sof_ipc_msg *msg) -{ - struct imx8m_priv *priv = sdev->pdata->hw_pdata; - - sof_mailbox_write(sdev, sdev->host_box.offset, msg->msg_data, - msg->msg_size); - imx_dsp_ring_doorbell(priv->dsp_ipc, 0); - - return 0; -} - -/* - * DSP control. - */ -static int imx8m_run(struct snd_sof_dev *sdev) -{ - struct imx8m_priv *priv = (struct imx8m_priv *)sdev->pdata->hw_pdata; - - regmap_update_bits(priv->regmap, AudioDSP_REG2, AudioDSP_REG2_RUNSTALL, 0); - - return 0; -} - -static int imx8m_reset(struct snd_sof_dev *sdev) -{ - struct imx8m_priv *priv = (struct imx8m_priv *)sdev->pdata->hw_pdata; - u32 pwrctl; - - /* put DSP into reset and stall */ - pwrctl = readl(priv->dap + IMX8M_DAP_PWRCTL); - pwrctl |= IMX8M_PWRCTL_CORERESET; - writel(pwrctl, priv->dap + IMX8M_DAP_PWRCTL); - - /* keep reset asserted for 10 cycles */ - usleep_range(1, 2); - - regmap_update_bits(priv->regmap, AudioDSP_REG2, - AudioDSP_REG2_RUNSTALL, AudioDSP_REG2_RUNSTALL); - - /* take the DSP out of reset and keep stalled for FW loading */ - pwrctl = readl(priv->dap + IMX8M_DAP_PWRCTL); - pwrctl &= ~IMX8M_PWRCTL_CORERESET; - writel(pwrctl, priv->dap + IMX8M_DAP_PWRCTL); - - return 0; -} - -static int imx8m_probe(struct snd_sof_dev *sdev) -{ - struct platform_device *pdev = to_platform_device(sdev->dev); - struct device_node *np = pdev->dev.of_node; - struct device_node *res_node; - struct resource *mmio; - struct imx8m_priv *priv; - struct resource res; - u32 base, size; - int ret = 0; - - priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); - if (!priv) - return -ENOMEM; - - sdev->num_cores = 1; - sdev->pdata->hw_pdata = priv; - priv->dev = sdev->dev; - priv->sdev = sdev; - - priv->ipc_dev = platform_device_register_data(sdev->dev, "imx-dsp", - PLATFORM_DEVID_NONE, - pdev, sizeof(*pdev)); - if (IS_ERR(priv->ipc_dev)) - return PTR_ERR(priv->ipc_dev); - - priv->dsp_ipc = dev_get_drvdata(&priv->ipc_dev->dev); - if (!priv->dsp_ipc) { - /* DSP IPC driver not probed yet, try later */ - ret = -EPROBE_DEFER; - dev_err(sdev->dev, "Failed to get drvdata\n"); - goto exit_pdev_unregister; - } - - imx_dsp_set_data(priv->dsp_ipc, priv); - priv->dsp_ipc->ops = &imx8m_dsp_ops; - - /* DSP base */ - mmio = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (mmio) { - base = mmio->start; - size = resource_size(mmio); - } else { - dev_err(sdev->dev, "error: failed to get DSP base at idx 0\n"); - ret = -EINVAL; - goto exit_pdev_unregister; - } - - priv->dap = devm_ioremap(sdev->dev, IMX8M_DAP_DEBUG, IMX8M_DAP_DEBUG_SIZE); - if (!priv->dap) { - dev_err(sdev->dev, "error: failed to map DAP debug memory area"); - ret = -ENODEV; - goto exit_pdev_unregister; - } - - sdev->bar[SOF_FW_BLK_TYPE_IRAM] = devm_ioremap(sdev->dev, base, size); - if (!sdev->bar[SOF_FW_BLK_TYPE_IRAM]) { - dev_err(sdev->dev, "failed to ioremap base 0x%x size 0x%x\n", - base, size); - ret = -ENODEV; - goto exit_pdev_unregister; - } - sdev->mmio_bar = SOF_FW_BLK_TYPE_IRAM; - - res_node = of_parse_phandle(np, "memory-region", 0); - if (!res_node) { - dev_err(&pdev->dev, "failed to get memory region node\n"); - ret = -ENODEV; - goto exit_pdev_unregister; - } - - ret = of_address_to_resource(res_node, 0, &res); - of_node_put(res_node); - if (ret) { - dev_err(&pdev->dev, "failed to get reserved region address\n"); - goto exit_pdev_unregister; - } - - sdev->bar[SOF_FW_BLK_TYPE_SRAM] = devm_ioremap_wc(sdev->dev, res.start, - resource_size(&res)); - if (!sdev->bar[SOF_FW_BLK_TYPE_SRAM]) { - dev_err(sdev->dev, "failed to ioremap mem 0x%x size 0x%x\n", - base, size); - ret = -ENOMEM; - goto exit_pdev_unregister; - } - sdev->mailbox_bar = SOF_FW_BLK_TYPE_SRAM; - - /* set default mailbox offset for FW ready message */ - sdev->dsp_box.offset = MBOX_OFFSET; - - priv->regmap = syscon_regmap_lookup_by_phandle(np, "fsl,dsp-ctrl"); - if (IS_ERR(priv->regmap)) { - dev_err(sdev->dev, "cannot find dsp-ctrl registers"); - ret = PTR_ERR(priv->regmap); - goto exit_pdev_unregister; - } - - ret = devm_clk_bulk_get_all(sdev->dev, &priv->clks); - if (ret < 0) { - dev_err(sdev->dev, "failed to fetch clocks: %d\n", ret); - goto exit_pdev_unregister; - } - priv->clk_num = ret; - - ret = clk_bulk_prepare_enable(priv->clk_num, priv->clks); - if (ret < 0) { - dev_err(sdev->dev, "failed to enable clocks: %d\n", ret); - goto exit_pdev_unregister; - } - - return 0; - -exit_pdev_unregister: - platform_device_unregister(priv->ipc_dev); - return ret; -} - -static void imx8m_remove(struct snd_sof_dev *sdev) -{ - struct imx8m_priv *priv = sdev->pdata->hw_pdata; - - clk_bulk_disable_unprepare(priv->clk_num, priv->clks); - platform_device_unregister(priv->ipc_dev); -} - -/* on i.MX8 there is 1 to 1 match between type and BAR idx */ -static int imx8m_get_bar_index(struct snd_sof_dev *sdev, u32 type) -{ - /* Only IRAM and SRAM bars are valid */ - switch (type) { - case SOF_FW_BLK_TYPE_IRAM: - case SOF_FW_BLK_TYPE_SRAM: - return type; - default: - return -EINVAL; - } -} - -static struct snd_soc_dai_driver imx8m_dai[] = { -{ - .name = "sai1", - .playback = { - .channels_min = 1, - .channels_max = 32, - }, - .capture = { - .channels_min = 1, - .channels_max = 32, - }, -}, -{ - .name = "sai2", - .playback = { - .channels_min = 1, - .channels_max = 32, - }, - .capture = { - .channels_min = 1, - .channels_max = 32, - }, -}, -{ - .name = "sai3", - .playback = { - .channels_min = 1, - .channels_max = 32, - }, - .capture = { - .channels_min = 1, - .channels_max = 32, - }, -}, -{ - .name = "sai5", - .playback = { - .channels_min = 1, - .channels_max = 32, - }, - .capture = { - .channels_min = 1, - .channels_max = 32, - }, -}, -{ - .name = "sai6", - .playback = { - .channels_min = 1, - .channels_max = 32, - }, - .capture = { - .channels_min = 1, - .channels_max = 32, - }, -}, -{ - .name = "sai7", - .playback = { - .channels_min = 1, - .channels_max = 32, - }, - .capture = { - .channels_min = 1, - .channels_max = 32, - }, -}, -{ - .name = "micfil", - .capture = { - .channels_min = 1, - .channels_max = 8, - }, -}, -}; - -static int imx8m_dsp_set_power_state(struct snd_sof_dev *sdev, - const struct sof_dsp_power_state *target_state) -{ - sdev->dsp_power_state = *target_state; - - return 0; -} - -static int imx8m_resume(struct snd_sof_dev *sdev) -{ - struct imx8m_priv *priv = (struct imx8m_priv *)sdev->pdata->hw_pdata; - int ret; - int i; - - ret = clk_bulk_prepare_enable(priv->clk_num, priv->clks); - if (ret < 0) { - dev_err(sdev->dev, "failed to enable clocks: %d\n", ret); - return ret; - } - - for (i = 0; i < DSP_MU_CHAN_NUM; i++) - imx_dsp_request_channel(priv->dsp_ipc, i); - - return 0; -} - -static void imx8m_suspend(struct snd_sof_dev *sdev) -{ - struct imx8m_priv *priv = (struct imx8m_priv *)sdev->pdata->hw_pdata; - int i; - - for (i = 0; i < DSP_MU_CHAN_NUM; i++) - imx_dsp_free_channel(priv->dsp_ipc, i); - - clk_bulk_disable_unprepare(priv->clk_num, priv->clks); -} - -static int imx8m_dsp_runtime_resume(struct snd_sof_dev *sdev) -{ - int ret; - const struct sof_dsp_power_state target_dsp_state = { - .state = SOF_DSP_PM_D0, - }; - - ret = imx8m_resume(sdev); - if (ret < 0) - return ret; - - return snd_sof_dsp_set_power_state(sdev, &target_dsp_state); -} - -static int imx8m_dsp_runtime_suspend(struct snd_sof_dev *sdev) -{ - const struct sof_dsp_power_state target_dsp_state = { - .state = SOF_DSP_PM_D3, - }; - - imx8m_suspend(sdev); - - return snd_sof_dsp_set_power_state(sdev, &target_dsp_state); -} - -static int imx8m_dsp_resume(struct snd_sof_dev *sdev) -{ - int ret; - const struct sof_dsp_power_state target_dsp_state = { - .state = SOF_DSP_PM_D0, - }; - - ret = imx8m_resume(sdev); - if (ret < 0) - return ret; - - if (pm_runtime_suspended(sdev->dev)) { - pm_runtime_disable(sdev->dev); - pm_runtime_set_active(sdev->dev); - pm_runtime_mark_last_busy(sdev->dev); - pm_runtime_enable(sdev->dev); - pm_runtime_idle(sdev->dev); - } - - return snd_sof_dsp_set_power_state(sdev, &target_dsp_state); -} - -static int imx8m_dsp_suspend(struct snd_sof_dev *sdev, unsigned int target_state) -{ - const struct sof_dsp_power_state target_dsp_state = { - .state = target_state, - }; - - if (!pm_runtime_suspended(sdev->dev)) - imx8m_suspend(sdev); - - return snd_sof_dsp_set_power_state(sdev, &target_dsp_state); -} - -/* i.MX8 ops */ -static const struct snd_sof_dsp_ops sof_imx8m_ops = { - /* probe and remove */ - .probe = imx8m_probe, - .remove = imx8m_remove, - /* DSP core boot */ - .run = imx8m_run, - .reset = imx8m_reset, - - /* Block IO */ - .block_read = sof_block_read, - .block_write = sof_block_write, - - /* Mailbox IO */ - .mailbox_read = sof_mailbox_read, - .mailbox_write = sof_mailbox_write, - - /* ipc */ - .send_msg = imx8m_send_msg, - .get_mailbox_offset = imx8m_get_mailbox_offset, - .get_window_offset = imx8m_get_window_offset, - - .ipc_msg_data = sof_ipc_msg_data, - .set_stream_data_offset = sof_set_stream_data_offset, - - .get_bar_index = imx8m_get_bar_index, - - /* firmware loading */ - .load_firmware = snd_sof_load_firmware_memcpy, - - /* Debug information */ - .dbg_dump = imx8_dump, - .debugfs_add_region_item = snd_sof_debugfs_add_region_item_iomem, - - /* stream callbacks */ - .pcm_open = sof_stream_pcm_open, - .pcm_close = sof_stream_pcm_close, - /* Firmware ops */ - .dsp_arch_ops = &sof_xtensa_arch_ops, - - /* DAI drivers */ - .drv = imx8m_dai, - .num_drv = ARRAY_SIZE(imx8m_dai), - - .suspend = imx8m_dsp_suspend, - .resume = imx8m_dsp_resume, - - .runtime_suspend = imx8m_dsp_runtime_suspend, - .runtime_resume = imx8m_dsp_runtime_resume, - - .set_power_state = imx8m_dsp_set_power_state, - - .hw_info = SNDRV_PCM_INFO_MMAP | - SNDRV_PCM_INFO_MMAP_VALID | - SNDRV_PCM_INFO_INTERLEAVED | - SNDRV_PCM_INFO_PAUSE | - SNDRV_PCM_INFO_BATCH | - SNDRV_PCM_INFO_NO_PERIOD_WAKEUP, -}; - -static struct snd_sof_of_mach sof_imx8mp_machs[] = { - { - .compatible = "fsl,imx8mp-evk-revb4", - .sof_tplg_filename = "sof-imx8mp-wm8962.tplg", - .drv_name = "asoc-audio-graph-card2", - }, - { - .compatible = "fsl,imx8mp-evk", - .sof_tplg_filename = "sof-imx8mp-wm8960.tplg", - .drv_name = "asoc-audio-graph-card2", - }, - {} -}; - -static struct sof_dev_desc sof_of_imx8mp_desc = { - .of_machines = sof_imx8mp_machs, - .ipc_supported_mask = BIT(SOF_IPC_TYPE_3), - .ipc_default = SOF_IPC_TYPE_3, - .default_fw_path = { - [SOF_IPC_TYPE_3] = "imx/sof", - }, - .default_tplg_path = { - [SOF_IPC_TYPE_3] = "imx/sof-tplg", - }, - .default_fw_filename = { - [SOF_IPC_TYPE_3] = "sof-imx8m.ri", - }, - .nocodec_tplg_filename = "sof-imx8-nocodec.tplg", - .ops = &sof_imx8m_ops, -}; - -static const struct of_device_id sof_of_imx8m_ids[] = { - { .compatible = "fsl,imx8mp-dsp", .data = &sof_of_imx8mp_desc}, - { } -}; -MODULE_DEVICE_TABLE(of, sof_of_imx8m_ids); - -/* DT driver definition */ -static struct platform_driver snd_sof_of_imx8m_driver = { - .probe = sof_of_probe, - .remove = sof_of_remove, - .driver = { - .name = "sof-audio-of-imx8m", - .pm = &sof_of_pm, - .of_match_table = sof_of_imx8m_ids, - }, -}; -module_platform_driver(snd_sof_of_imx8m_driver); - -MODULE_LICENSE("Dual BSD/GPL"); -MODULE_DESCRIPTION("SOF support for IMX8M platforms"); -MODULE_IMPORT_NS("SND_SOC_SOF_XTENSA"); From patchwork Mon Feb 3 17:18:07 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurentiu Mihalcea X-Patchwork-Id: 13957926 Received: from mail-ed1-f45.google.com (mail-ed1-f45.google.com [209.85.208.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2A1A520E6FC for ; Mon, 3 Feb 2025 17:19:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.45 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738603160; cv=none; b=fmD9q/zDCM/NRqggcf/SNw2JbExykQeoFO7PnYkK0RFgsiC486VNoaNaURyOaerM3CuqFFcZOVAWBoTQMD0ygxiWEmSuwacltl0axBYbz1zIgfmwkQbBZBBABcjvLh9t1Z5eIxloF+LUBXUNfbx0iWaWh0Wu/qKBCjE/SB6pl08= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738603160; c=relaxed/simple; bh=GJDK4MeIU4i0O9bjHUdViRwkpuwSowwNdp8AHaKffOI=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=Pm+0OzPK7ADFQC0Msodf2pfhUAPLWsxiGOim5UPRidY5AzXn6G4EF56RvyrtWwnUUDQjvrDmFEn2CPUktI4xBM+kMvlRFRUoDmnpKMjk2tpHO83v7bHTqxqy0ust8qW6gyCEIH1uYMzwsJldvwYsdjaiDKgYZ7a3nT2ExqHqsnc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=kj+Z8mmA; arc=none smtp.client-ip=209.85.208.45 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="kj+Z8mmA" Received: by mail-ed1-f45.google.com with SMTP id 4fb4d7f45d1cf-5d3d479b1e6so6503211a12.2 for ; Mon, 03 Feb 2025 09:19:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1738603156; x=1739207956; darn=lists.linux.dev; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=mMa3j9R2fNtwS8Jnw+UXR+Kbm0lI344LOeZ3SRa2OoQ=; b=kj+Z8mmA0KnX7MgbA6nK81xwwjlKoaC2uVxYFHLk1xN4Qjd2ohcYoNuV92klJmaD/F C+gEC/LClXmFAWKvyHtKSgYrZOwPngb7NW3Y3uvXEl+VEHhPA0cruZDj2y1INRjtlF/b I+Y37Mi4SlTiAyUqdQC5QCNexaFEld0J512Gdgb/QCGjZgOix7W7SZ/f5KJM7Cns7LdZ rHjLaAUUstOnBvYLqEiA63lYIqfZQNzHC+3nzYD/14LbjslmQluw4cHd6JgD/ryPHC3J 4SdigYDsIEk1PhXABD6TBpnWg3nP+NrOAQgXNAn8v5yMTPrPj6FT5NlD6c6plN2/NvYz pVrA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738603156; x=1739207956; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=mMa3j9R2fNtwS8Jnw+UXR+Kbm0lI344LOeZ3SRa2OoQ=; b=VXMNgpwJuDeCjw+ovT6hhxW/4NgoqnS4ZH5vXepCQk0F8QfmnZb+FYdsZ7BJAWt+EC vySucfGwlqB0NwopoHg1rHJcyw8YGzoOT+jHFsHv8cR260VCO3NSjgy+VxBVMWiIWvG/ rXYCCNEcZlVOqqZpQrt0Av+91qLWtPstyT/wV3cRtTNZJSADXGzLHcekEjRAW+9IM2FI gsrobv1xacf05RWMeK4u70jkF5hnbak7pfX9yZbaFfmYzVPNTssxIv9bcj2ago/VhSeP lPTRIqdnXuFgXDBN/4Oa+UhUgR9fcBRW3etfRa6AIPo/E56zlEO7S+ysfXVy/g1jDqZ5 YKEg== X-Forwarded-Encrypted: i=1; AJvYcCWe5yRVDMGb5BEdbGECfhMKZmLpFQo6EIXpjrUPluhB/Hm5dKtfZaQYO+Z4OeUhDgdmA5k=@lists.linux.dev X-Gm-Message-State: AOJu0Yx2xbpU3icgZH7l0dn2xAp2NHubeBhWsZALj/3B1uLfthYVq4bi F/7GWApIVhVXCso70kVfAGbnSo/yyFJgT/Jd87cJGQrmoB7Ru4ShH3RJcJcX X-Gm-Gg: ASbGncvUuLt90w0DnUitCcXxTKftc8BPJ6eOEXKh6wc+c4SvyM9Ylranx4aWBQ/S5I5 NgmlZemh6aGi9sr0ZbxJdqvTU3ZzmqHFf8yeRbHy6ihlcRpa7kTdJNOmk+FfhkTNqimNK8TZJN1 CNkozGFy6SpVrTBmAvOJ+DrejxXt3qnXRJ24Nyh2IIIvuKuIp1dbKroDJGCSESSNiAXTgy+bh7d 0/0dSYyfCIjA9kzYLOV+Zsk1XKjE7LU1L4frAnj35GLlnEMshzjRnvNPxeilDDAU9Zoal4aguoF 6DgSoBRLMtiSXFrpxQ8YOdjV8s/RJ294ayn6uGJsZJgmVkI00Q== X-Google-Smtp-Source: AGHT+IH5GPe4rKpbIrfKzABhJf16kUNVq5LBWZE2orvuX1sTlxF5bFiJaZFAgOXqKeFUGKozHPHqTQ== X-Received: by 2002:a05:6402:4016:b0:5dc:8f03:bb5b with SMTP id 4fb4d7f45d1cf-5dc8f03c0a0mr31464411a12.5.1738603156094; Mon, 03 Feb 2025 09:19:16 -0800 (PST) Received: from playground.localdomain ([92.120.5.2]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ab6e47d21aasm784253866b.74.2025.02.03.09.19.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Feb 2025 09:19:15 -0800 (PST) From: Laurentiu Mihalcea To: Bard Liao , Daniel Baluta , Iuliana Prodan , Jaroslav Kysela , Takashi Iwai , Mark Brown Cc: linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org, imx@lists.linux.dev Subject: [PATCH 8/9] ASoC: SOF: imx: merge imx8 and imx8ulp drivers Date: Mon, 3 Feb 2025 12:18:07 -0500 Message-Id: <20250203171808.4108-9-laurentiumihalcea111@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250203171808.4108-1-laurentiumihalcea111@gmail.com> References: <20250203171808.4108-1-laurentiumihalcea111@gmail.com> Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Laurentiu Mihalcea Now that the common interface for imx chip has been introduced, there's no longer a need to have a separate platform driver for imx8ulp. As such, merge the driver with the imx8 driver. Furthermore, delete the old driver as it's no longer useful. Signed-off-by: Laurentiu Mihalcea Reviewed-by: Daniel Baluta Reviewed-by: Iuliana Prodan --- sound/soc/sof/imx/Kconfig | 9 - sound/soc/sof/imx/Makefile | 2 - sound/soc/sof/imx/imx8.c | 113 ++++++++ sound/soc/sof/imx/imx8ulp.c | 520 ------------------------------------ 4 files changed, 113 insertions(+), 531 deletions(-) delete mode 100644 sound/soc/sof/imx/imx8ulp.c diff --git a/sound/soc/sof/imx/Kconfig b/sound/soc/sof/imx/Kconfig index 92fdf80d6e51..2edf9de2c886 100644 --- a/sound/soc/sof/imx/Kconfig +++ b/sound/soc/sof/imx/Kconfig @@ -32,13 +32,4 @@ config SND_SOC_SOF_IMX8 Say Y if you have such a device. If unsure select "N". -config SND_SOC_SOF_IMX8ULP - tristate "SOF support for i.MX8ULP" - depends on IMX_DSP - select SND_SOC_SOF_IMX_COMMON - help - This adds support for Sound Open Firmware for NXP i.MX8ULP platforms. - Say Y if you have such a device. - If unsure select "N". - endif ## SND_SOC_SOF_IMX_TOPLEVEL diff --git a/sound/soc/sof/imx/Makefile b/sound/soc/sof/imx/Makefile index 852140bb8104..36a3a67c6efb 100644 --- a/sound/soc/sof/imx/Makefile +++ b/sound/soc/sof/imx/Makefile @@ -1,9 +1,7 @@ # SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) snd-sof-imx8-y := imx8.o -snd-sof-imx8ulp-y := imx8ulp.o snd-sof-imx-common-y := imx-common.o obj-$(CONFIG_SND_SOC_SOF_IMX8) += snd-sof-imx8.o -obj-$(CONFIG_SND_SOC_SOF_IMX8ULP) += snd-sof-imx8ulp.o obj-$(CONFIG_SND_SOC_SOF_IMX_COMMON) += imx-common.o diff --git a/sound/soc/sof/imx/imx8.c b/sound/soc/sof/imx/imx8.c index 015ba496863e..a5e9e053bf48 100644 --- a/sound/soc/sof/imx/imx8.c +++ b/sound/soc/sof/imx/imx8.c @@ -8,6 +8,7 @@ #include +#include #include #include @@ -29,6 +30,16 @@ #define AudioDSP_REG2_RUNSTALL BIT(5) +/* imx8ulp macros */ +#define FSL_SIP_HIFI_XRDC 0xc200000e +#define SYSCTRL0 0x8 +#define EXECUTE_BIT BIT(13) +#define RESET_BIT BIT(16) +#define HIFI4_CLK_BIT BIT(17) +#define PB_CLK_BIT BIT(18) +#define PLAT_CLK_BIT BIT(19) +#define DEBUG_LOGIC_BIT BIT(25) + struct imx8m_chip_data { void __iomem *dap; struct regmap *regmap; @@ -49,6 +60,11 @@ static struct snd_soc_dai_driver imx8m_dai[] = { IMX_SOF_DAI_DRV_ENTRY("micfil", 0, 0, 1, 8), }; +static struct snd_soc_dai_driver imx8ulp_dai[] = { + IMX_SOF_DAI_DRV_ENTRY_BIDIR("sai5", 1, 32), + IMX_SOF_DAI_DRV_ENTRY_BIDIR("sai6", 1, 32), +}; + static struct snd_sof_dsp_ops sof_imx8_ops; static void imx8_ops_init(struct snd_soc_dai_driver *dai_drv, uint32_t num_drv) @@ -74,6 +90,8 @@ static int imx_ops_init(struct snd_sof_dev *sdev) imx8_ops_init(imx8_dai, ARRAY_SIZE(imx8_dai)); } else if (of_device_is_compatible(sdev->dev->of_node, "fsl,imx8mp-dsp")) { imx8_ops_init(imx8m_dai, ARRAY_SIZE(imx8m_dai)); + } else if (of_device_is_compatible(sdev->dev->of_node, "fsl,imx8ulp-dsp")) { + imx8_ops_init(imx8ulp_dai, ARRAY_SIZE(imx8ulp_dai)); } else { return -EINVAL; } @@ -220,6 +238,68 @@ static int imx8m_run(struct snd_sof_dev *sdev) return 0; } +static int imx8ulp_probe(struct snd_sof_dev *sdev) +{ + struct imx_common_data *common; + struct regmap *regmap; + + common = sdev->pdata->hw_pdata; + + regmap = syscon_regmap_lookup_by_phandle(sdev->dev->of_node, "fsl,dsp-ctrl"); + if (IS_ERR(regmap)) + return dev_err_probe(sdev->dev, PTR_ERR(regmap), + "failed to fetch dsp ctrl regmap\n"); + + common->chip_pdata = regmap; + + return 0; +} + +static int imx8ulp_run(struct snd_sof_dev *sdev) +{ + struct regmap *regmap = get_chip_pdata(sdev); + + /* Controls the HiFi4 DSP Reset: 1 in reset, 0 out of reset */ + regmap_update_bits(regmap, SYSCTRL0, RESET_BIT, 0); + + /* Reset HiFi4 DSP Debug logic: 1 debug reset, 0 out of reset*/ + regmap_update_bits(regmap, SYSCTRL0, DEBUG_LOGIC_BIT, 0); + + /* Stall HIFI4 DSP Execution: 1 stall, 0 run */ + regmap_update_bits(regmap, SYSCTRL0, EXECUTE_BIT, 0); + + return 0; +} + +static int imx8ulp_reset(struct snd_sof_dev *sdev) +{ + struct regmap *regmap; + struct arm_smccc_res smc_res; + + regmap = get_chip_pdata(sdev); + + /* HiFi4 Platform Clock Enable: 1 enabled, 0 disabled */ + regmap_update_bits(regmap, SYSCTRL0, PLAT_CLK_BIT, PLAT_CLK_BIT); + + /* HiFi4 PBCLK clock enable: 1 enabled, 0 disabled */ + regmap_update_bits(regmap, SYSCTRL0, PB_CLK_BIT, PB_CLK_BIT); + + /* HiFi4 Clock Enable: 1 enabled, 0 disabled */ + regmap_update_bits(regmap, SYSCTRL0, HIFI4_CLK_BIT, HIFI4_CLK_BIT); + + regmap_update_bits(regmap, SYSCTRL0, RESET_BIT, RESET_BIT); + + usleep_range(1, 2); + + /* Stall HIFI4 DSP Execution: 1 stall, 0 not stall */ + regmap_update_bits(regmap, SYSCTRL0, EXECUTE_BIT, EXECUTE_BIT); + usleep_range(1, 2); + + arm_smccc_smc(FSL_SIP_HIFI_XRDC, 0, 0, 0, 0, 0, 0, 0, &smc_res); + + return smc_res.a0; +} + static const struct imx_chip_ops imx8_chip_ops = { .probe = imx8_probe, .core_kick = imx8_run, @@ -236,6 +316,12 @@ static const struct imx_chip_ops imx8m_chip_ops = { .core_reset = imx8m_reset, }; +static const struct imx_chip_ops imx8ulp_chip_ops = { + .probe = imx8ulp_probe, + .core_kick = imx8ulp_run, + .core_reset = imx8ulp_reset, +}; + static struct imx_memory_info imx8_memory_regions[] = { { .name = "iram", .reserved = false }, { .name = "sram", .reserved = true }, @@ -248,6 +334,12 @@ static struct imx_memory_info imx8m_memory_regions[] = { { } }; +static struct imx_memory_info imx8ulp_memory_regions[] = { + { .name = "iram", .reserved = false }, + { .name = "sram", .reserved = true }, + { } +}; + static const struct imx_chip_info imx8_chip_info = { .ipc_info = { .has_panic_code = true, @@ -278,6 +370,17 @@ static const struct imx_chip_info imx8m_chip_info = { .ops = &imx8m_chip_ops, }; +static const struct imx_chip_info imx8ulp_chip_info = { + .ipc_info = { + .has_panic_code = true, + .boot_mbox_offset = 0x800000, + .window_offset = 0x800000, + }, + .has_dma_reserved = true, + .memory = imx8ulp_memory_regions, + .ops = &imx8ulp_chip_ops, +}; + static struct snd_sof_of_mach sof_imx8_machs[] = { { .compatible = "fsl,imx8qxp-mek", @@ -319,12 +422,18 @@ static struct snd_sof_of_mach sof_imx8_machs[] = { .sof_tplg_filename = "sof-imx8mp-wm8962.tplg", .drv_name = "asoc-audio-graph-card2", }, + { + .compatible = "fsl,imx8ulp-evk", + .sof_tplg_filename = "sof-imx8ulp-btsco.tplg", + .drv_name = "asoc-audio-graph-card2", + }, {} }; IMX_SOF_DEV_DESC(imx8, sof_imx8_machs, &imx8_chip_info, &sof_imx8_ops, imx_ops_init); IMX_SOF_DEV_DESC(imx8x, sof_imx8_machs, &imx8x_chip_info, &sof_imx8_ops, imx_ops_init); IMX_SOF_DEV_DESC(imx8m, sof_imx8_machs, &imx8m_chip_info, &sof_imx8_ops, imx_ops_init); +IMX_SOF_DEV_DESC(imx8ulp, sof_imx8_machs, &imx8ulp_chip_info, &sof_imx8_ops, imx_ops_init); static const struct of_device_id sof_of_imx8_ids[] = { { @@ -339,6 +448,10 @@ static const struct of_device_id sof_of_imx8_ids[] = { .compatible = "fsl,imx8mp-dsp", .data = &IMX_SOF_DEV_DESC_NAME(imx8m), }, + { + .compatible = "fsl,imx8ulp-dsp", + .data = &IMX_SOF_DEV_DESC_NAME(imx8ulp), + }, { } }; MODULE_DEVICE_TABLE(of, sof_of_imx8_ids); diff --git a/sound/soc/sof/imx/imx8ulp.c b/sound/soc/sof/imx/imx8ulp.c deleted file mode 100644 index 0704da27e69d..000000000000 --- a/sound/soc/sof/imx/imx8ulp.c +++ /dev/null @@ -1,520 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) -// -// Copyright 2021-2022 NXP -// -// Author: Peng Zhang -// -// Hardware interface for audio DSP on i.MX8ULP - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include "../ops.h" -#include "../sof-of-dev.h" -#include "imx-common.h" - -#define FSL_SIP_HIFI_XRDC 0xc200000e - -/* SIM Domain register */ -#define SYSCTRL0 0x8 -#define EXECUTE_BIT BIT(13) -#define RESET_BIT BIT(16) -#define HIFI4_CLK_BIT BIT(17) -#define PB_CLK_BIT BIT(18) -#define PLAT_CLK_BIT BIT(19) -#define DEBUG_LOGIC_BIT BIT(25) - -#define MBOX_OFFSET 0x800000 -#define MBOX_SIZE 0x1000 - -struct imx8ulp_priv { - struct device *dev; - struct snd_sof_dev *sdev; - - /* DSP IPC handler */ - struct imx_dsp_ipc *dsp_ipc; - struct platform_device *ipc_dev; - - struct regmap *regmap; - struct clk_bulk_data *clks; - int clk_num; -}; - -static void imx8ulp_sim_lpav_start(struct imx8ulp_priv *priv) -{ - /* Controls the HiFi4 DSP Reset: 1 in reset, 0 out of reset */ - regmap_update_bits(priv->regmap, SYSCTRL0, RESET_BIT, 0); - - /* Reset HiFi4 DSP Debug logic: 1 debug reset, 0 out of reset*/ - regmap_update_bits(priv->regmap, SYSCTRL0, DEBUG_LOGIC_BIT, 0); - - /* Stall HIFI4 DSP Execution: 1 stall, 0 run */ - regmap_update_bits(priv->regmap, SYSCTRL0, EXECUTE_BIT, 0); -} - -static int imx8ulp_get_mailbox_offset(struct snd_sof_dev *sdev) -{ - return MBOX_OFFSET; -} - -static int imx8ulp_get_window_offset(struct snd_sof_dev *sdev, u32 id) -{ - return MBOX_OFFSET; -} - -static void imx8ulp_dsp_handle_reply(struct imx_dsp_ipc *ipc) -{ - struct imx8ulp_priv *priv = imx_dsp_get_data(ipc); - unsigned long flags; - - spin_lock_irqsave(&priv->sdev->ipc_lock, flags); - - snd_sof_ipc_process_reply(priv->sdev, 0); - - spin_unlock_irqrestore(&priv->sdev->ipc_lock, flags); -} - -static void imx8ulp_dsp_handle_request(struct imx_dsp_ipc *ipc) -{ - struct imx8ulp_priv *priv = imx_dsp_get_data(ipc); - u32 p; /* panic code */ - - /* Read the message from the debug box. */ - sof_mailbox_read(priv->sdev, priv->sdev->debug_box.offset + 4, &p, sizeof(p)); - - /* Check to see if the message is a panic code (0x0dead***) */ - if ((p & SOF_IPC_PANIC_MAGIC_MASK) == SOF_IPC_PANIC_MAGIC) - snd_sof_dsp_panic(priv->sdev, p, true); - else - snd_sof_ipc_msgs_rx(priv->sdev); -} - -static struct imx_dsp_ops dsp_ops = { - .handle_reply = imx8ulp_dsp_handle_reply, - .handle_request = imx8ulp_dsp_handle_request, -}; - -static int imx8ulp_send_msg(struct snd_sof_dev *sdev, struct snd_sof_ipc_msg *msg) -{ - struct imx8ulp_priv *priv = sdev->pdata->hw_pdata; - - sof_mailbox_write(sdev, sdev->host_box.offset, msg->msg_data, - msg->msg_size); - imx_dsp_ring_doorbell(priv->dsp_ipc, 0); - - return 0; -} - -static int imx8ulp_run(struct snd_sof_dev *sdev) -{ - struct imx8ulp_priv *priv = sdev->pdata->hw_pdata; - - imx8ulp_sim_lpav_start(priv); - - return 0; -} - -static int imx8ulp_reset(struct snd_sof_dev *sdev) -{ - struct imx8ulp_priv *priv = sdev->pdata->hw_pdata; - struct arm_smccc_res smc_resource; - - /* HiFi4 Platform Clock Enable: 1 enabled, 0 disabled */ - regmap_update_bits(priv->regmap, SYSCTRL0, PLAT_CLK_BIT, PLAT_CLK_BIT); - - /* HiFi4 PBCLK clock enable: 1 enabled, 0 disabled */ - regmap_update_bits(priv->regmap, SYSCTRL0, PB_CLK_BIT, PB_CLK_BIT); - - /* HiFi4 Clock Enable: 1 enabled, 0 disabled */ - regmap_update_bits(priv->regmap, SYSCTRL0, HIFI4_CLK_BIT, HIFI4_CLK_BIT); - - regmap_update_bits(priv->regmap, SYSCTRL0, RESET_BIT, RESET_BIT); - usleep_range(1, 2); - - /* Stall HIFI4 DSP Execution: 1 stall, 0 not stall */ - regmap_update_bits(priv->regmap, SYSCTRL0, EXECUTE_BIT, EXECUTE_BIT); - usleep_range(1, 2); - - arm_smccc_smc(FSL_SIP_HIFI_XRDC, 0, 0, 0, 0, 0, 0, 0, &smc_resource); - - return 0; -} - -static int imx8ulp_probe(struct snd_sof_dev *sdev) -{ - struct platform_device *pdev = to_platform_device(sdev->dev); - struct device_node *np = pdev->dev.of_node; - struct device_node *res_node; - struct resource *mmio; - struct imx8ulp_priv *priv; - struct resource res; - u32 base, size; - int ret = 0; - - priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); - if (!priv) - return -ENOMEM; - - sdev->num_cores = 1; - sdev->pdata->hw_pdata = priv; - priv->dev = sdev->dev; - priv->sdev = sdev; - - /* System integration module(SIM) control dsp configuration */ - priv->regmap = syscon_regmap_lookup_by_phandle(np, "fsl,dsp-ctrl"); - if (IS_ERR(priv->regmap)) - return PTR_ERR(priv->regmap); - - priv->ipc_dev = platform_device_register_data(sdev->dev, "imx-dsp", - PLATFORM_DEVID_NONE, - pdev, sizeof(*pdev)); - if (IS_ERR(priv->ipc_dev)) - return PTR_ERR(priv->ipc_dev); - - priv->dsp_ipc = dev_get_drvdata(&priv->ipc_dev->dev); - if (!priv->dsp_ipc) { - /* DSP IPC driver not probed yet, try later */ - ret = -EPROBE_DEFER; - dev_err(sdev->dev, "Failed to get drvdata\n"); - goto exit_pdev_unregister; - } - - imx_dsp_set_data(priv->dsp_ipc, priv); - priv->dsp_ipc->ops = &dsp_ops; - - /* DSP base */ - mmio = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (mmio) { - base = mmio->start; - size = resource_size(mmio); - } else { - dev_err(sdev->dev, "error: failed to get DSP base at idx 0\n"); - ret = -EINVAL; - goto exit_pdev_unregister; - } - - sdev->bar[SOF_FW_BLK_TYPE_IRAM] = devm_ioremap(sdev->dev, base, size); - if (!sdev->bar[SOF_FW_BLK_TYPE_IRAM]) { - dev_err(sdev->dev, "failed to ioremap base 0x%x size 0x%x\n", - base, size); - ret = -ENODEV; - goto exit_pdev_unregister; - } - sdev->mmio_bar = SOF_FW_BLK_TYPE_IRAM; - - res_node = of_parse_phandle(np, "memory-reserved", 0); - if (!res_node) { - dev_err(&pdev->dev, "failed to get memory region node\n"); - ret = -ENODEV; - goto exit_pdev_unregister; - } - - ret = of_address_to_resource(res_node, 0, &res); - of_node_put(res_node); - if (ret) { - dev_err(&pdev->dev, "failed to get reserved region address\n"); - goto exit_pdev_unregister; - } - - sdev->bar[SOF_FW_BLK_TYPE_SRAM] = devm_ioremap_wc(sdev->dev, res.start, - resource_size(&res)); - if (!sdev->bar[SOF_FW_BLK_TYPE_SRAM]) { - dev_err(sdev->dev, "failed to ioremap mem 0x%x size 0x%x\n", - base, size); - ret = -ENOMEM; - goto exit_pdev_unregister; - } - sdev->mailbox_bar = SOF_FW_BLK_TYPE_SRAM; - - /* set default mailbox offset for FW ready message */ - sdev->dsp_box.offset = MBOX_OFFSET; - - ret = of_reserved_mem_device_init(sdev->dev); - if (ret) { - dev_err(&pdev->dev, "failed to init reserved memory region %d\n", ret); - goto exit_pdev_unregister; - } - - ret = devm_clk_bulk_get_all(sdev->dev, &priv->clks); - if (ret < 0) { - dev_err(sdev->dev, "failed to fetch clocks: %d\n", ret); - goto exit_pdev_unregister; - } - priv->clk_num = ret; - - ret = clk_bulk_prepare_enable(priv->clk_num, priv->clks); - if (ret < 0) { - dev_err(sdev->dev, "failed to enable clocks: %d\n", ret); - goto exit_pdev_unregister; - } - - return 0; - -exit_pdev_unregister: - platform_device_unregister(priv->ipc_dev); - - return ret; -} - -static void imx8ulp_remove(struct snd_sof_dev *sdev) -{ - struct imx8ulp_priv *priv = sdev->pdata->hw_pdata; - - clk_bulk_disable_unprepare(priv->clk_num, priv->clks); - platform_device_unregister(priv->ipc_dev); -} - -/* on i.MX8 there is 1 to 1 match between type and BAR idx */ -static int imx8ulp_get_bar_index(struct snd_sof_dev *sdev, u32 type) -{ - return type; -} - -static int imx8ulp_suspend(struct snd_sof_dev *sdev) -{ - int i; - struct imx8ulp_priv *priv = (struct imx8ulp_priv *)sdev->pdata->hw_pdata; - - /*Stall DSP, release in .run() */ - regmap_update_bits(priv->regmap, SYSCTRL0, EXECUTE_BIT, EXECUTE_BIT); - - for (i = 0; i < DSP_MU_CHAN_NUM; i++) - imx_dsp_free_channel(priv->dsp_ipc, i); - - clk_bulk_disable_unprepare(priv->clk_num, priv->clks); - - return 0; -} - -static int imx8ulp_resume(struct snd_sof_dev *sdev) -{ - struct imx8ulp_priv *priv = (struct imx8ulp_priv *)sdev->pdata->hw_pdata; - int i, ret; - - ret = clk_bulk_prepare_enable(priv->clk_num, priv->clks); - if (ret < 0) { - dev_err(sdev->dev, "failed to enable clocks: %d\n", ret); - return ret; - } - - for (i = 0; i < DSP_MU_CHAN_NUM; i++) - imx_dsp_request_channel(priv->dsp_ipc, i); - - return 0; -} - -static int imx8ulp_dsp_runtime_resume(struct snd_sof_dev *sdev) -{ - const struct sof_dsp_power_state target_dsp_state = { - .state = SOF_DSP_PM_D0, - .substate = 0, - }; - - imx8ulp_resume(sdev); - - return snd_sof_dsp_set_power_state(sdev, &target_dsp_state); -} - -static int imx8ulp_dsp_runtime_suspend(struct snd_sof_dev *sdev) -{ - const struct sof_dsp_power_state target_dsp_state = { - .state = SOF_DSP_PM_D3, - .substate = 0, - }; - - imx8ulp_suspend(sdev); - - return snd_sof_dsp_set_power_state(sdev, &target_dsp_state); -} - -static int imx8ulp_dsp_suspend(struct snd_sof_dev *sdev, unsigned int target_state) -{ - const struct sof_dsp_power_state target_dsp_state = { - .state = target_state, - .substate = 0, - }; - - if (!pm_runtime_suspended(sdev->dev)) - imx8ulp_suspend(sdev); - - return snd_sof_dsp_set_power_state(sdev, &target_dsp_state); -} - -static int imx8ulp_dsp_resume(struct snd_sof_dev *sdev) -{ - const struct sof_dsp_power_state target_dsp_state = { - .state = SOF_DSP_PM_D0, - .substate = 0, - }; - - imx8ulp_resume(sdev); - - if (pm_runtime_suspended(sdev->dev)) { - pm_runtime_disable(sdev->dev); - pm_runtime_set_active(sdev->dev); - pm_runtime_mark_last_busy(sdev->dev); - pm_runtime_enable(sdev->dev); - pm_runtime_idle(sdev->dev); - } - - return snd_sof_dsp_set_power_state(sdev, &target_dsp_state); -} - -static struct snd_soc_dai_driver imx8ulp_dai[] = { - { - .name = "sai5", - .playback = { - .channels_min = 1, - .channels_max = 32, - }, - .capture = { - .channels_min = 1, - .channels_max = 32, - }, - }, - { - .name = "sai6", - .playback = { - .channels_min = 1, - .channels_max = 32, - }, - .capture = { - .channels_min = 1, - .channels_max = 32, - }, - }, -}; - -static int imx8ulp_dsp_set_power_state(struct snd_sof_dev *sdev, - const struct sof_dsp_power_state *target_state) -{ - sdev->dsp_power_state = *target_state; - - return 0; -} - -/* i.MX8 ops */ -static const struct snd_sof_dsp_ops sof_imx8ulp_ops = { - /* probe and remove */ - .probe = imx8ulp_probe, - .remove = imx8ulp_remove, - /* DSP core boot */ - .run = imx8ulp_run, - .reset = imx8ulp_reset, - - /* Block IO */ - .block_read = sof_block_read, - .block_write = sof_block_write, - - /* Module IO */ - .read64 = sof_io_read64, - - /* Mailbox IO */ - .mailbox_read = sof_mailbox_read, - .mailbox_write = sof_mailbox_write, - - /* ipc */ - .send_msg = imx8ulp_send_msg, - .get_mailbox_offset = imx8ulp_get_mailbox_offset, - .get_window_offset = imx8ulp_get_window_offset, - - .ipc_msg_data = sof_ipc_msg_data, - .set_stream_data_offset = sof_set_stream_data_offset, - - /* stream callbacks */ - .pcm_open = sof_stream_pcm_open, - .pcm_close = sof_stream_pcm_close, - - /* module loading */ - .get_bar_index = imx8ulp_get_bar_index, - /* firmware loading */ - .load_firmware = snd_sof_load_firmware_memcpy, - - /* Debug information */ - .dbg_dump = imx8_dump, - - /* Firmware ops */ - .dsp_arch_ops = &sof_xtensa_arch_ops, - - /* DAI drivers */ - .drv = imx8ulp_dai, - .num_drv = ARRAY_SIZE(imx8ulp_dai), - - /* ALSA HW info flags */ - .hw_info = SNDRV_PCM_INFO_MMAP | - SNDRV_PCM_INFO_MMAP_VALID | - SNDRV_PCM_INFO_INTERLEAVED | - SNDRV_PCM_INFO_PAUSE | - SNDRV_PCM_INFO_BATCH | - SNDRV_PCM_INFO_NO_PERIOD_WAKEUP, - - /* PM */ - .runtime_suspend = imx8ulp_dsp_runtime_suspend, - .runtime_resume = imx8ulp_dsp_runtime_resume, - - .suspend = imx8ulp_dsp_suspend, - .resume = imx8ulp_dsp_resume, - - .set_power_state = imx8ulp_dsp_set_power_state, -}; - -static struct snd_sof_of_mach sof_imx8ulp_machs[] = { - { - .compatible = "fsl,imx8ulp-evk", - .sof_tplg_filename = "sof-imx8ulp-btsco.tplg", - .drv_name = "asoc-audio-graph-card2", - }, - {} -}; - -static struct sof_dev_desc sof_of_imx8ulp_desc = { - .of_machines = sof_imx8ulp_machs, - .ipc_supported_mask = BIT(SOF_IPC_TYPE_3), - .ipc_default = SOF_IPC_TYPE_3, - .default_fw_path = { - [SOF_IPC_TYPE_3] = "imx/sof", - }, - .default_tplg_path = { - [SOF_IPC_TYPE_3] = "imx/sof-tplg", - }, - .default_fw_filename = { - [SOF_IPC_TYPE_3] = "sof-imx8ulp.ri", - }, - .nocodec_tplg_filename = "sof-imx8ulp-nocodec.tplg", - .ops = &sof_imx8ulp_ops, -}; - -static const struct of_device_id sof_of_imx8ulp_ids[] = { - { .compatible = "fsl,imx8ulp-dsp", .data = &sof_of_imx8ulp_desc}, - { } -}; -MODULE_DEVICE_TABLE(of, sof_of_imx8ulp_ids); - -/* DT driver definition */ -static struct platform_driver snd_sof_of_imx8ulp_driver = { - .probe = sof_of_probe, - .remove = sof_of_remove, - .driver = { - .name = "sof-audio-of-imx8ulp", - .pm = &sof_of_pm, - .of_match_table = sof_of_imx8ulp_ids, - }, -}; -module_platform_driver(snd_sof_of_imx8ulp_driver); - -MODULE_LICENSE("Dual BSD/GPL"); -MODULE_DESCRIPTION("SOF support for IMX8ULP platforms"); -MODULE_IMPORT_NS("SND_SOC_SOF_XTENSA"); From patchwork Mon Feb 3 17:18:08 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurentiu Mihalcea X-Patchwork-Id: 13957927 Received: from mail-ej1-f54.google.com (mail-ej1-f54.google.com [209.85.218.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 27D6420E71A for ; Mon, 3 Feb 2025 17:19:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.54 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738603163; cv=none; b=C1J1Rn6/yVBsCCwaaNUsqm/iJP4cbCxRwZZQ1TT5imtE4qqZYFPfHTxinxmGCwu8U+VFMKoqlfcFLGItpB3715gHCUwna7imyai9wW3C7atCNgi+bVXImikshP0hWXwTuzsYopAKuSBEYRwt4xFs+aWHGLiJ49NQj0J3SuEKldQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1738603163; c=relaxed/simple; bh=btjqz5KUcQjdcm2IA5CnWxHSOfUI3My73mcGvWB+IMs=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=h71QQMNTHxPVhXBIyvGbo56rtKUmcCvSq1CiicWXbzITo2DRfj1/VTfu5nD1EdEyikRwsn61IeJk+udeOxAQRIrzNxtsroIcw+K+O41IjQbSDAMb3uYLOSXZnZkc7RzoHfMUP5j2cPWgJD+LlNg4iLSJZ7uteQ8Kh7zjUnj/j8k= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=Mp/5Ah/j; arc=none smtp.client-ip=209.85.218.54 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="Mp/5Ah/j" Received: by mail-ej1-f54.google.com with SMTP id a640c23a62f3a-aaec61d0f65so790969766b.1 for ; Mon, 03 Feb 2025 09:19:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1738603159; x=1739207959; darn=lists.linux.dev; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=FZ4lM6UxfL9Ok/xrPuvbDtbsSkBr/V1IbirDhtP9Bbk=; b=Mp/5Ah/jYPyfURjS30zJdryMeIfzLs5Et9W1EfRSxa2ZHsKk81jLxqEGgHAv/14we5 +5CoV5lBFf242r7njuMjcVLZjq6z+BSq0Z4dluSJkBK2qeNuE7a1vJAW0ZmkDEy+p55c y54DrFUnZuhY7o4f2KV/eqxopRk27MmW7mHj7Ha656D/JGJ+/QAznPKvr1qCGJEaBTkh lP6cQkR9UYoKArA3pCgMcNwUDmX7KNGwNszQD4QPJHbxZ9l9Hek4cjp2543JfdWEpT+C QgF6AmnxrJ4Ml+tRmPuwv2ZVGnzLrwkcN6xWD5y67EzcFNuzc2DswJ17uqafK7PMexIL jh6g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738603159; x=1739207959; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=FZ4lM6UxfL9Ok/xrPuvbDtbsSkBr/V1IbirDhtP9Bbk=; b=fP5dhVzr2IKRrLKSg1GRIp+7eZicjV14rhG41iQzLTzqieHX/fOKoEbxnObW8ZoEV3 IhZerulC7pHAeMaCylpClfNDE9YWuly8/cg2L2J+gDyBR+QOy8+0Umd+5Ls4eMqnciIL 2siPMNo4XJj5CW3AWCWZagjlz04jN/DTggI45OPZ/DzJUCC98tdurJtmEViO2fPP8v1s NGy/8QX87kDfqhosRtGxHN1L3YrgMyXWGwKAiN+HSV2OkogPSvYWyMmTKLfIP2LM8A/M Ja00hqT7pt9j3FCz5c4duUdlDxhsFo95QrHisHJPqfhcZj6CXuQ1xSA6pvDavLVIqAqz eI5w== X-Forwarded-Encrypted: i=1; AJvYcCX+wojFDK9IcZ/+us50EvWVBf2R9/52gVjw8Tou6dXs9dFyii6r9PMdO9G4yTjcrm46o+o=@lists.linux.dev X-Gm-Message-State: AOJu0Yy192LR56gi2OZCAfQx/tr0HxdKBX9w5s2GnDgkWyHIENOERtlb xYKiyGfJqNbuyByidVYU6HwmwGbQUxBPt1Df5RbYM8FpQjL2OhRF X-Gm-Gg: ASbGncvmtqxesCKXobJq3bwNrdb631dRMTvGX0BM/YoH87N23yQB09oiLJpr8sU4RzW 2AlYaCCP7/ntDl3DHFbh7Ln0PF3iH9AwsMjhpyXh9iwrm4dCU1E5+YV7Ya9Q9Ab3S7NMtmjVmrH LBIMSrL0Pjfe4J+lQ9Ye8g8yQ0TaLxFich+J/NWjfDOJ1aFGQR3bxVX3cLfw620KtNpzR8lLlBT zQ4n9d4p/iYLN+JHj5BBuFJpDC36Z4dAmHZqYNVtRP/dE/Qi/DaSyrOuzN23ZEb4O4ePXB6N8N9 6ai/6REcN6tLtOw4xGMcM9draFUVHr7P6cEOxwJY/m7HFJuY5w== X-Google-Smtp-Source: AGHT+IFgry0ftlapvrf7EtYFzbKt1bCPkjlJy/7aasV72LNddgtJ3tlNB2kZEN6pbuUX/L38gX3R4g== X-Received: by 2002:a17:907:6ea3:b0:ab6:f4e0:c06 with SMTP id a640c23a62f3a-ab6f4e00fe4mr1796035066b.21.1738603158981; Mon, 03 Feb 2025 09:19:18 -0800 (PST) Received: from playground.localdomain ([92.120.5.2]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ab6e47d21aasm784253866b.74.2025.02.03.09.19.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Feb 2025 09:19:18 -0800 (PST) From: Laurentiu Mihalcea To: Bard Liao , Daniel Baluta , Iuliana Prodan , Jaroslav Kysela , Takashi Iwai , Mark Brown Cc: linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org, imx@lists.linux.dev Subject: [PATCH 9/9] ASoC: SOF: imx: add driver for the imx95 chip Date: Mon, 3 Feb 2025 12:18:08 -0500 Message-Id: <20250203171808.4108-10-laurentiumihalcea111@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250203171808.4108-1-laurentiumihalcea111@gmail.com> References: <20250203171808.4108-1-laurentiumihalcea111@gmail.com> Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Laurentiu Mihalcea Add SOF support for the imx95 chip. Although the support is just for the imx95 chip, the driver is intended for all chips in the imx9 family. Note that the imx95 support could have just as easily been added to the imx8 platform driver but a new platform driver was created because the intention is to keep the families in separate drivers. Signed-off-by: Laurentiu Mihalcea Reviewed-by: Daniel Baluta Reviewed-by: Iuliana Prodan --- sound/soc/sof/imx/Kconfig | 9 +++ sound/soc/sof/imx/Makefile | 2 + sound/soc/sof/imx/imx9.c | 135 +++++++++++++++++++++++++++++++++++++ 3 files changed, 146 insertions(+) create mode 100644 sound/soc/sof/imx/imx9.c diff --git a/sound/soc/sof/imx/Kconfig b/sound/soc/sof/imx/Kconfig index 2edf9de2c886..327e2df94a58 100644 --- a/sound/soc/sof/imx/Kconfig +++ b/sound/soc/sof/imx/Kconfig @@ -32,4 +32,13 @@ config SND_SOC_SOF_IMX8 Say Y if you have such a device. If unsure select "N". +config SND_SOC_SOF_IMX9 + tristate "SOF support for i.MX9" + depends on IMX_DSP + select SND_SOC_SOF_IMX_COMMON + help + This adds support for Sound Open Firmware for NXP i.MX9 platforms. + Say Y if you need such a device. + If unsure select "N". + endif ## SND_SOC_SOF_IMX_TOPLEVEL diff --git a/sound/soc/sof/imx/Makefile b/sound/soc/sof/imx/Makefile index 36a3a67c6efb..74b5ecad8fe8 100644 --- a/sound/soc/sof/imx/Makefile +++ b/sound/soc/sof/imx/Makefile @@ -1,7 +1,9 @@ # SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) snd-sof-imx8-y := imx8.o +snd-sof-imx9-y := imx9.o snd-sof-imx-common-y := imx-common.o obj-$(CONFIG_SND_SOC_SOF_IMX8) += snd-sof-imx8.o +obj-$(CONFIG_SND_SOC_SOF_IMX9) += snd-sof-imx9.o obj-$(CONFIG_SND_SOC_SOF_IMX_COMMON) += imx-common.o diff --git a/sound/soc/sof/imx/imx9.c b/sound/soc/sof/imx/imx9.c new file mode 100644 index 000000000000..b6ef8b044d0f --- /dev/null +++ b/sound/soc/sof/imx/imx9.c @@ -0,0 +1,135 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) +/* + * Copyright 2025 NXP + */ + +#include + +#include "imx-common.h" + +#define IMX_SIP_SRC 0xC2000005 +#define IMX_SIP_SRC_M_RESET_ADDR_SET 0x03 + +#define IMX95_CPU_VEC_FLAGS_BOOT BIT(29) + +#define IMX_SIP_LMM 0xC200000F +#define IMX_SIP_LMM_BOOT 0x0 +#define IMX_SIP_LMM_SHUTDOWN 0x1 + +#define IMX95_M7_LM_ID 0x1 + +static struct snd_soc_dai_driver imx95_dai[] = { + IMX_SOF_DAI_DRV_ENTRY_BIDIR("sai3", 1, 32), +}; + +static struct snd_sof_dsp_ops sof_imx9_ops; + +static int imx95_ops_init(struct snd_sof_dev *sdev) +{ + /* first copy from template */ + memcpy(&sof_imx9_ops, &sof_imx_ops, sizeof(sof_imx_ops)); + + /* ... and finally set DAI driver */ + sof_imx9_ops.drv = imx95_dai; + sof_imx9_ops.num_drv = ARRAY_SIZE(imx95_dai); + + return 0; +} + +static int imx95_chip_probe(struct snd_sof_dev *sdev) +{ + struct resource *res; + struct arm_smccc_res smc_res; + struct platform_device *pdev; + + pdev = to_platform_device(sdev->dev); + + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "sram"); + if (!res) + return dev_err_probe(sdev->dev, -ENODEV, + "failed to fetch SRAM region\n"); + + /* set core boot reset address */ + arm_smccc_smc(IMX_SIP_SRC, IMX_SIP_SRC_M_RESET_ADDR_SET, res->start, + IMX95_CPU_VEC_FLAGS_BOOT, 0, 0, 0, 0, &smc_res); + + return smc_res.a0; +} + +static int imx95_core_kick(struct snd_sof_dev *sdev) +{ + struct arm_smccc_res smc_res; + + arm_smccc_smc(IMX_SIP_LMM, IMX_SIP_LMM_BOOT, + IMX95_M7_LM_ID, 0, 0, 0, 0, 0, &smc_res); + + return smc_res.a0; +} + +static int imx95_core_shutdown(struct snd_sof_dev *sdev) +{ + struct arm_smccc_res smc_res; + + arm_smccc_smc(IMX_SIP_LMM, IMX_SIP_LMM_SHUTDOWN, + IMX95_M7_LM_ID, 0, 0, 0, 0, 0, &smc_res); + + return smc_res.a0; +} + +static const struct imx_chip_ops imx95_chip_ops = { + .probe = imx95_chip_probe, + .core_kick = imx95_core_kick, + .core_shutdown = imx95_core_shutdown, +}; + +static struct imx_memory_info imx95_memory_regions[] = { + { .name = "sram", .reserved = false }, + { } +}; + +static const struct imx_chip_info imx95_chip_info = { + .ipc_info = { + .boot_mbox_offset = 0x6001000, + .window_offset = 0x6000000, + }, + .has_dma_reserved = true, + .memory = imx95_memory_regions, + .ops = &imx95_chip_ops, +}; + +static struct snd_sof_of_mach sof_imx9_machs[] = { + { + .compatible = "fsl,imx95-19x19-evk", + .sof_tplg_filename = "sof-imx95-wm8962.tplg", + .drv_name = "asoc-audio-graph-card2", + }, + { + } +}; + +IMX_SOF_DEV_DESC(imx95, sof_imx9_machs, &imx95_chip_info, &sof_imx9_ops, imx95_ops_init); + +static const struct of_device_id sof_of_imx9_ids[] = { + { + .compatible = "fsl,imx95-cm7-sof", + .data = &IMX_SOF_DEV_DESC_NAME(imx95), + }, + { + }, +}; +MODULE_DEVICE_TABLE(of, sof_of_imx9_ids); + +static struct platform_driver snd_sof_of_imx9_driver = { + .probe = sof_of_probe, + .remove = sof_of_remove, + .driver = { + .name = "sof-audio-of-imx9", + .pm = &sof_of_pm, + .of_match_table = sof_of_imx9_ids, + }, +}; +module_platform_driver(snd_sof_of_imx9_driver); + +MODULE_LICENSE("Dual BSD/GPL"); +MODULE_DESCRIPTION("SOF driver for imx9 platforms"); +MODULE_AUTHOR("Laurentiu Mihalcea ");