From patchwork Thu Feb 6 21:05:56 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anusha Srivatsa X-Patchwork-Id: 13963776 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 44E4EC02199 for ; Thu, 6 Feb 2025 21:06:29 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id BAC5610E951; Thu, 6 Feb 2025 21:06:28 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (1024-bit key; unprotected) header.d=redhat.com header.i=@redhat.com header.b="YUClqres"; dkim-atps=neutral Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by gabe.freedesktop.org (Postfix) with ESMTPS id 3AE7D10E948 for ; Thu, 6 Feb 2025 21:06:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1738875986; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=W9dw2GsJ3txj4x4sv2e14uTbJQpmFg0Z5+FljY+H6c4=; b=YUClqresy+E1dzuP4C5lDMUHEPxzq3igRPaeb/EP3Hr2dJwm+PQU820NCYCATg1sTV5BPp 8w+Ukz8bvXTqPyjriV3Fy8tmJ4OqrUbp0S98cOxYGbzq8Rmqy9HaVeVHd4cI8pqshCETol dOhU2+AQNdkpRejiEo4j5BD+136yCKg= Received: from mx-prod-mc-06.mail-002.prod.us-west-2.aws.redhat.com (ec2-35-165-154-97.us-west-2.compute.amazonaws.com [35.165.154.97]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-582-q30-LadsMtqB-RmBamXM2g-1; Thu, 06 Feb 2025 16:06:21 -0500 X-MC-Unique: q30-LadsMtqB-RmBamXM2g-1 X-Mimecast-MFC-AGG-ID: q30-LadsMtqB-RmBamXM2g Received: from mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.93]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-06.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 55CEE180087C; Thu, 6 Feb 2025 21:06:18 +0000 (UTC) Received: from asrivats-na.rmtustx.csb (unknown [10.2.17.21]) by mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 754981800570; Thu, 6 Feb 2025 21:06:14 +0000 (UTC) From: Anusha Srivatsa Date: Thu, 06 Feb 2025 16:05:56 -0500 Subject: [PATCH 01/14] drm/panel/boe-bf060y8m-aj0: Move to using mipi_dsi_dcs_write_seq_multi() MIME-Version: 1.0 Message-Id: <20250206-mipi-cocci-v1-1-4ff0c69e8897@redhat.com> References: <20250206-mipi-cocci-v1-0-4ff0c69e8897@redhat.com> In-Reply-To: <20250206-mipi-cocci-v1-0-4ff0c69e8897@redhat.com> To: Neil Armstrong , Jessica Zhang , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Joel Selvaraj , Ondrej Jirman , Javier Martinez Canillas , Artur Weber , Jianhua Lu , Jonathan Corbet Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anusha Srivatsa X-Developer-Signature: v=1; a=ed25519-sha256; t=1738875969; l=3363; i=asrivats@redhat.com; s=20250122; h=from:subject:message-id; bh=Beg8zbFxde7RAufCgKIRIO97riDK6ODCqDZH1mDsI0g=; b=+tgr+AkfmxbpYJ9Q2vPKpPqMIjgeosBh++geKnNUufO3y0qI12ZY2jWlR46h7jMylA7h+wh/q 2XgheerFhgQC0HbRzoo1NfTMXDW4rXQUizi8TuOkxkId+whhpqP3TdB X-Developer-Key: i=asrivats@redhat.com; a=ed25519; pk=brnIHkBsUZEhyW6Zyn0U92AeIZ1psws/q8VFbIkf1AU= X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Use mipi_dsi_dcs_write_seq_multi() instead of mipi_dsi_dcs_write_seq() Used Coccinelle to do this change. SmPl patch: @rule_1@ identifier dsi_var; expression dsi_device; expression list es; @@ struct mipi_dsi_device *dsi_var = dsi_device; +struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi_var }; <+... -mipi_dsi_dcs_write_seq(dsi_var,es); +mipi_dsi_dcs_write_seq_multi(&dsi_ctx,es); ...+> Signed-off-by: Anusha Srivatsa --- drivers/gpu/drm/panel/panel-boe-bf060y8m-aj0.c | 36 ++++++++++++++------------ 1 file changed, 19 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-boe-bf060y8m-aj0.c b/drivers/gpu/drm/panel/panel-boe-bf060y8m-aj0.c index 7e66db4a88bbed27920107458d01efd9cf4986df..640312096c1370c293c84431efa6fd17dc520f2e 100644 --- a/drivers/gpu/drm/panel/panel-boe-bf060y8m-aj0.c +++ b/drivers/gpu/drm/panel/panel-boe-bf060y8m-aj0.c @@ -55,15 +55,17 @@ static void boe_bf060y8m_aj0_reset(struct boe_bf060y8m_aj0 *boe) static int boe_bf060y8m_aj0_on(struct boe_bf060y8m_aj0 *boe) { struct mipi_dsi_device *dsi = boe->dsi; + struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi }; struct device *dev = &dsi->dev; int ret; - mipi_dsi_dcs_write_seq(dsi, 0xb0, 0xa5, 0x00); - mipi_dsi_dcs_write_seq(dsi, 0xb2, 0x00, 0x4c); - mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_3D_CONTROL, 0x10); - mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_POWER_SAVE, DCS_ALLOW_HBM_RANGE); - mipi_dsi_dcs_write_seq(dsi, 0xf8, - 0x00, 0x08, 0x10, 0x00, 0x22, 0x00, 0x00, 0x2d); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0, 0xa5, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb2, 0x00, 0x4c); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_SET_3D_CONTROL, 0x10); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_WRITE_POWER_SAVE, + DCS_ALLOW_HBM_RANGE); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf8, 0x00, 0x08, 0x10, 0x00, + 0x22, 0x00, 0x00, 0x2d); ret = mipi_dsi_dcs_exit_sleep_mode(dsi); if (ret < 0) { @@ -72,17 +74,17 @@ static int boe_bf060y8m_aj0_on(struct boe_bf060y8m_aj0 *boe) } msleep(30); - mipi_dsi_dcs_write_seq(dsi, 0xb0, 0xa5, 0x00); - mipi_dsi_dcs_write_seq(dsi, 0xc0, - 0x08, 0x48, 0x65, 0x33, 0x33, 0x33, - 0x2a, 0x31, 0x39, 0x20, 0x09); - mipi_dsi_dcs_write_seq(dsi, 0xc1, 0x00, 0x00, 0x00, 0x1f, 0x1f, - 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, - 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f); - mipi_dsi_dcs_write_seq(dsi, 0xe2, 0x20, 0x04, 0x10, 0x12, 0x92, - 0x4f, 0x8f, 0x44, 0x84, 0x83, 0x83, 0x83, - 0x5c, 0x5c, 0x5c); - mipi_dsi_dcs_write_seq(dsi, 0xde, 0x01, 0x2c, 0x00, 0x77, 0x3e); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0, 0xa5, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xc0, 0x08, 0x48, 0x65, 0x33, + 0x33, 0x33, 0x2a, 0x31, 0x39, 0x20, 0x09); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xc1, 0x00, 0x00, 0x00, 0x1f, + 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, + 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe2, 0x20, 0x04, 0x10, 0x12, + 0x92, 0x4f, 0x8f, 0x44, 0x84, 0x83, 0x83, + 0x83, 0x5c, 0x5c, 0x5c); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xde, 0x01, 0x2c, 0x00, 0x77, + 0x3e); msleep(30); From patchwork Thu Feb 6 21:05:57 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anusha Srivatsa X-Patchwork-Id: 13963777 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 84FEAC02194 for ; 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Thu, 06 Feb 2025 16:06:26 -0500 X-MC-Unique: ZRYY0hNfM0KNrEA3R-I0oA-1 X-Mimecast-MFC-AGG-ID: ZRYY0hNfM0KNrEA3R-I0oA Received: from mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.93]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-03.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 38E1E19560B7; Thu, 6 Feb 2025 21:06:22 +0000 (UTC) Received: from asrivats-na.rmtustx.csb (unknown [10.2.17.21]) by mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id A2BCE1800115; Thu, 6 Feb 2025 21:06:18 +0000 (UTC) From: Anusha Srivatsa Date: Thu, 06 Feb 2025 16:05:57 -0500 Subject: [PATCH 02/14] drm/panel/ebbg-ft8719: Move to using mipi_dsi_dcs_write_seq_multi() MIME-Version: 1.0 Message-Id: <20250206-mipi-cocci-v1-2-4ff0c69e8897@redhat.com> References: <20250206-mipi-cocci-v1-0-4ff0c69e8897@redhat.com> In-Reply-To: <20250206-mipi-cocci-v1-0-4ff0c69e8897@redhat.com> To: Neil Armstrong , Jessica Zhang , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Joel Selvaraj , Ondrej Jirman , Javier Martinez Canillas , Artur Weber , Jianhua Lu , Jonathan Corbet Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anusha Srivatsa X-Developer-Signature: v=1; a=ed25519-sha256; t=1738875969; l=1645; i=asrivats@redhat.com; s=20250122; h=from:subject:message-id; bh=tXLFYrCFoa+V5Fx8K6Ul96HuBQNd/wTw48iw7aloxnc=; b=0UTweW3zE7tVLh70TkefI2x88kDzaoZW9Sy8unN5veNnnbXhiqcBn34pb7Qz00goEDDF7bFtD GaULll194EnCYXt70b4Zh3HjO/a4TmXu4btuTz/uzx53pF+iBwFLAt8 X-Developer-Key: i=asrivats@redhat.com; a=ed25519; pk=brnIHkBsUZEhyW6Zyn0U92AeIZ1psws/q8VFbIkf1AU= X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Use mipi_dsi_dcs_write_seq_multi() instead of mipi_dsi_dcs_write_seq() Used Coccinelle to do this change. SmPl patch: @rule_1@ identifier dsi_var; expression dsi_device; expression list es; @@ struct mipi_dsi_device *dsi_var = dsi_device; +struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi_var }; <+... -mipi_dsi_dcs_write_seq(dsi_var,es); +mipi_dsi_dcs_write_seq_multi(&dsi_ctx,es); ...+> Signed-off-by: Anusha Srivatsa --- drivers/gpu/drm/panel/panel-ebbg-ft8719.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-ebbg-ft8719.c b/drivers/gpu/drm/panel/panel-ebbg-ft8719.c index e85d63a176d04274177cf3c830a64fac6439e9fa..5443a84d39edf8a3af8ec389bdbfd58e8bfe35e1 100644 --- a/drivers/gpu/drm/panel/panel-ebbg-ft8719.c +++ b/drivers/gpu/drm/panel/panel-ebbg-ft8719.c @@ -57,6 +57,7 @@ static void ebbg_ft8719_reset(struct ebbg_ft8719 *ctx) static int ebbg_ft8719_on(struct ebbg_ft8719 *ctx) { struct mipi_dsi_device *dsi = ctx->dsi; + struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi }; struct device *dev = &dsi->dev; int ret; @@ -68,8 +69,10 @@ static int ebbg_ft8719_on(struct ebbg_ft8719 *ctx) return ret; } - mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_CONTROL_DISPLAY, 0x24); - mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_POWER_SAVE, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_WRITE_CONTROL_DISPLAY, + 0x24); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_WRITE_POWER_SAVE, + 0x00); ret = mipi_dsi_dcs_exit_sleep_mode(dsi); if (ret < 0) { From patchwork Thu Feb 6 21:05:58 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anusha Srivatsa X-Patchwork-Id: 13963779 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EE560C0219C for ; Thu, 6 Feb 2025 21:06:40 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 722E010E956; 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Thu, 06 Feb 2025 16:06:30 -0500 X-MC-Unique: f-wjLbaiN_-dRQwZougrWA-1 X-Mimecast-MFC-AGG-ID: f-wjLbaiN_-dRQwZougrWA Received: from mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.93]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-08.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 4F807180056F; Thu, 6 Feb 2025 21:06:26 +0000 (UTC) Received: from asrivats-na.rmtustx.csb (unknown [10.2.17.21]) by mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 989EB1800570; Thu, 6 Feb 2025 21:06:22 +0000 (UTC) From: Anusha Srivatsa Date: Thu, 06 Feb 2025 16:05:58 -0500 Subject: [PATCH 03/14] drm/panel/himax-hx8394: Move to using mipi_dsi_dcs_write_seq_multi() MIME-Version: 1.0 Message-Id: <20250206-mipi-cocci-v1-3-4ff0c69e8897@redhat.com> References: <20250206-mipi-cocci-v1-0-4ff0c69e8897@redhat.com> In-Reply-To: <20250206-mipi-cocci-v1-0-4ff0c69e8897@redhat.com> To: Neil Armstrong , Jessica Zhang , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Joel Selvaraj , Ondrej Jirman , Javier Martinez Canillas , Artur Weber , Jianhua Lu , Jonathan Corbet Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anusha Srivatsa X-Developer-Signature: v=1; a=ed25519-sha256; t=1738875969; l=23561; i=asrivats@redhat.com; s=20250122; h=from:subject:message-id; bh=ESbuNypcgBCHyjkOkObQIW1RS2AAlSszimf2FxSwtps=; b=8R/Bo3cmFrWEVihOit0Cj6aR3nDeV9JuKAbi+lHSes/KWcX7S1cuMuWZm5cXXd06tpVGd0x8z WyWuVfZ53aODKsH8c5AmpB+NgY3FcgCJvCXoEzkAJyYh3XrfWlJqv6B X-Developer-Key: i=asrivats@redhat.com; a=ed25519; pk=brnIHkBsUZEhyW6Zyn0U92AeIZ1psws/q8VFbIkf1AU= X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Use mipi_dsi_dcs_write_seq_multi() instead of mipi_dsi_dcs_write_seq() Used Coccinelle to do this change. SmPl patch: @rule_1@ identifier dsi_var; expression dsi_device; expression list es; @@ struct mipi_dsi_device *dsi_var = dsi_device; +struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi_var }; <+... -mipi_dsi_dcs_write_seq(dsi_var,es); +mipi_dsi_dcs_write_seq_multi(&dsi_ctx,es); ...+> Signed-off-by: Anusha Srivatsa --- drivers/gpu/drm/panel/panel-himax-hx8394.c | 364 ++++++++++++++--------------- 1 file changed, 175 insertions(+), 189 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-himax-hx8394.c b/drivers/gpu/drm/panel/panel-himax-hx8394.c index 92b03a2f65a3594a43e42e9df88f824084349b61..9f3734fa6b6a1b833d0b7cffaae36b7c9873b65b 100644 --- a/drivers/gpu/drm/panel/panel-himax-hx8394.c +++ b/drivers/gpu/drm/panel/panel-himax-hx8394.c @@ -91,93 +91,93 @@ static inline struct hx8394 *panel_to_hx8394(struct drm_panel *panel) static int hsd060bhw4_init_sequence(struct hx8394 *ctx) { struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); + struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi }; /* 5.19.8 SETEXTC: Set extension command (B9h) */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETEXTC, - 0xff, 0x83, 0x94); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_SETEXTC, 0xff, 0x83, + 0x94); /* 5.19.2 SETPOWER: Set power (B1h) */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETPOWER, - 0x48, 0x11, 0x71, 0x09, 0x32, 0x24, 0x71, 0x31, 0x55, 0x30); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_SETPOWER, 0x48, + 0x11, 0x71, 0x09, 0x32, 0x24, 0x71, 0x31, + 0x55, 0x30); /* 5.19.9 SETMIPI: Set MIPI control (BAh) */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETMIPI, - 0x63, 0x03, 0x68, 0x6b, 0xb2, 0xc0); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_SETMIPI, 0x63, 0x03, + 0x68, 0x6b, 0xb2, 0xc0); /* 5.19.3 SETDISP: Set display related register (B2h) */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETDISP, - 0x00, 0x80, 0x78, 0x0c, 0x07); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_SETDISP, 0x00, 0x80, + 0x78, 0x0c, 0x07); /* 5.19.4 SETCYC: Set display waveform cycles (B4h) */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETCYC, - 0x12, 0x63, 0x12, 0x63, 0x12, 0x63, 0x01, 0x0c, 0x7c, 0x55, - 0x00, 0x3f, 0x12, 0x6b, 0x12, 0x6b, 0x12, 0x6b, 0x01, 0x0c, - 0x7c); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_SETCYC, 0x12, 0x63, + 0x12, 0x63, 0x12, 0x63, 0x01, 0x0c, 0x7c, + 0x55, 0x00, 0x3f, 0x12, 0x6b, 0x12, 0x6b, + 0x12, 0x6b, 0x01, 0x0c, 0x7c); /* 5.19.19 SETGIP0: Set GIP Option0 (D3h) */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETGIP0, - 0x00, 0x00, 0x00, 0x00, 0x3c, 0x1c, 0x00, 0x00, 0x32, 0x10, - 0x09, 0x00, 0x09, 0x32, 0x15, 0xad, 0x05, 0xad, 0x32, 0x00, - 0x00, 0x00, 0x00, 0x37, 0x03, 0x0b, 0x0b, 0x37, 0x00, 0x00, - 0x00, 0x0c, 0x40); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_SETGIP0, 0x00, 0x00, + 0x00, 0x00, 0x3c, 0x1c, 0x00, 0x00, 0x32, + 0x10, 0x09, 0x00, 0x09, 0x32, 0x15, 0xad, + 0x05, 0xad, 0x32, 0x00, 0x00, 0x00, 0x00, + 0x37, 0x03, 0x0b, 0x0b, 0x37, 0x00, 0x00, + 0x00, 0x0c, 0x40); /* 5.19.20 Set GIP Option1 (D5h) */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETGIP1, - 0x19, 0x19, 0x18, 0x18, 0x1b, 0x1b, 0x1a, 0x1a, 0x00, 0x01, - 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x20, 0x21, 0x18, 0x18, - 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, - 0x24, 0x25, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, - 0x18, 0x18, 0x18, 0x18, 0x18, 0x18); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_SETGIP1, 0x19, 0x19, + 0x18, 0x18, 0x1b, 0x1b, 0x1a, 0x1a, 0x00, + 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, + 0x20, 0x21, 0x18, 0x18, 0x18, 0x18, 0x18, + 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, + 0x24, 0x25, 0x18, 0x18, 0x18, 0x18, 0x18, + 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18); /* 5.19.21 Set GIP Option2 (D6h) */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETGIP2, - 0x18, 0x18, 0x19, 0x19, 0x1b, 0x1b, 0x1a, 0x1a, 0x07, 0x06, - 0x05, 0x04, 0x03, 0x02, 0x01, 0x00, 0x25, 0x24, 0x18, 0x18, - 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, - 0x21, 0x20, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, - 0x18, 0x18, 0x18, 0x18, 0x18, 0x18); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_SETGIP2, 0x18, 0x18, + 0x19, 0x19, 0x1b, 0x1b, 0x1a, 0x1a, 0x07, + 0x06, 0x05, 0x04, 0x03, 0x02, 0x01, 0x00, + 0x25, 0x24, 0x18, 0x18, 0x18, 0x18, 0x18, + 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, + 0x21, 0x20, 0x18, 0x18, 0x18, 0x18, 0x18, + 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18); /* 5.19.25 SETGAMMA: Set gamma curve related setting (E0h) */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETGAMMA, - 0x00, 0x04, 0x0c, 0x12, 0x14, 0x18, 0x1a, 0x18, 0x31, 0x3f, - 0x4d, 0x4c, 0x54, 0x65, 0x6b, 0x70, 0x7f, 0x82, 0x7e, 0x8a, - 0x99, 0x4a, 0x48, 0x49, 0x4b, 0x4a, 0x4c, 0x4b, 0x7f, 0x00, - 0x04, 0x0c, 0x11, 0x13, 0x17, 0x1a, 0x18, 0x31, - 0x3f, 0x4d, 0x4c, 0x54, 0x65, 0x6b, 0x70, 0x7f, - 0x82, 0x7e, 0x8a, 0x99, 0x4a, 0x48, 0x49, 0x4b, - 0x4a, 0x4c, 0x4b, 0x7f); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_SETGAMMA, 0x00, + 0x04, 0x0c, 0x12, 0x14, 0x18, 0x1a, 0x18, + 0x31, 0x3f, 0x4d, 0x4c, 0x54, 0x65, 0x6b, + 0x70, 0x7f, 0x82, 0x7e, 0x8a, 0x99, 0x4a, + 0x48, 0x49, 0x4b, 0x4a, 0x4c, 0x4b, 0x7f, + 0x00, 0x04, 0x0c, 0x11, 0x13, 0x17, 0x1a, + 0x18, 0x31, 0x3f, 0x4d, 0x4c, 0x54, 0x65, + 0x6b, 0x70, 0x7f, 0x82, 0x7e, 0x8a, 0x99, + 0x4a, 0x48, 0x49, 0x4b, 0x4a, 0x4c, 0x4b, + 0x7f); /* 5.19.17 SETPANEL (CCh) */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETPANEL, - 0x0b); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_SETPANEL, 0x0b); /* Unknown command, not listed in the HX8394-F datasheet */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_UNKNOWN1, - 0x1f, 0x31); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_UNKNOWN1, 0x1f, + 0x31); /* 5.19.5 SETVCOM: Set VCOM voltage (B6h) */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETVCOM, - 0x7d, 0x7d); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_SETVCOM, 0x7d, 0x7d); /* Unknown command, not listed in the HX8394-F datasheet */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_UNKNOWN3, - 0x02); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_UNKNOWN3, 0x02); /* 5.19.11 Set register bank (BDh) */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETREGBANK, - 0x01); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_SETREGBANK, 0x01); /* 5.19.2 SETPOWER: Set power (B1h) */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETPOWER, - 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_SETPOWER, 0x00); /* 5.19.11 Set register bank (BDh) */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETREGBANK, - 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_SETREGBANK, 0x00); /* Unknown command, not listed in the HX8394-F datasheet */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_UNKNOWN3, - 0xed); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_UNKNOWN3, 0xed); return 0; } @@ -208,109 +208,108 @@ static const struct hx8394_panel_desc hsd060bhw4_desc = { static int powkiddy_x55_init_sequence(struct hx8394 *ctx) { struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); + struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi }; /* 5.19.8 SETEXTC: Set extension command (B9h) */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETEXTC, - 0xff, 0x83, 0x94); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_SETEXTC, 0xff, 0x83, + 0x94); /* 5.19.9 SETMIPI: Set MIPI control (BAh) */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETMIPI, - 0x63, 0x03, 0x68, 0x6b, 0xb2, 0xc0); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_SETMIPI, 0x63, 0x03, + 0x68, 0x6b, 0xb2, 0xc0); /* 5.19.2 SETPOWER: Set power (B1h) */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETPOWER, - 0x48, 0x12, 0x72, 0x09, 0x32, 0x54, 0x71, 0x71, 0x57, 0x47); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_SETPOWER, 0x48, + 0x12, 0x72, 0x09, 0x32, 0x54, 0x71, 0x71, + 0x57, 0x47); /* 5.19.3 SETDISP: Set display related register (B2h) */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETDISP, - 0x00, 0x80, 0x64, 0x2c, 0x16, 0x2f); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_SETDISP, 0x00, 0x80, + 0x64, 0x2c, 0x16, 0x2f); /* 5.19.4 SETCYC: Set display waveform cycles (B4h) */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETCYC, - 0x73, 0x74, 0x73, 0x74, 0x73, 0x74, 0x01, 0x0c, 0x86, 0x75, - 0x00, 0x3f, 0x73, 0x74, 0x73, 0x74, 0x73, 0x74, 0x01, 0x0c, - 0x86); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_SETCYC, 0x73, 0x74, + 0x73, 0x74, 0x73, 0x74, 0x01, 0x0c, 0x86, + 0x75, 0x00, 0x3f, 0x73, 0x74, 0x73, 0x74, + 0x73, 0x74, 0x01, 0x0c, 0x86); /* 5.19.5 SETVCOM: Set VCOM voltage (B6h) */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETVCOM, - 0x6e, 0x6e); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_SETVCOM, 0x6e, 0x6e); /* 5.19.19 SETGIP0: Set GIP Option0 (D3h) */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETGIP0, - 0x00, 0x00, 0x07, 0x07, 0x40, 0x07, 0x0c, 0x00, 0x08, 0x10, - 0x08, 0x00, 0x08, 0x54, 0x15, 0x0a, 0x05, 0x0a, 0x02, 0x15, - 0x06, 0x05, 0x06, 0x47, 0x44, 0x0a, 0x0a, 0x4b, 0x10, 0x07, - 0x07, 0x0c, 0x40); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_SETGIP0, 0x00, 0x00, + 0x07, 0x07, 0x40, 0x07, 0x0c, 0x00, 0x08, + 0x10, 0x08, 0x00, 0x08, 0x54, 0x15, 0x0a, + 0x05, 0x0a, 0x02, 0x15, 0x06, 0x05, 0x06, + 0x47, 0x44, 0x0a, 0x0a, 0x4b, 0x10, 0x07, + 0x07, 0x0c, 0x40); /* 5.19.20 Set GIP Option1 (D5h) */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETGIP1, - 0x1c, 0x1c, 0x1d, 0x1d, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, - 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, 0x24, 0x25, 0x18, 0x18, - 0x26, 0x27, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, - 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x20, 0x21, - 0x18, 0x18, 0x18, 0x18); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_SETGIP1, 0x1c, 0x1c, + 0x1d, 0x1d, 0x00, 0x01, 0x02, 0x03, 0x04, + 0x05, 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, + 0x24, 0x25, 0x18, 0x18, 0x26, 0x27, 0x18, + 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, + 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, + 0x18, 0x20, 0x21, 0x18, 0x18, 0x18, 0x18); /* 5.19.21 Set GIP Option2 (D6h) */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETGIP2, - 0x1c, 0x1c, 0x1d, 0x1d, 0x07, 0x06, 0x05, 0x04, 0x03, 0x02, - 0x01, 0x00, 0x0b, 0x0a, 0x09, 0x08, 0x21, 0x20, 0x18, 0x18, - 0x27, 0x26, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, - 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x25, 0x24, - 0x18, 0x18, 0x18, 0x18); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_SETGIP2, 0x1c, 0x1c, + 0x1d, 0x1d, 0x07, 0x06, 0x05, 0x04, 0x03, + 0x02, 0x01, 0x00, 0x0b, 0x0a, 0x09, 0x08, + 0x21, 0x20, 0x18, 0x18, 0x27, 0x26, 0x18, + 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, + 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, + 0x18, 0x25, 0x24, 0x18, 0x18, 0x18, 0x18); /* 5.19.25 SETGAMMA: Set gamma curve related setting (E0h) */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETGAMMA, - 0x00, 0x0a, 0x15, 0x1b, 0x1e, 0x21, 0x24, 0x22, 0x47, 0x56, - 0x65, 0x66, 0x6e, 0x82, 0x88, 0x8b, 0x9a, 0x9d, 0x98, 0xa8, - 0xb9, 0x5d, 0x5c, 0x61, 0x66, 0x6a, 0x6f, 0x7f, 0x7f, 0x00, - 0x0a, 0x15, 0x1b, 0x1e, 0x21, 0x24, 0x22, 0x47, 0x56, 0x65, - 0x65, 0x6e, 0x81, 0x87, 0x8b, 0x98, 0x9d, 0x99, 0xa8, 0xba, - 0x5d, 0x5d, 0x62, 0x67, 0x6b, 0x72, 0x7f, 0x7f); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_SETGAMMA, 0x00, + 0x0a, 0x15, 0x1b, 0x1e, 0x21, 0x24, 0x22, + 0x47, 0x56, 0x65, 0x66, 0x6e, 0x82, 0x88, + 0x8b, 0x9a, 0x9d, 0x98, 0xa8, 0xb9, 0x5d, + 0x5c, 0x61, 0x66, 0x6a, 0x6f, 0x7f, 0x7f, + 0x00, 0x0a, 0x15, 0x1b, 0x1e, 0x21, 0x24, + 0x22, 0x47, 0x56, 0x65, 0x65, 0x6e, 0x81, + 0x87, 0x8b, 0x98, 0x9d, 0x99, 0xa8, 0xba, + 0x5d, 0x5d, 0x62, 0x67, 0x6b, 0x72, 0x7f, + 0x7f); /* Unknown command, not listed in the HX8394-F datasheet */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_UNKNOWN1, - 0x1f, 0x31); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_UNKNOWN1, 0x1f, + 0x31); /* 5.19.17 SETPANEL (CCh) */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETPANEL, - 0x0b); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_SETPANEL, 0x0b); /* Unknown command, not listed in the HX8394-F datasheet */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_UNKNOWN3, - 0x02); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_UNKNOWN3, 0x02); /* 5.19.11 Set register bank (BDh) */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETREGBANK, - 0x02); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_SETREGBANK, 0x02); /* Unknown command, not listed in the HX8394-F datasheet */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_UNKNOWN4, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_UNKNOWN4, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff); /* 5.19.11 Set register bank (BDh) */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETREGBANK, - 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_SETREGBANK, 0x00); /* 5.19.11 Set register bank (BDh) */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETREGBANK, - 0x01); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_SETREGBANK, 0x01); /* 5.19.2 SETPOWER: Set power (B1h) */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETPOWER, - 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_SETPOWER, 0x00); /* 5.19.11 Set register bank (BDh) */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETREGBANK, - 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_SETREGBANK, 0x00); /* Unknown command, not listed in the HX8394-F datasheet */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_UNKNOWN5, - 0x40, 0x81, 0x50, 0x00, 0x1a, 0xfc, 0x01); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_UNKNOWN5, 0x40, + 0x81, 0x50, 0x00, 0x1a, 0xfc, 0x01); /* Unknown command, not listed in the HX8394-F datasheet */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_UNKNOWN2, - 0xed); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_UNKNOWN2, 0xed); return 0; } @@ -342,126 +341,113 @@ static const struct hx8394_panel_desc powkiddy_x55_desc = { static int mchp_ac40t08a_init_sequence(struct hx8394 *ctx) { struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); + struct mipi_dsi_multi_context dsi_ctx = { + .dsi = dsi + }; /* DCS commands do not seem to be sent correclty without this delay */ msleep(20); /* 5.19.8 SETEXTC: Set extension command (B9h) */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETEXTC, - 0xff, 0x83, 0x94); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_SETEXTC, 0xff, 0x83, + 0x94); /* 5.19.9 SETMIPI: Set MIPI control (BAh) */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETMIPI, - 0x63, 0x03, 0x68, 0x6b, 0xb2, 0xc0); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_SETMIPI, 0x63, 0x03, + 0x68, 0x6b, 0xb2, 0xc0); /* 5.19.2 SETPOWER: Set power (B1h) */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETPOWER, - 0x48, 0x12, 0x72, 0x09, 0x32, 0x54, - 0x71, 0x71, 0x57, 0x47); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_SETPOWER, 0x48, + 0x12, 0x72, 0x09, 0x32, 0x54, 0x71, 0x71, + 0x57, 0x47); /* 5.19.3 SETDISP: Set display related register (B2h) */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETDISP, - 0x00, 0x80, 0x64, 0x0c, 0x0d, 0x2f); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_SETDISP, 0x00, 0x80, + 0x64, 0x0c, 0x0d, 0x2f); /* 5.19.4 SETCYC: Set display waveform cycles (B4h) */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETCYC, - 0x73, 0x74, 0x73, 0x74, 0x73, 0x74, - 0x01, 0x0c, 0x86, 0x75, 0x00, 0x3f, - 0x73, 0x74, 0x73, 0x74, 0x73, 0x74, - 0x01, 0x0c, 0x86); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_SETCYC, 0x73, 0x74, + 0x73, 0x74, 0x73, 0x74, 0x01, 0x0c, 0x86, + 0x75, 0x00, 0x3f, 0x73, 0x74, 0x73, 0x74, + 0x73, 0x74, 0x01, 0x0c, 0x86); /* 5.19.5 SETVCOM: Set VCOM voltage (B6h) */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETVCOM, - 0x6e, 0x6e); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_SETVCOM, 0x6e, 0x6e); /* 5.19.19 SETGIP0: Set GIP Option0 (D3h) */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETGIP0, - 0x00, 0x00, 0x07, 0x07, 0x40, 0x07, - 0x0c, 0x00, 0x08, 0x10, 0x08, 0x00, - 0x08, 0x54, 0x15, 0x0a, 0x05, 0x0a, - 0x02, 0x15, 0x06, 0x05, 0x06, 0x47, - 0x44, 0x0a, 0x0a, 0x4b, 0x10, 0x07, - 0x07, 0x0c, 0x40); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_SETGIP0, 0x00, 0x00, + 0x07, 0x07, 0x40, 0x07, 0x0c, 0x00, 0x08, + 0x10, 0x08, 0x00, 0x08, 0x54, 0x15, 0x0a, + 0x05, 0x0a, 0x02, 0x15, 0x06, 0x05, 0x06, + 0x47, 0x44, 0x0a, 0x0a, 0x4b, 0x10, 0x07, + 0x07, 0x0c, 0x40); /* 5.19.20 Set GIP Option1 (D5h) */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETGIP1, - 0x1c, 0x1c, 0x1d, 0x1d, 0x00, 0x01, - 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, - 0x08, 0x09, 0x0a, 0x0b, 0x24, 0x25, - 0x18, 0x18, 0x26, 0x27, 0x18, 0x18, - 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, - 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, - 0x18, 0x18, 0x20, 0x21, 0x18, 0x18, - 0x18, 0x18); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_SETGIP1, 0x1c, 0x1c, + 0x1d, 0x1d, 0x00, 0x01, 0x02, 0x03, 0x04, + 0x05, 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, + 0x24, 0x25, 0x18, 0x18, 0x26, 0x27, 0x18, + 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, + 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, + 0x18, 0x20, 0x21, 0x18, 0x18, 0x18, 0x18); /* 5.19.21 Set GIP Option2 (D6h) */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETGIP2, - 0x1c, 0x1c, 0x1d, 0x1d, 0x07, 0x06, - 0x05, 0x04, 0x03, 0x02, 0x01, 0x00, - 0x0b, 0x0a, 0x09, 0x08, 0x21, 0x20, - 0x18, 0x18, 0x27, 0x26, 0x18, 0x18, - 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, - 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, - 0x18, 0x18, 0x25, 0x24, 0x18, 0x18, - 0x18, 0x18); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_SETGIP2, 0x1c, 0x1c, + 0x1d, 0x1d, 0x07, 0x06, 0x05, 0x04, 0x03, + 0x02, 0x01, 0x00, 0x0b, 0x0a, 0x09, 0x08, + 0x21, 0x20, 0x18, 0x18, 0x27, 0x26, 0x18, + 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, + 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, + 0x18, 0x25, 0x24, 0x18, 0x18, 0x18, 0x18); /* 5.19.25 SETGAMMA: Set gamma curve related setting (E0h) */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETGAMMA, - 0x00, 0x0a, 0x15, 0x1b, 0x1e, 0x21, - 0x24, 0x22, 0x47, 0x56, 0x65, 0x66, - 0x6e, 0x82, 0x88, 0x8b, 0x9a, 0x9d, - 0x98, 0xa8, 0xb9, 0x5d, 0x5c, 0x61, - 0x66, 0x6a, 0x6f, 0x7f, 0x7f, 0x00, - 0x0a, 0x15, 0x1b, 0x1e, 0x21, 0x24, - 0x22, 0x47, 0x56, 0x65, 0x65, 0x6e, - 0x81, 0x87, 0x8b, 0x98, 0x9d, 0x99, - 0xa8, 0xba, 0x5d, 0x5d, 0x62, 0x67, - 0x6b, 0x72, 0x7f, 0x7f); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_SETGAMMA, 0x00, + 0x0a, 0x15, 0x1b, 0x1e, 0x21, 0x24, 0x22, + 0x47, 0x56, 0x65, 0x66, 0x6e, 0x82, 0x88, + 0x8b, 0x9a, 0x9d, 0x98, 0xa8, 0xb9, 0x5d, + 0x5c, 0x61, 0x66, 0x6a, 0x6f, 0x7f, 0x7f, + 0x00, 0x0a, 0x15, 0x1b, 0x1e, 0x21, 0x24, + 0x22, 0x47, 0x56, 0x65, 0x65, 0x6e, 0x81, + 0x87, 0x8b, 0x98, 0x9d, 0x99, 0xa8, 0xba, + 0x5d, 0x5d, 0x62, 0x67, 0x6b, 0x72, 0x7f, + 0x7f); /* Unknown command, not listed in the HX8394-F datasheet (C0H) */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_UNKNOWN1, - 0x1f, 0x73); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_UNKNOWN1, 0x1f, + 0x73); /* Set CABC control (C9h)*/ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETCABC, - 0x76, 0x00, 0x30); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_SETCABC, 0x76, 0x00, + 0x30); /* 5.19.17 SETPANEL (CCh) */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETPANEL, - 0x0b); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_SETPANEL, 0x0b); /* Unknown command, not listed in the HX8394-F datasheet (D4h) */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_UNKNOWN3, - 0x02); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_UNKNOWN3, 0x02); /* 5.19.11 Set register bank (BDh) */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETREGBANK, - 0x02); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_SETREGBANK, 0x02); /* 5.19.11 Set register bank (D8h) */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_UNKNOWN4, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_UNKNOWN4, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff); /* 5.19.11 Set register bank (BDh) */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETREGBANK, - 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_SETREGBANK, 0x00); /* 5.19.11 Set register bank (BDh) */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETREGBANK, - 0x01); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_SETREGBANK, 0x01); /* 5.19.2 SETPOWER: Set power (B1h) */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETPOWER, - 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_SETPOWER, 0x00); /* 5.19.11 Set register bank (BDh) */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_SETREGBANK, - 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_SETREGBANK, 0x00); /* Unknown command, not listed in the HX8394-F datasheet (C6h) */ - mipi_dsi_dcs_write_seq(dsi, HX8394_CMD_UNKNOWN2, - 0xed); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX8394_CMD_UNKNOWN2, 0xed); return 0; } From patchwork Thu Feb 6 21:05:59 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anusha Srivatsa X-Patchwork-Id: 13963778 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7D1F4C0219B for ; Thu, 6 Feb 2025 21:06:38 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id F29FE10E955; Thu, 6 Feb 2025 21:06:37 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (1024-bit key; unprotected) header.d=redhat.com header.i=@redhat.com header.b="fQuTcJMg"; dkim-atps=neutral Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6890E10E955 for ; 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Thu, 6 Feb 2025 21:06:30 +0000 (UTC) Received: from asrivats-na.rmtustx.csb (unknown [10.2.17.21]) by mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 9C09A1800570; Thu, 6 Feb 2025 21:06:26 +0000 (UTC) From: Anusha Srivatsa Date: Thu, 06 Feb 2025 16:05:59 -0500 Subject: [PATCH 04/14] drm/panel/jdi-lpm102a188a: Move to using mipi_dsi_generic_write_seq_multi() MIME-Version: 1.0 Message-Id: <20250206-mipi-cocci-v1-4-4ff0c69e8897@redhat.com> References: <20250206-mipi-cocci-v1-0-4ff0c69e8897@redhat.com> In-Reply-To: <20250206-mipi-cocci-v1-0-4ff0c69e8897@redhat.com> To: Neil Armstrong , Jessica Zhang , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Joel Selvaraj , Ondrej Jirman , Javier Martinez Canillas , Artur Weber , Jianhua Lu , Jonathan Corbet Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anusha Srivatsa X-Developer-Signature: v=1; a=ed25519-sha256; t=1738875969; l=2957; i=asrivats@redhat.com; s=20250122; h=from:subject:message-id; bh=YY9bE9k54mPVjMb14lVjLXVWPpAYIrmSESM5ZlgANEU=; b=MuWUzWk138+PYDgGPkyO9/t5bPV/hiDsEXzstTvTHxe+a/j5VsjlRaRwXztm3CZKoqET3LqQx 5oVKJEmN5bQBlrRjtAcTARKab+1+ox+ldm1Fkbvok1654/jw/KL5g2q X-Developer-Key: i=asrivats@redhat.com; a=ed25519; pk=brnIHkBsUZEhyW6Zyn0U92AeIZ1psws/q8VFbIkf1AU= X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Use mipi_dsi_generic_write_seq_multi() instead of mipi_dsi_generic_write_seq() Used Coccinelle to do this change. SmPl patch: @rule_2@ expression dsi_var; expression list es; identifier jdi; @@ static int jdi_write_dcdc_registers(struct jdi_panel *jdi) { +struct mipi_dsi_multi_context dsi_ctx1 = { .dsi = jdi->link1 }; +struct mipi_dsi_multi_context dsi_ctx2 = { .dsi = jdi->link2 }; <+... -mipi_dsi_generic_write_seq(jdi->link1,es); +mipi_dsi_generic_write_seq_multi(&dsi_ctx1,es); -mipi_dsi_generic_write_seq(jdi->link2,es); +mipi_dsi_generic_write_seq_multi(&dsi_ctx2,es); ...+> } Signed-off-by: Anusha Srivatsa --- drivers/gpu/drm/panel/panel-jdi-lpm102a188a.c | 31 ++++++++++++++------------- 1 file changed, 16 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-jdi-lpm102a188a.c b/drivers/gpu/drm/panel/panel-jdi-lpm102a188a.c index 5b5082efb282bcf705cf2d38dea24901e9803648..30ed3acd4790d049cc2042a64dc10b77dde56034 100644 --- a/drivers/gpu/drm/panel/panel-jdi-lpm102a188a.c +++ b/drivers/gpu/drm/panel/panel-jdi-lpm102a188a.c @@ -161,27 +161,28 @@ static int jdi_setup_symmetrical_split(struct mipi_dsi_device *left, static int jdi_write_dcdc_registers(struct jdi_panel *jdi) { + struct mipi_dsi_multi_context dsi_ctx1 = { .dsi = jdi->link1 }; + struct mipi_dsi_multi_context dsi_ctx2 = { .dsi = jdi->link2 }; /* Clear the manufacturer command access protection */ - mipi_dsi_generic_write_seq(jdi->link1, MCS_CMD_ACS_PROT, - MCS_CMD_ACS_PROT_OFF); - mipi_dsi_generic_write_seq(jdi->link2, MCS_CMD_ACS_PROT, - MCS_CMD_ACS_PROT_OFF); + mipi_dsi_generic_write_seq_multi(&dsi_ctx1, MCS_CMD_ACS_PROT, + MCS_CMD_ACS_PROT_OFF); + mipi_dsi_generic_write_seq_multi(&dsi_ctx2, MCS_CMD_ACS_PROT, + MCS_CMD_ACS_PROT_OFF); /* * Change the VGH/VGL divide rations to move the noise generated by the * TCONN. This should hopefully avoid interaction with the backlight * controller. */ - mipi_dsi_generic_write_seq(jdi->link1, MCS_PWR_CTRL_FUNC, - MCS_PWR_CTRL_PARAM1_VGH_330_DIV | - MCS_PWR_CTRL_PARAM1_DEFAULT, - MCS_PWR_CTRL_PARAM2_VGL_410_DIV | - MCS_PWR_CTRL_PARAM2_DEFAULT); - - mipi_dsi_generic_write_seq(jdi->link2, MCS_PWR_CTRL_FUNC, - MCS_PWR_CTRL_PARAM1_VGH_330_DIV | - MCS_PWR_CTRL_PARAM1_DEFAULT, - MCS_PWR_CTRL_PARAM2_VGL_410_DIV | - MCS_PWR_CTRL_PARAM2_DEFAULT); + mipi_dsi_generic_write_seq_multi(&dsi_ctx1, MCS_PWR_CTRL_FUNC, + MCS_PWR_CTRL_PARAM1_VGH_330_DIV | + MCS_PWR_CTRL_PARAM1_DEFAULT, + MCS_PWR_CTRL_PARAM2_VGL_410_DIV | + MCS_PWR_CTRL_PARAM2_DEFAULT); + mipi_dsi_generic_write_seq_multi(&dsi_ctx2, MCS_PWR_CTRL_FUNC, + MCS_PWR_CTRL_PARAM1_VGH_330_DIV | + MCS_PWR_CTRL_PARAM1_DEFAULT, + MCS_PWR_CTRL_PARAM2_VGL_410_DIV | + MCS_PWR_CTRL_PARAM2_DEFAULT); return 0; } From patchwork Thu Feb 6 21:06:00 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anusha Srivatsa X-Patchwork-Id: 13963787 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E2810C0219C for ; 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Thu, 06 Feb 2025 16:06:35 -0500 X-MC-Unique: F_XVZp4ENem0mdFPQHBsJw-1 X-Mimecast-MFC-AGG-ID: F_XVZp4ENem0mdFPQHBsJw Received: from mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.93]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-05.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id BC04A19560B5; Thu, 6 Feb 2025 21:06:33 +0000 (UTC) Received: from asrivats-na.rmtustx.csb (unknown [10.2.17.21]) by mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id A0CBE1800115; Thu, 6 Feb 2025 21:06:30 +0000 (UTC) From: Anusha Srivatsa Date: Thu, 06 Feb 2025 16:06:00 -0500 Subject: [PATCH 05/14] drm/panel/samsung-s6d7aa0: Move to using mipi_dsi_dcs_write_seq_multi() MIME-Version: 1.0 Message-Id: <20250206-mipi-cocci-v1-5-4ff0c69e8897@redhat.com> References: <20250206-mipi-cocci-v1-0-4ff0c69e8897@redhat.com> In-Reply-To: <20250206-mipi-cocci-v1-0-4ff0c69e8897@redhat.com> To: Neil Armstrong , Jessica Zhang , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Joel Selvaraj , Ondrej Jirman , Javier Martinez Canillas , Artur Weber , Jianhua Lu , Jonathan Corbet Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anusha Srivatsa X-Developer-Signature: v=1; a=ed25519-sha256; t=1738875969; l=7376; i=asrivats@redhat.com; s=20250122; h=from:subject:message-id; bh=U89i+DA88VcxSD1PykNrx22CaQnRllVlhhQni/zEhYk=; b=hs1fFQ2uWtD5bsImBN+zNhuVQxO27AqFGXhfh012E9QcnTd+2P8fA9/HN3y5imgmqSMqx7hyK mi99ZVavQEkAC0E43wpQ9w+lN3+d+3RcEKjH7l4KPPXQa11/wKW67LA X-Developer-Key: i=asrivats@redhat.com; a=ed25519; pk=brnIHkBsUZEhyW6Zyn0U92AeIZ1psws/q8VFbIkf1AU= X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Use mipi_dsi_dcs_write_seq_multi() instead of mipi_dsi_dcs_write_seq() Used Coccinelle to do this change. SmPl patch: @rule_1@ identifier dsi_var; expression dsi_device; expression list es; @@ struct mipi_dsi_device *dsi_var = dsi_device; +struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi_var }; <+... -mipi_dsi_dcs_write_seq(dsi_var,es); +mipi_dsi_dcs_write_seq_multi(&dsi_ctx,es); ...+> Signed-off-by: Anusha Srivatsa --- drivers/gpu/drm/panel/panel-samsung-s6d7aa0.c | 88 ++++++++++++++++----------- 1 file changed, 52 insertions(+), 36 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-samsung-s6d7aa0.c b/drivers/gpu/drm/panel/panel-samsung-s6d7aa0.c index f23d8832a1ad055483b1f513557cb3d2807e3692..b7cc98163db601a3c4c30c39818eb036f825001c 100644 --- a/drivers/gpu/drm/panel/panel-samsung-s6d7aa0.c +++ b/drivers/gpu/drm/panel/panel-samsung-s6d7aa0.c @@ -65,17 +65,24 @@ static void s6d7aa0_reset(struct s6d7aa0 *ctx) static int s6d7aa0_lock(struct s6d7aa0 *ctx, bool lock) { struct mipi_dsi_device *dsi = ctx->dsi; + struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi }; if (lock) { - mipi_dsi_dcs_write_seq(dsi, MCS_PASSWD1, 0xa5, 0xa5); - mipi_dsi_dcs_write_seq(dsi, MCS_PASSWD2, 0xa5, 0xa5); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MCS_PASSWD1, 0xa5, + 0xa5); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MCS_PASSWD2, 0xa5, + 0xa5); if (ctx->desc->use_passwd3) - mipi_dsi_dcs_write_seq(dsi, MCS_PASSWD3, 0x5a, 0x5a); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MCS_PASSWD3, + 0x5a, 0x5a); } else { - mipi_dsi_dcs_write_seq(dsi, MCS_PASSWD1, 0x5a, 0x5a); - mipi_dsi_dcs_write_seq(dsi, MCS_PASSWD2, 0x5a, 0x5a); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MCS_PASSWD1, 0x5a, + 0x5a); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MCS_PASSWD2, 0x5a, + 0x5a); if (ctx->desc->use_passwd3) - mipi_dsi_dcs_write_seq(dsi, MCS_PASSWD3, 0xa5, 0xa5); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MCS_PASSWD3, + 0xa5, 0xa5); } return 0; @@ -231,6 +238,7 @@ s6d7aa0_create_backlight(struct mipi_dsi_device *dsi) static int s6d7aa0_lsl080al02_init(struct s6d7aa0 *ctx) { struct mipi_dsi_device *dsi = ctx->dsi; + struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi }; struct device *dev = &dsi->dev; int ret; @@ -242,18 +250,19 @@ static int s6d7aa0_lsl080al02_init(struct s6d7aa0 *ctx) return ret; } - mipi_dsi_dcs_write_seq(dsi, MCS_OTP_RELOAD, 0x00, 0x10); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MCS_OTP_RELOAD, 0x00, 0x10); usleep_range(1000, 1500); /* SEQ_B6_PARAM_8_R01 */ - mipi_dsi_dcs_write_seq(dsi, 0xb6, 0x10); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb6, 0x10); /* BL_CTL_ON */ - mipi_dsi_dcs_write_seq(dsi, MCS_BL_CTL, 0x40, 0x00, 0x28); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MCS_BL_CTL, 0x40, 0x00, 0x28); usleep_range(5000, 6000); - mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_ADDRESS_MODE, 0x04); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_SET_ADDRESS_MODE, + 0x04); ret = mipi_dsi_dcs_exit_sleep_mode(dsi); if (ret < 0) { @@ -262,7 +271,8 @@ static int s6d7aa0_lsl080al02_init(struct s6d7aa0 *ctx) } msleep(120); - mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_ADDRESS_MODE, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_SET_ADDRESS_MODE, + 0x00); ret = s6d7aa0_lock(ctx, true); if (ret < 0) { @@ -282,9 +292,10 @@ static int s6d7aa0_lsl080al02_init(struct s6d7aa0 *ctx) static int s6d7aa0_lsl080al02_off(struct s6d7aa0 *ctx) { struct mipi_dsi_device *dsi = ctx->dsi; + struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi }; /* BL_CTL_OFF */ - mipi_dsi_dcs_write_seq(dsi, MCS_BL_CTL, 0x40, 0x00, 0x20); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MCS_BL_CTL, 0x40, 0x00, 0x20); return 0; } @@ -320,6 +331,7 @@ static const struct s6d7aa0_panel_desc s6d7aa0_lsl080al02_desc = { static int s6d7aa0_lsl080al03_init(struct s6d7aa0 *ctx) { struct mipi_dsi_device *dsi = ctx->dsi; + struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi }; struct device *dev = &dsi->dev; int ret; @@ -332,35 +344,38 @@ static int s6d7aa0_lsl080al03_init(struct s6d7aa0 *ctx) } if (ctx->desc->panel_type == S6D7AA0_PANEL_LSL080AL03) { - mipi_dsi_dcs_write_seq(dsi, MCS_BL_CTL, 0xc7, 0x00, 0x29); - mipi_dsi_dcs_write_seq(dsi, 0xbc, 0x01, 0x4e, 0xa0); - mipi_dsi_dcs_write_seq(dsi, 0xfd, 0x16, 0x10, 0x11, 0x23, - 0x09); - mipi_dsi_dcs_write_seq(dsi, 0xfe, 0x00, 0x02, 0x03, 0x21, - 0x80, 0x78); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MCS_BL_CTL, 0xc7, 0x00, + 0x29); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xbc, 0x01, 0x4e, 0xa0); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfd, 0x16, 0x10, 0x11, + 0x23, 0x09); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfe, 0x00, 0x02, 0x03, + 0x21, 0x80, 0x78); } else if (ctx->desc->panel_type == S6D7AA0_PANEL_LTL101AT01) { - mipi_dsi_dcs_write_seq(dsi, MCS_BL_CTL, 0x40, 0x00, 0x08); - mipi_dsi_dcs_write_seq(dsi, 0xbc, 0x01, 0x4e, 0x0b); - mipi_dsi_dcs_write_seq(dsi, 0xfd, 0x16, 0x10, 0x11, 0x23, - 0x09); - mipi_dsi_dcs_write_seq(dsi, 0xfe, 0x00, 0x02, 0x03, 0x21, - 0x80, 0x68); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MCS_BL_CTL, 0x40, 0x00, + 0x08); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xbc, 0x01, 0x4e, 0x0b); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfd, 0x16, 0x10, 0x11, + 0x23, 0x09); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfe, 0x00, 0x02, 0x03, + 0x21, 0x80, 0x68); } - mipi_dsi_dcs_write_seq(dsi, 0xb3, 0x51); - mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_CONTROL_DISPLAY, 0x24); - mipi_dsi_dcs_write_seq(dsi, 0xf2, 0x02, 0x08, 0x08); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb3, 0x51); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_WRITE_CONTROL_DISPLAY, + 0x24); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf2, 0x02, 0x08, 0x08); usleep_range(10000, 11000); - mipi_dsi_dcs_write_seq(dsi, 0xc0, 0x80, 0x80, 0x30); - mipi_dsi_dcs_write_seq(dsi, 0xcd, - 0x2e, 0x2e, 0x2e, 0x2e, 0x2e, 0x2e, 0x2e, 0x2e, - 0x2e, 0x2e, 0x2e, 0x2e, 0x2e); - mipi_dsi_dcs_write_seq(dsi, 0xce, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00); - mipi_dsi_dcs_write_seq(dsi, 0xc1, 0x03); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xc0, 0x80, 0x80, 0x30); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xcd, 0x2e, 0x2e, 0x2e, 0x2e, + 0x2e, 0x2e, 0x2e, 0x2e, 0x2e, 0x2e, 0x2e, + 0x2e, 0x2e); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xce, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xc1, 0x03); ret = mipi_dsi_dcs_exit_sleep_mode(dsi); if (ret < 0) { @@ -386,8 +401,9 @@ static int s6d7aa0_lsl080al03_init(struct s6d7aa0 *ctx) static int s6d7aa0_lsl080al03_off(struct s6d7aa0 *ctx) { struct mipi_dsi_device *dsi = ctx->dsi; + struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi }; - mipi_dsi_dcs_write_seq(dsi, 0x22, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x22, 0x00); return 0; } From patchwork Thu Feb 6 21:06:01 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anusha Srivatsa X-Patchwork-Id: 13963786 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 18CEFC0219B for ; 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Thu, 06 Feb 2025 16:06:41 -0500 X-MC-Unique: cvqiUNRmNMuzKYGLCKRmaA-1 X-Mimecast-MFC-AGG-ID: cvqiUNRmNMuzKYGLCKRmaA Received: from mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.93]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-04.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 83A8B1955D53; Thu, 6 Feb 2025 21:06:37 +0000 (UTC) Received: from asrivats-na.rmtustx.csb (unknown [10.2.17.21]) by mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 1314B1800879; Thu, 6 Feb 2025 21:06:33 +0000 (UTC) From: Anusha Srivatsa Date: Thu, 06 Feb 2025 16:06:01 -0500 Subject: [PATCH 06/14] drm/panel/6e88a0-ams452ef01: Move to using mipi_dsi_dcs_write_seq_multi() MIME-Version: 1.0 Message-Id: <20250206-mipi-cocci-v1-6-4ff0c69e8897@redhat.com> References: <20250206-mipi-cocci-v1-0-4ff0c69e8897@redhat.com> In-Reply-To: <20250206-mipi-cocci-v1-0-4ff0c69e8897@redhat.com> To: Neil Armstrong , Jessica Zhang , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Joel Selvaraj , Ondrej Jirman , Javier Martinez Canillas , Artur Weber , Jianhua Lu , Jonathan Corbet Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anusha Srivatsa X-Developer-Signature: v=1; a=ed25519-sha256; t=1738875969; l=3587; i=asrivats@redhat.com; s=20250122; h=from:subject:message-id; bh=9CpnIlV7pjwK3l2a889dTo6xEZQ/5+5YEKIgGkmWaFE=; b=/fYjYzQjzYauYNdCdBVWNcVqUVOarIaNYxi0nI0neBfJX589v94GXX2WgchGfX0cvQx9aAb9P +uvEOZNw6yEBRTom6xMYagr9nd88PdeCEZXhUS8t1x5PoA8YnqX5Qk1 X-Developer-Key: i=asrivats@redhat.com; a=ed25519; pk=brnIHkBsUZEhyW6Zyn0U92AeIZ1psws/q8VFbIkf1AU= X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Use mipi_dsi_dcs_write_seq_multi() instead of mipi_dsi_dcs_write_seq() Used Coccinelle to do this change. SmPl patch: @rule_1@ identifier dsi_var; expression dsi_device; expression list es; @@ struct mipi_dsi_device *dsi_var = dsi_device; +struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi_var }; <+... -mipi_dsi_dcs_write_seq(dsi_var,es); +mipi_dsi_dcs_write_seq_multi(&dsi_ctx,es); ...+> Signed-off-by: Anusha Srivatsa --- .../drm/panel/panel-samsung-s6e88a0-ams452ef01.c | 34 ++++++++++------------ 1 file changed, 16 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-samsung-s6e88a0-ams452ef01.c b/drivers/gpu/drm/panel/panel-samsung-s6e88a0-ams452ef01.c index d2df227abbea557acb849bfc76dd4b561158bf11..fde6852fe911477e4ddc333a779577fcf92bc21f 100644 --- a/drivers/gpu/drm/panel/panel-samsung-s6e88a0-ams452ef01.c +++ b/drivers/gpu/drm/panel/panel-samsung-s6e88a0-ams452ef01.c @@ -39,13 +39,14 @@ static void s6e88a0_ams452ef01_reset(struct s6e88a0_ams452ef01 *ctx) static int s6e88a0_ams452ef01_on(struct s6e88a0_ams452ef01 *ctx) { struct mipi_dsi_device *dsi = ctx->dsi; + struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi }; struct device *dev = &dsi->dev; int ret; dsi->mode_flags |= MIPI_DSI_MODE_LPM; - mipi_dsi_dcs_write_seq(dsi, 0xf0, 0x5a, 0x5a); // enable LEVEL2 commands - mipi_dsi_dcs_write_seq(dsi, 0xcc, 0x4c); // set Pixel Clock Divider polarity + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0x5a, 0x5a); // enable LEVEL2 commands + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xcc, 0x4c); // set Pixel Clock Divider polarity ret = mipi_dsi_dcs_exit_sleep_mode(dsi); if (ret < 0) { @@ -55,23 +56,20 @@ static int s6e88a0_ams452ef01_on(struct s6e88a0_ams452ef01 *ctx) msleep(120); // set default brightness/gama - mipi_dsi_dcs_write_seq(dsi, 0xca, - 0x01, 0x00, 0x01, 0x00, 0x01, 0x00, // V255 RR,GG,BB - 0x80, 0x80, 0x80, // V203 R,G,B - 0x80, 0x80, 0x80, // V151 R,G,B - 0x80, 0x80, 0x80, // V87 R,G,B - 0x80, 0x80, 0x80, // V51 R,G,B - 0x80, 0x80, 0x80, // V35 R,G,B - 0x80, 0x80, 0x80, // V23 R,G,B - 0x80, 0x80, 0x80, // V11 R,G,B - 0x6b, 0x68, 0x71, // V3 R,G,B - 0x00, 0x00, 0x00); // V1 R,G,B + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xca, 0x01, 0x00, 0x01, 0x00, + 0x01, 0x00, 0x80, 0x80, 0x80, 0x80, 0x80, + 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, + 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, + 0x80, 0x80, 0x6b, 0x68, 0x71, 0x00, 0x00, + 0x00); // V1 R,G,B // set default Amoled Off Ratio - mipi_dsi_dcs_write_seq(dsi, 0xb2, 0x40, 0x0a, 0x17, 0x00, 0x0a); - mipi_dsi_dcs_write_seq(dsi, 0xb6, 0x2c, 0x0b); // set default elvss voltage - mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_POWER_SAVE, 0x00); - mipi_dsi_dcs_write_seq(dsi, 0xf7, 0x03); // gamma/aor update - mipi_dsi_dcs_write_seq(dsi, 0xf0, 0xa5, 0xa5); // disable LEVEL2 commands + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb2, 0x40, 0x0a, 0x17, 0x00, + 0x0a); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb6, 0x2c, 0x0b); // set default elvss voltage + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_WRITE_POWER_SAVE, + 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf7, 0x03); // gamma/aor update + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xa5, 0xa5); // disable LEVEL2 commands ret = mipi_dsi_dcs_set_display_on(dsi); if (ret < 0) { From patchwork Thu Feb 6 21:06:02 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anusha Srivatsa X-Patchwork-Id: 13963788 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9AE72C02194 for ; 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Thu, 06 Feb 2025 16:06:43 -0500 X-MC-Unique: zX-neWLwOHqEWkTWGWrn7w-1 X-Mimecast-MFC-AGG-ID: zX-neWLwOHqEWkTWGWrn7w Received: from mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.93]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-03.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 3672C195604F; Thu, 6 Feb 2025 21:06:41 +0000 (UTC) Received: from asrivats-na.rmtustx.csb (unknown [10.2.17.21]) by mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id D434A1800570; Thu, 6 Feb 2025 21:06:37 +0000 (UTC) From: Anusha Srivatsa Date: Thu, 06 Feb 2025 16:06:02 -0500 Subject: [PATCH 07/14] drm/panel/samsung-sofef00: Move to using mipi_dsi_dcs_write_seq_multi() MIME-Version: 1.0 Message-Id: <20250206-mipi-cocci-v1-7-4ff0c69e8897@redhat.com> References: <20250206-mipi-cocci-v1-0-4ff0c69e8897@redhat.com> In-Reply-To: <20250206-mipi-cocci-v1-0-4ff0c69e8897@redhat.com> To: Neil Armstrong , Jessica Zhang , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Joel Selvaraj , Ondrej Jirman , Javier Martinez Canillas , Artur Weber , Jianhua Lu , Jonathan Corbet Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anusha Srivatsa X-Developer-Signature: v=1; a=ed25519-sha256; t=1738875969; l=2532; i=asrivats@redhat.com; s=20250122; h=from:subject:message-id; bh=zZTz4cnnKL1DVqdQgZMn6E9y9/MOglAh/pKGJ6UQ8ig=; b=cFkHX7WtRST0CYgQ+gRuVPoe+3Yw+Km8yIpfIlAG4EyOkBK9NmD6/YM/Sk36Egn/a27Y/K9sK Q2h+vIkfxCjCy07rtx+e1bpZuIMHnKH7rIdM4jHVfvuP+tXk5llBIZU X-Developer-Key: i=asrivats@redhat.com; a=ed25519; pk=brnIHkBsUZEhyW6Zyn0U92AeIZ1psws/q8VFbIkf1AU= X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Use mipi_dsi_dcs_write_seq_multi() instead of mipi_dsi_dcs_write_seq() Used Coccinelle patch to do this change: @rule_1@ identifier dsi_var; expression dsi_device; expression list es; @@ struct mipi_dsi_device *dsi_var = dsi_device; +struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi_var }; <+... -mipi_dsi_dcs_write_seq(dsi_var,es); +mipi_dsi_dcs_write_seq_multi(&dsi_ctx,es); ...+> Signed-off-by: Anusha Srivatsa --- drivers/gpu/drm/panel/panel-samsung-sofef00.c | 19 +++++++++++-------- 1 file changed, 11 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-samsung-sofef00.c b/drivers/gpu/drm/panel/panel-samsung-sofef00.c index 04ce925b3d9dbd91841f4b4e4a12320eac8e03af..09663c53ec500ab66de3eaaea6e6deb09ccc0fe0 100644 --- a/drivers/gpu/drm/panel/panel-samsung-sofef00.c +++ b/drivers/gpu/drm/panel/panel-samsung-sofef00.c @@ -44,6 +44,7 @@ static void sofef00_panel_reset(struct sofef00_panel *ctx) static int sofef00_panel_on(struct sofef00_panel *ctx) { struct mipi_dsi_device *dsi = ctx->dsi; + struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi }; struct device *dev = &dsi->dev; int ret; @@ -56,7 +57,7 @@ static int sofef00_panel_on(struct sofef00_panel *ctx) } usleep_range(10000, 11000); - mipi_dsi_dcs_write_seq(dsi, 0xf0, 0x5a, 0x5a); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0x5a, 0x5a); ret = mipi_dsi_dcs_set_tear_on(dsi, MIPI_DSI_DCS_TEAR_MODE_VBLANK); if (ret < 0) { @@ -64,13 +65,15 @@ static int sofef00_panel_on(struct sofef00_panel *ctx) return ret; } - mipi_dsi_dcs_write_seq(dsi, 0xf0, 0xa5, 0xa5); - mipi_dsi_dcs_write_seq(dsi, 0xf0, 0x5a, 0x5a); - mipi_dsi_dcs_write_seq(dsi, 0xb0, 0x07); - mipi_dsi_dcs_write_seq(dsi, 0xb6, 0x12); - mipi_dsi_dcs_write_seq(dsi, 0xf0, 0xa5, 0xa5); - mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_CONTROL_DISPLAY, 0x20); - mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_POWER_SAVE, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xa5, 0xa5); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0x5a, 0x5a); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0, 0x07); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb6, 0x12); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xa5, 0xa5); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_WRITE_CONTROL_DISPLAY, + 0x20); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_WRITE_POWER_SAVE, + 0x00); ret = mipi_dsi_dcs_set_display_on(dsi); if (ret < 0) { From patchwork Thu Feb 6 21:06:03 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anusha Srivatsa X-Patchwork-Id: 13963781 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0D427C02199 for ; Thu, 6 Feb 2025 21:08:55 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 11BC010E959; Thu, 6 Feb 2025 21:08:52 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (1024-bit key; unprotected) header.d=redhat.com header.i=@redhat.com header.b="Qi0TWDew"; dkim-atps=neutral Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8402210E94F for ; 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Thu, 6 Feb 2025 21:06:44 +0000 (UTC) Received: from asrivats-na.rmtustx.csb (unknown [10.2.17.21]) by mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 819381800265; Thu, 6 Feb 2025 21:06:41 +0000 (UTC) From: Anusha Srivatsa Date: Thu, 06 Feb 2025 16:06:03 -0500 Subject: [PATCH 08/14] drm/panel/ls060t1sx01: Move to using mipi_dsi_dcs_write_seq_multi() MIME-Version: 1.0 Message-Id: <20250206-mipi-cocci-v1-8-4ff0c69e8897@redhat.com> References: <20250206-mipi-cocci-v1-0-4ff0c69e8897@redhat.com> In-Reply-To: <20250206-mipi-cocci-v1-0-4ff0c69e8897@redhat.com> To: Neil Armstrong , Jessica Zhang , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Joel Selvaraj , Ondrej Jirman , Javier Martinez Canillas , Artur Weber , Jianhua Lu , Jonathan Corbet Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anusha Srivatsa X-Developer-Signature: v=1; a=ed25519-sha256; t=1738875969; l=1545; i=asrivats@redhat.com; s=20250122; h=from:subject:message-id; bh=kIF0ex5iL5a87AEuHz+aTTw4ykoICD+wkGV67J4m1mQ=; b=bd5aH9u2q8EGgcL16UItN5xQPxNWubJp7xhcwl6jEwcy0HIM0qSsMz24U1lYMjlj2UNoRfHkU isRfeHjQMsvDjwTrM4yx/9Us1gRMFeQ3aq51WH3NPfM/GMMDOtUY1uV X-Developer-Key: i=asrivats@redhat.com; a=ed25519; pk=brnIHkBsUZEhyW6Zyn0U92AeIZ1psws/q8VFbIkf1AU= X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Use mipi_dsi_dcs_write_seq_multi() instead of mipi_dsi_dcs_write_seq() Used Coccinelle to make the change. SmPl patch: @rule_1@ identifier dsi_var; expression dsi_device; expression list es; @@ struct mipi_dsi_device *dsi_var = dsi_device; +struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi_var }; <+... -mipi_dsi_dcs_write_seq(dsi_var,es); +mipi_dsi_dcs_write_seq_multi(&dsi_ctx,es); ...+> Signed-off-by: Anusha Srivatsa --- drivers/gpu/drm/panel/panel-sharp-ls060t1sx01.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-sharp-ls060t1sx01.c b/drivers/gpu/drm/panel/panel-sharp-ls060t1sx01.c index 74c760ee0c2d1c4f1e857872e6ad38de08ab8b2a..387466460f554a9da80d184fc1f93c3b998f6351 100644 --- a/drivers/gpu/drm/panel/panel-sharp-ls060t1sx01.c +++ b/drivers/gpu/drm/panel/panel-sharp-ls060t1sx01.c @@ -44,13 +44,14 @@ static void sharp_ls060_reset(struct sharp_ls060 *ctx) static int sharp_ls060_on(struct sharp_ls060 *ctx) { struct mipi_dsi_device *dsi = ctx->dsi; + struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi }; struct device *dev = &dsi->dev; int ret; dsi->mode_flags |= MIPI_DSI_MODE_LPM; - mipi_dsi_dcs_write_seq(dsi, 0xbb, 0x13); - mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_MEMORY_START); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xbb, 0x13); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_WRITE_MEMORY_START); ret = mipi_dsi_dcs_exit_sleep_mode(dsi); if (ret < 0) { From patchwork Thu Feb 6 21:06:04 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anusha Srivatsa X-Patchwork-Id: 13963784 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 68DD8C0219D for ; Thu, 6 Feb 2025 21:08:57 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8EFA610E95E; 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Thu, 06 Feb 2025 16:06:50 -0500 X-MC-Unique: d6CpvG5dOO66Bu4FuQy-xw-1 X-Mimecast-MFC-AGG-ID: d6CpvG5dOO66Bu4FuQy-xw Received: from mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.93]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-03.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 2DC0819560B9; Thu, 6 Feb 2025 21:06:48 +0000 (UTC) Received: from asrivats-na.rmtustx.csb (unknown [10.2.17.21]) by mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id CEF1F1800265; Thu, 6 Feb 2025 21:06:44 +0000 (UTC) From: Anusha Srivatsa Date: Thu, 06 Feb 2025 16:06:04 -0500 Subject: [PATCH 09/14] drm/panel/sony-td4353-jdi: Move to using mipi_dsi_dcs_write_seq_multi() MIME-Version: 1.0 Message-Id: <20250206-mipi-cocci-v1-9-4ff0c69e8897@redhat.com> References: <20250206-mipi-cocci-v1-0-4ff0c69e8897@redhat.com> In-Reply-To: <20250206-mipi-cocci-v1-0-4ff0c69e8897@redhat.com> To: Neil Armstrong , Jessica Zhang , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Joel Selvaraj , Ondrej Jirman , Javier Martinez Canillas , Artur Weber , Jianhua Lu , Jonathan Corbet Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anusha Srivatsa X-Developer-Signature: v=1; a=ed25519-sha256; t=1738875969; l=2215; i=asrivats@redhat.com; s=20250122; h=from:subject:message-id; bh=xDrVLhPB3HGQ+SiEQjr6bWhAB9xRdzkzCPHAD4asAP0=; b=eBuTE3zCCExK7yn7ZHTQWB8c6V4y9uGt00QhodkJQEsRe3axE5jH5oYKofjyM+kTxtCBVkMGh EGQonB5Uu85B+Zar0DllBZCQGHYwSbKwajMl8iLB7Mj+FW7mO00ExPw X-Developer-Key: i=asrivats@redhat.com; a=ed25519; pk=brnIHkBsUZEhyW6Zyn0U92AeIZ1psws/q8VFbIkf1AU= X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Use mipi_dsi_dcs_write_seq_multi() instead of mipi_dsi_dcs_write_seq() Used Coccinelle to do this change. SmPl patch: @rule_1@ identifier dsi_var; expression dsi_device; expression list es; @@ struct mipi_dsi_device *dsi_var = dsi_device; +struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi_var }; <+... -mipi_dsi_dcs_write_seq(dsi_var,es); +mipi_dsi_dcs_write_seq_multi(&dsi_ctx,es); ...+> Signed-off-by: Anusha Srivatsa --- drivers/gpu/drm/panel/panel-sony-td4353-jdi.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-sony-td4353-jdi.c b/drivers/gpu/drm/panel/panel-sony-td4353-jdi.c index 472195d4bbbe43fe81037707888f0e87ddb9c615..51c5359f3087b71a74ceda0be243d7e934083038 100644 --- a/drivers/gpu/drm/panel/panel-sony-td4353-jdi.c +++ b/drivers/gpu/drm/panel/panel-sony-td4353-jdi.c @@ -47,6 +47,7 @@ static inline struct sony_td4353_jdi *to_sony_td4353_jdi(struct drm_panel *panel static int sony_td4353_jdi_on(struct sony_td4353_jdi *ctx) { struct mipi_dsi_device *dsi = ctx->dsi; + struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi }; struct device *dev = &dsi->dev; int ret; @@ -76,7 +77,8 @@ static int sony_td4353_jdi_on(struct sony_td4353_jdi *ctx) return ret; } - mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_ADDRESS_MODE, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_SET_ADDRESS_MODE, + 0x00); ret = mipi_dsi_dcs_set_pixel_format(dsi, 0x77); if (ret < 0) { @@ -84,8 +86,8 @@ static int sony_td4353_jdi_on(struct sony_td4353_jdi *ctx) return ret; } - mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_PARTIAL_ROWS, - 0x00, 0x00, 0x08, 0x6f); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_SET_PARTIAL_ROWS, + 0x00, 0x00, 0x08, 0x6f); ret = mipi_dsi_dcs_exit_sleep_mode(dsi); if (ret < 0) { @@ -94,7 +96,7 @@ static int sony_td4353_jdi_on(struct sony_td4353_jdi *ctx) } msleep(70); - mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_MEMORY_START); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_WRITE_MEMORY_START); ret = mipi_dsi_dcs_set_display_on(dsi); if (ret < 0) { From patchwork Thu Feb 6 21:06:05 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anusha Srivatsa X-Patchwork-Id: 13963789 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6555AC0219D for ; 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Thu, 06 Feb 2025 16:06:53 -0500 X-MC-Unique: k167-e6hOXOtfJodOr5g-g-1 X-Mimecast-MFC-AGG-ID: k167-e6hOXOtfJodOr5g-g Received: from mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.93]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-08.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 7DC931800570; Thu, 6 Feb 2025 21:06:51 +0000 (UTC) Received: from asrivats-na.rmtustx.csb (unknown [10.2.17.21]) by mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 780401800115; Thu, 6 Feb 2025 21:06:48 +0000 (UTC) From: Anusha Srivatsa Date: Thu, 06 Feb 2025 16:06:05 -0500 Subject: [PATCH 10/14] drm/panel/visionox-r66451: Move to using mipi_dsi_dcs_write_seq_multi() MIME-Version: 1.0 Message-Id: <20250206-mipi-cocci-v1-10-4ff0c69e8897@redhat.com> References: <20250206-mipi-cocci-v1-0-4ff0c69e8897@redhat.com> In-Reply-To: <20250206-mipi-cocci-v1-0-4ff0c69e8897@redhat.com> To: Neil Armstrong , Jessica Zhang , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Joel Selvaraj , Ondrej Jirman , Javier Martinez Canillas , Artur Weber , Jianhua Lu , Jonathan Corbet Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anusha Srivatsa X-Developer-Signature: v=1; a=ed25519-sha256; t=1738875969; l=7735; i=asrivats@redhat.com; s=20250122; h=from:subject:message-id; bh=rcOYFwPQfRAU3APR4rkecMHa1pO4ou4ZbBf2oyKESIE=; b=MmkBMjrJLfMjU8/wLsKce4/Wu4NTom9lY/7/LH5o4cOdJB715yEiqxROo7IENzbBP9JkRQplk Rtw7VotWtLeA2rEpI0p/Nvv/OZV8JIuexLK9Zb/s34QzfnwlPtpptHo X-Developer-Key: i=asrivats@redhat.com; a=ed25519; pk=brnIHkBsUZEhyW6Zyn0U92AeIZ1psws/q8VFbIkf1AU= X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Use mipi_dsi_dcs_write_seq_multi() instead of mipi_dsi_dcs_write_seq() Used Coccinelle to do this change. SmPl patch: @rule_1@ identifier dsi_var; expression dsi_device; expression list es; @@ struct mipi_dsi_device *dsi_var = dsi_device; +struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi_var }; <+... -mipi_dsi_dcs_write_seq(dsi_var,es); +mipi_dsi_dcs_write_seq_multi(&dsi_ctx,es); ...+> Signed-off-by: Anusha Srivatsa --- drivers/gpu/drm/panel/panel-visionox-r66451.c | 118 ++++++++++++++------------ 1 file changed, 62 insertions(+), 56 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-visionox-r66451.c b/drivers/gpu/drm/panel/panel-visionox-r66451.c index 493f2a6076f8d878606e0644b100bc98f275dc12..0194c63f5482d1a816b0d3b4e0152c328f8e056b 100644 --- a/drivers/gpu/drm/panel/panel-visionox-r66451.c +++ b/drivers/gpu/drm/panel/panel-visionox-r66451.c @@ -42,65 +42,71 @@ static void visionox_r66451_reset(struct visionox_r66451 *ctx) static int visionox_r66451_on(struct visionox_r66451 *ctx) { struct mipi_dsi_device *dsi = ctx->dsi; + struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi }; dsi->mode_flags |= MIPI_DSI_MODE_LPM; - mipi_dsi_dcs_write_seq(dsi, 0xb0, 0x00); - mipi_dsi_dcs_write_seq(dsi, 0xc2, - 0x09, 0x24, 0x0c, 0x00, 0x00, 0x0c, 0x00, 0x00, 0x00, - 0x09, 0x3c); - mipi_dsi_dcs_write_seq(dsi, 0xd7, - 0x00, 0xb9, 0x3c, 0x00, 0x40, 0x04, 0x00, 0xa0, 0x0a, - 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x19, - 0x3c, 0x00, 0x40, 0x04, 0x00, 0xa0, 0x0a); - mipi_dsi_dcs_write_seq(dsi, 0xb0, 0x80); - mipi_dsi_dcs_write_seq(dsi, 0xde, - 0x40, 0x00, 0x18, 0x00, 0x18, 0x00, 0x18, 0x00, 0x18, - 0x10, 0x00, 0x18, 0x00, 0x18, 0x00, 0x18, 0x02, 0x00, 0x00); - mipi_dsi_dcs_write_seq(dsi, 0xb0, 0x04); - mipi_dsi_dcs_write_seq(dsi, 0xe8, 0x00, 0x02); - mipi_dsi_dcs_write_seq(dsi, 0xe4, 0x00, 0x08); - mipi_dsi_dcs_write_seq(dsi, 0xb0, 0x00); - mipi_dsi_dcs_write_seq(dsi, 0xc4, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x32); - mipi_dsi_dcs_write_seq(dsi, 0xcf, - 0x64, 0x0b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, - 0x00, 0x0b, 0x77, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, - 0x02, 0x02, 0x02, 0x02, 0x02, 0x03); - mipi_dsi_dcs_write_seq(dsi, 0xd3, - 0x45, 0x00, 0x00, 0x01, 0x13, 0x15, 0x00, 0x15, 0x07, - 0x0f, 0x77, 0x77, 0x77, 0x37, 0xb2, 0x11, 0x00, 0xa0, - 0x3c, 0x9c); - mipi_dsi_dcs_write_seq(dsi, 0xd7, - 0x00, 0xb9, 0x34, 0x00, 0x40, 0x04, 0x00, 0xa0, 0x0a, - 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x19, - 0x34, 0x00, 0x40, 0x04, 0x00, 0xa0, 0x0a); - mipi_dsi_dcs_write_seq(dsi, 0xd8, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x3a, 0x00, 0x3a, 0x00, 0x3a, 0x00, 0x3a, 0x00, 0x3a, - 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x0a, 0x00, 0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0a, - 0x00, 0x32, 0x00, 0x0a, 0x00, 0x22); - mipi_dsi_dcs_write_seq(dsi, 0xdf, - 0x50, 0x42, 0x58, 0x81, 0x2d, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x6b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x01, 0x0f, 0xff, 0xd4, 0x0e, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x0f, 0x53, 0xf1, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00); - mipi_dsi_dcs_write_seq(dsi, 0xf7, 0x01); - mipi_dsi_dcs_write_seq(dsi, 0xb0, 0x80); - mipi_dsi_dcs_write_seq(dsi, 0xe4, 0x34, 0xb4, 0x00, 0x00, 0x00, 0x39, 0x04, 0x09, 0x34); - mipi_dsi_dcs_write_seq(dsi, 0xe6, 0x00); - mipi_dsi_dcs_write_seq(dsi, 0xb0, 0x04); - mipi_dsi_dcs_write_seq(dsi, 0xdf, 0x50, 0x40); - mipi_dsi_dcs_write_seq(dsi, 0xf3, 0x50, 0x00, 0x00, 0x00, 0x00); - mipi_dsi_dcs_write_seq(dsi, 0xf2, 0x11); - mipi_dsi_dcs_write_seq(dsi, 0xf3, 0x01, 0x00, 0x00, 0x00, 0x01); - mipi_dsi_dcs_write_seq(dsi, 0xf4, 0x00, 0x02); - mipi_dsi_dcs_write_seq(dsi, 0xf2, 0x19); - mipi_dsi_dcs_write_seq(dsi, 0xdf, 0x50, 0x42); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xc2, 0x09, 0x24, 0x0c, 0x00, + 0x00, 0x0c, 0x00, 0x00, 0x00, 0x09, 0x3c); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xd7, 0x00, 0xb9, 0x3c, 0x00, + 0x40, 0x04, 0x00, 0xa0, 0x0a, 0x00, 0x40, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x19, + 0x3c, 0x00, 0x40, 0x04, 0x00, 0xa0, 0x0a); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0, 0x80); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xde, 0x40, 0x00, 0x18, 0x00, + 0x18, 0x00, 0x18, 0x00, 0x18, 0x10, 0x00, + 0x18, 0x00, 0x18, 0x00, 0x18, 0x02, 0x00, + 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0, 0x04); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe8, 0x00, 0x02); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe4, 0x00, 0x08); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xc4, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x02, 0x00, 0x00, 0x00, 0x32); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xcf, 0x64, 0x0b, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x0b, + 0x77, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, + 0x02, 0x02, 0x02, 0x02, 0x02, 0x03); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xd3, 0x45, 0x00, 0x00, 0x01, + 0x13, 0x15, 0x00, 0x15, 0x07, 0x0f, 0x77, + 0x77, 0x77, 0x37, 0xb2, 0x11, 0x00, 0xa0, + 0x3c, 0x9c); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xd7, 0x00, 0xb9, 0x34, 0x00, + 0x40, 0x04, 0x00, 0xa0, 0x0a, 0x00, 0x40, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x19, + 0x34, 0x00, 0x40, 0x04, 0x00, 0xa0, 0x0a); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xd8, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x3a, 0x00, + 0x3a, 0x00, 0x3a, 0x00, 0x3a, 0x00, 0x3a, + 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x0a, 0x00, 0x0a, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x0a, 0x00, + 0x32, 0x00, 0x0a, 0x00, 0x22); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xdf, 0x50, 0x42, 0x58, 0x81, + 0x2d, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x6b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x01, 0x0f, 0xff, 0xd4, 0x0e, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0f, + 0x53, 0xf1, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf7, 0x01); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0, 0x80); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe4, 0x34, 0xb4, 0x00, 0x00, + 0x00, 0x39, 0x04, 0x09, 0x34); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe6, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0, 0x04); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xdf, 0x50, 0x40); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf3, 0x50, 0x00, 0x00, 0x00, + 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf2, 0x11); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf3, 0x01, 0x00, 0x00, 0x00, + 0x01); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf4, 0x00, 0x02); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf2, 0x19); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xdf, 0x50, 0x42); mipi_dsi_dcs_set_tear_on(dsi, MIPI_DSI_DCS_TEAR_MODE_VBLANK); mipi_dsi_dcs_set_column_address(dsi, 0, 1080 - 1); mipi_dsi_dcs_set_page_address(dsi, 0, 2340 - 1); From patchwork Thu Feb 6 21:06:06 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anusha Srivatsa X-Patchwork-Id: 13963782 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 56C8EC0219B for ; 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Thu, 06 Feb 2025 16:06:57 -0500 X-MC-Unique: EuK3b61WPpy92965OhANRQ-1 X-Mimecast-MFC-AGG-ID: EuK3b61WPpy92965OhANRQ Received: from mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.93]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-02.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 30CCE1956094; Thu, 6 Feb 2025 21:06:55 +0000 (UTC) Received: from asrivats-na.rmtustx.csb (unknown [10.2.17.21]) by mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id C984E1800570; Thu, 6 Feb 2025 21:06:51 +0000 (UTC) From: Anusha Srivatsa Date: Thu, 06 Feb 2025 16:06:06 -0500 Subject: [PATCH 11/14] drm/panel/xpp055c272: Move to using mipi_dsi_dcs_write_seq_multi() MIME-Version: 1.0 Message-Id: <20250206-mipi-cocci-v1-11-4ff0c69e8897@redhat.com> References: <20250206-mipi-cocci-v1-0-4ff0c69e8897@redhat.com> In-Reply-To: <20250206-mipi-cocci-v1-0-4ff0c69e8897@redhat.com> To: Neil Armstrong , Jessica Zhang , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Joel Selvaraj , Ondrej Jirman , Javier Martinez Canillas , Artur Weber , Jianhua Lu , Jonathan Corbet Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anusha Srivatsa X-Developer-Signature: v=1; a=ed25519-sha256; t=1738875969; l=7528; i=asrivats@redhat.com; s=20250122; h=from:subject:message-id; bh=wbE7uYVtdOIHzOUKy0i3iCZQQ5nZT49/uaoUYL3CwHc=; b=jQdUGcnvNdf/4KBe+E8PStHpNm8HebtJ1BK3hKjEtEraBRgTvXju35iVDDc5Wy1r/lbKtbJhR 2rfDRYLCV2HBX58nUJxpybf81tRMbw1kuCp/4s0N3jf5DE00KUfEohs X-Developer-Key: i=asrivats@redhat.com; a=ed25519; pk=brnIHkBsUZEhyW6Zyn0U92AeIZ1psws/q8VFbIkf1AU= X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Use mipi_dsi_dcs_write_seq_multi() instead of mipi_dsi_dcs_write_seq() Used Coccinelle to do this change. SmPl patch: @rule_1@ identifier dsi_var; expression dsi_device; expression list es; @@ struct mipi_dsi_device *dsi_var = dsi_device; +struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi_var }; <+... -mipi_dsi_dcs_write_seq(dsi_var,es); +mipi_dsi_dcs_write_seq_multi(&dsi_ctx,es); ...+> Signed-off-by: Anusha Srivatsa --- drivers/gpu/drm/panel/panel-xinpeng-xpp055c272.c | 113 ++++++++++++----------- 1 file changed, 61 insertions(+), 52 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-xinpeng-xpp055c272.c b/drivers/gpu/drm/panel/panel-xinpeng-xpp055c272.c index 22a14006765ed23da23da9cb39c637913c4f3090..b676253fdb46cd0ff75ad022e8bc14fae80c7344 100644 --- a/drivers/gpu/drm/panel/panel-xinpeng-xpp055c272.c +++ b/drivers/gpu/drm/panel/panel-xinpeng-xpp055c272.c @@ -62,66 +62,75 @@ static inline struct xpp055c272 *panel_to_xpp055c272(struct drm_panel *panel) static int xpp055c272_init_sequence(struct xpp055c272 *ctx) { struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); + struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi }; struct device *dev = ctx->dev; /* * Init sequence was supplied by the panel vendor without much * documentation. */ - mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETEXTC, 0xf1, 0x12, 0x83); - mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETMIPI, - 0x33, 0x81, 0x05, 0xf9, 0x0e, 0x0e, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, 0x25, - 0x00, 0x91, 0x0a, 0x00, 0x00, 0x02, 0x4f, 0x01, - 0x00, 0x00, 0x37); - mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETPOWER_EXT, 0x25); - mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETPCR, 0x02, 0x11, 0x00); - mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETRGBIF, - 0x0c, 0x10, 0x0a, 0x50, 0x03, 0xff, 0x00, 0x00, - 0x00, 0x00); - mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETSCR, - 0x73, 0x73, 0x50, 0x50, 0x00, 0x00, 0x08, 0x70, - 0x00); - mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETVDC, 0x46); - mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETPANEL, 0x0b); - mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETCYC, 0x80); - mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETDISP, 0xc8, 0x12, 0x30); - mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETEQ, - 0x07, 0x07, 0x0B, 0x0B, 0x03, 0x0B, 0x00, 0x00, - 0x00, 0x00, 0xFF, 0x00, 0xC0, 0x10); - mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETPOWER, - 0x53, 0x00, 0x1e, 0x1e, 0x77, 0xe1, 0xcc, 0xdd, - 0x67, 0x77, 0x33, 0x33); - mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETECO, 0x00, 0x00, 0xff, - 0xff, 0x01, 0xff); - mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETBGP, 0x09, 0x09); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, XPP055C272_CMD_SETEXTC, 0xf1, + 0x12, 0x83); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, XPP055C272_CMD_SETMIPI, 0x33, + 0x81, 0x05, 0xf9, 0x0e, 0x0e, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x44, + 0x25, 0x00, 0x91, 0x0a, 0x00, 0x00, 0x02, + 0x4f, 0x01, 0x00, 0x00, 0x37); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, XPP055C272_CMD_SETPOWER_EXT, + 0x25); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, XPP055C272_CMD_SETPCR, 0x02, + 0x11, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, XPP055C272_CMD_SETRGBIF, 0x0c, + 0x10, 0x0a, 0x50, 0x03, 0xff, 0x00, 0x00, + 0x00, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, XPP055C272_CMD_SETSCR, 0x73, + 0x73, 0x50, 0x50, 0x00, 0x00, 0x08, 0x70, + 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, XPP055C272_CMD_SETVDC, 0x46); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, XPP055C272_CMD_SETPANEL, 0x0b); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, XPP055C272_CMD_SETCYC, 0x80); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, XPP055C272_CMD_SETDISP, 0xc8, + 0x12, 0x30); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, XPP055C272_CMD_SETEQ, 0x07, + 0x07, 0x0B, 0x0B, 0x03, 0x0B, 0x00, 0x00, + 0x00, 0x00, 0xFF, 0x00, 0xC0, 0x10); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, XPP055C272_CMD_SETPOWER, 0x53, + 0x00, 0x1e, 0x1e, 0x77, 0xe1, 0xcc, 0xdd, + 0x67, 0x77, 0x33, 0x33); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, XPP055C272_CMD_SETECO, 0x00, + 0x00, 0xff, 0xff, 0x01, 0xff); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, XPP055C272_CMD_SETBGP, 0x09, + 0x09); msleep(20); - mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETVCOM, 0x87, 0x95); - mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETGIP1, - 0xc2, 0x10, 0x05, 0x05, 0x10, 0x05, 0xa0, 0x12, - 0x31, 0x23, 0x3f, 0x81, 0x0a, 0xa0, 0x37, 0x18, - 0x00, 0x80, 0x01, 0x00, 0x00, 0x00, 0x00, 0x80, - 0x01, 0x00, 0x00, 0x00, 0x48, 0xf8, 0x86, 0x42, - 0x08, 0x88, 0x88, 0x80, 0x88, 0x88, 0x88, 0x58, - 0xf8, 0x87, 0x53, 0x18, 0x88, 0x88, 0x81, 0x88, - 0x88, 0x88, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00); - mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETGIP2, - 0x00, 0x1a, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x1f, 0x88, 0x81, 0x35, - 0x78, 0x88, 0x88, 0x85, 0x88, 0x88, 0x88, 0x0f, - 0x88, 0x80, 0x24, 0x68, 0x88, 0x88, 0x84, 0x88, - 0x88, 0x88, 0x23, 0x10, 0x00, 0x00, 0x1c, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x05, - 0xa0, 0x00, 0x00, 0x00, 0x00); - mipi_dsi_dcs_write_seq(dsi, XPP055C272_CMD_SETGAMMA, - 0x00, 0x06, 0x08, 0x2a, 0x31, 0x3f, 0x38, 0x36, - 0x07, 0x0c, 0x0d, 0x11, 0x13, 0x12, 0x13, 0x11, - 0x18, 0x00, 0x06, 0x08, 0x2a, 0x31, 0x3f, 0x38, - 0x36, 0x07, 0x0c, 0x0d, 0x11, 0x13, 0x12, 0x13, - 0x11, 0x18); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, XPP055C272_CMD_SETVCOM, 0x87, + 0x95); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, XPP055C272_CMD_SETGIP1, 0xc2, + 0x10, 0x05, 0x05, 0x10, 0x05, 0xa0, 0x12, + 0x31, 0x23, 0x3f, 0x81, 0x0a, 0xa0, 0x37, + 0x18, 0x00, 0x80, 0x01, 0x00, 0x00, 0x00, + 0x00, 0x80, 0x01, 0x00, 0x00, 0x00, 0x48, + 0xf8, 0x86, 0x42, 0x08, 0x88, 0x88, 0x80, + 0x88, 0x88, 0x88, 0x58, 0xf8, 0x87, 0x53, + 0x18, 0x88, 0x88, 0x81, 0x88, 0x88, 0x88, + 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, XPP055C272_CMD_SETGIP2, 0x00, + 0x1a, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x1f, 0x88, 0x81, + 0x35, 0x78, 0x88, 0x88, 0x85, 0x88, 0x88, + 0x88, 0x0f, 0x88, 0x80, 0x24, 0x68, 0x88, + 0x88, 0x84, 0x88, 0x88, 0x88, 0x23, 0x10, + 0x00, 0x00, 0x1c, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x30, 0x05, 0xa0, + 0x00, 0x00, 0x00, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, XPP055C272_CMD_SETGAMMA, 0x00, + 0x06, 0x08, 0x2a, 0x31, 0x3f, 0x38, 0x36, + 0x07, 0x0c, 0x0d, 0x11, 0x13, 0x12, 0x13, + 0x11, 0x18, 0x00, 0x06, 0x08, 0x2a, 0x31, + 0x3f, 0x38, 0x36, 0x07, 0x0c, 0x0d, 0x11, + 0x13, 0x12, 0x13, 0x11, 0x18); msleep(60); From patchwork Thu Feb 6 21:06:07 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anusha Srivatsa X-Patchwork-Id: 13963783 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A16B7C02194 for ; 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Thu, 06 Feb 2025 16:07:01 -0500 X-MC-Unique: ASZSKOo8M4OY7KWX9xTTYw-1 X-Mimecast-MFC-AGG-ID: ASZSKOo8M4OY7KWX9xTTYw Received: from mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.93]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-08.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id C96BE180087B; Thu, 6 Feb 2025 21:06:58 +0000 (UTC) Received: from asrivats-na.rmtustx.csb (unknown [10.2.17.21]) by mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 7A81E1800570; Thu, 6 Feb 2025 21:06:55 +0000 (UTC) From: Anusha Srivatsa Date: Thu, 06 Feb 2025 16:06:07 -0500 Subject: [PATCH 12/14] drm/panel/novatek-nt36523: Move to using mipi_dsi_dcs_write_seq_multi() MIME-Version: 1.0 Message-Id: <20250206-mipi-cocci-v1-12-4ff0c69e8897@redhat.com> References: <20250206-mipi-cocci-v1-0-4ff0c69e8897@redhat.com> In-Reply-To: <20250206-mipi-cocci-v1-0-4ff0c69e8897@redhat.com> To: Neil Armstrong , Jessica Zhang , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Joel Selvaraj , Ondrej Jirman , Javier Martinez Canillas , Artur Weber , Jianhua Lu , Jonathan Corbet Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anusha Srivatsa X-Developer-Signature: v=1; a=ed25519-sha256; t=1738875969; l=92657; i=asrivats@redhat.com; s=20250122; h=from:subject:message-id; bh=ftPkE/o6HprqSZbEGFsSZ42szYg1ndhIDlARjwRsUD0=; b=EhYCPPniaJUzPpPgpsjmk1vFLQKeoadc0FMOQWwEvPg1T3U1yJj+AZ6xYibPyPkFY0b/13i2n e3ZjuQBnqyHDKQPeBqC8tyf4yh5h9D9raHWe704NeoLeF1ftg48c/qk X-Developer-Key: i=asrivats@redhat.com; a=ed25519; pk=brnIHkBsUZEhyW6Zyn0U92AeIZ1psws/q8VFbIkf1AU= X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Use mipi_dsi_dcs_write_seq_multi() instead of mipi_dsi_dcs_write_seq() While at it, also change mipi_dsi_dual_dcs_write_seq() accordingly. Used Coccinelle to do this change. SmPl patch: @rule_1@ identifier dsi_var; expression dsi_device; expression list es; @@ struct mipi_dsi_device *dsi_var = dsi_device; +struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi_var }; <+... -mipi_dsi_dcs_write_seq(dsi_var,es); +mipi_dsi_dcs_write_seq_multi(&dsi_ctx,es); ...+> @rule_3@ expression dsi_var; expression list es; identifier jdi; @@ struct mipi_dsi_device *dsi0 = pinfo->dsi[0]; struct mipi_dsi_device *dsi1 = pinfo->dsi[1]; +struct mipi_dsi_multi_context dsi_ctx0 = { .dsi = dsi0 }; +struct mipi_dsi_multi_context dsi_ctx1 = { .dsi = dsi1 }; <+... -mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, es); +mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, es); ...+> Signed-off-by: Anusha Srivatsa --- drivers/gpu/drm/panel/panel-novatek-nt36523.c | 1588 +++++++++++++------------ 1 file changed, 818 insertions(+), 770 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-novatek-nt36523.c b/drivers/gpu/drm/panel/panel-novatek-nt36523.c index 04f1d2676c783516574b7dc22d22eea45f5b4fc6..9f9d82acc34f926a194dd741ed88c7bb35e53a11 100644 --- a/drivers/gpu/drm/panel/panel-novatek-nt36523.c +++ b/drivers/gpu/drm/panel/panel-novatek-nt36523.c @@ -23,10 +23,10 @@ #define DSI_NUM_MIN 1 -#define mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, cmd, seq...) \ +#define mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, cmd, seq...) \ do { \ - mipi_dsi_dcs_write_seq(dsi0, cmd, seq); \ - mipi_dsi_dcs_write_seq(dsi1, cmd, seq); \ + mipi_dsi_dcs_write_seq_multi(&dsi_ctx0, cmd, seq); \ + mipi_dsi_dcs_write_seq_multi(&dsi_ctx1, cmd, seq); \ } while (0) struct panel_info { @@ -67,218 +67,221 @@ static int elish_boe_init_sequence(struct panel_info *pinfo) { struct mipi_dsi_device *dsi0 = pinfo->dsi[0]; struct mipi_dsi_device *dsi1 = pinfo->dsi[1]; + struct mipi_dsi_multi_context dsi_ctx0 = { .dsi = dsi0 }; + struct mipi_dsi_multi_context dsi_ctx1 = { .dsi = dsi1 }; /* No datasheet, so write magic init sequence directly */ - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x10); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xb9, 0x05); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x20); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x18, 0x40); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x10); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xb9, 0x02); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x23); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x00, 0x80); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x01, 0x84); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x05, 0x2d); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x06, 0x00); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x07, 0x00); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x08, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x09, 0x45); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x11, 0x02); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x12, 0x80); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x15, 0x83); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x16, 0x0c); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x29, 0x0a); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x30, 0xff); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x31, 0xfe); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x32, 0xfd); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x33, 0xfb); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x34, 0xf8); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x35, 0xf5); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x36, 0xf3); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x37, 0xf2); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x38, 0xf2); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x39, 0xf2); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x3a, 0xef); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x3b, 0xec); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x3d, 0xe9); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x3f, 0xe5); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x40, 0xe5); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x41, 0xe5); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x2a, 0x13); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x45, 0xff); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x46, 0xf4); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x47, 0xe7); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x48, 0xda); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x49, 0xcd); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4a, 0xc0); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4b, 0xb3); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4c, 0xb2); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4d, 0xb2); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4e, 0xb2); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4f, 0x99); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x50, 0x80); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x51, 0x68); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x52, 0x66); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x53, 0x66); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x54, 0x66); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x2b, 0x0e); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x58, 0xff); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x59, 0xfb); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x5a, 0xf7); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x5b, 0xf3); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x5c, 0xef); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x5d, 0xe3); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x5e, 0xda); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x5f, 0xd8); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x60, 0xd8); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x61, 0xd8); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x62, 0xcb); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x63, 0xbf); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x64, 0xb3); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x65, 0xb2); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x66, 0xb2); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x67, 0xb2); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x2a); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x25, 0x47); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x30, 0x47); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x39, 0x47); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x26); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x19, 0x10); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x1a, 0xe0); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x1b, 0x10); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x1c, 0x00); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x2a, 0x10); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x2b, 0xe0); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x10); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0xf0); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x84, 0x08); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x85, 0x0c); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x20); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x51, 0x00); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x25); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x91, 0x1f); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x92, 0x0f); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x93, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x94, 0x18); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x95, 0x03); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x96, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x10); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xb0, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x25); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x19, 0x1f); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x1b, 0x1b); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x24); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xb8, 0x28); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x27); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd0, 0x31); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd1, 0x20); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd2, 0x30); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd4, 0x08); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xde, 0x80); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xdf, 0x02); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x26); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x00, 0x81); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x01, 0xb0); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x22); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x9f, 0x50); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x6f, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x70, 0x11); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x73, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x74, 0x49); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x76, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x77, 0x49); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xa0, 0x3f); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xa9, 0x50); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xaa, 0x28); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xab, 0x28); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xad, 0x10); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xb8, 0x00); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xb9, 0x49); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xba, 0x49); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xbb, 0x49); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xbe, 0x04); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xbf, 0x49); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xc0, 0x04); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xc1, 0x59); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xc2, 0x00); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xc5, 0x00); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xc6, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xc7, 0x48); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xca, 0x43); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xcb, 0x3c); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xce, 0x00); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xcf, 0x43); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd0, 0x3c); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd3, 0x43); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd4, 0x3c); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd7, 0x00); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xdc, 0x43); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xdd, 0x3c); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xe1, 0x43); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xe2, 0x3c); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xf2, 0x00); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xf3, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xf4, 0x48); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x25); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x13, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x14, 0x23); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xbc, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xbd, 0x23); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x2a); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x97, 0x3c); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x98, 0x02); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x99, 0x95); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x9a, 0x03); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x9b, 0x00); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x9c, 0x0b); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x9d, 0x0a); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x9e, 0x90); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x22); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x9f, 0x50); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x23); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xa3, 0x50); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0xe0); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x14, 0x60); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x16, 0xc0); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4f, 0x02); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0xf0); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x3a, 0x08); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0xd0); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x02, 0xaf); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x09, 0xee); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x1c, 0x99); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x1d, 0x09); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x10); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x51, 0x0f, 0xff); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x53, 0x2c); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x35, 0x00); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xbb, 0x13); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x3b, 0x03, 0xac, 0x1a, 0x04, 0x04); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x11); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xff, 0x10); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xfb, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xb9, 0x05); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xff, 0x20); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xfb, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x18, 0x40); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xff, 0x10); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xfb, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xb9, 0x02); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xff, 0x23); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xfb, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x00, 0x80); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x01, 0x84); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x05, 0x2d); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x06, 0x00); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x07, 0x00); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x08, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x09, 0x45); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x11, 0x02); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x12, 0x80); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x15, 0x83); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x16, 0x0c); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x29, 0x0a); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x30, 0xff); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x31, 0xfe); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x32, 0xfd); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x33, 0xfb); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x34, 0xf8); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x35, 0xf5); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x36, 0xf3); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x37, 0xf2); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x38, 0xf2); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x39, 0xf2); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x3a, 0xef); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x3b, 0xec); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x3d, 0xe9); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x3f, 0xe5); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x40, 0xe5); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x41, 0xe5); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x2a, 0x13); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x45, 0xff); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x46, 0xf4); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x47, 0xe7); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x48, 0xda); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x49, 0xcd); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x4a, 0xc0); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x4b, 0xb3); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x4c, 0xb2); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x4d, 0xb2); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x4e, 0xb2); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x4f, 0x99); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x50, 0x80); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x51, 0x68); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x52, 0x66); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x53, 0x66); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x54, 0x66); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x2b, 0x0e); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x58, 0xff); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x59, 0xfb); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x5a, 0xf7); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x5b, 0xf3); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x5c, 0xef); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x5d, 0xe3); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x5e, 0xda); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x5f, 0xd8); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x60, 0xd8); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x61, 0xd8); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x62, 0xcb); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x63, 0xbf); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x64, 0xb3); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x65, 0xb2); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x66, 0xb2); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x67, 0xb2); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xff, 0x2a); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xfb, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x25, 0x47); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x30, 0x47); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x39, 0x47); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xff, 0x26); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xfb, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x19, 0x10); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x1a, 0xe0); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x1b, 0x10); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x1c, 0x00); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x2a, 0x10); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x2b, 0xe0); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xff, 0x10); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xfb, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xff, 0xf0); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xfb, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x84, 0x08); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x85, 0x0c); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xff, 0x20); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xfb, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x51, 0x00); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xff, 0x25); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xfb, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x91, 0x1f); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x92, 0x0f); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x93, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x94, 0x18); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x95, 0x03); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x96, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xff, 0x10); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xb0, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xff, 0x25); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xfb, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x19, 0x1f); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x1b, 0x1b); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xff, 0x24); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xfb, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xb8, 0x28); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xff, 0x27); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xfb, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xd0, 0x31); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xd1, 0x20); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xd2, 0x30); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xd4, 0x08); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xde, 0x80); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xdf, 0x02); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xff, 0x26); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xfb, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x00, 0x81); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x01, 0xb0); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xff, 0x22); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xfb, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x9f, 0x50); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x6f, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x70, 0x11); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x73, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x74, 0x49); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x76, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x77, 0x49); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xa0, 0x3f); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xa9, 0x50); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xaa, 0x28); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xab, 0x28); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xad, 0x10); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xb8, 0x00); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xb9, 0x49); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xba, 0x49); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xbb, 0x49); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xbe, 0x04); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xbf, 0x49); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xc0, 0x04); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xc1, 0x59); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xc2, 0x00); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xc5, 0x00); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xc6, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xc7, 0x48); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xca, 0x43); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xcb, 0x3c); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xce, 0x00); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xcf, 0x43); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xd0, 0x3c); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xd3, 0x43); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xd4, 0x3c); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xd7, 0x00); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xdc, 0x43); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xdd, 0x3c); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xe1, 0x43); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xe2, 0x3c); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xf2, 0x00); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xf3, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xf4, 0x48); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xff, 0x25); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xfb, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x13, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x14, 0x23); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xbc, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xbd, 0x23); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xff, 0x2a); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xfb, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x97, 0x3c); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x98, 0x02); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x99, 0x95); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x9a, 0x03); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x9b, 0x00); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x9c, 0x0b); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x9d, 0x0a); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x9e, 0x90); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xff, 0x22); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xfb, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x9f, 0x50); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xff, 0x23); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xfb, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xa3, 0x50); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xff, 0xe0); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xfb, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x14, 0x60); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x16, 0xc0); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x4f, 0x02); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xff, 0xf0); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xfb, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x3a, 0x08); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xff, 0xd0); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xfb, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x02, 0xaf); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x09, 0xee); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x1c, 0x99); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x1d, 0x09); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xff, 0x10); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xfb, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x51, 0x0f, 0xff); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x53, 0x2c); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x35, 0x00); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xbb, 0x13); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x3b, 0x03, 0xac, + 0x1a, 0x04, 0x04); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x11); msleep(70); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x29); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x29); return 0; } @@ -287,196 +290,199 @@ static int elish_csot_init_sequence(struct panel_info *pinfo) { struct mipi_dsi_device *dsi0 = pinfo->dsi[0]; struct mipi_dsi_device *dsi1 = pinfo->dsi[1]; + struct mipi_dsi_multi_context dsi_ctx0 = { .dsi = dsi0 }; + struct mipi_dsi_multi_context dsi_ctx1 = { .dsi = dsi1 }; /* No datasheet, so write magic init sequence directly */ - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x10); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xb9, 0x05); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x20); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x18, 0x40); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x10); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xb9, 0x02); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0xd0); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x02, 0xaf); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x00, 0x30); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x09, 0xee); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x1c, 0x99); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x1d, 0x09); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0xf0); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x3a, 0x08); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0xe0); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4f, 0x02); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x20); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x58, 0x40); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x10); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x35, 0x00); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x23); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x00, 0x80); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x01, 0x84); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x05, 0x2d); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x06, 0x00); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x07, 0x00); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x08, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x09, 0x45); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x11, 0x02); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x12, 0x80); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x15, 0x83); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x16, 0x0c); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x29, 0x0a); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x30, 0xff); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x31, 0xfe); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x32, 0xfd); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x33, 0xfb); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x34, 0xf8); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x35, 0xf5); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x36, 0xf3); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x37, 0xf2); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x38, 0xf2); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x39, 0xf2); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x3a, 0xef); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x3b, 0xec); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x3d, 0xe9); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x3f, 0xe5); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x40, 0xe5); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x41, 0xe5); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x2a, 0x13); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x45, 0xff); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x46, 0xf4); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x47, 0xe7); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x48, 0xda); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x49, 0xcd); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4a, 0xc0); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4b, 0xb3); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4c, 0xb2); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4d, 0xb2); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4e, 0xb2); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x4f, 0x99); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x50, 0x80); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x51, 0x68); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x52, 0x66); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x53, 0x66); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x54, 0x66); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x2b, 0x0e); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x58, 0xff); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x59, 0xfb); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x5a, 0xf7); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x5b, 0xf3); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x5c, 0xef); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x5d, 0xe3); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x5e, 0xda); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x5f, 0xd8); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x60, 0xd8); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x61, 0xd8); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x62, 0xcb); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x63, 0xbf); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x64, 0xb3); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x65, 0xb2); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x66, 0xb2); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x67, 0xb2); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x10); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x51, 0x0f, 0xff); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x53, 0x2c); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x55, 0x00); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xbb, 0x13); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x3b, 0x03, 0xac, 0x1a, 0x04, 0x04); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x2a); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x25, 0x46); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x30, 0x46); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x39, 0x46); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x26); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x01, 0xb0); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x19, 0x10); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x1a, 0xe0); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x1b, 0x10); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x1c, 0x00); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x2a, 0x10); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x2b, 0xe0); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0xf0); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x84, 0x08); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x85, 0x0c); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x20); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x51, 0x00); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x25); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x91, 0x1f); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x92, 0x0f); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x93, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x94, 0x18); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x95, 0x03); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x96, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x10); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xb0, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x25); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x19, 0x1f); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x1b, 0x1b); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x24); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xb8, 0x28); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x27); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd0, 0x31); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd1, 0x20); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd4, 0x08); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xde, 0x80); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xdf, 0x02); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x26); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x00, 0x81); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x01, 0xb0); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x22); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x6f, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x70, 0x11); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x73, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x74, 0x4d); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xa0, 0x3f); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xa9, 0x50); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xaa, 0x28); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xab, 0x28); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xad, 0x10); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xb8, 0x00); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xb9, 0x4b); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xba, 0x96); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xbb, 0x4b); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xbe, 0x07); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xbf, 0x4b); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xc0, 0x07); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xc1, 0x5c); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xc2, 0x00); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xc5, 0x00); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xc6, 0x3f); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xc7, 0x00); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xca, 0x08); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xcb, 0x40); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xce, 0x00); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xcf, 0x08); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd0, 0x40); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd3, 0x08); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xd4, 0x40); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x25); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xbc, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xbd, 0x1c); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x2a); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xfb, 0x01); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x9a, 0x03); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0xff, 0x10); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x11); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xff, 0x10); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xfb, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xb9, 0x05); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xff, 0x20); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xfb, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x18, 0x40); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xff, 0x10); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xfb, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xb9, 0x02); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xff, 0xd0); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xfb, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x02, 0xaf); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x00, 0x30); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x09, 0xee); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x1c, 0x99); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x1d, 0x09); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xff, 0xf0); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xfb, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x3a, 0x08); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xff, 0xe0); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xfb, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x4f, 0x02); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xff, 0x20); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xfb, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x58, 0x40); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xff, 0x10); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xfb, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x35, 0x00); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xff, 0x23); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xfb, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x00, 0x80); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x01, 0x84); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x05, 0x2d); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x06, 0x00); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x07, 0x00); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x08, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x09, 0x45); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x11, 0x02); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x12, 0x80); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x15, 0x83); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x16, 0x0c); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x29, 0x0a); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x30, 0xff); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x31, 0xfe); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x32, 0xfd); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x33, 0xfb); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x34, 0xf8); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x35, 0xf5); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x36, 0xf3); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x37, 0xf2); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x38, 0xf2); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x39, 0xf2); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x3a, 0xef); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x3b, 0xec); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x3d, 0xe9); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x3f, 0xe5); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x40, 0xe5); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x41, 0xe5); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x2a, 0x13); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x45, 0xff); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x46, 0xf4); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x47, 0xe7); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x48, 0xda); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x49, 0xcd); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x4a, 0xc0); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x4b, 0xb3); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x4c, 0xb2); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x4d, 0xb2); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x4e, 0xb2); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x4f, 0x99); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x50, 0x80); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x51, 0x68); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x52, 0x66); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x53, 0x66); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x54, 0x66); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x2b, 0x0e); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x58, 0xff); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x59, 0xfb); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x5a, 0xf7); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x5b, 0xf3); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x5c, 0xef); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x5d, 0xe3); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x5e, 0xda); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x5f, 0xd8); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x60, 0xd8); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x61, 0xd8); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x62, 0xcb); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x63, 0xbf); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x64, 0xb3); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x65, 0xb2); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x66, 0xb2); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x67, 0xb2); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xff, 0x10); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xfb, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x51, 0x0f, 0xff); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x53, 0x2c); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x55, 0x00); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xbb, 0x13); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x3b, 0x03, 0xac, + 0x1a, 0x04, 0x04); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xff, 0x2a); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xfb, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x25, 0x46); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x30, 0x46); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x39, 0x46); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xff, 0x26); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xfb, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x01, 0xb0); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x19, 0x10); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x1a, 0xe0); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x1b, 0x10); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x1c, 0x00); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x2a, 0x10); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x2b, 0xe0); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xff, 0xf0); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xfb, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x84, 0x08); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x85, 0x0c); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xff, 0x20); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xfb, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x51, 0x00); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xff, 0x25); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xfb, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x91, 0x1f); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x92, 0x0f); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x93, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x94, 0x18); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x95, 0x03); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x96, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xff, 0x10); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xb0, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xff, 0x25); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xfb, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x19, 0x1f); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x1b, 0x1b); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xff, 0x24); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xfb, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xb8, 0x28); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xff, 0x27); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xfb, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xd0, 0x31); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xd1, 0x20); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xd4, 0x08); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xde, 0x80); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xdf, 0x02); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xff, 0x26); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xfb, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x00, 0x81); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x01, 0xb0); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xff, 0x22); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xfb, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x6f, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x70, 0x11); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x73, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x74, 0x4d); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xa0, 0x3f); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xa9, 0x50); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xaa, 0x28); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xab, 0x28); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xad, 0x10); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xb8, 0x00); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xb9, 0x4b); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xba, 0x96); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xbb, 0x4b); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xbe, 0x07); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xbf, 0x4b); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xc0, 0x07); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xc1, 0x5c); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xc2, 0x00); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xc5, 0x00); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xc6, 0x3f); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xc7, 0x00); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xca, 0x08); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xcb, 0x40); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xce, 0x00); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xcf, 0x08); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xd0, 0x40); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xd3, 0x08); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xd4, 0x40); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xff, 0x25); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xfb, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xbc, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xbd, 0x1c); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xff, 0x2a); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xfb, 0x01); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x9a, 0x03); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0xff, 0x10); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x11); msleep(70); - mipi_dsi_dual_dcs_write_seq(dsi0, dsi1, 0x29); + mipi_dsi_dual_dcs_write_seq(dsi_ctx0, dsi_ctx1, 0x29); return 0; } @@ -484,135 +490,164 @@ static int elish_csot_init_sequence(struct panel_info *pinfo) static int j606f_boe_init_sequence(struct panel_info *pinfo) { struct mipi_dsi_device *dsi = pinfo->dsi[0]; + struct mipi_dsi_multi_context dsi_ctx = { + .dsi = dsi + }; struct device *dev = &dsi->dev; int ret; - mipi_dsi_dcs_write_seq(dsi, 0xff, 0x20); - mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01); - mipi_dsi_dcs_write_seq(dsi, 0x05, 0xd9); - mipi_dsi_dcs_write_seq(dsi, 0x07, 0x78); - mipi_dsi_dcs_write_seq(dsi, 0x08, 0x5a); - mipi_dsi_dcs_write_seq(dsi, 0x0d, 0x63); - mipi_dsi_dcs_write_seq(dsi, 0x0e, 0x91); - mipi_dsi_dcs_write_seq(dsi, 0x0f, 0x73); - mipi_dsi_dcs_write_seq(dsi, 0x95, 0xeb); - mipi_dsi_dcs_write_seq(dsi, 0x96, 0xeb); - mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_PARTIAL_ROWS, 0x11); - mipi_dsi_dcs_write_seq(dsi, 0x6d, 0x66); - mipi_dsi_dcs_write_seq(dsi, 0x75, 0xa2); - mipi_dsi_dcs_write_seq(dsi, 0x77, 0xb3); - mipi_dsi_dcs_write_seq(dsi, 0xb0, 0x00, 0x08, 0x00, 0x23, 0x00, 0x4d, 0x00, 0x6d, 0x00, - 0x89, 0x00, 0xa1, 0x00, 0xb6, 0x00, 0xc9); - mipi_dsi_dcs_write_seq(dsi, 0xb1, 0x00, 0xda, 0x01, 0x13, 0x01, 0x3c, 0x01, 0x7e, 0x01, - 0xab, 0x01, 0xf7, 0x02, 0x2f, 0x02, 0x31); - mipi_dsi_dcs_write_seq(dsi, 0xb2, 0x02, 0x67, 0x02, 0xa6, 0x02, 0xd1, 0x03, 0x08, 0x03, - 0x2e, 0x03, 0x5b, 0x03, 0x6b, 0x03, 0x7b); - mipi_dsi_dcs_write_seq(dsi, 0xb3, 0x03, 0x8e, 0x03, 0xa2, 0x03, 0xb7, 0x03, 0xe7, 0x03, - 0xfd, 0x03, 0xff); - mipi_dsi_dcs_write_seq(dsi, 0xb4, 0x00, 0x08, 0x00, 0x23, 0x00, 0x4d, 0x00, 0x6d, 0x00, - 0x89, 0x00, 0xa1, 0x00, 0xb6, 0x00, 0xc9); - mipi_dsi_dcs_write_seq(dsi, 0xb5, 0x00, 0xda, 0x01, 0x13, 0x01, 0x3c, 0x01, 0x7e, 0x01, - 0xab, 0x01, 0xf7, 0x02, 0x2f, 0x02, 0x31); - mipi_dsi_dcs_write_seq(dsi, 0xb6, 0x02, 0x67, 0x02, 0xa6, 0x02, 0xd1, 0x03, 0x08, 0x03, - 0x2e, 0x03, 0x5b, 0x03, 0x6b, 0x03, 0x7b); - mipi_dsi_dcs_write_seq(dsi, 0xb7, 0x03, 0x8e, 0x03, 0xa2, 0x03, 0xb7, 0x03, 0xe7, 0x03, - 0xfd, 0x03, 0xff); - mipi_dsi_dcs_write_seq(dsi, 0xb8, 0x00, 0x08, 0x00, 0x23, 0x00, 0x4d, 0x00, 0x6d, 0x00, - 0x89, 0x00, 0xa1, 0x00, 0xb6, 0x00, 0xc9); - mipi_dsi_dcs_write_seq(dsi, 0xb9, 0x00, 0xda, 0x01, 0x13, 0x01, 0x3c, 0x01, 0x7e, 0x01, - 0xab, 0x01, 0xf7, 0x02, 0x2f, 0x02, 0x31); - mipi_dsi_dcs_write_seq(dsi, 0xba, 0x02, 0x67, 0x02, 0xa6, 0x02, 0xd1, 0x03, 0x08, 0x03, - 0x2e, 0x03, 0x5b, 0x03, 0x6b, 0x03, 0x7b); - mipi_dsi_dcs_write_seq(dsi, 0xbb, 0x03, 0x8e, 0x03, 0xa2, 0x03, 0xb7, 0x03, 0xe7, 0x03, - 0xfd, 0x03, 0xff); - mipi_dsi_dcs_write_seq(dsi, 0xff, 0x21); - mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01); - mipi_dsi_dcs_write_seq(dsi, 0xb0, 0x00, 0x00, 0x00, 0x1b, 0x00, 0x45, 0x00, 0x65, 0x00, - 0x81, 0x00, 0x99, 0x00, 0xae, 0x00, 0xc1); - mipi_dsi_dcs_write_seq(dsi, 0xb1, 0x00, 0xd2, 0x01, 0x0b, 0x01, 0x34, 0x01, 0x76, 0x01, - 0xa3, 0x01, 0xef, 0x02, 0x27, 0x02, 0x29); - mipi_dsi_dcs_write_seq(dsi, 0xb2, 0x02, 0x5f, 0x02, 0x9e, 0x02, 0xc9, 0x03, 0x00, 0x03, - 0x26, 0x03, 0x53, 0x03, 0x63, 0x03, 0x73); - mipi_dsi_dcs_write_seq(dsi, 0xb3, 0x03, 0x86, 0x03, 0x9a, 0x03, 0xaf, 0x03, 0xdf, 0x03, - 0xf5, 0x03, 0xf7); - mipi_dsi_dcs_write_seq(dsi, 0xb4, 0x00, 0x00, 0x00, 0x1b, 0x00, 0x45, 0x00, 0x65, 0x00, - 0x81, 0x00, 0x99, 0x00, 0xae, 0x00, 0xc1); - mipi_dsi_dcs_write_seq(dsi, 0xb5, 0x00, 0xd2, 0x01, 0x0b, 0x01, 0x34, 0x01, 0x76, 0x01, - 0xa3, 0x01, 0xef, 0x02, 0x27, 0x02, 0x29); - mipi_dsi_dcs_write_seq(dsi, 0xb6, 0x02, 0x5f, 0x02, 0x9e, 0x02, 0xc9, 0x03, 0x00, 0x03, - 0x26, 0x03, 0x53, 0x03, 0x63, 0x03, 0x73); - mipi_dsi_dcs_write_seq(dsi, 0xb7, 0x03, 0x86, 0x03, 0x9a, 0x03, 0xaf, 0x03, 0xdf, 0x03, - 0xf5, 0x03, 0xf7); - mipi_dsi_dcs_write_seq(dsi, 0xb8, 0x00, 0x00, 0x00, 0x1b, 0x00, 0x45, 0x00, 0x65, 0x00, - 0x81, 0x00, 0x99, 0x00, 0xae, 0x00, 0xc1); - mipi_dsi_dcs_write_seq(dsi, 0xb9, 0x00, 0xd2, 0x01, 0x0b, 0x01, 0x34, 0x01, 0x76, 0x01, - 0xa3, 0x01, 0xef, 0x02, 0x27, 0x02, 0x29); - mipi_dsi_dcs_write_seq(dsi, 0xba, 0x02, 0x5f, 0x02, 0x9e, 0x02, 0xc9, 0x03, 0x00, 0x03, - 0x26, 0x03, 0x53, 0x03, 0x63, 0x03, 0x73); - mipi_dsi_dcs_write_seq(dsi, 0xbb, 0x03, 0x86, 0x03, 0x9a, 0x03, 0xaf, 0x03, 0xdf, 0x03, - 0xf5, 0x03, 0xf7); - mipi_dsi_dcs_write_seq(dsi, 0xff, 0x23); - mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01); - mipi_dsi_dcs_write_seq(dsi, 0x00, 0x80); - mipi_dsi_dcs_write_seq(dsi, 0x07, 0x00); - mipi_dsi_dcs_write_seq(dsi, 0x11, 0x01); - mipi_dsi_dcs_write_seq(dsi, 0x12, 0x77); - mipi_dsi_dcs_write_seq(dsi, 0x15, 0x07); - mipi_dsi_dcs_write_seq(dsi, 0x16, 0x07); - mipi_dsi_dcs_write_seq(dsi, 0xff, 0x24); - mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01); - mipi_dsi_dcs_write_seq(dsi, 0x00, 0x00); - mipi_dsi_dcs_write_seq(dsi, 0x01, 0x00); - mipi_dsi_dcs_write_seq(dsi, 0x02, 0x1c); - mipi_dsi_dcs_write_seq(dsi, 0x03, 0x1c); - mipi_dsi_dcs_write_seq(dsi, 0x04, 0x1d); - mipi_dsi_dcs_write_seq(dsi, 0x05, 0x1d); - mipi_dsi_dcs_write_seq(dsi, 0x06, 0x04); - mipi_dsi_dcs_write_seq(dsi, 0x07, 0x04); - mipi_dsi_dcs_write_seq(dsi, 0x08, 0x0f); - mipi_dsi_dcs_write_seq(dsi, 0x09, 0x0f); - mipi_dsi_dcs_write_seq(dsi, 0x0a, 0x0e); - mipi_dsi_dcs_write_seq(dsi, 0x0b, 0x0e); - mipi_dsi_dcs_write_seq(dsi, 0x0c, 0x0d); - mipi_dsi_dcs_write_seq(dsi, 0x0d, 0x0d); - mipi_dsi_dcs_write_seq(dsi, 0x0e, 0x0c); - mipi_dsi_dcs_write_seq(dsi, 0x0f, 0x0c); - mipi_dsi_dcs_write_seq(dsi, 0x10, 0x08); - mipi_dsi_dcs_write_seq(dsi, 0x11, 0x08); - mipi_dsi_dcs_write_seq(dsi, 0x12, 0x00); - mipi_dsi_dcs_write_seq(dsi, 0x13, 0x00); - mipi_dsi_dcs_write_seq(dsi, 0x14, 0x00); - mipi_dsi_dcs_write_seq(dsi, 0x15, 0x00); - mipi_dsi_dcs_write_seq(dsi, 0x16, 0x00); - mipi_dsi_dcs_write_seq(dsi, 0x17, 0x00); - mipi_dsi_dcs_write_seq(dsi, 0x18, 0x1c); - mipi_dsi_dcs_write_seq(dsi, 0x19, 0x1c); - mipi_dsi_dcs_write_seq(dsi, 0x1a, 0x1d); - mipi_dsi_dcs_write_seq(dsi, 0x1b, 0x1d); - mipi_dsi_dcs_write_seq(dsi, 0x1c, 0x04); - mipi_dsi_dcs_write_seq(dsi, 0x1d, 0x04); - mipi_dsi_dcs_write_seq(dsi, 0x1e, 0x0f); - mipi_dsi_dcs_write_seq(dsi, 0x1f, 0x0f); - mipi_dsi_dcs_write_seq(dsi, 0x20, 0x0e); - mipi_dsi_dcs_write_seq(dsi, 0x21, 0x0e); - mipi_dsi_dcs_write_seq(dsi, 0x22, 0x0d); - mipi_dsi_dcs_write_seq(dsi, 0x23, 0x0d); - mipi_dsi_dcs_write_seq(dsi, 0x24, 0x0c); - mipi_dsi_dcs_write_seq(dsi, 0x25, 0x0c); - mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_GAMMA_CURVE, 0x08); - mipi_dsi_dcs_write_seq(dsi, 0x27, 0x08); - mipi_dsi_dcs_write_seq(dsi, 0x28, 0x00); - mipi_dsi_dcs_write_seq(dsi, 0x29, 0x00); - mipi_dsi_dcs_write_seq(dsi, 0x2a, 0x00); - mipi_dsi_dcs_write_seq(dsi, 0x2b, 0x00); - mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_LUT, 0x20); - mipi_dsi_dcs_write_seq(dsi, 0x2f, 0x0a); - mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_PARTIAL_ROWS, 0x44); - mipi_dsi_dcs_write_seq(dsi, 0x33, 0x0c); - mipi_dsi_dcs_write_seq(dsi, 0x34, 0x32); - mipi_dsi_dcs_write_seq(dsi, 0x37, 0x44); - mipi_dsi_dcs_write_seq(dsi, 0x38, 0x40); - mipi_dsi_dcs_write_seq(dsi, 0x39, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x20); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x05, 0xd9); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x07, 0x78); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x08, 0x5a); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0d, 0x63); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0e, 0x91); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0f, 0x73); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x95, 0xeb); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x96, 0xeb); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_SET_PARTIAL_ROWS, + 0x11); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6d, 0x66); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x75, 0xa2); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x77, 0xb3); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0, 0x00, 0x08, 0x00, 0x23, + 0x00, 0x4d, 0x00, 0x6d, 0x00, 0x89, 0x00, + 0xa1, 0x00, 0xb6, 0x00, 0xc9); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb1, 0x00, 0xda, 0x01, 0x13, + 0x01, 0x3c, 0x01, 0x7e, 0x01, 0xab, 0x01, + 0xf7, 0x02, 0x2f, 0x02, 0x31); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb2, 0x02, 0x67, 0x02, 0xa6, + 0x02, 0xd1, 0x03, 0x08, 0x03, 0x2e, 0x03, + 0x5b, 0x03, 0x6b, 0x03, 0x7b); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb3, 0x03, 0x8e, 0x03, 0xa2, + 0x03, 0xb7, 0x03, 0xe7, 0x03, 0xfd, 0x03, + 0xff); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb4, 0x00, 0x08, 0x00, 0x23, + 0x00, 0x4d, 0x00, 0x6d, 0x00, 0x89, 0x00, + 0xa1, 0x00, 0xb6, 0x00, 0xc9); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb5, 0x00, 0xda, 0x01, 0x13, + 0x01, 0x3c, 0x01, 0x7e, 0x01, 0xab, 0x01, + 0xf7, 0x02, 0x2f, 0x02, 0x31); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb6, 0x02, 0x67, 0x02, 0xa6, + 0x02, 0xd1, 0x03, 0x08, 0x03, 0x2e, 0x03, + 0x5b, 0x03, 0x6b, 0x03, 0x7b); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb7, 0x03, 0x8e, 0x03, 0xa2, + 0x03, 0xb7, 0x03, 0xe7, 0x03, 0xfd, 0x03, + 0xff); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb8, 0x00, 0x08, 0x00, 0x23, + 0x00, 0x4d, 0x00, 0x6d, 0x00, 0x89, 0x00, + 0xa1, 0x00, 0xb6, 0x00, 0xc9); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb9, 0x00, 0xda, 0x01, 0x13, + 0x01, 0x3c, 0x01, 0x7e, 0x01, 0xab, 0x01, + 0xf7, 0x02, 0x2f, 0x02, 0x31); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xba, 0x02, 0x67, 0x02, 0xa6, + 0x02, 0xd1, 0x03, 0x08, 0x03, 0x2e, 0x03, + 0x5b, 0x03, 0x6b, 0x03, 0x7b); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xbb, 0x03, 0x8e, 0x03, 0xa2, + 0x03, 0xb7, 0x03, 0xe7, 0x03, 0xfd, 0x03, + 0xff); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x21); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0, 0x00, 0x00, 0x00, 0x1b, + 0x00, 0x45, 0x00, 0x65, 0x00, 0x81, 0x00, + 0x99, 0x00, 0xae, 0x00, 0xc1); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb1, 0x00, 0xd2, 0x01, 0x0b, + 0x01, 0x34, 0x01, 0x76, 0x01, 0xa3, 0x01, + 0xef, 0x02, 0x27, 0x02, 0x29); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb2, 0x02, 0x5f, 0x02, 0x9e, + 0x02, 0xc9, 0x03, 0x00, 0x03, 0x26, 0x03, + 0x53, 0x03, 0x63, 0x03, 0x73); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb3, 0x03, 0x86, 0x03, 0x9a, + 0x03, 0xaf, 0x03, 0xdf, 0x03, 0xf5, 0x03, + 0xf7); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb4, 0x00, 0x00, 0x00, 0x1b, + 0x00, 0x45, 0x00, 0x65, 0x00, 0x81, 0x00, + 0x99, 0x00, 0xae, 0x00, 0xc1); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb5, 0x00, 0xd2, 0x01, 0x0b, + 0x01, 0x34, 0x01, 0x76, 0x01, 0xa3, 0x01, + 0xef, 0x02, 0x27, 0x02, 0x29); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb6, 0x02, 0x5f, 0x02, 0x9e, + 0x02, 0xc9, 0x03, 0x00, 0x03, 0x26, 0x03, + 0x53, 0x03, 0x63, 0x03, 0x73); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb7, 0x03, 0x86, 0x03, 0x9a, + 0x03, 0xaf, 0x03, 0xdf, 0x03, 0xf5, 0x03, + 0xf7); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb8, 0x00, 0x00, 0x00, 0x1b, + 0x00, 0x45, 0x00, 0x65, 0x00, 0x81, 0x00, + 0x99, 0x00, 0xae, 0x00, 0xc1); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb9, 0x00, 0xd2, 0x01, 0x0b, + 0x01, 0x34, 0x01, 0x76, 0x01, 0xa3, 0x01, + 0xef, 0x02, 0x27, 0x02, 0x29); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xba, 0x02, 0x5f, 0x02, 0x9e, + 0x02, 0xc9, 0x03, 0x00, 0x03, 0x26, 0x03, + 0x53, 0x03, 0x63, 0x03, 0x73); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xbb, 0x03, 0x86, 0x03, 0x9a, + 0x03, 0xaf, 0x03, 0xdf, 0x03, 0xf5, 0x03, + 0xf7); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x23); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x00, 0x80); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x07, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x11, 0x01); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x12, 0x77); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x15, 0x07); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x16, 0x07); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x24); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x00, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x01, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x02, 0x1c); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x03, 0x1c); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x04, 0x1d); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x05, 0x1d); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x06, 0x04); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x07, 0x04); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x08, 0x0f); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x09, 0x0f); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0a, 0x0e); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0b, 0x0e); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0c, 0x0d); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0d, 0x0d); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0e, 0x0c); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0f, 0x0c); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x10, 0x08); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x11, 0x08); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x12, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x13, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x14, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x15, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x16, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x17, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x18, 0x1c); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x19, 0x1c); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1a, 0x1d); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1b, 0x1d); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1c, 0x04); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1d, 0x04); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1e, 0x0f); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1f, 0x0f); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x20, 0x0e); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x21, 0x0e); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x22, 0x0d); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x23, 0x0d); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x24, 0x0c); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x25, 0x0c); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_SET_GAMMA_CURVE, 0x08); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x27, 0x08); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x28, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x29, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2a, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2b, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_WRITE_LUT, 0x20); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2f, 0x0a); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_SET_PARTIAL_ROWS, + 0x44); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x33, 0x0c); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x34, 0x32); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x37, 0x44); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x38, 0x40); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x39, 0x00); ret = mipi_dsi_dcs_set_pixel_format(dsi, 0x9a); if (ret < 0) { @@ -620,16 +655,16 @@ static int j606f_boe_init_sequence(struct panel_info *pinfo) return ret; } - mipi_dsi_dcs_write_seq(dsi, 0x3b, 0xa0); - mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_3D_CONTROL, 0x42); - mipi_dsi_dcs_write_seq(dsi, 0x3f, 0x06); - mipi_dsi_dcs_write_seq(dsi, 0x43, 0x06); - mipi_dsi_dcs_write_seq(dsi, 0x47, 0x66); - mipi_dsi_dcs_write_seq(dsi, 0x4a, 0x9a); - mipi_dsi_dcs_write_seq(dsi, 0x4b, 0xa0); - mipi_dsi_dcs_write_seq(dsi, 0x4c, 0x91); - mipi_dsi_dcs_write_seq(dsi, 0x4d, 0x21); - mipi_dsi_dcs_write_seq(dsi, 0x4e, 0x43); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3b, 0xa0); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_SET_3D_CONTROL, 0x42); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3f, 0x06); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x43, 0x06); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x47, 0x66); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4a, 0x9a); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4b, 0xa0); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4c, 0x91); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4d, 0x21); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4e, 0x43); ret = mipi_dsi_dcs_set_display_brightness(dsi, 18); if (ret < 0) { @@ -637,114 +672,120 @@ static int j606f_boe_init_sequence(struct panel_info *pinfo) return ret; } - mipi_dsi_dcs_write_seq(dsi, 0x52, 0x34); - mipi_dsi_dcs_write_seq(dsi, 0x55, 0x82, 0x02); - mipi_dsi_dcs_write_seq(dsi, 0x56, 0x04); - mipi_dsi_dcs_write_seq(dsi, 0x58, 0x21); - mipi_dsi_dcs_write_seq(dsi, 0x59, 0x30); - mipi_dsi_dcs_write_seq(dsi, 0x5a, 0xba); - mipi_dsi_dcs_write_seq(dsi, 0x5b, 0xa0); - mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_CABC_MIN_BRIGHTNESS, 0x00, 0x06); - mipi_dsi_dcs_write_seq(dsi, 0x5f, 0x00); - mipi_dsi_dcs_write_seq(dsi, 0x65, 0x82); - mipi_dsi_dcs_write_seq(dsi, 0x7e, 0x20); - mipi_dsi_dcs_write_seq(dsi, 0x7f, 0x3c); - mipi_dsi_dcs_write_seq(dsi, 0x82, 0x04); - mipi_dsi_dcs_write_seq(dsi, 0x97, 0xc0); - mipi_dsi_dcs_write_seq(dsi, 0xb6, - 0x05, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, - 0x05, 0x00, 0x00); - mipi_dsi_dcs_write_seq(dsi, 0x92, 0xc4); - mipi_dsi_dcs_write_seq(dsi, 0x93, 0x1a); - mipi_dsi_dcs_write_seq(dsi, 0x94, 0x5f); - mipi_dsi_dcs_write_seq(dsi, 0xd7, 0x55); - mipi_dsi_dcs_write_seq(dsi, 0xda, 0x0a); - mipi_dsi_dcs_write_seq(dsi, 0xde, 0x08); - mipi_dsi_dcs_write_seq(dsi, 0xdb, 0x05); - mipi_dsi_dcs_write_seq(dsi, 0xdc, 0xc4); - mipi_dsi_dcs_write_seq(dsi, 0xdd, 0x22); - mipi_dsi_dcs_write_seq(dsi, 0xdf, 0x05); - mipi_dsi_dcs_write_seq(dsi, 0xe0, 0xc4); - mipi_dsi_dcs_write_seq(dsi, 0xe1, 0x05); - mipi_dsi_dcs_write_seq(dsi, 0xe2, 0xc4); - mipi_dsi_dcs_write_seq(dsi, 0xe3, 0x05); - mipi_dsi_dcs_write_seq(dsi, 0xe4, 0xc4); - mipi_dsi_dcs_write_seq(dsi, 0xe5, 0x05); - mipi_dsi_dcs_write_seq(dsi, 0xe6, 0xc4); - mipi_dsi_dcs_write_seq(dsi, 0x5c, 0x88); - mipi_dsi_dcs_write_seq(dsi, 0x5d, 0x08); - mipi_dsi_dcs_write_seq(dsi, 0x8d, 0x88); - mipi_dsi_dcs_write_seq(dsi, 0x8e, 0x08); - mipi_dsi_dcs_write_seq(dsi, 0xb5, 0x90); - mipi_dsi_dcs_write_seq(dsi, 0xff, 0x25); - mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01); - mipi_dsi_dcs_write_seq(dsi, 0x05, 0x00); - mipi_dsi_dcs_write_seq(dsi, 0x19, 0x07); - mipi_dsi_dcs_write_seq(dsi, 0x1f, 0xba); - mipi_dsi_dcs_write_seq(dsi, 0x20, 0xa0); - mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_GAMMA_CURVE, 0xba); - mipi_dsi_dcs_write_seq(dsi, 0x27, 0xa0); - mipi_dsi_dcs_write_seq(dsi, 0x33, 0xba); - mipi_dsi_dcs_write_seq(dsi, 0x34, 0xa0); - mipi_dsi_dcs_write_seq(dsi, 0x3f, 0xe0); - mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_VSYNC_TIMING, 0x00); - mipi_dsi_dcs_write_seq(dsi, 0x44, 0x00); - mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_GET_SCANLINE, 0x40); - mipi_dsi_dcs_write_seq(dsi, 0x48, 0xba); - mipi_dsi_dcs_write_seq(dsi, 0x49, 0xa0); - mipi_dsi_dcs_write_seq(dsi, 0x5b, 0x00); - mipi_dsi_dcs_write_seq(dsi, 0x5c, 0x00); - mipi_dsi_dcs_write_seq(dsi, 0x5d, 0x00); - mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_CABC_MIN_BRIGHTNESS, 0xd0); - mipi_dsi_dcs_write_seq(dsi, 0x61, 0xba); - mipi_dsi_dcs_write_seq(dsi, 0x62, 0xa0); - mipi_dsi_dcs_write_seq(dsi, 0xf1, 0x10); - mipi_dsi_dcs_write_seq(dsi, 0xff, 0x2a); - mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01); - mipi_dsi_dcs_write_seq(dsi, 0x64, 0x16); - mipi_dsi_dcs_write_seq(dsi, 0x67, 0x16); - mipi_dsi_dcs_write_seq(dsi, 0x6a, 0x16); - mipi_dsi_dcs_write_seq(dsi, 0x70, 0x30); - mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_READ_PPS_START, 0xf3); - mipi_dsi_dcs_write_seq(dsi, 0xa3, 0xff); - mipi_dsi_dcs_write_seq(dsi, 0xa4, 0xff); - mipi_dsi_dcs_write_seq(dsi, 0xa5, 0xff); - mipi_dsi_dcs_write_seq(dsi, 0xd6, 0x08); - mipi_dsi_dcs_write_seq(dsi, 0xff, 0x26); - mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01); - mipi_dsi_dcs_write_seq(dsi, 0x00, 0xa1); - mipi_dsi_dcs_write_seq(dsi, 0x0a, 0xf2); - mipi_dsi_dcs_write_seq(dsi, 0x04, 0x28); - mipi_dsi_dcs_write_seq(dsi, 0x06, 0x30); - mipi_dsi_dcs_write_seq(dsi, 0x0c, 0x13); - mipi_dsi_dcs_write_seq(dsi, 0x0d, 0x0a); - mipi_dsi_dcs_write_seq(dsi, 0x0f, 0x0a); - mipi_dsi_dcs_write_seq(dsi, 0x11, 0x00); - mipi_dsi_dcs_write_seq(dsi, 0x12, 0x50); - mipi_dsi_dcs_write_seq(dsi, 0x13, 0x51); - mipi_dsi_dcs_write_seq(dsi, 0x14, 0x65); - mipi_dsi_dcs_write_seq(dsi, 0x15, 0x00); - mipi_dsi_dcs_write_seq(dsi, 0x16, 0x10); - mipi_dsi_dcs_write_seq(dsi, 0x17, 0xa0); - mipi_dsi_dcs_write_seq(dsi, 0x18, 0x86); - mipi_dsi_dcs_write_seq(dsi, 0x19, 0x11); - mipi_dsi_dcs_write_seq(dsi, 0x1a, 0x7b); - mipi_dsi_dcs_write_seq(dsi, 0x1b, 0x10); - mipi_dsi_dcs_write_seq(dsi, 0x1c, 0xbb); - mipi_dsi_dcs_write_seq(dsi, 0x22, 0x00); - mipi_dsi_dcs_write_seq(dsi, 0x23, 0x00); - mipi_dsi_dcs_write_seq(dsi, 0x2a, 0x11); - mipi_dsi_dcs_write_seq(dsi, 0x2b, 0x7b); - mipi_dsi_dcs_write_seq(dsi, 0x1d, 0x00); - mipi_dsi_dcs_write_seq(dsi, 0x1e, 0xc3); - mipi_dsi_dcs_write_seq(dsi, 0x1f, 0xc3); - mipi_dsi_dcs_write_seq(dsi, 0x24, 0x00); - mipi_dsi_dcs_write_seq(dsi, 0x25, 0xc3); - mipi_dsi_dcs_write_seq(dsi, 0x2f, 0x05); - mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_PARTIAL_ROWS, 0xc3); - mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_PARTIAL_COLUMNS, 0x00); - mipi_dsi_dcs_write_seq(dsi, 0x32, 0xc3); - mipi_dsi_dcs_write_seq(dsi, 0x39, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x52, 0x34); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x55, 0x82, 0x02); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x56, 0x04); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x58, 0x21); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x59, 0x30); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5a, 0xba); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5b, 0xa0); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, + MIPI_DCS_SET_CABC_MIN_BRIGHTNESS, 0x00, + 0x06); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5f, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x82); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7e, 0x20); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7f, 0x3c); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x82, 0x04); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x97, 0xc0); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb6, 0x05, 0x00, 0x05, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x05, 0x05, 0x00, + 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x92, 0xc4); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x93, 0x1a); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x94, 0x5f); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xd7, 0x55); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xda, 0x0a); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xde, 0x08); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xdb, 0x05); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xdc, 0xc4); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xdd, 0x22); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xdf, 0x05); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe0, 0xc4); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe1, 0x05); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe2, 0xc4); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe3, 0x05); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe4, 0xc4); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe5, 0x05); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe6, 0xc4); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5c, 0x88); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5d, 0x08); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x8d, 0x88); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x8e, 0x08); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb5, 0x90); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x25); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x05, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x19, 0x07); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1f, 0xba); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x20, 0xa0); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_SET_GAMMA_CURVE, 0xba); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x27, 0xa0); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x33, 0xba); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x34, 0xa0); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3f, 0xe0); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_SET_VSYNC_TIMING, + 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x44, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_GET_SCANLINE, 0x40); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x48, 0xba); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x49, 0xa0); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5b, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5c, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5d, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, + MIPI_DCS_SET_CABC_MIN_BRIGHTNESS, 0xd0); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x61, 0xba); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x62, 0xa0); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf1, 0x10); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x2a); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x64, 0x16); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x67, 0x16); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6a, 0x16); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x70, 0x30); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_READ_PPS_START, 0xf3); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xa3, 0xff); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xa4, 0xff); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xa5, 0xff); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xd6, 0x08); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x26); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x00, 0xa1); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0a, 0xf2); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x04, 0x28); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x06, 0x30); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0c, 0x13); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0d, 0x0a); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0f, 0x0a); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x11, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x12, 0x50); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x13, 0x51); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x14, 0x65); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x15, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x16, 0x10); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x17, 0xa0); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x18, 0x86); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x19, 0x11); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1a, 0x7b); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1b, 0x10); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1c, 0xbb); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x22, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x23, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2a, 0x11); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2b, 0x7b); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1d, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1e, 0xc3); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1f, 0xc3); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x24, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x25, 0xc3); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2f, 0x05); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_SET_PARTIAL_ROWS, + 0xc3); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_SET_PARTIAL_COLUMNS, + 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x32, 0xc3); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x39, 0x00); ret = mipi_dsi_dcs_set_pixel_format(dsi, 0xc3); if (ret < 0) { @@ -752,60 +793,62 @@ static int j606f_boe_init_sequence(struct panel_info *pinfo) return ret; } - mipi_dsi_dcs_write_seq(dsi, 0x20, 0x01); - mipi_dsi_dcs_write_seq(dsi, 0x33, 0x11); - mipi_dsi_dcs_write_seq(dsi, 0x34, 0x78); - mipi_dsi_dcs_write_seq(dsi, 0x35, 0x16); - mipi_dsi_dcs_write_seq(dsi, 0xc8, 0x04); - mipi_dsi_dcs_write_seq(dsi, 0xc9, 0x82); - mipi_dsi_dcs_write_seq(dsi, 0xca, 0x4e); - mipi_dsi_dcs_write_seq(dsi, 0xcb, 0x00); - mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_READ_PPS_CONTINUE, 0x4c); - mipi_dsi_dcs_write_seq(dsi, 0xaa, 0x47); - mipi_dsi_dcs_write_seq(dsi, 0xff, 0x27); - mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01); - mipi_dsi_dcs_write_seq(dsi, 0x56, 0x06); - mipi_dsi_dcs_write_seq(dsi, 0x58, 0x80); - mipi_dsi_dcs_write_seq(dsi, 0x59, 0x53); - mipi_dsi_dcs_write_seq(dsi, 0x5a, 0x00); - mipi_dsi_dcs_write_seq(dsi, 0x5b, 0x14); - mipi_dsi_dcs_write_seq(dsi, 0x5c, 0x00); - mipi_dsi_dcs_write_seq(dsi, 0x5d, 0x01); - mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_CABC_MIN_BRIGHTNESS, 0x20); - mipi_dsi_dcs_write_seq(dsi, 0x5f, 0x10); - mipi_dsi_dcs_write_seq(dsi, 0x60, 0x00); - mipi_dsi_dcs_write_seq(dsi, 0x61, 0x1d); - mipi_dsi_dcs_write_seq(dsi, 0x62, 0x00); - mipi_dsi_dcs_write_seq(dsi, 0x63, 0x01); - mipi_dsi_dcs_write_seq(dsi, 0x64, 0x24); - mipi_dsi_dcs_write_seq(dsi, 0x65, 0x1c); - mipi_dsi_dcs_write_seq(dsi, 0x66, 0x00); - mipi_dsi_dcs_write_seq(dsi, 0x67, 0x01); - mipi_dsi_dcs_write_seq(dsi, 0x68, 0x25); - mipi_dsi_dcs_write_seq(dsi, 0x00, 0x00); - mipi_dsi_dcs_write_seq(dsi, 0x78, 0x00); - mipi_dsi_dcs_write_seq(dsi, 0xc3, 0x00); - mipi_dsi_dcs_write_seq(dsi, 0xd1, 0x24); - mipi_dsi_dcs_write_seq(dsi, 0xd2, 0x30); - mipi_dsi_dcs_write_seq(dsi, 0xff, 0x2a); - mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01); - mipi_dsi_dcs_write_seq(dsi, 0x22, 0x2f); - mipi_dsi_dcs_write_seq(dsi, 0x23, 0x08); - mipi_dsi_dcs_write_seq(dsi, 0x24, 0x00); - mipi_dsi_dcs_write_seq(dsi, 0x25, 0xc3); - mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_GAMMA_CURVE, 0xf8); - mipi_dsi_dcs_write_seq(dsi, 0x27, 0x00); - mipi_dsi_dcs_write_seq(dsi, 0x28, 0x1a); - mipi_dsi_dcs_write_seq(dsi, 0x29, 0x00); - mipi_dsi_dcs_write_seq(dsi, 0x2a, 0x1a); - mipi_dsi_dcs_write_seq(dsi, 0x2b, 0x00); - mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_LUT, 0x1a); - mipi_dsi_dcs_write_seq(dsi, 0xff, 0xe0); - mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01); - mipi_dsi_dcs_write_seq(dsi, 0x14, 0x60); - mipi_dsi_dcs_write_seq(dsi, 0x16, 0xc0); - mipi_dsi_dcs_write_seq(dsi, 0xff, 0xf0); - mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x20, 0x01); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x33, 0x11); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x34, 0x78); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x35, 0x16); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xc8, 0x04); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xc9, 0x82); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xca, 0x4e); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xcb, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_READ_PPS_CONTINUE, + 0x4c); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xaa, 0x47); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x27); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x56, 0x06); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x58, 0x80); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x59, 0x53); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5a, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5b, 0x14); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5c, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5d, 0x01); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, + MIPI_DCS_SET_CABC_MIN_BRIGHTNESS, 0x20); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5f, 0x10); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x60, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x61, 0x1d); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x62, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x63, 0x01); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x64, 0x24); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x1c); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x66, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x67, 0x01); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x68, 0x25); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x00, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x78, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xc3, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xd1, 0x24); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xd2, 0x30); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x2a); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x22, 0x2f); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x23, 0x08); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x24, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x25, 0xc3); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_SET_GAMMA_CURVE, 0xf8); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x27, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x28, 0x1a); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x29, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2a, 0x1a); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2b, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_WRITE_LUT, 0x1a); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0xe0); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x14, 0x60); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x16, 0xc0); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0xf0); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01); ret = mipi_dsi_dcs_set_pixel_format(dsi, 0x08); if (ret < 0) { @@ -813,8 +856,8 @@ static int j606f_boe_init_sequence(struct panel_info *pinfo) return ret; } - mipi_dsi_dcs_write_seq(dsi, 0xff, 0x24); - mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x24); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01); ret = mipi_dsi_dcs_set_pixel_format(dsi, 0x5d); if (ret < 0) { @@ -822,56 +865,58 @@ static int j606f_boe_init_sequence(struct panel_info *pinfo) return ret; } - mipi_dsi_dcs_write_seq(dsi, 0x3b, 0x60); - mipi_dsi_dcs_write_seq(dsi, 0x4a, 0x5d); - mipi_dsi_dcs_write_seq(dsi, 0x4b, 0x60); - mipi_dsi_dcs_write_seq(dsi, 0x5a, 0x70); - mipi_dsi_dcs_write_seq(dsi, 0x5b, 0x60); - mipi_dsi_dcs_write_seq(dsi, 0x91, 0x44); - mipi_dsi_dcs_write_seq(dsi, 0x92, 0x75); - mipi_dsi_dcs_write_seq(dsi, 0xdb, 0x05); - mipi_dsi_dcs_write_seq(dsi, 0xdc, 0x75); - mipi_dsi_dcs_write_seq(dsi, 0xdd, 0x22); - mipi_dsi_dcs_write_seq(dsi, 0xdf, 0x05); - mipi_dsi_dcs_write_seq(dsi, 0xe0, 0x75); - mipi_dsi_dcs_write_seq(dsi, 0xe1, 0x05); - mipi_dsi_dcs_write_seq(dsi, 0xe2, 0x75); - mipi_dsi_dcs_write_seq(dsi, 0xe3, 0x05); - mipi_dsi_dcs_write_seq(dsi, 0xe4, 0x75); - mipi_dsi_dcs_write_seq(dsi, 0xe5, 0x05); - mipi_dsi_dcs_write_seq(dsi, 0xe6, 0x75); - mipi_dsi_dcs_write_seq(dsi, 0x5c, 0x00); - mipi_dsi_dcs_write_seq(dsi, 0x5d, 0x00); - mipi_dsi_dcs_write_seq(dsi, 0x8d, 0x00); - mipi_dsi_dcs_write_seq(dsi, 0x8e, 0x00); - mipi_dsi_dcs_write_seq(dsi, 0xff, 0x25); - mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01); - mipi_dsi_dcs_write_seq(dsi, 0x1f, 0x70); - mipi_dsi_dcs_write_seq(dsi, 0x20, 0x60); - mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_GAMMA_CURVE, 0x70); - mipi_dsi_dcs_write_seq(dsi, 0x27, 0x60); - mipi_dsi_dcs_write_seq(dsi, 0x33, 0x70); - mipi_dsi_dcs_write_seq(dsi, 0x34, 0x60); - mipi_dsi_dcs_write_seq(dsi, 0x48, 0x70); - mipi_dsi_dcs_write_seq(dsi, 0x49, 0x60); - mipi_dsi_dcs_write_seq(dsi, 0x5b, 0x00); - mipi_dsi_dcs_write_seq(dsi, 0x61, 0x70); - mipi_dsi_dcs_write_seq(dsi, 0x62, 0x60); - mipi_dsi_dcs_write_seq(dsi, 0xff, 0x26); - mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01); - mipi_dsi_dcs_write_seq(dsi, 0x02, 0x31); - mipi_dsi_dcs_write_seq(dsi, 0x19, 0x0a); - mipi_dsi_dcs_write_seq(dsi, 0x1a, 0x7f); - mipi_dsi_dcs_write_seq(dsi, 0x1b, 0x0a); - mipi_dsi_dcs_write_seq(dsi, 0x1c, 0x0c); - mipi_dsi_dcs_write_seq(dsi, 0x2a, 0x0a); - mipi_dsi_dcs_write_seq(dsi, 0x2b, 0x7f); - mipi_dsi_dcs_write_seq(dsi, 0x1e, 0x75); - mipi_dsi_dcs_write_seq(dsi, 0x1f, 0x75); - mipi_dsi_dcs_write_seq(dsi, 0x25, 0x75); - mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_PARTIAL_ROWS, 0x75); - mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_PARTIAL_COLUMNS, 0x05); - mipi_dsi_dcs_write_seq(dsi, 0x32, 0x8d); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3b, 0x60); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4a, 0x5d); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4b, 0x60); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5a, 0x70); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5b, 0x60); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x91, 0x44); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x92, 0x75); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xdb, 0x05); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xdc, 0x75); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xdd, 0x22); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xdf, 0x05); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe0, 0x75); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe1, 0x05); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe2, 0x75); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe3, 0x05); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe4, 0x75); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe5, 0x05); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe6, 0x75); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5c, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5d, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x8d, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x8e, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x25); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1f, 0x70); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x20, 0x60); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_SET_GAMMA_CURVE, 0x70); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x27, 0x60); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x33, 0x70); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x34, 0x60); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x48, 0x70); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x49, 0x60); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5b, 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x61, 0x70); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x62, 0x60); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x26); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x02, 0x31); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x19, 0x0a); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1a, 0x7f); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1b, 0x0a); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1c, 0x0c); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2a, 0x0a); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2b, 0x7f); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1e, 0x75); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1f, 0x75); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x25, 0x75); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_SET_PARTIAL_ROWS, + 0x75); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_SET_PARTIAL_COLUMNS, + 0x05); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x32, 0x8d); ret = mipi_dsi_dcs_set_pixel_format(dsi, 0x75); if (ret < 0) { @@ -879,18 +924,18 @@ static int j606f_boe_init_sequence(struct panel_info *pinfo) return ret; } - mipi_dsi_dcs_write_seq(dsi, 0xff, 0x2a); - mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01); - mipi_dsi_dcs_write_seq(dsi, 0x25, 0x75); - mipi_dsi_dcs_write_seq(dsi, 0xff, 0x10); - mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01); - mipi_dsi_dcs_write_seq(dsi, 0xb9, 0x01); - mipi_dsi_dcs_write_seq(dsi, 0xff, 0x20); - mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01); - mipi_dsi_dcs_write_seq(dsi, 0x18, 0x40); - mipi_dsi_dcs_write_seq(dsi, 0xff, 0x10); - mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01); - mipi_dsi_dcs_write_seq(dsi, 0xb9, 0x02); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x2a); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x25, 0x75); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x10); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb9, 0x01); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x20); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x18, 0x40); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x10); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb9, 0x02); ret = mipi_dsi_dcs_set_tear_on(dsi, MIPI_DSI_DCS_TEAR_MODE_VBLANK); if (ret < 0) { @@ -898,11 +943,12 @@ static int j606f_boe_init_sequence(struct panel_info *pinfo) return ret; } - mipi_dsi_dcs_write_seq(dsi, 0xbb, 0x13); - mipi_dsi_dcs_write_seq(dsi, 0x3b, 0x03, 0x5f, 0x1a, 0x04, 0x04); - mipi_dsi_dcs_write_seq(dsi, 0xff, 0x10); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xbb, 0x13); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3b, 0x03, 0x5f, 0x1a, 0x04, + 0x04); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x10); usleep_range(10000, 11000); - mipi_dsi_dcs_write_seq(dsi, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01); ret = mipi_dsi_dcs_set_display_brightness(dsi, 0); if (ret < 0) { @@ -910,9 +956,11 @@ static int j606f_boe_init_sequence(struct panel_info *pinfo) return ret; } - mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_CONTROL_DISPLAY, 0x2c); - mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_POWER_SAVE, 0x00); - mipi_dsi_dcs_write_seq(dsi, 0x68, 0x05, 0x01); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_WRITE_CONTROL_DISPLAY, + 0x2c); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_WRITE_POWER_SAVE, + 0x00); + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x68, 0x05, 0x01); ret = mipi_dsi_dcs_exit_sleep_mode(dsi); if (ret < 0) { From patchwork Thu Feb 6 21:06:08 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anusha Srivatsa X-Patchwork-Id: 13963780 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3F70BC0219B for ; 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Thu, 06 Feb 2025 16:07:04 -0500 X-MC-Unique: YVkz1SZNNr-bZSlU3stDsg-1 X-Mimecast-MFC-AGG-ID: YVkz1SZNNr-bZSlU3stDsg Received: from mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.93]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-06.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 4C617180087A; Thu, 6 Feb 2025 21:07:02 +0000 (UTC) Received: from asrivats-na.rmtustx.csb (unknown [10.2.17.21]) by mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 204FD1800570; Thu, 6 Feb 2025 21:06:58 +0000 (UTC) From: Anusha Srivatsa Date: Thu, 06 Feb 2025 16:06:08 -0500 Subject: [PATCH 13/14] drm/panel: Remove deprecated functions MIME-Version: 1.0 Message-Id: <20250206-mipi-cocci-v1-13-4ff0c69e8897@redhat.com> References: <20250206-mipi-cocci-v1-0-4ff0c69e8897@redhat.com> In-Reply-To: <20250206-mipi-cocci-v1-0-4ff0c69e8897@redhat.com> To: Neil Armstrong , Jessica Zhang , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Joel Selvaraj , Ondrej Jirman , Javier Martinez Canillas , Artur Weber , Jianhua Lu , Jonathan Corbet Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anusha Srivatsa X-Developer-Signature: v=1; a=ed25519-sha256; t=1738875969; l=6569; i=asrivats@redhat.com; s=20250122; h=from:subject:message-id; bh=+I+VRf68pub7QtDDgc2t195rQtaTteShHv9verWdpIw=; b=86WSU2XQMSwXFeuen4F+p7w/uK6sDESQfX27w79MeRlm8DMZrXMCp/KxUEa7ui8IcMGzFpIlU naV/bzeL4zXDp/MXiT3Ui/wDhIAHvdGldZcWLHgrT+roOBtxmn89Nel X-Developer-Key: i=asrivats@redhat.com; a=ed25519; pk=brnIHkBsUZEhyW6Zyn0U92AeIZ1psws/q8VFbIkf1AU= X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" With transition to newer functions, remove older ones that are no longer used. Signed-off-by: Anusha Srivatsa --- drivers/gpu/drm/drm_mipi_dsi.c | 56 ------------------------------------------ include/drm/drm_mipi_dsi.h | 47 ----------------------------------- 2 files changed, 103 deletions(-) diff --git a/drivers/gpu/drm/drm_mipi_dsi.c b/drivers/gpu/drm/drm_mipi_dsi.c index 5e5c5f84daacc6913a73f9dda0f49cc78f83479a..33f68d4057aadd772afe6cccbb7c27f1730b581f 100644 --- a/drivers/gpu/drm/drm_mipi_dsi.c +++ b/drivers/gpu/drm/drm_mipi_dsi.c @@ -768,34 +768,6 @@ ssize_t mipi_dsi_generic_write(struct mipi_dsi_device *dsi, const void *payload, } EXPORT_SYMBOL(mipi_dsi_generic_write); -/** - * mipi_dsi_generic_write_chatty() - mipi_dsi_generic_write() w/ an error log - * @dsi: DSI peripheral device - * @payload: buffer containing the payload - * @size: size of payload buffer - * - * Like mipi_dsi_generic_write() but includes a dev_err() - * call for you and returns 0 upon success, not the number of bytes sent. - * - * Return: 0 on success or a negative error code on failure. - */ -int mipi_dsi_generic_write_chatty(struct mipi_dsi_device *dsi, - const void *payload, size_t size) -{ - struct device *dev = &dsi->dev; - ssize_t ret; - - ret = mipi_dsi_generic_write(dsi, payload, size); - if (ret < 0) { - dev_err(dev, "sending generic data %*ph failed: %zd\n", - (int)size, payload, ret); - return ret; - } - - return 0; -} -EXPORT_SYMBOL(mipi_dsi_generic_write_chatty); - /** * mipi_dsi_generic_write_multi() - mipi_dsi_generic_write_chatty() w/ accum_err * @ctx: Context for multiple DSI transactions @@ -912,34 +884,6 @@ ssize_t mipi_dsi_dcs_write_buffer(struct mipi_dsi_device *dsi, } EXPORT_SYMBOL(mipi_dsi_dcs_write_buffer); -/** - * mipi_dsi_dcs_write_buffer_chatty - mipi_dsi_dcs_write_buffer() w/ an error log - * @dsi: DSI peripheral device - * @data: buffer containing data to be transmitted - * @len: size of transmission buffer - * - * Like mipi_dsi_dcs_write_buffer() but includes a dev_err() - * call for you and returns 0 upon success, not the number of bytes sent. - * - * Return: 0 on success or a negative error code on failure. - */ -int mipi_dsi_dcs_write_buffer_chatty(struct mipi_dsi_device *dsi, - const void *data, size_t len) -{ - struct device *dev = &dsi->dev; - ssize_t ret; - - ret = mipi_dsi_dcs_write_buffer(dsi, data, len); - if (ret < 0) { - dev_err(dev, "sending dcs data %*ph failed: %zd\n", - (int)len, data, ret); - return ret; - } - - return 0; -} -EXPORT_SYMBOL(mipi_dsi_dcs_write_buffer_chatty); - /** * mipi_dsi_dcs_write_buffer_multi - mipi_dsi_dcs_write_buffer_chatty() w/ accum_err * @ctx: Context for multiple DSI transactions diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h index 94400a78031f1b5f515c4a1519f604c0df7f3e0c..8d191d211f4fc67b8f8760571091885a1924310c 100644 --- a/include/drm/drm_mipi_dsi.h +++ b/include/drm/drm_mipi_dsi.h @@ -287,8 +287,6 @@ void mipi_dsi_picture_parameter_set_multi(struct mipi_dsi_multi_context *ctx, ssize_t mipi_dsi_generic_write(struct mipi_dsi_device *dsi, const void *payload, size_t size); -int mipi_dsi_generic_write_chatty(struct mipi_dsi_device *dsi, - const void *payload, size_t size); void mipi_dsi_generic_write_multi(struct mipi_dsi_multi_context *ctx, const void *payload, size_t size); ssize_t mipi_dsi_generic_read(struct mipi_dsi_device *dsi, const void *params, @@ -326,8 +324,6 @@ enum mipi_dsi_dcs_tear_mode { ssize_t mipi_dsi_dcs_write_buffer(struct mipi_dsi_device *dsi, const void *data, size_t len); -int mipi_dsi_dcs_write_buffer_chatty(struct mipi_dsi_device *dsi, - const void *data, size_t len); void mipi_dsi_dcs_write_buffer_multi(struct mipi_dsi_multi_context *ctx, const void *data, size_t len); ssize_t mipi_dsi_dcs_write(struct mipi_dsi_device *dsi, u8 cmd, @@ -380,27 +376,6 @@ void mipi_dsi_dcs_set_page_address_multi(struct mipi_dsi_multi_context *ctx, void mipi_dsi_dcs_set_tear_scanline_multi(struct mipi_dsi_multi_context *ctx, u16 scanline); -/** - * mipi_dsi_generic_write_seq - transmit data using a generic write packet - * - * This macro will print errors for you and will RETURN FROM THE CALLING - * FUNCTION (yes this is non-intuitive) upon error. - * - * Because of the non-intuitive return behavior, THIS MACRO IS DEPRECATED. - * Please replace calls of it with mipi_dsi_generic_write_seq_multi(). - * - * @dsi: DSI peripheral device - * @seq: buffer containing the payload - */ -#define mipi_dsi_generic_write_seq(dsi, seq...) \ - do { \ - static const u8 d[] = { seq }; \ - int ret; \ - ret = mipi_dsi_generic_write_chatty(dsi, d, ARRAY_SIZE(d)); \ - if (ret < 0) \ - return ret; \ - } while (0) - /** * mipi_dsi_generic_write_seq_multi - transmit data using a generic write packet * @@ -416,28 +391,6 @@ void mipi_dsi_dcs_set_tear_scanline_multi(struct mipi_dsi_multi_context *ctx, mipi_dsi_generic_write_multi(ctx, d, ARRAY_SIZE(d)); \ } while (0) -/** - * mipi_dsi_dcs_write_seq - transmit a DCS command with payload - * - * This macro will print errors for you and will RETURN FROM THE CALLING - * FUNCTION (yes this is non-intuitive) upon error. - * - * Because of the non-intuitive return behavior, THIS MACRO IS DEPRECATED. - * Please replace calls of it with mipi_dsi_dcs_write_seq_multi(). - * - * @dsi: DSI peripheral device - * @cmd: Command - * @seq: buffer containing data to be transmitted - */ -#define mipi_dsi_dcs_write_seq(dsi, cmd, seq...) \ - do { \ - static const u8 d[] = { cmd, seq }; \ - int ret; \ - ret = mipi_dsi_dcs_write_buffer_chatty(dsi, d, ARRAY_SIZE(d)); \ - if (ret < 0) \ - return ret; \ - } while (0) - /** * mipi_dsi_dcs_write_seq_multi - transmit a DCS command with payload * From patchwork Thu Feb 6 21:06:09 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anusha Srivatsa X-Patchwork-Id: 13963785 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 48FA8C02199 for ; Thu, 6 Feb 2025 21:08:58 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9E1B110E960; Thu, 6 Feb 2025 21:08:52 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (1024-bit key; unprotected) header.d=redhat.com header.i=@redhat.com header.b="TKnDg4VF"; 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Thu, 06 Feb 2025 16:07:08 -0500 X-MC-Unique: jgaIr-KKNtWhD9-lENmOpw-1 X-Mimecast-MFC-AGG-ID: jgaIr-KKNtWhD9-lENmOpw Received: from mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.93]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-05.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 27EAA19560A7; Thu, 6 Feb 2025 21:07:06 +0000 (UTC) Received: from asrivats-na.rmtustx.csb (unknown [10.2.17.21]) by mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 9914D1800265; Thu, 6 Feb 2025 21:07:02 +0000 (UTC) From: Anusha Srivatsa Date: Thu, 06 Feb 2025 16:06:09 -0500 Subject: [PATCH 14/14] Documentation: Update the documentation MIME-Version: 1.0 Message-Id: <20250206-mipi-cocci-v1-14-4ff0c69e8897@redhat.com> References: <20250206-mipi-cocci-v1-0-4ff0c69e8897@redhat.com> In-Reply-To: <20250206-mipi-cocci-v1-0-4ff0c69e8897@redhat.com> To: Neil Armstrong , Jessica Zhang , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Joel Selvaraj , Ondrej Jirman , Javier Martinez Canillas , Artur Weber , Jianhua Lu , Jonathan Corbet Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, Anusha Srivatsa , Douglas Anderson X-Developer-Signature: v=1; a=ed25519-sha256; t=1738875969; l=1462; i=asrivats@redhat.com; s=20250122; h=from:subject:message-id; bh=gmySyemTABWW/YZoDBas9z33BOa3vPcC6lWMoPCfpCY=; b=nvJvm+ZuNAFGEA8RexRQqvhsRhVBEKzl7CNZQXUtDvJcEbAPrPZYJkqoVv5XasFGA8TxQezYF 3eYfQVHasJcDIa21Uguiquio7g4Rw4anvaPQ1CsvhuiJAa9Ag7IHtCw X-Developer-Key: i=asrivats@redhat.com; a=ed25519; pk=brnIHkBsUZEhyW6Zyn0U92AeIZ1psws/q8VFbIkf1AU= X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" TODO addressed Cc: Douglas Anderson Signed-off-by: Anusha Srivatsa --- Documentation/gpu/todo.rst | 19 ------------------- 1 file changed, 19 deletions(-) diff --git a/Documentation/gpu/todo.rst b/Documentation/gpu/todo.rst index 256d0d1cb2164bd94f9b610a751b907834d96a21..16231355b3bd31e50c9b50c2c0006ec79ee4ca10 100644 --- a/Documentation/gpu/todo.rst +++ b/Documentation/gpu/todo.rst @@ -496,25 +496,6 @@ Contact: Douglas Anderson Level: Intermediate -Transition away from using mipi_dsi_*_write_seq() -------------------------------------------------- - -The macros mipi_dsi_generic_write_seq() and mipi_dsi_dcs_write_seq() are -non-intuitive because, if there are errors, they return out of the *caller's* -function. We should move all callers to use mipi_dsi_generic_write_seq_multi() -and mipi_dsi_dcs_write_seq_multi() macros instead. - -Once all callers are transitioned, the macros and the functions that they call, -mipi_dsi_generic_write_chatty() and mipi_dsi_dcs_write_buffer_chatty(), can -probably be removed. Alternatively, if people feel like the _multi() variants -are overkill for some use cases, we could keep the mipi_dsi_*_write_seq() -variants but change them not to return out of the caller. - -Contact: Douglas Anderson - -Level: Starter - - Core refactorings =================