From patchwork Wed Feb 12 16:43:21 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 13972113 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1A0D8C021A0 for ; Wed, 12 Feb 2025 16:43:37 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A9E9310E919; Wed, 12 Feb 2025 16:43:36 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="lrBiCIkJ"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) by gabe.freedesktop.org (Postfix) with ESMTPS id 2451410E919 for ; Wed, 12 Feb 2025 16:43:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1739378616; x=1770914616; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=YrnPSpVf2jwz+B6WC7wmulzFUtAP3wiQuTGPAXskFYo=; b=lrBiCIkJlkDMkkLdbzgJrqiWmB14M8S4PllHTomWd8wB37pSgoOU9Cjw pLRIAYxq4802eDO6slD9Dx86i/5u66ziK3+ENwQ8J/qNVBVeQErc53MAs w4gQrYAG2cIxiRNIp54kfFdmiNjr3ioQTCXiCGWjFuJ9dUcOQIMLhs1ww B2gvshoTU/4w/cBKFjggnP0yCPhozrKtak5RFWjsAgFxygYP5pjCu/KAi EJyWA0wSB9xkQBvDnMqEBvhonD/Xft8Ol7+XvgNDAeK3DhxDKeqO6WbIj zDmkxSwNIEtaXWH2lPlcv9AYv3ueA1DqhmWIQKMpzN6wcHO+OcALi+BDU A==; X-CSE-ConnectionGUID: hnFLU9ZHSnKZoafaEqVpMQ== X-CSE-MsgGUID: 4mSTxX8gSPCcAx4Gy2CB0Q== X-IronPort-AV: E=McAfee;i="6700,10204,11343"; a="62514957" X-IronPort-AV: E=Sophos;i="6.13,280,1732608000"; d="scan'208";a="62514957" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Feb 2025 08:43:36 -0800 X-CSE-ConnectionGUID: V+5/N6VjTCaflTlkssT+yQ== X-CSE-MsgGUID: 9pWfsUldTrS2ilKR7VqLOQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,280,1732608000"; d="scan'208";a="113082575" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.74]) by fmviesa008.fm.intel.com with SMTP; 12 Feb 2025 08:43:34 -0800 Received: by stinkbox (sSMTP sendmail emulation); Wed, 12 Feb 2025 18:43:33 +0200 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Cc: stable@vger.kernel.org, Maarten Lankhorst Subject: [PATCH v2 01/10] drm/i915: Make sure all planes in use by the joiner have their crtc included Date: Wed, 12 Feb 2025 18:43:21 +0200 Message-ID: <20250212164330.16891-2-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.45.3 In-Reply-To: <20250212164330.16891-1-ville.syrjala@linux.intel.com> References: <20250212164330.16891-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä Any active plane needs to have its crtc included in the atomic state. For planes enabled via uapi that is all handler in the core. But when we use a plane for joiner the uapi code things the plane is disabled and therefore doesn't have a crtc. So we need to pull those in by hand. We do it first thing in intel_joiner_add_affected_crtcs() so that any newly added crtc will subsequently pull in all of its joined crtcs as well. The symptoms from failing to do this are: - duct tape in the form of commit 1d5b09f8daf8 ("drm/i915: Fix NULL ptr deref by checking new_crtc_state") - the plane's hw state will get overwritten by the disabled uapi state if it can't find the uapi counterpart plane in the atomic state from where it should copy the correct state Cc: stable@vger.kernel.org Reviewed-by: Maarten Lankhorst Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_display.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 6c1e7441313e..22bf46be2ca9 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -6695,12 +6695,30 @@ static int intel_async_flip_check_hw(struct intel_atomic_state *state, struct in static int intel_joiner_add_affected_crtcs(struct intel_atomic_state *state) { struct drm_i915_private *i915 = to_i915(state->base.dev); + const struct intel_plane_state *plane_state; struct intel_crtc_state *crtc_state; + struct intel_plane *plane; struct intel_crtc *crtc; u8 affected_pipes = 0; u8 modeset_pipes = 0; int i; + /* + * Any plane which is in use by the joiner needs its crtc. + * Pull those in first as this will not have happened yet + * if the plane remains disabled according to uapi. + */ + for_each_new_intel_plane_in_state(state, plane, plane_state, i) { + crtc = to_intel_crtc(plane_state->hw.crtc); + if (!crtc) + continue; + + crtc_state = intel_atomic_get_crtc_state(&state->base, crtc); + if (IS_ERR(crtc_state)) + return PTR_ERR(crtc_state); + } + + /* Now pull in all joined crtcs */ for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) { affected_pipes |= crtc_state->joiner_pipes; if (intel_crtc_needs_modeset(crtc_state)) From patchwork Wed Feb 12 16:43:22 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 13972114 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A28C8C021A4 for ; Wed, 12 Feb 2025 16:43:40 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 23BB210E921; Wed, 12 Feb 2025 16:43:40 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="CTxPTJ4w"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) by gabe.freedesktop.org (Postfix) with ESMTPS id 14E9710E921 for ; Wed, 12 Feb 2025 16:43:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1739378619; x=1770914619; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=zTjVRBwFg9nat/ECW3GGMbqkrnQPzfPhvi62znQ8C0Y=; b=CTxPTJ4w/vYGWroh11kl87rzc/iPgsgC6XLYMA/RZevwQicumUG+uy9E L8EteJfh3kPZ/aMFexGY955jIUz/3QsKz8DTX9TRFDe7OqoTx4iAFRIh2 sU7F+KelHNp7aDouM6es/bAH6XxC9dNFXFs4Ki8v3eCE0BImg4mb8tLX7 mYPaexLhsWW+Sg5gDAQopf2eVtrh7Wzb5KqexXBqfsqBGRvSeb65/rQah J6txBuYdaGu3kMXEQOeA3lvXjK7RZXPyRjlsXSrcK9EoKHaaXrPLVttqi HSH8mUlGsFT+RRaD41SEdvWIXalis3K0LlXgSa7OdCPQWnsh0H/eEC3Tj Q==; X-CSE-ConnectionGUID: cUf2aKSQQuKHHhgq2GHhYg== X-CSE-MsgGUID: 4OUa2NH9TOerKPaYvOzo3w== X-IronPort-AV: E=McAfee;i="6700,10204,11343"; a="62514966" X-IronPort-AV: E=Sophos;i="6.13,280,1732608000"; d="scan'208";a="62514966" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Feb 2025 08:43:39 -0800 X-CSE-ConnectionGUID: H18EsaKVTHa1zXpqZlXBaw== X-CSE-MsgGUID: LRFKoxX1Q2OTBGj1ge/rjQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,280,1732608000"; d="scan'208";a="113082589" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.74]) by fmviesa008.fm.intel.com with SMTP; 12 Feb 2025 08:43:37 -0800 Received: by stinkbox (sSMTP sendmail emulation); Wed, 12 Feb 2025 18:43:36 +0200 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Cc: Maarten Lankhorst Subject: [PATCH v2 02/10] Revert "drm/i915: Fix NULL ptr deref by checking new_crtc_state" Date: Wed, 12 Feb 2025 18:43:22 +0200 Message-ID: <20250212164330.16891-3-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.45.3 In-Reply-To: <20250212164330.16891-1-ville.syrjala@linux.intel.com> References: <20250212164330.16891-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä This reverts commit 1d5b09f8daf859247a1ea65b0d732a24d88980d8. Now that the root cause the missing crtc state has been fixed we can get rid of the duct tape. Reviewed-by: Maarten Lankhorst Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_atomic_plane.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c index 8a49d87d9bd9..f26b82b6821a 100644 --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c @@ -1132,7 +1132,7 @@ intel_prepare_plane_fb(struct drm_plane *_plane, * This should only fail upon a hung GPU, in which case we * can safely continue. */ - if (new_crtc_state && intel_crtc_needs_modeset(new_crtc_state)) { + if (intel_crtc_needs_modeset(new_crtc_state)) { ret = add_dma_resv_fences(old_obj->resv, &new_plane_state->uapi); if (ret < 0) From patchwork Wed Feb 12 16:43:23 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 13972115 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D00A1C02198 for ; Wed, 12 Feb 2025 16:43:42 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7525E10E922; Wed, 12 Feb 2025 16:43:42 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="R+TdlsS3"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0539310E922 for ; Wed, 12 Feb 2025 16:43:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1739378622; x=1770914622; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=dzoaRbc+v9IwcWu6ynkZ59qB3Q+CyHV/gAVVD+ZtbyE=; b=R+TdlsS3hbef/OLaIoeLWAWUstKrGk6I+SFXSI6OYz65ZjUkpZ/7bHB0 ul/jAlnrtHQA34eHNU4kik9RIR1XOUqJrcGFUwScxj/BooxxQd5jzhy1A kP23eCujg75KKieHyTm11ykUyw8il2Au1VzCXx3lWfIdZ7XRnPRmfBXwj BRYhmE0HuLq+H1mtaCJ74y1Al7r9W9QTnkx66cVivu6S8vpNwqwWqoXBp PyZ/0utDp77ZnCC0XHiTVsu6im4gHn8DREb9JlOJ2dFte2m/y+Tnhi46q CoiBalNbfTja/rYB6eBu1etYyVj42zps31j4UAGIsAys/lOz1H5Y+645H w==; X-CSE-ConnectionGUID: A5V66PSzRqSWk/EXA0r3SA== X-CSE-MsgGUID: xB6TqhT+SaWcEm5+fFbDvA== X-IronPort-AV: E=McAfee;i="6700,10204,11343"; a="62514977" X-IronPort-AV: E=Sophos;i="6.13,280,1732608000"; d="scan'208";a="62514977" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Feb 2025 08:43:42 -0800 X-CSE-ConnectionGUID: a351mykgTeC1kUEF4oGtiQ== X-CSE-MsgGUID: 8T5lc3bmRFmH0tK5y5culg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,280,1732608000"; d="scan'208";a="113082613" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.74]) by fmviesa008.fm.intel.com with SMTP; 12 Feb 2025 08:43:40 -0800 Received: by stinkbox (sSMTP sendmail emulation); Wed, 12 Feb 2025 18:43:39 +0200 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Cc: Maarten Lankhorst Subject: [PATCH v2 03/10] drm/i915: Rework joiner and Y plane dependency handling Date: Wed, 12 Feb 2025 18:43:23 +0200 Message-ID: <20250212164330.16891-4-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.45.3 In-Reply-To: <20250212164330.16891-1-ville.syrjala@linux.intel.com> References: <20250212164330.16891-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä The current code tries to handle joiner vs. Y planes completely independently. That does not really work since each pipe selects its Y planes completely independently, and any plane pulled into the state by one of the secondary pipes needs to have the plane on the primary pipe also included in the state (for the uapi state copy). The current code sometimes forgets to pull in planes that we need, leading to weird things like the Y<->UV plane link only getting torn down from one side but not the other. Remedy the situation by pulling in the exact same set planes on all the joined pipes. To calculate the set we simply look through each joined crtc and any plane in the state gets added to the set. However due to the way the Y plane selection works we may not be able to determine the set in one go. One plane on one pipe may pull in a Y plane, which may have to pull in another plane because it's not acting in the same role on another pipe, etc. The simple approach taken here is to keep looping and adding planes to the set until it stops growing. I suppose if we tracked more of this Y plane stuff in the crtc state rather than the plane state we might be able to do it in one go. But this works, and it's not going to loop for long anyway since we only have so many pipes and Y planes to consider. Reviewed-by: Maarten Lankhorst Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_display.c | 104 ++++++++++--------- 1 file changed, 53 insertions(+), 51 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 22bf46be2ca9..3b4c7ab35592 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -4410,31 +4410,6 @@ static bool check_single_encoder_cloning(struct intel_atomic_state *state, return true; } -static int icl_add_linked_planes(struct intel_atomic_state *state) -{ - struct intel_plane *plane, *linked; - struct intel_plane_state *plane_state, *linked_plane_state; - int i; - - for_each_new_intel_plane_in_state(state, plane, plane_state, i) { - linked = plane_state->planar_linked_plane; - - if (!linked) - continue; - - linked_plane_state = intel_atomic_get_plane_state(state, linked); - if (IS_ERR(linked_plane_state)) - return PTR_ERR(linked_plane_state); - - drm_WARN_ON(state->base.dev, - linked_plane_state->planar_linked_plane != plane); - drm_WARN_ON(state->base.dev, - linked_plane_state->planar_slave == plane_state->planar_slave); - } - - return 0; -} - static int icl_check_nv12_planes(struct intel_atomic_state *state, struct intel_crtc *crtc) { @@ -6185,44 +6160,75 @@ static bool active_planes_affects_min_cdclk(struct drm_i915_private *dev_priv) IS_IVYBRIDGE(dev_priv); } -static int intel_crtc_add_joiner_planes(struct intel_atomic_state *state, - struct intel_crtc *crtc, - struct intel_crtc *other) +static u8 intel_joiner_affected_planes(struct intel_atomic_state *state, + u8 joined_pipes) { - const struct intel_plane_state __maybe_unused *plane_state; + const struct intel_plane_state *plane_state; struct intel_plane *plane; - u8 plane_ids = 0; + u8 affected_planes = 0; int i; for_each_new_intel_plane_in_state(state, plane, plane_state, i) { - if (plane->pipe == crtc->pipe) - plane_ids |= BIT(plane->id); + struct intel_plane *linked = plane_state->planar_linked_plane; + + if ((joined_pipes & BIT(plane->pipe)) == 0) + continue; + + affected_planes |= BIT(plane->id); + if (linked) + affected_planes |= BIT(linked->id); } - return intel_crtc_add_planes_to_state(state, other, plane_ids); + return affected_planes; } -static int intel_joiner_add_affected_planes(struct intel_atomic_state *state) +static int intel_joiner_add_affected_planes(struct intel_atomic_state *state, + u8 joined_pipes) { - struct drm_i915_private *i915 = to_i915(state->base.dev); - const struct intel_crtc_state *crtc_state; - struct intel_crtc *crtc; - int i; + u8 prev_affected_planes, affected_planes = 0; - for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) { - struct intel_crtc *other; + /* + * We want all the joined pipes to have the same + * set of planes in the atomic state, to make sure + * state copying always works correctly, and the + * UV<->Y plane linkage is always up to date. + * Keep pulling planes in until we've determined + * the full set of affected planes. A bit complicated + * on account of each pipe being capable of selecting + * their own Y planes independently of the other pipes, + * and the selection being done from the set of + * inactive planes. + */ + do { + struct intel_crtc *crtc; - for_each_intel_crtc_in_pipe_mask(&i915->drm, other, - crtc_state->joiner_pipes) { + for_each_intel_crtc_in_pipe_mask(state->base.dev, crtc, joined_pipes) { int ret; - if (crtc == other) - continue; - - ret = intel_crtc_add_joiner_planes(state, crtc, other); + ret = intel_crtc_add_planes_to_state(state, crtc, affected_planes); if (ret) return ret; } + + prev_affected_planes = affected_planes; + affected_planes = intel_joiner_affected_planes(state, joined_pipes); + } while (affected_planes != prev_affected_planes); + + return 0; +} + +static int intel_add_affected_planes(struct intel_atomic_state *state) +{ + const struct intel_crtc_state *crtc_state; + struct intel_crtc *crtc; + int i; + + for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) { + int ret; + + ret = intel_joiner_add_affected_planes(state, intel_crtc_joined_pipe_mask(crtc_state)); + if (ret) + return ret; } return 0; @@ -6237,11 +6243,7 @@ static int intel_atomic_check_planes(struct intel_atomic_state *state) struct intel_crtc *crtc; int i, ret; - ret = icl_add_linked_planes(state); - if (ret) - return ret; - - ret = intel_joiner_add_affected_planes(state); + ret = intel_add_affected_planes(state); if (ret) return ret; From patchwork Wed Feb 12 16:43:24 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 13972116 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E98FAC02198 for ; Wed, 12 Feb 2025 16:43:45 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7E82D10E926; Wed, 12 Feb 2025 16:43:45 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="N7bbf+cl"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) by gabe.freedesktop.org (Postfix) with ESMTPS id 058C210E924 for ; Wed, 12 Feb 2025 16:43:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1739378625; x=1770914625; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=PHV6YzfpGpl0+qRVOoTFQp/1quoPtKsPHmhk6wqNdL8=; b=N7bbf+clGj/ewSteYFfJrHPvIG4069BePBomfUfFzK5RuaDbFXNv69OZ LovTAbA2TTDJefC5p43V7RbYyec2L5NSrT3oj3ks/L9uTLAtzsvTnIRHi nrHYeHc3J4zhLHj2B7i8AVeBFu1M2h/hTj9eH7/9+o3s9tfhKeKlHTSKQ nRmF+NUltkPIiU6O+mh3YZ+EEm9zCpnbS99+N+47O/+BOfj7Y2gPsZ/5/ rymJVIjPHEGeMUCSqfHuBm/YJnS/NPPkHKY6se1GPuvu3OZSWvZKHPjf1 exsyGh1u+u8KYjUSwXQqT/w6UBezSrJxN5z4hIi5Qm7Skrksiz6ZRK9GD A==; X-CSE-ConnectionGUID: 5rhlQhvvQyu/ZTjGSyGGhQ== X-CSE-MsgGUID: 4eqnyEYdTsylDYnss9wDow== X-IronPort-AV: E=McAfee;i="6700,10204,11343"; a="62514994" X-IronPort-AV: E=Sophos;i="6.13,280,1732608000"; d="scan'208";a="62514994" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Feb 2025 08:43:45 -0800 X-CSE-ConnectionGUID: fg7nUc1lSXqGoYxlfReBHQ== X-CSE-MsgGUID: /XXoKwm0Txeg/rAk7pawgA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,280,1732608000"; d="scan'208";a="113082620" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.74]) by fmviesa008.fm.intel.com with SMTP; 12 Feb 2025 08:43:43 -0800 Received: by stinkbox (sSMTP sendmail emulation); Wed, 12 Feb 2025 18:43:41 +0200 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Cc: Maarten Lankhorst Subject: [PATCH v2 04/10] drm/i915: s/planar_slave/is_y_plane/ Date: Wed, 12 Feb 2025 18:43:24 +0200 Message-ID: <20250212164330.16891-5-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.45.3 In-Reply-To: <20250212164330.16891-1-ville.syrjala@linux.intel.com> References: <20250212164330.16891-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä Bspec talks about Y planes, not planar slaves. Switch to using the same terminology to make life a bit less confusing. v2: Adjust some comments too (Maarten) Reviewed-by: Maarten Lankhorst Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_atomic_plane.c | 4 ++-- drivers/gpu/drm/i915/display/intel_display.c | 12 ++++++------ .../gpu/drm/i915/display/intel_display_debugfs.c | 6 +++--- drivers/gpu/drm/i915/display/intel_display_types.h | 13 +++---------- drivers/gpu/drm/i915/display/skl_universal_plane.c | 3 +-- drivers/gpu/drm/i915/display/skl_watermark.c | 4 ++-- 6 files changed, 17 insertions(+), 25 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c index f26b82b6821a..71263fbf0047 100644 --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c @@ -841,7 +841,7 @@ void intel_crtc_planes_update_noarm(struct intel_dsb *dsb, /* TODO: for mailbox updates this should be skipped */ if (new_plane_state->uapi.visible || - new_plane_state->planar_slave) + new_plane_state->is_y_plane) intel_plane_update_noarm(dsb, plane, new_crtc_state, new_plane_state); } @@ -874,7 +874,7 @@ static void skl_crtc_planes_update_arm(struct intel_dsb *dsb, * would have to be called here as well. */ if (new_plane_state->uapi.visible || - new_plane_state->planar_slave) + new_plane_state->is_y_plane) intel_plane_update_arm(dsb, plane, new_crtc_state, new_plane_state); else intel_plane_disable_arm(dsb, plane, new_crtc_state); diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 3b4c7ab35592..df477a00a315 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -4425,7 +4425,7 @@ static int icl_check_nv12_planes(struct intel_atomic_state *state, return 0; /* - * Destroy all old plane links and make the slave plane invisible + * Destroy all old plane links and make the Y plane invisible * in the crtc_state->active_planes mask. */ for_each_new_intel_plane_in_state(state, plane, plane_state, i) { @@ -4433,7 +4433,7 @@ static int icl_check_nv12_planes(struct intel_atomic_state *state, continue; plane_state->planar_linked_plane = NULL; - if (plane_state->planar_slave && !plane_state->uapi.visible) { + if (plane_state->is_y_plane && !plane_state->uapi.visible) { crtc_state->enabled_planes &= ~BIT(plane->id); crtc_state->active_planes &= ~BIT(plane->id); crtc_state->update_planes |= BIT(plane->id); @@ -4441,7 +4441,7 @@ static int icl_check_nv12_planes(struct intel_atomic_state *state, crtc_state->rel_data_rate[plane->id] = 0; } - plane_state->planar_slave = false; + plane_state->is_y_plane = false; } if (!crtc_state->nv12_planes) @@ -4478,7 +4478,7 @@ static int icl_check_nv12_planes(struct intel_atomic_state *state, plane_state->planar_linked_plane = linked; - linked_state->planar_slave = true; + linked_state->is_y_plane = true; linked_state->planar_linked_plane = plane; crtc_state->enabled_planes |= BIT(linked->id); crtc_state->active_planes |= BIT(linked->id); @@ -4491,7 +4491,7 @@ static int icl_check_nv12_planes(struct intel_atomic_state *state, plane->base.base.id, plane->base.name, linked->base.base.id, linked->base.name); - /* Copy parameters to slave plane */ + /* Copy parameters to Y plane */ linked_state->ctl = plane_state->ctl | PLANE_CTL_YUV420_Y_PLANE; linked_state->color_ctl = plane_state->color_ctl; linked_state->view = plane_state->view; @@ -5825,7 +5825,7 @@ intel_verify_planes(struct intel_atomic_state *state) for_each_new_intel_plane_in_state(state, plane, plane_state, i) - assert_plane(plane, plane_state->planar_slave || + assert_plane(plane, plane_state->is_y_plane || plane_state->uapi.visible); } diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c index a646560f4f5b..9de7e512c0ab 100644 --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c @@ -330,8 +330,8 @@ static const char *plane_visibility(const struct intel_plane_state *plane_state) if (plane_state->uapi.visible) return "visible"; - if (plane_state->planar_slave) - return "planar-slave"; + if (plane_state->is_y_plane) + return "Y plane"; return "hidden"; } @@ -364,7 +364,7 @@ static void intel_plane_uapi_info(struct seq_file *m, struct intel_plane *plane) if (plane_state->planar_linked_plane) seq_printf(m, "\t\tplanar: Linked to [PLANE:%d:%s] as a %s\n", plane_state->planar_linked_plane->base.base.id, plane_state->planar_linked_plane->base.name, - plane_state->planar_slave ? "slave" : "master"); + plane_state->is_y_plane ? "Y plane" : "UV plane"); } static void intel_plane_hw_info(struct seq_file *m, struct intel_plane *plane) diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index 6a82c6ade549..6c1c88ed0ba6 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -640,6 +640,9 @@ struct intel_plane_state { /* Plane state to display black pixels when pxp is borked */ bool force_black; + /* Acting as Y plane for another UV plane? */ + bool is_y_plane; + /* plane control register */ u32 ctl; @@ -679,16 +682,6 @@ struct intel_plane_state { */ struct intel_plane *planar_linked_plane; - /* - * planar_slave: - * If set don't update use the linked plane's state for updating - * this plane during atomic commit with the update_slave() callback. - * - * It's also used by the watermark code to ignore wm calculations on - * this plane. They're calculated by the linked plane's wm code. - */ - u32 planar_slave; - struct drm_intel_sprite_colorkey ckey; struct drm_rect psr2_sel_fetch_area; diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c index eb85d3d6cdc3..4b8732ae65aa 100644 --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c @@ -1375,8 +1375,7 @@ static void icl_plane_csc_load_black(struct intel_dsb *dsb, static int icl_plane_color_plane(const struct intel_plane_state *plane_state) { - /* Program the UV plane on planar master */ - if (plane_state->planar_linked_plane && !plane_state->planar_slave) + if (plane_state->planar_linked_plane && !plane_state->is_y_plane) return 1; else return 0; diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c index 9e97fc703903..10a1daad28eb 100644 --- a/drivers/gpu/drm/i915/display/skl_watermark.c +++ b/drivers/gpu/drm/i915/display/skl_watermark.c @@ -2260,8 +2260,8 @@ static int icl_build_plane_wm(struct intel_crtc_state *crtc_state, struct skl_plane_wm *wm = &crtc_state->wm.skl.raw.planes[plane_id]; int ret; - /* Watermarks calculated in master */ - if (plane_state->planar_slave) + /* Watermarks calculated on UV plane */ + if (plane_state->is_y_plane) return 0; memset(wm, 0, sizeof(*wm)); From patchwork Wed Feb 12 16:43:25 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 13972117 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E281EC021A0 for ; Wed, 12 Feb 2025 16:43:49 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 23AA310E928; Wed, 12 Feb 2025 16:43:49 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="BC/87YQX"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) by gabe.freedesktop.org (Postfix) with ESMTPS id EF23310E928 for ; Wed, 12 Feb 2025 16:43:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1739378628; x=1770914628; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ejjyA1EyROzMfR6V5LvtGU9h+VTsNy9l6wmN9aI5lKY=; b=BC/87YQXNJ82Izpvtr8BB7VrJYjx0ERdpJ5Og4IuMiGonzlgPyeB5RuE xgqHRr52SRfxIKEIU43KPktvji5By/ERxXnRBbpVjcSADP+F1Fd2IZOco 3HuiSjha5eSZ86GVwcxIVh6/vwvktg4R310o0mWh+EsEJl7Vqowdcn+k2 vWDfqMGZiFTQt5LNyIaSKYLxDfWm41u7RuQZvaDMAvzsozguNJJww7jd8 F8u7qXFhexs9XR84GXJ6oREPx1CSDAkaEeBGowHAQ9xOp7Hv12yWlayj3 yCDoZLKCVI/Gk23wlQG5knuF5A+vzGwk72XQcQ1qRrjtd/VGOBDJcv5zu g==; X-CSE-ConnectionGUID: laEBYoBtQ/elRxSVK7QqHQ== X-CSE-MsgGUID: sDJ8JXy2R1ma2SY3/GO3BA== X-IronPort-AV: E=McAfee;i="6700,10204,11343"; a="62515000" X-IronPort-AV: E=Sophos;i="6.13,280,1732608000"; d="scan'208";a="62515000" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Feb 2025 08:43:48 -0800 X-CSE-ConnectionGUID: 9gm5IodtRTSgQ1emuxEtag== X-CSE-MsgGUID: pNip2DbQQXKrUjskWDqZzg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,280,1732608000"; d="scan'208";a="113082628" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.74]) by fmviesa008.fm.intel.com with SMTP; 12 Feb 2025 08:43:46 -0800 Received: by stinkbox (sSMTP sendmail emulation); Wed, 12 Feb 2025 18:43:45 +0200 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Cc: Maarten Lankhorst Subject: [PATCH v2 05/10] drm/i915: Extract unlink_nv12_plane() Date: Wed, 12 Feb 2025 18:43:25 +0200 Message-ID: <20250212164330.16891-6-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.45.3 In-Reply-To: <20250212164330.16891-1-ville.syrjala@linux.intel.com> References: <20250212164330.16891-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä Pull the details of the nv12 plane unlinking to a small function to make the higher level code less messy. Reviewed-by: Maarten Lankhorst Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_display.c | 32 +++++++++++++------- 1 file changed, 21 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index df477a00a315..5ce450550ba8 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -4410,6 +4410,24 @@ static bool check_single_encoder_cloning(struct intel_atomic_state *state, return true; } +static void unlink_nv12_plane(struct intel_crtc_state *crtc_state, + struct intel_plane_state *plane_state) +{ + struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); + + plane_state->planar_linked_plane = NULL; + + if (plane_state->is_y_plane && !plane_state->uapi.visible) { + crtc_state->enabled_planes &= ~BIT(plane->id); + crtc_state->active_planes &= ~BIT(plane->id); + crtc_state->update_planes |= BIT(plane->id); + crtc_state->data_rate[plane->id] = 0; + crtc_state->rel_data_rate[plane->id] = 0; + } + + plane_state->is_y_plane = false; +} + static int icl_check_nv12_planes(struct intel_atomic_state *state, struct intel_crtc *crtc) { @@ -4429,19 +4447,11 @@ static int icl_check_nv12_planes(struct intel_atomic_state *state, * in the crtc_state->active_planes mask. */ for_each_new_intel_plane_in_state(state, plane, plane_state, i) { - if (plane->pipe != crtc->pipe || !plane_state->planar_linked_plane) + if (plane->pipe != crtc->pipe) continue; - plane_state->planar_linked_plane = NULL; - if (plane_state->is_y_plane && !plane_state->uapi.visible) { - crtc_state->enabled_planes &= ~BIT(plane->id); - crtc_state->active_planes &= ~BIT(plane->id); - crtc_state->update_planes |= BIT(plane->id); - crtc_state->data_rate[plane->id] = 0; - crtc_state->rel_data_rate[plane->id] = 0; - } - - plane_state->is_y_plane = false; + if (plane_state->planar_linked_plane) + unlink_nv12_plane(crtc_state, plane_state); } if (!crtc_state->nv12_planes) From patchwork Wed Feb 12 16:43:26 2025 Content-Type: text/plain; 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12 Feb 2025 08:43:51 -0800 X-CSE-ConnectionGUID: 18uUeFVZQzWyBxVwChsz0g== X-CSE-MsgGUID: 1F82cjizSsC7EAXaChOoZA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,280,1732608000"; d="scan'208";a="113082648" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.74]) by fmviesa008.fm.intel.com with SMTP; 12 Feb 2025 08:43:49 -0800 Received: by stinkbox (sSMTP sendmail emulation); Wed, 12 Feb 2025 18:43:47 +0200 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Cc: Maarten Lankhorst Subject: [PATCH v2 06/10] drm/i915: Remove pointless visible check in unlink_nv12_plane() Date: Wed, 12 Feb 2025 18:43:26 +0200 Message-ID: <20250212164330.16891-7-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.45.3 In-Reply-To: <20250212164330.16891-1-ville.syrjala@linux.intel.com> References: <20250212164330.16891-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä visible can't be true when is_y_plane is true. Replace the bogus check with an WARN_ON(). Flatten the function while at it. Reviewed-by: Maarten Lankhorst Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_display.c | 18 +++++++++++------- 1 file changed, 11 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 5ce450550ba8..cccf5d39b34a 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -4413,19 +4413,23 @@ static bool check_single_encoder_cloning(struct intel_atomic_state *state, static void unlink_nv12_plane(struct intel_crtc_state *crtc_state, struct intel_plane_state *plane_state) { + struct intel_display *display = to_intel_display(plane_state); struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); plane_state->planar_linked_plane = NULL; - if (plane_state->is_y_plane && !plane_state->uapi.visible) { - crtc_state->enabled_planes &= ~BIT(plane->id); - crtc_state->active_planes &= ~BIT(plane->id); - crtc_state->update_planes |= BIT(plane->id); - crtc_state->data_rate[plane->id] = 0; - crtc_state->rel_data_rate[plane->id] = 0; - } + if (!plane_state->is_y_plane) + return; + + drm_WARN_ON(display->drm, plane_state->uapi.visible); plane_state->is_y_plane = false; + + crtc_state->enabled_planes &= ~BIT(plane->id); + crtc_state->active_planes &= ~BIT(plane->id); + crtc_state->update_planes |= BIT(plane->id); + crtc_state->data_rate[plane->id] = 0; + crtc_state->rel_data_rate[plane->id] = 0; } static int icl_check_nv12_planes(struct intel_atomic_state *state, From patchwork Wed Feb 12 16:43:27 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 13972119 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2A8C5C02198 for ; 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X-CSE-ConnectionGUID: MuFN5DRcRAKpQa3uek1ZMA== X-CSE-MsgGUID: 42qwi1YSQLOmTy/urmwQyA== X-IronPort-AV: E=McAfee;i="6700,10204,11343"; a="62515009" X-IronPort-AV: E=Sophos;i="6.13,280,1732608000"; d="scan'208";a="62515009" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Feb 2025 08:43:54 -0800 X-CSE-ConnectionGUID: B/pmK2GcR0OUBFtUXrrtQg== X-CSE-MsgGUID: m4wP/v9LToCIcR8psfu2sg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,280,1732608000"; d="scan'208";a="113082659" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.74]) by fmviesa008.fm.intel.com with SMTP; 12 Feb 2025 08:43:52 -0800 Received: by stinkbox (sSMTP sendmail emulation); Wed, 12 Feb 2025 18:43:51 +0200 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Cc: Maarten Lankhorst Subject: [PATCH v2 07/10] drm/i915: Extract link_nv12_planes() Date: Wed, 12 Feb 2025 18:43:27 +0200 Message-ID: <20250212164330.16891-8-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.45.3 In-Reply-To: <20250212164330.16891-1-ville.syrjala@linux.intel.com> References: <20250212164330.16891-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä Pull the code linking the UV and Y planes together into a sensible function instead of having the code plastered inside the higher level loop. v2: Rebase due to intel_display changes Reviewed-by: Maarten Lankhorst Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_display.c | 86 +++++++++++--------- 1 file changed, 49 insertions(+), 37 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index cccf5d39b34a..33e9b56cc5d5 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -4410,6 +4410,54 @@ static bool check_single_encoder_cloning(struct intel_atomic_state *state, return true; } +static void link_nv12_planes(struct intel_crtc_state *crtc_state, + struct intel_plane_state *plane_state, + struct intel_plane_state *linked_state) +{ + struct intel_display *display = to_intel_display(plane_state); + struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); + struct intel_plane *linked = to_intel_plane(linked_state->uapi.plane); + + drm_dbg_kms(display->drm, "UV plane [PLANE:%d:%s] using Y plane [PLANE:%d:%s]\n", + plane->base.base.id, plane->base.name, + linked->base.base.id, linked->base.name); + + plane_state->planar_linked_plane = linked; + + linked_state->is_y_plane = true; + linked_state->planar_linked_plane = plane; + + crtc_state->enabled_planes |= BIT(linked->id); + crtc_state->active_planes |= BIT(linked->id); + crtc_state->update_planes |= BIT(linked->id); + + crtc_state->data_rate[linked->id] = crtc_state->data_rate_y[plane->id]; + crtc_state->rel_data_rate[linked->id] = crtc_state->rel_data_rate_y[plane->id]; + + /* Copy parameters to Y plane */ + linked_state->ctl = plane_state->ctl | PLANE_CTL_YUV420_Y_PLANE; + linked_state->color_ctl = plane_state->color_ctl; + linked_state->view = plane_state->view; + linked_state->decrypt = plane_state->decrypt; + + intel_plane_copy_hw_state(linked_state, plane_state); + linked_state->uapi.src = plane_state->uapi.src; + linked_state->uapi.dst = plane_state->uapi.dst; + + if (icl_is_hdr_plane(display, plane->id)) { + if (linked->id == PLANE_7) + plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_7_ICL; + else if (linked->id == PLANE_6) + plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_6_ICL; + else if (linked->id == PLANE_5) + plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_5_RKL; + else if (linked->id == PLANE_4) + plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_4_RKL; + else + MISSING_CASE(linked->id); + } +} + static void unlink_nv12_plane(struct intel_crtc_state *crtc_state, struct intel_plane_state *plane_state) { @@ -4490,43 +4538,7 @@ static int icl_check_nv12_planes(struct intel_atomic_state *state, return -EINVAL; } - plane_state->planar_linked_plane = linked; - - linked_state->is_y_plane = true; - linked_state->planar_linked_plane = plane; - crtc_state->enabled_planes |= BIT(linked->id); - crtc_state->active_planes |= BIT(linked->id); - crtc_state->update_planes |= BIT(linked->id); - crtc_state->data_rate[linked->id] = - crtc_state->data_rate_y[plane->id]; - crtc_state->rel_data_rate[linked->id] = - crtc_state->rel_data_rate_y[plane->id]; - drm_dbg_kms(&dev_priv->drm, "UV plane [PLANE:%d:%s] using [PLANE:%d:%s] as Y plane\n", - plane->base.base.id, plane->base.name, - linked->base.base.id, linked->base.name); - - /* Copy parameters to Y plane */ - linked_state->ctl = plane_state->ctl | PLANE_CTL_YUV420_Y_PLANE; - linked_state->color_ctl = plane_state->color_ctl; - linked_state->view = plane_state->view; - linked_state->decrypt = plane_state->decrypt; - - intel_plane_copy_hw_state(linked_state, plane_state); - linked_state->uapi.src = plane_state->uapi.src; - linked_state->uapi.dst = plane_state->uapi.dst; - - if (icl_is_hdr_plane(display, plane->id)) { - if (linked->id == PLANE_7) - plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_7_ICL; - else if (linked->id == PLANE_6) - plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_6_ICL; - else if (linked->id == PLANE_5) - plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_5_RKL; - else if (linked->id == PLANE_4) - plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_4_RKL; - else - MISSING_CASE(linked->id); - } + link_nv12_planes(crtc_state, plane_state, linked_state); } return 0; From patchwork Wed Feb 12 16:43:28 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 13972120 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7CF30C02198 for ; Wed, 12 Feb 2025 16:43:58 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1ED5610E924; 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X-CSE-ConnectionGUID: 0X+PfRaqTnO2wSZALheyQg== X-CSE-MsgGUID: xuY3D0S3T5mUOCUW3f+IcA== X-IronPort-AV: E=McAfee;i="6700,10204,11343"; a="62515012" X-IronPort-AV: E=Sophos;i="6.13,280,1732608000"; d="scan'208";a="62515012" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Feb 2025 08:43:56 -0800 X-CSE-ConnectionGUID: sQnPcW5SSOGfoKL+d12cgg== X-CSE-MsgGUID: w7mdcTNWRsucCymEn3kyYQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,280,1732608000"; d="scan'208";a="113082665" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.74]) by fmviesa008.fm.intel.com with SMTP; 12 Feb 2025 08:43:55 -0800 Received: by stinkbox (sSMTP sendmail emulation); Wed, 12 Feb 2025 18:43:53 +0200 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Cc: Maarten Lankhorst Subject: [PATCH v2 08/10] drm/i915: Rename the variables in icl_check_nv12_planes() Date: Wed, 12 Feb 2025 18:43:28 +0200 Message-ID: <20250212164330.16891-9-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.45.3 In-Reply-To: <20250212164330.16891-1-ville.syrjala@linux.intel.com> References: <20250212164330.16891-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä All the this generic 'plane' vs 'linked' stuff is hard to follow. Rename the variables to use the y_plane vs. uv_plane terminology to make it clear which is which. v2: Rebase due to intel_display changes Reviewed-by: Maarten Lankhorst Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_display.c | 99 +++++++++++--------- 1 file changed, 54 insertions(+), 45 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 33e9b56cc5d5..b7f233e526d6 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -4411,50 +4411,56 @@ static bool check_single_encoder_cloning(struct intel_atomic_state *state, } static void link_nv12_planes(struct intel_crtc_state *crtc_state, - struct intel_plane_state *plane_state, - struct intel_plane_state *linked_state) + struct intel_plane_state *uv_plane_state, + struct intel_plane_state *y_plane_state) { - struct intel_display *display = to_intel_display(plane_state); - struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); - struct intel_plane *linked = to_intel_plane(linked_state->uapi.plane); + struct intel_display *display = to_intel_display(uv_plane_state); + struct intel_plane *uv_plane = to_intel_plane(uv_plane_state->uapi.plane); + struct intel_plane *y_plane = to_intel_plane(y_plane_state->uapi.plane); drm_dbg_kms(display->drm, "UV plane [PLANE:%d:%s] using Y plane [PLANE:%d:%s]\n", - plane->base.base.id, plane->base.name, - linked->base.base.id, linked->base.name); + uv_plane->base.base.id, uv_plane->base.name, + y_plane->base.base.id, y_plane->base.name); - plane_state->planar_linked_plane = linked; + uv_plane_state->planar_linked_plane = y_plane; - linked_state->is_y_plane = true; - linked_state->planar_linked_plane = plane; + y_plane_state->is_y_plane = true; + y_plane_state->planar_linked_plane = uv_plane; - crtc_state->enabled_planes |= BIT(linked->id); - crtc_state->active_planes |= BIT(linked->id); - crtc_state->update_planes |= BIT(linked->id); + crtc_state->enabled_planes |= BIT(y_plane->id); + crtc_state->active_planes |= BIT(y_plane->id); + crtc_state->update_planes |= BIT(y_plane->id); - crtc_state->data_rate[linked->id] = crtc_state->data_rate_y[plane->id]; - crtc_state->rel_data_rate[linked->id] = crtc_state->rel_data_rate_y[plane->id]; + crtc_state->data_rate[y_plane->id] = crtc_state->data_rate_y[uv_plane->id]; + crtc_state->rel_data_rate[y_plane->id] = crtc_state->rel_data_rate_y[uv_plane->id]; /* Copy parameters to Y plane */ - linked_state->ctl = plane_state->ctl | PLANE_CTL_YUV420_Y_PLANE; - linked_state->color_ctl = plane_state->color_ctl; - linked_state->view = plane_state->view; - linked_state->decrypt = plane_state->decrypt; + y_plane_state->ctl = uv_plane_state->ctl | PLANE_CTL_YUV420_Y_PLANE; + y_plane_state->color_ctl = uv_plane_state->color_ctl; + y_plane_state->view = uv_plane_state->view; + y_plane_state->decrypt = uv_plane_state->decrypt; - intel_plane_copy_hw_state(linked_state, plane_state); - linked_state->uapi.src = plane_state->uapi.src; - linked_state->uapi.dst = plane_state->uapi.dst; + intel_plane_copy_hw_state(y_plane_state, uv_plane_state); + y_plane_state->uapi.src = uv_plane_state->uapi.src; + y_plane_state->uapi.dst = uv_plane_state->uapi.dst; - if (icl_is_hdr_plane(display, plane->id)) { - if (linked->id == PLANE_7) - plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_7_ICL; - else if (linked->id == PLANE_6) - plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_6_ICL; - else if (linked->id == PLANE_5) - plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_5_RKL; - else if (linked->id == PLANE_4) - plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_4_RKL; - else - MISSING_CASE(linked->id); + if (icl_is_hdr_plane(display, uv_plane->id)) { + switch (y_plane->id) { + case PLANE_7: + uv_plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_7_ICL; + break; + case PLANE_6: + uv_plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_6_ICL; + break; + case PLANE_5: + uv_plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_5_RKL; + break; + case PLANE_4: + uv_plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_4_RKL; + break; + default: + MISSING_CASE(y_plane->id); + } } } @@ -4487,8 +4493,8 @@ static int icl_check_nv12_planes(struct intel_atomic_state *state, struct drm_i915_private *dev_priv = to_i915(state->base.dev); struct intel_crtc_state *crtc_state = intel_atomic_get_new_crtc_state(state, crtc); - struct intel_plane *plane, *linked; struct intel_plane_state *plane_state; + struct intel_plane *plane; int i; if (DISPLAY_VER(dev_priv) < 11) @@ -4510,27 +4516,30 @@ static int icl_check_nv12_planes(struct intel_atomic_state *state, return 0; for_each_new_intel_plane_in_state(state, plane, plane_state, i) { - struct intel_plane_state *linked_state = NULL; + struct intel_plane_state *y_plane_state = NULL; + struct intel_plane *y_plane; - if (plane->pipe != crtc->pipe || - !(crtc_state->nv12_planes & BIT(plane->id))) + if (plane->pipe != crtc->pipe) continue; - for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, linked) { - if (!icl_is_nv12_y_plane(display, linked->id)) + if ((crtc_state->nv12_planes & BIT(plane->id)) == 0) + continue; + + for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, y_plane) { + if (!icl_is_nv12_y_plane(display, y_plane->id)) continue; - if (crtc_state->active_planes & BIT(linked->id)) + if (crtc_state->active_planes & BIT(y_plane->id)) continue; - linked_state = intel_atomic_get_plane_state(state, linked); - if (IS_ERR(linked_state)) - return PTR_ERR(linked_state); + y_plane_state = intel_atomic_get_plane_state(state, y_plane); + if (IS_ERR(y_plane_state)) + return PTR_ERR(y_plane_state); break; } - if (!linked_state) { + if (!y_plane_state) { drm_dbg_kms(&dev_priv->drm, "[CRTC:%d:%s] need %d free Y planes for planar YUV\n", crtc->base.base.id, crtc->base.name, @@ -4538,7 +4547,7 @@ static int icl_check_nv12_planes(struct intel_atomic_state *state, return -EINVAL; } - link_nv12_planes(crtc_state, plane_state, linked_state); + link_nv12_planes(crtc_state, plane_state, y_plane_state); } return 0; From patchwork Wed Feb 12 16:43:29 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 13972121 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8A988C02198 for ; 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X-CSE-ConnectionGUID: c4r7ukpxRYyLbhaz/YrW1g== X-CSE-MsgGUID: unhG3MdvT5GEvauv9CQxaQ== X-IronPort-AV: E=McAfee;i="6700,10204,11343"; a="62515016" X-IronPort-AV: E=Sophos;i="6.13,280,1732608000"; d="scan'208";a="62515016" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Feb 2025 08:43:59 -0800 X-CSE-ConnectionGUID: ePtfr2P+REWpQK62qGNs1g== X-CSE-MsgGUID: jENKd3wOS+Oi91ZYTQiwng== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,280,1732608000"; d="scan'208";a="113082672" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.74]) by fmviesa008.fm.intel.com with SMTP; 12 Feb 2025 08:43:58 -0800 Received: by stinkbox (sSMTP sendmail emulation); Wed, 12 Feb 2025 18:43:56 +0200 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Cc: Maarten Lankhorst Subject: [PATCH v2 09/10] drm/i915: Move icl+ nv12 plane register mangling into skl_universal_plane.c Date: Wed, 12 Feb 2025 18:43:29 +0200 Message-ID: <20250212164330.16891-10-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.45.3 In-Reply-To: <20250212164330.16891-1-ville.syrjala@linux.intel.com> References: <20250212164330.16891-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä Try to keep all the low level skl+ universal plane register details inside skl_universal_plane.c instead of having them sprinkled all over the place. v2: Rebase due to intel_display changes Reviewed-by: Maarten Lankhorst Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_display.c | 30 ++++------------- .../drm/i915/display/skl_universal_plane.c | 32 +++++++++++++++++++ .../drm/i915/display/skl_universal_plane.h | 3 ++ 3 files changed, 41 insertions(+), 24 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index b7f233e526d6..9c7a8203f135 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -123,7 +123,6 @@ #include "intel_wm.h" #include "skl_scaler.h" #include "skl_universal_plane.h" -#include "skl_universal_plane_regs.h" #include "skl_watermark.h" #include "vlv_dpio_phy_regs.h" #include "vlv_dsi.h" @@ -4435,33 +4434,16 @@ static void link_nv12_planes(struct intel_crtc_state *crtc_state, crtc_state->rel_data_rate[y_plane->id] = crtc_state->rel_data_rate_y[uv_plane->id]; /* Copy parameters to Y plane */ - y_plane_state->ctl = uv_plane_state->ctl | PLANE_CTL_YUV420_Y_PLANE; - y_plane_state->color_ctl = uv_plane_state->color_ctl; - y_plane_state->view = uv_plane_state->view; - y_plane_state->decrypt = uv_plane_state->decrypt; - intel_plane_copy_hw_state(y_plane_state, uv_plane_state); y_plane_state->uapi.src = uv_plane_state->uapi.src; y_plane_state->uapi.dst = uv_plane_state->uapi.dst; - if (icl_is_hdr_plane(display, uv_plane->id)) { - switch (y_plane->id) { - case PLANE_7: - uv_plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_7_ICL; - break; - case PLANE_6: - uv_plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_6_ICL; - break; - case PLANE_5: - uv_plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_5_RKL; - break; - case PLANE_4: - uv_plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_4_RKL; - break; - default: - MISSING_CASE(y_plane->id); - } - } + y_plane_state->ctl = uv_plane_state->ctl; + y_plane_state->color_ctl = uv_plane_state->color_ctl; + y_plane_state->view = uv_plane_state->view; + y_plane_state->decrypt = uv_plane_state->decrypt; + + icl_link_nv12_planes(uv_plane_state, y_plane_state); } static void unlink_nv12_plane(struct intel_crtc_state *crtc_state, diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c index 4b8732ae65aa..110f66dd5cf0 100644 --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c @@ -2327,6 +2327,38 @@ static int skl_plane_check(struct intel_crtc_state *crtc_state, return 0; } +void icl_link_nv12_planes(struct intel_plane_state *uv_plane_state, + struct intel_plane_state *y_plane_state) +{ + struct intel_display *display = to_intel_display(uv_plane_state); + struct intel_plane *uv_plane = to_intel_plane(uv_plane_state->uapi.plane); + struct intel_plane *y_plane = to_intel_plane(y_plane_state->uapi.plane); + + drm_WARN_ON(display->drm, icl_is_nv12_y_plane(display, uv_plane->id)); + drm_WARN_ON(display->drm, !icl_is_nv12_y_plane(display, y_plane->id)); + + y_plane_state->ctl |= PLANE_CTL_YUV420_Y_PLANE; + + if (icl_is_hdr_plane(display, uv_plane->id)) { + switch (y_plane->id) { + case PLANE_7: + uv_plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_7_ICL; + break; + case PLANE_6: + uv_plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_6_ICL; + break; + case PLANE_5: + uv_plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_5_RKL; + break; + case PLANE_4: + uv_plane_state->cus_ctl |= PLANE_CUS_Y_PLANE_4_RKL; + break; + default: + MISSING_CASE(y_plane->id); + } + } +} + static enum intel_fbc_id skl_fbc_id_for_pipe(enum pipe pipe) { return pipe - PIPE_A + INTEL_FBC_A; diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.h b/drivers/gpu/drm/i915/display/skl_universal_plane.h index 0ce240e9ca5a..5e2451c21eeb 100644 --- a/drivers/gpu/drm/i915/display/skl_universal_plane.h +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.h @@ -32,6 +32,9 @@ int skl_format_to_fourcc(int format, bool rgb_order, bool alpha); int skl_calc_main_surface_offset(const struct intel_plane_state *plane_state, int *x, int *y, u32 *offset); +void icl_link_nv12_planes(struct intel_plane_state *uv_plane_state, + struct intel_plane_state *y_plane_state); + bool icl_is_nv12_y_plane(struct intel_display *display, enum plane_id plane_id); u8 icl_hdr_plane_mask(void); From patchwork Wed Feb 12 16:43:30 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 13972122 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 11523C02198 for ; Wed, 12 Feb 2025 16:44:06 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A70E610E92E; Wed, 12 Feb 2025 16:44:05 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; 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a="62515027" X-IronPort-AV: E=Sophos;i="6.13,280,1732608000"; d="scan'208";a="62515027" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Feb 2025 08:44:03 -0800 X-CSE-ConnectionGUID: 4X5QIfjzQvGdqUxveZ8JRQ== X-CSE-MsgGUID: nF8XExsOR+e09NIPOQ0Jfw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,280,1732608000"; d="scan'208";a="113082681" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.74]) by fmviesa008.fm.intel.com with SMTP; 12 Feb 2025 08:44:01 -0800 Received: by stinkbox (sSMTP sendmail emulation); Wed, 12 Feb 2025 18:43:59 +0200 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Cc: Maarten Lankhorst Subject: [PATCH v2 10/10] drm/i915: Relocate intel_atomic_check_planes() Date: Wed, 12 Feb 2025 18:43:30 +0200 Message-ID: <20250212164330.16891-11-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.45.3 In-Reply-To: <20250212164330.16891-1-ville.syrjala@linux.intel.com> References: <20250212164330.16891-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä Move all the intel_atomic_check_planes() machinery into intel_atomic_plane.c in order to declutter intel_display.c. v2: Rebase due to intel_display changes Reviewed-by: Maarten Lankhorst Signed-off-by: Ville Syrjälä --- .../gpu/drm/i915/display/intel_atomic_plane.c | 296 ++++++++++++++++++ .../gpu/drm/i915/display/intel_atomic_plane.h | 3 + drivers/gpu/drm/i915/display/intel_display.c | 295 ----------------- drivers/gpu/drm/i915/display/intel_display.h | 2 - 4 files changed, 299 insertions(+), 297 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c index 71263fbf0047..f58169763835 100644 --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c @@ -52,6 +52,7 @@ #include "intel_fb.h" #include "intel_fb_pin.h" #include "skl_scaler.h" +#include "skl_universal_plane.h" #include "skl_watermark.h" static void intel_plane_state_reset(struct intel_plane_state *plane_state, @@ -1223,3 +1224,298 @@ void intel_plane_init_cursor_vblank_work(struct intel_plane_state *old_plane_sta drm_vblank_work_init(&old_plane_state->unpin_work, old_plane_state->uapi.crtc, intel_cursor_unpin_work); } + +static void link_nv12_planes(struct intel_crtc_state *crtc_state, + struct intel_plane_state *uv_plane_state, + struct intel_plane_state *y_plane_state) +{ + struct intel_display *display = to_intel_display(uv_plane_state); + struct intel_plane *uv_plane = to_intel_plane(uv_plane_state->uapi.plane); + struct intel_plane *y_plane = to_intel_plane(y_plane_state->uapi.plane); + + drm_dbg_kms(display->drm, "UV plane [PLANE:%d:%s] using Y plane [PLANE:%d:%s]\n", + uv_plane->base.base.id, uv_plane->base.name, + y_plane->base.base.id, y_plane->base.name); + + uv_plane_state->planar_linked_plane = y_plane; + + y_plane_state->is_y_plane = true; + y_plane_state->planar_linked_plane = uv_plane; + + crtc_state->enabled_planes |= BIT(y_plane->id); + crtc_state->active_planes |= BIT(y_plane->id); + crtc_state->update_planes |= BIT(y_plane->id); + + crtc_state->data_rate[y_plane->id] = crtc_state->data_rate_y[uv_plane->id]; + crtc_state->rel_data_rate[y_plane->id] = crtc_state->rel_data_rate_y[uv_plane->id]; + + /* Copy parameters to Y plane */ + intel_plane_copy_hw_state(y_plane_state, uv_plane_state); + y_plane_state->uapi.src = uv_plane_state->uapi.src; + y_plane_state->uapi.dst = uv_plane_state->uapi.dst; + + y_plane_state->ctl = uv_plane_state->ctl; + y_plane_state->color_ctl = uv_plane_state->color_ctl; + y_plane_state->view = uv_plane_state->view; + y_plane_state->decrypt = uv_plane_state->decrypt; + + icl_link_nv12_planes(uv_plane_state, y_plane_state); +} + +static void unlink_nv12_plane(struct intel_crtc_state *crtc_state, + struct intel_plane_state *plane_state) +{ + struct intel_display *display = to_intel_display(plane_state); + struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); + + plane_state->planar_linked_plane = NULL; + + if (!plane_state->is_y_plane) + return; + + drm_WARN_ON(display->drm, plane_state->uapi.visible); + + plane_state->is_y_plane = false; + + crtc_state->enabled_planes &= ~BIT(plane->id); + crtc_state->active_planes &= ~BIT(plane->id); + crtc_state->update_planes |= BIT(plane->id); + crtc_state->data_rate[plane->id] = 0; + crtc_state->rel_data_rate[plane->id] = 0; +} + +static int icl_check_nv12_planes(struct intel_atomic_state *state, + struct intel_crtc *crtc) +{ + struct intel_display *display = to_intel_display(state); + struct drm_i915_private *dev_priv = to_i915(state->base.dev); + struct intel_crtc_state *crtc_state = + intel_atomic_get_new_crtc_state(state, crtc); + struct intel_plane_state *plane_state; + struct intel_plane *plane; + int i; + + if (DISPLAY_VER(dev_priv) < 11) + return 0; + + /* + * Destroy all old plane links and make the Y plane invisible + * in the crtc_state->active_planes mask. + */ + for_each_new_intel_plane_in_state(state, plane, plane_state, i) { + if (plane->pipe != crtc->pipe) + continue; + + if (plane_state->planar_linked_plane) + unlink_nv12_plane(crtc_state, plane_state); + } + + if (!crtc_state->nv12_planes) + return 0; + + for_each_new_intel_plane_in_state(state, plane, plane_state, i) { + struct intel_plane_state *y_plane_state = NULL; + struct intel_plane *y_plane; + + if (plane->pipe != crtc->pipe) + continue; + + if ((crtc_state->nv12_planes & BIT(plane->id)) == 0) + continue; + + for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, y_plane) { + if (!icl_is_nv12_y_plane(display, y_plane->id)) + continue; + + if (crtc_state->active_planes & BIT(y_plane->id)) + continue; + + y_plane_state = intel_atomic_get_plane_state(state, y_plane); + if (IS_ERR(y_plane_state)) + return PTR_ERR(y_plane_state); + + break; + } + + if (!y_plane_state) { + drm_dbg_kms(&dev_priv->drm, + "[CRTC:%d:%s] need %d free Y planes for planar YUV\n", + crtc->base.base.id, crtc->base.name, + hweight8(crtc_state->nv12_planes)); + return -EINVAL; + } + + link_nv12_planes(crtc_state, plane_state, y_plane_state); + } + + return 0; +} + +static int intel_crtc_add_planes_to_state(struct intel_atomic_state *state, + struct intel_crtc *crtc, + u8 plane_ids_mask) +{ + struct drm_i915_private *dev_priv = to_i915(state->base.dev); + struct intel_plane *plane; + + for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) { + struct intel_plane_state *plane_state; + + if ((plane_ids_mask & BIT(plane->id)) == 0) + continue; + + plane_state = intel_atomic_get_plane_state(state, plane); + if (IS_ERR(plane_state)) + return PTR_ERR(plane_state); + } + + return 0; +} + +int intel_atomic_add_affected_planes(struct intel_atomic_state *state, + struct intel_crtc *crtc) +{ + const struct intel_crtc_state *old_crtc_state = + intel_atomic_get_old_crtc_state(state, crtc); + const struct intel_crtc_state *new_crtc_state = + intel_atomic_get_new_crtc_state(state, crtc); + + return intel_crtc_add_planes_to_state(state, crtc, + old_crtc_state->enabled_planes | + new_crtc_state->enabled_planes); +} + +static bool active_planes_affects_min_cdclk(struct drm_i915_private *dev_priv) +{ + /* See {hsw,vlv,ivb}_plane_ratio() */ + return IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv) || + IS_CHERRYVIEW(dev_priv) || IS_VALLEYVIEW(dev_priv) || + IS_IVYBRIDGE(dev_priv); +} + +static u8 intel_joiner_affected_planes(struct intel_atomic_state *state, + u8 joined_pipes) +{ + const struct intel_plane_state *plane_state; + struct intel_plane *plane; + u8 affected_planes = 0; + int i; + + for_each_new_intel_plane_in_state(state, plane, plane_state, i) { + struct intel_plane *linked = plane_state->planar_linked_plane; + + if ((joined_pipes & BIT(plane->pipe)) == 0) + continue; + + affected_planes |= BIT(plane->id); + if (linked) + affected_planes |= BIT(linked->id); + } + + return affected_planes; +} + +static int intel_joiner_add_affected_planes(struct intel_atomic_state *state, + u8 joined_pipes) +{ + u8 prev_affected_planes, affected_planes = 0; + + /* + * We want all the joined pipes to have the same + * set of planes in the atomic state, to make sure + * state copying always works correctly, and the + * UV<->Y plane linkage is always up to date. + * Keep pulling planes in until we've determined + * the full set of affected planes. A bit complicated + * on account of each pipe being capable of selecting + * their own Y planes independently of the other pipes, + * and the selection being done from the set of + * inactive planes. + */ + do { + struct intel_crtc *crtc; + + for_each_intel_crtc_in_pipe_mask(state->base.dev, crtc, joined_pipes) { + int ret; + + ret = intel_crtc_add_planes_to_state(state, crtc, affected_planes); + if (ret) + return ret; + } + + prev_affected_planes = affected_planes; + affected_planes = intel_joiner_affected_planes(state, joined_pipes); + } while (affected_planes != prev_affected_planes); + + return 0; +} + +static int intel_add_affected_planes(struct intel_atomic_state *state) +{ + const struct intel_crtc_state *crtc_state; + struct intel_crtc *crtc; + int i; + + for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) { + int ret; + + ret = intel_joiner_add_affected_planes(state, intel_crtc_joined_pipe_mask(crtc_state)); + if (ret) + return ret; + } + + return 0; +} + +int intel_atomic_check_planes(struct intel_atomic_state *state) +{ + struct drm_i915_private *dev_priv = to_i915(state->base.dev); + struct intel_crtc_state *old_crtc_state, *new_crtc_state; + struct intel_plane_state __maybe_unused *plane_state; + struct intel_plane *plane; + struct intel_crtc *crtc; + int i, ret; + + ret = intel_add_affected_planes(state); + if (ret) + return ret; + + for_each_new_intel_plane_in_state(state, plane, plane_state, i) { + ret = intel_plane_atomic_check(state, plane); + if (ret) { + drm_dbg_atomic(&dev_priv->drm, + "[PLANE:%d:%s] atomic driver check failed\n", + plane->base.base.id, plane->base.name); + return ret; + } + } + + for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, + new_crtc_state, i) { + u8 old_active_planes, new_active_planes; + + ret = icl_check_nv12_planes(state, crtc); + if (ret) + return ret; + + /* + * On some platforms the number of active planes affects + * the planes' minimum cdclk calculation. Add such planes + * to the state before we compute the minimum cdclk. + */ + if (!active_planes_affects_min_cdclk(dev_priv)) + continue; + + old_active_planes = old_crtc_state->active_planes & ~BIT(PLANE_CURSOR); + new_active_planes = new_crtc_state->active_planes & ~BIT(PLANE_CURSOR); + + if (hweight8(old_active_planes) == hweight8(new_active_planes)) + continue; + + ret = intel_crtc_add_planes_to_state(state, crtc, new_active_planes); + if (ret) + return ret; + } + + return 0; +} diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.h b/drivers/gpu/drm/i915/display/intel_atomic_plane.h index fb87b3353ab0..9dc0b8468c2e 100644 --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.h +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.h @@ -81,5 +81,8 @@ void intel_plane_helper_add(struct intel_plane *plane); bool intel_plane_needs_physical(struct intel_plane *plane); void intel_plane_init_cursor_vblank_work(struct intel_plane_state *old_plane_state, struct intel_plane_state *new_plane_state); +int intel_atomic_add_affected_planes(struct intel_atomic_state *state, + struct intel_crtc *crtc); +int intel_atomic_check_planes(struct intel_atomic_state *state); #endif /* __INTEL_ATOMIC_PLANE_H__ */ diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 9c7a8203f135..a5f95750d6f3 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -4409,132 +4409,6 @@ static bool check_single_encoder_cloning(struct intel_atomic_state *state, return true; } -static void link_nv12_planes(struct intel_crtc_state *crtc_state, - struct intel_plane_state *uv_plane_state, - struct intel_plane_state *y_plane_state) -{ - struct intel_display *display = to_intel_display(uv_plane_state); - struct intel_plane *uv_plane = to_intel_plane(uv_plane_state->uapi.plane); - struct intel_plane *y_plane = to_intel_plane(y_plane_state->uapi.plane); - - drm_dbg_kms(display->drm, "UV plane [PLANE:%d:%s] using Y plane [PLANE:%d:%s]\n", - uv_plane->base.base.id, uv_plane->base.name, - y_plane->base.base.id, y_plane->base.name); - - uv_plane_state->planar_linked_plane = y_plane; - - y_plane_state->is_y_plane = true; - y_plane_state->planar_linked_plane = uv_plane; - - crtc_state->enabled_planes |= BIT(y_plane->id); - crtc_state->active_planes |= BIT(y_plane->id); - crtc_state->update_planes |= BIT(y_plane->id); - - crtc_state->data_rate[y_plane->id] = crtc_state->data_rate_y[uv_plane->id]; - crtc_state->rel_data_rate[y_plane->id] = crtc_state->rel_data_rate_y[uv_plane->id]; - - /* Copy parameters to Y plane */ - intel_plane_copy_hw_state(y_plane_state, uv_plane_state); - y_plane_state->uapi.src = uv_plane_state->uapi.src; - y_plane_state->uapi.dst = uv_plane_state->uapi.dst; - - y_plane_state->ctl = uv_plane_state->ctl; - y_plane_state->color_ctl = uv_plane_state->color_ctl; - y_plane_state->view = uv_plane_state->view; - y_plane_state->decrypt = uv_plane_state->decrypt; - - icl_link_nv12_planes(uv_plane_state, y_plane_state); -} - -static void unlink_nv12_plane(struct intel_crtc_state *crtc_state, - struct intel_plane_state *plane_state) -{ - struct intel_display *display = to_intel_display(plane_state); - struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); - - plane_state->planar_linked_plane = NULL; - - if (!plane_state->is_y_plane) - return; - - drm_WARN_ON(display->drm, plane_state->uapi.visible); - - plane_state->is_y_plane = false; - - crtc_state->enabled_planes &= ~BIT(plane->id); - crtc_state->active_planes &= ~BIT(plane->id); - crtc_state->update_planes |= BIT(plane->id); - crtc_state->data_rate[plane->id] = 0; - crtc_state->rel_data_rate[plane->id] = 0; -} - -static int icl_check_nv12_planes(struct intel_atomic_state *state, - struct intel_crtc *crtc) -{ - struct intel_display *display = to_intel_display(state); - struct drm_i915_private *dev_priv = to_i915(state->base.dev); - struct intel_crtc_state *crtc_state = - intel_atomic_get_new_crtc_state(state, crtc); - struct intel_plane_state *plane_state; - struct intel_plane *plane; - int i; - - if (DISPLAY_VER(dev_priv) < 11) - return 0; - - /* - * Destroy all old plane links and make the Y plane invisible - * in the crtc_state->active_planes mask. - */ - for_each_new_intel_plane_in_state(state, plane, plane_state, i) { - if (plane->pipe != crtc->pipe) - continue; - - if (plane_state->planar_linked_plane) - unlink_nv12_plane(crtc_state, plane_state); - } - - if (!crtc_state->nv12_planes) - return 0; - - for_each_new_intel_plane_in_state(state, plane, plane_state, i) { - struct intel_plane_state *y_plane_state = NULL; - struct intel_plane *y_plane; - - if (plane->pipe != crtc->pipe) - continue; - - if ((crtc_state->nv12_planes & BIT(plane->id)) == 0) - continue; - - for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, y_plane) { - if (!icl_is_nv12_y_plane(display, y_plane->id)) - continue; - - if (crtc_state->active_planes & BIT(y_plane->id)) - continue; - - y_plane_state = intel_atomic_get_plane_state(state, y_plane); - if (IS_ERR(y_plane_state)) - return PTR_ERR(y_plane_state); - - break; - } - - if (!y_plane_state) { - drm_dbg_kms(&dev_priv->drm, - "[CRTC:%d:%s] need %d free Y planes for planar YUV\n", - crtc->base.base.id, crtc->base.name, - hweight8(crtc_state->nv12_planes)); - return -EINVAL; - } - - link_nv12_planes(crtc_state, plane_state, y_plane_state); - } - - return 0; -} - static u16 hsw_linetime_wm(const struct intel_crtc_state *crtc_state) { const struct drm_display_mode *pipe_mode = @@ -6135,175 +6009,6 @@ static void intel_crtc_check_fastset(const struct intel_crtc_state *old_crtc_sta new_crtc_state->update_pipe = true; } -static int intel_crtc_add_planes_to_state(struct intel_atomic_state *state, - struct intel_crtc *crtc, - u8 plane_ids_mask) -{ - struct drm_i915_private *dev_priv = to_i915(state->base.dev); - struct intel_plane *plane; - - for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) { - struct intel_plane_state *plane_state; - - if ((plane_ids_mask & BIT(plane->id)) == 0) - continue; - - plane_state = intel_atomic_get_plane_state(state, plane); - if (IS_ERR(plane_state)) - return PTR_ERR(plane_state); - } - - return 0; -} - -int intel_atomic_add_affected_planes(struct intel_atomic_state *state, - struct intel_crtc *crtc) -{ - const struct intel_crtc_state *old_crtc_state = - intel_atomic_get_old_crtc_state(state, crtc); - const struct intel_crtc_state *new_crtc_state = - intel_atomic_get_new_crtc_state(state, crtc); - - return intel_crtc_add_planes_to_state(state, crtc, - old_crtc_state->enabled_planes | - new_crtc_state->enabled_planes); -} - -static bool active_planes_affects_min_cdclk(struct drm_i915_private *dev_priv) -{ - /* See {hsw,vlv,ivb}_plane_ratio() */ - return IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv) || - IS_CHERRYVIEW(dev_priv) || IS_VALLEYVIEW(dev_priv) || - IS_IVYBRIDGE(dev_priv); -} - -static u8 intel_joiner_affected_planes(struct intel_atomic_state *state, - u8 joined_pipes) -{ - const struct intel_plane_state *plane_state; - struct intel_plane *plane; - u8 affected_planes = 0; - int i; - - for_each_new_intel_plane_in_state(state, plane, plane_state, i) { - struct intel_plane *linked = plane_state->planar_linked_plane; - - if ((joined_pipes & BIT(plane->pipe)) == 0) - continue; - - affected_planes |= BIT(plane->id); - if (linked) - affected_planes |= BIT(linked->id); - } - - return affected_planes; -} - -static int intel_joiner_add_affected_planes(struct intel_atomic_state *state, - u8 joined_pipes) -{ - u8 prev_affected_planes, affected_planes = 0; - - /* - * We want all the joined pipes to have the same - * set of planes in the atomic state, to make sure - * state copying always works correctly, and the - * UV<->Y plane linkage is always up to date. - * Keep pulling planes in until we've determined - * the full set of affected planes. A bit complicated - * on account of each pipe being capable of selecting - * their own Y planes independently of the other pipes, - * and the selection being done from the set of - * inactive planes. - */ - do { - struct intel_crtc *crtc; - - for_each_intel_crtc_in_pipe_mask(state->base.dev, crtc, joined_pipes) { - int ret; - - ret = intel_crtc_add_planes_to_state(state, crtc, affected_planes); - if (ret) - return ret; - } - - prev_affected_planes = affected_planes; - affected_planes = intel_joiner_affected_planes(state, joined_pipes); - } while (affected_planes != prev_affected_planes); - - return 0; -} - -static int intel_add_affected_planes(struct intel_atomic_state *state) -{ - const struct intel_crtc_state *crtc_state; - struct intel_crtc *crtc; - int i; - - for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) { - int ret; - - ret = intel_joiner_add_affected_planes(state, intel_crtc_joined_pipe_mask(crtc_state)); - if (ret) - return ret; - } - - return 0; -} - -static int intel_atomic_check_planes(struct intel_atomic_state *state) -{ - struct drm_i915_private *dev_priv = to_i915(state->base.dev); - struct intel_crtc_state *old_crtc_state, *new_crtc_state; - struct intel_plane_state __maybe_unused *plane_state; - struct intel_plane *plane; - struct intel_crtc *crtc; - int i, ret; - - ret = intel_add_affected_planes(state); - if (ret) - return ret; - - for_each_new_intel_plane_in_state(state, plane, plane_state, i) { - ret = intel_plane_atomic_check(state, plane); - if (ret) { - drm_dbg_atomic(&dev_priv->drm, - "[PLANE:%d:%s] atomic driver check failed\n", - plane->base.base.id, plane->base.name); - return ret; - } - } - - for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, - new_crtc_state, i) { - u8 old_active_planes, new_active_planes; - - ret = icl_check_nv12_planes(state, crtc); - if (ret) - return ret; - - /* - * On some platforms the number of active planes affects - * the planes' minimum cdclk calculation. Add such planes - * to the state before we compute the minimum cdclk. - */ - if (!active_planes_affects_min_cdclk(dev_priv)) - continue; - - old_active_planes = old_crtc_state->active_planes & ~BIT(PLANE_CURSOR); - new_active_planes = new_crtc_state->active_planes & ~BIT(PLANE_CURSOR); - - if (hweight8(old_active_planes) == hweight8(new_active_planes)) - continue; - - ret = intel_crtc_add_planes_to_state(state, crtc, new_active_planes); - if (ret) - return ret; - } - - return 0; -} - static int intel_atomic_check_crtcs(struct intel_atomic_state *state) { struct intel_crtc_state __maybe_unused *crtc_state; diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h index e594492bade7..b550a0faa745 100644 --- a/drivers/gpu/drm/i915/display/intel_display.h +++ b/drivers/gpu/drm/i915/display/intel_display.h @@ -413,8 +413,6 @@ enum phy_fia { i) int intel_atomic_check(struct drm_device *dev, struct drm_atomic_state *state); -int intel_atomic_add_affected_planes(struct intel_atomic_state *state, - struct intel_crtc *crtc); u8 intel_calc_active_pipes(struct intel_atomic_state *state, u8 active_pipes); void intel_link_compute_m_n(u16 bpp, int nlanes,