From patchwork Fri Feb 14 09:56:07 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vikram Sharma X-Patchwork-Id: 13974701 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 725FD256C62; Fri, 14 Feb 2025 09:56:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739526998; cv=none; b=eQUrnu+YKx+8lgwnPPkCc3DZw/9BDw+++0JhjGv9EPgTEcDJ4qZ0lFMcfkd9LjSPUUbuVznoKDvwsykLBO/IroRG2c8asCNibzKvKN3PMya0oVgTcm09GOeYYd4cI5vNwJ86Z3nfXkNiYpR1qsRcQ6wNUC7epYEla0hlaviZfdE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739526998; c=relaxed/simple; bh=1YtLxRZ/epmhXabVS87WBT5Z2CL13eFOSRsTRbiDQHI=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=Z9mTxH4boiUKrOWvgmb3y2MxjY2xrL9+NGlK1dtA2UubOa+WHz9tJ5TdjRKkP6BD+swD9LzkVTLqLQmzPL2mbzrAe2jLxUB28PLV6Imw0eADzEDU7aRar6COctmUL8ej4w5Pr9gLe3r5RTJwS9N2hGWA9rAu0vIQMky9MfneraQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=D10dRUVb; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="D10dRUVb" Received: from pps.filterd (m0279868.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 51DNm48g011988; Fri, 14 Feb 2025 09:56:32 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= EVFTZ3tHwGipJxtFr/mKnTTFFuOtzasFKELqtmzQhKE=; b=D10dRUVbaOcjEUFv HawIlMYi9QVmlo9jjMOrreFwzzi8Ta2223zqHGOftx4x+WI7TJMXpIUOeV1SZsKT xaSJ3v/BjXGwAl2++emc0NjubylaHFF2HJqjjdx5SKXjybfDp/8hc+cUACzdXvgo WFU+EFWlpe1zyeNSt5bKEAYKCj0GVB1GH87opKUdxAT67D7pkdBeMopkWZ0xTrGi 1xwVQJoPY04C9BH1tbpGRgtmk3WqKYn/2sRdM7jNAe0wXgkHd9NvlOiFu73Wz2fy 4eSwOA+4srMPJuOrPdRl8NJ680ZUGdxtwfo8hlnX0n3OidAG/21bXERobSLgm6cx lTtK/A== Received: from nasanppmta01.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 44sfxwawc2-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 14 Feb 2025 09:56:32 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA01.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 51E9uV7o017550 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 14 Feb 2025 09:56:31 GMT Received: from hu-vikramsa-hyd.qualcomm.com (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Fri, 14 Feb 2025 01:56:28 -0800 From: Vikram Sharma To: , , CC: , , Subject: [PATCH v1 1/5] media: qcom: camss: Add qcs8300 compatible Date: Fri, 14 Feb 2025 15:26:07 +0530 Message-ID: <20250214095611.2498950-2-quic_vikramsa@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250214095611.2498950-1-quic_vikramsa@quicinc.com> References: <20250214095611.2498950-1-quic_vikramsa@quicinc.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: 6O0HyS9-ElDKRvC26XzQsK3GG2H5lETJ X-Proofpoint-GUID: 6O0HyS9-ElDKRvC26XzQsK3GG2H5lETJ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-14_04,2025-02-13_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 priorityscore=1501 lowpriorityscore=0 adultscore=0 mlxlogscore=997 mlxscore=0 impostorscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2501170000 definitions=main-2502140071 Add CAMSS_8300 enum, QCS8300 compatible and qcs8300 camss driver private data, the private data just include some basic information for now, later changes will enumerate with csiphy, tpg, csid and vfe resources. Signed-off-by: Vikram Sharma --- drivers/media/platform/qcom/camss/camss.c | 21 +++++++++++++++++++++ drivers/media/platform/qcom/camss/camss.h | 1 + 2 files changed, 22 insertions(+) diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c index f0d11298a7bd..1c0c3c019803 100644 --- a/drivers/media/platform/qcom/camss/camss.c +++ b/drivers/media/platform/qcom/camss/camss.c @@ -2847,6 +2847,19 @@ static const struct camss_subdev_resources vfe_res_8775p[] = { }, }; +static const struct resources_icc icc_res_qcs8300[] = { + { + .name = "ahb", + .icc_bw_tbl.avg = 38400, + .icc_bw_tbl.peak = 76800, + }, + { + .name = "hf_0", + .icc_bw_tbl.avg = 2097152, + .icc_bw_tbl.peak = 2097152, + }, +}; + static const struct resources_icc icc_res_sa8775p[] = { { .name = "ahb", @@ -3831,6 +3844,13 @@ static const struct camss_resources msm8996_resources = { .link_entities = camss_link_entities }; +static const struct camss_resources qcs8300_resources = { + .version = CAMSS_8300, + .pd_name = "top", + .icc_res = icc_res_qcs8300, + .icc_path_num = ARRAY_SIZE(icc_res_qcs8300), + .link_entities = camss_link_entities +}; static const struct camss_resources sa8775p_resources = { .version = CAMSS_8775P, @@ -3943,6 +3963,7 @@ static const struct of_device_id camss_dt_match[] = { { .compatible = "qcom,msm8916-camss", .data = &msm8916_resources }, { .compatible = "qcom,msm8953-camss", .data = &msm8953_resources }, { .compatible = "qcom,msm8996-camss", .data = &msm8996_resources }, + { .compatible = "qcom,qcs8300-camss", .data = &qcs8300_resources }, { .compatible = "qcom,sa8775p-camss", .data = &sa8775p_resources }, { .compatible = "qcom,sc7280-camss", .data = &sc7280_resources }, { .compatible = "qcom,sc8280xp-camss", .data = &sc8280xp_resources }, diff --git a/drivers/media/platform/qcom/camss/camss.h b/drivers/media/platform/qcom/camss/camss.h index d3efd8bff948..93b7c38dc8fb 100644 --- a/drivers/media/platform/qcom/camss/camss.h +++ b/drivers/media/platform/qcom/camss/camss.h @@ -84,6 +84,7 @@ enum camss_version { CAMSS_8x96, CAMSS_8250, CAMSS_8280XP, + CAMSS_8300, CAMSS_845, CAMSS_8550, CAMSS_8775P, From patchwork Fri Feb 14 09:56:08 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vikram Sharma X-Patchwork-Id: 13974702 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3A13B25A640; Fri, 14 Feb 2025 09:56:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739526999; cv=none; b=lykVUiqrViI62k9uX9Frsp8h9UJx/ysNYu8uRSKqhnZekFOsIXEiVCYugLj8QQSld7Oq4v63etu6nudJi0I1lovIGia/X3X3uRuKNYeXPvp5u9l5Thgle0uVqmTD6UST/cRqy3BvOsA6xhRTfg/SHHWj6wnCz9p1N/yZhQcXGNI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739526999; c=relaxed/simple; bh=cjRkm3uh/e//CfBttj9mAhGUBQTHG8t6ruCTx5IGxBM=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=XIBea+Q7EeCtnCZL3CVaaIRHFE0a+RomFwzkMnheYSeGn8YwB7+BNqJLRaoKER8R37Ioy5bxUILI45gO70PWdWrxiaNfkHvPMaGRaOiKF9C2EhFvilHwk/BFK7QUopUGzPviuxLVuu9P6lDtIDx81KWDXhWDBKa3kTtaHhAsc7Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=D0QD7XRy; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="D0QD7XRy" Received: from pps.filterd (m0279866.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 51E8s2dK028708; Fri, 14 Feb 2025 09:56:34 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= ZNjhAfW6/peszqKRsXRZ2D/Am9WCq21HAOCNWHy/qP8=; b=D0QD7XRyFmI20R4p 0pxAMbMOUvzt+ct8nW74qUNHyeHE9Qdy+MzRwwnUyMlnzc2rm8Jp/0UvNHEmQWUK gPUGsgLogs+QHWVUbE1PMqrTdL2wytKVFYLqHQLjniPrdLaM0cyr5WWHomhIX9Qx cd4YS/RoegCU5uwcprJk9xL0j4+o5rjQNY7YoWEu31HiFMy3Cm53mfxRs2GyuLlN hsLwu59o0TW8cEMGxhiYjcsJEuwGxnNH5sd9RSUOTqjYUnUBdKtj20JOcR0reMar ZiZ3YYfl2O0OQTSr3V8iSOHk5Zpbyz98oxAQwhq8bvhpV1QFGhg1yN0UEOJ8MTVo Iayadg== Received: from nasanppmta02.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 44sebnbatf-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 14 Feb 2025 09:56:34 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA02.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 51E9uXr2018189 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 14 Feb 2025 09:56:33 GMT Received: from hu-vikramsa-hyd.qualcomm.com (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Fri, 14 Feb 2025 01:56:31 -0800 From: Vikram Sharma To: , , CC: , , Subject: [PATCH v1 2/5] media: qcom: camss: Add support for CSIPHY QCS8300 Date: Fri, 14 Feb 2025 15:26:08 +0530 Message-ID: <20250214095611.2498950-3-quic_vikramsa@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250214095611.2498950-1-quic_vikramsa@quicinc.com> References: <20250214095611.2498950-1-quic_vikramsa@quicinc.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: N96OAEVjKgQyobXuCGkEq-YplMLIK_zR X-Proofpoint-ORIG-GUID: N96OAEVjKgQyobXuCGkEq-YplMLIK_zR X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-14_04,2025-02-13_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 spamscore=0 lowpriorityscore=0 clxscore=1015 mlxlogscore=997 phishscore=0 suspectscore=0 malwarescore=0 priorityscore=1501 adultscore=0 mlxscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2501170000 definitions=main-2502140071 Add support for CSIPHY found on QCS8300. Signed-off-by: Vikram Sharma --- .../qcom/camss/camss-csiphy-3ph-1-0.c | 2 + .../media/platform/qcom/camss/camss-csiphy.c | 5 ++ .../media/platform/qcom/camss/camss-csiphy.h | 1 + drivers/media/platform/qcom/camss/camss.c | 48 +++++++++++++++++++ 4 files changed, 56 insertions(+) diff --git a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c index b69c20b0544e..4f97beef168d 100644 --- a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c +++ b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c @@ -703,6 +703,7 @@ static bool csiphy_is_gen2(u32 version) case CAMSS_7280: case CAMSS_8250: case CAMSS_8280XP: + case CAMSS_8300: case CAMSS_845: case CAMSS_8550: case CAMSS_8775P: @@ -799,6 +800,7 @@ static int csiphy_init(struct csiphy_device *csiphy) regs->lane_array_size = ARRAY_SIZE(lane_regs_sm8550); regs->offset = 0x1000; break; + case CAMSS_8300: case CAMSS_8775P: regs->lane_regs = &lane_regs_sa8775p[0]; regs->lane_array_size = ARRAY_SIZE(lane_regs_sa8775p); diff --git a/drivers/media/platform/qcom/camss/camss-csiphy.c b/drivers/media/platform/qcom/camss/camss-csiphy.c index e07e871113d9..c462e0bd7ad0 100644 --- a/drivers/media/platform/qcom/camss/camss-csiphy.c +++ b/drivers/media/platform/qcom/camss/camss-csiphy.c @@ -103,6 +103,11 @@ const struct csiphy_formats csiphy_formats_8x96 = { .formats = formats_8x96 }; +const struct csiphy_formats csiphy_formats_qcs8300 = { + .nformats = ARRAY_SIZE(formats_sdm845), + .formats = formats_sdm845 +}; + const struct csiphy_formats csiphy_formats_sa8775p = { .nformats = ARRAY_SIZE(formats_sdm845), .formats = formats_sdm845 diff --git a/drivers/media/platform/qcom/camss/camss-csiphy.h b/drivers/media/platform/qcom/camss/camss-csiphy.h index 9f2e088b1e47..7cd2697d9d54 100644 --- a/drivers/media/platform/qcom/camss/camss-csiphy.h +++ b/drivers/media/platform/qcom/camss/camss-csiphy.h @@ -125,6 +125,7 @@ void msm_csiphy_unregister_entity(struct csiphy_device *csiphy); extern const struct csiphy_formats csiphy_formats_8x16; extern const struct csiphy_formats csiphy_formats_8x96; +extern const struct csiphy_formats csiphy_formats_qcs8300; extern const struct csiphy_formats csiphy_formats_sa8775p; extern const struct csiphy_formats csiphy_formats_sc7280; extern const struct csiphy_formats csiphy_formats_sdm845; diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c index 1c0c3c019803..108470a2e70f 100644 --- a/drivers/media/platform/qcom/camss/camss.c +++ b/drivers/media/platform/qcom/camss/camss.c @@ -2447,6 +2447,54 @@ static const struct resources_icc icc_res_sm8550[] = { }, }; +static const struct camss_subdev_resources csiphy_res_8300[] = { + /* CSIPHY0 */ + { + .regulators = { "vdd-csiphy-0p8-supply", + "vdd-csiphy-1p2-supply" }, + .clock = { "csiphy_rx", "csiphy0", "csiphy0_timer"}, + .clock_rate = { + { 400000000, 0, 400000000} + }, + .reg = { "csiphy0" }, + .interrupt = { "csiphy0" }, + .csiphy = { + .hw_ops = &csiphy_ops_3ph_1_0, + .formats = &csiphy_formats_qcs8300 + } + }, + /* CSIPHY1 */ + { + .regulators = { "vdd-csiphy-0p8-supply", + "vdd-csiphy-1p2-supply" }, + .clock = { "csiphy_rx", "csiphy1", "csiphy1_timer"}, + .clock_rate = { + { 400000000, 0, 400000000} + }, + .reg = { "csiphy1" }, + .interrupt = { "csiphy1" }, + .csiphy = { + .hw_ops = &csiphy_ops_3ph_1_0, + .formats = &csiphy_formats_qcs8300 + } + }, + /* CSIPHY2 */ + { + .regulators = { "vdd-csiphy-0p8-supply", + "vdd-csiphy-1p2-supply" }, + .clock = { "csiphy_rx", "csiphy2", "csiphy2_timer"}, + .clock_rate = { + { 400000000, 0, 400000000} + }, + .reg = { "csiphy2" }, + .interrupt = { "csiphy2" }, + .csiphy = { + .hw_ops = &csiphy_ops_3ph_1_0, + .formats = &csiphy_formats_qcs8300 + } + }, +}; + static const struct camss_subdev_resources csiphy_res_8775p[] = { /* CSIPHY0 */ { From patchwork Fri Feb 14 09:56:09 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vikram Sharma X-Patchwork-Id: 13974703 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4F47825E44D; Fri, 14 Feb 2025 09:56:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739527003; cv=none; b=XQBbEmTqIajO4wEBTEIC4VKnmYAXKnbFRervZeX91zvwovjqWoPgwzlyIjaWsGGU+zy0XQu4A+FkT0SOCZC1PUg+MUXqtYNeXUcBiDv4lrTIYDjeacQFPvUmK/wN8SWF2sfJ7uIsxHpJ1MAaqYouChrFZ7Dcfz60OpLSzZF8sds= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739527003; c=relaxed/simple; bh=KASLTUJAxkjCTJqirQvBCxVX+BLGaMhtV9SR/9tjhB4=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=Wa3u6/2cTEOmQcbaNcaHEWXmLXyoLb2SFaRTaxAbS93Vuo3Cwq5Wm3RXNxOPdhjk2avfEk5HD3PMpxcUqnKmzXFn/Kk3eQvgEXqr7uxEQDiE1dgvFq519tCcQbD+u2OswC0ma6oNZ/Q8WKKKxxRGYYXnDw37b6QDoJz33c0cxeY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=jIM+lhnL; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="jIM+lhnL" Received: from pps.filterd (m0279872.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 51E8NPpV021173; Fri, 14 Feb 2025 09:56:37 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= VUNsG6GmrtG49Qtky0lMGx6KGDhizVAs3aPqTzuONio=; b=jIM+lhnLeXNgT75K lwjBLYqRGORPEJXcbsOzW7rstvUeTOg+sGsx3jJIojjKrWVvawyfZe22ASq7tfnq XzUzt1dnZKFYvnkTSLXY1uh/FBt8TXll6FIH52bbEM02iBl0NtDPOiciEZYn1gRh zGRlzLhCtGajujWfPikF5gM5RlA9WiHaDm1lCvzrtIgHn+2jNNzazKjZwHUBuEH6 wQUumBYXR6ILcXt2AFXMTOjIgIYI0Pj9DOXwwIgqAC3BC4FXyEaTypweWuf/cXSW nwEuqFIW8Epe2Xe0CEZmb3S30RMAf0q0uXQee44vA4zg79KnR4N+VCUg7585LkM/ HWxpKg== Received: from nasanppmta04.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 44sdyxub9w-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 14 Feb 2025 09:56:37 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA04.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 51E9uakt000700 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 14 Feb 2025 09:56:36 GMT Received: from hu-vikramsa-hyd.qualcomm.com (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Fri, 14 Feb 2025 01:56:33 -0800 From: Vikram Sharma To: , , CC: , , Subject: [PATCH v1 3/5] media: qcom: camss: Add CSID support for QCS8300 Date: Fri, 14 Feb 2025 15:26:09 +0530 Message-ID: <20250214095611.2498950-4-quic_vikramsa@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250214095611.2498950-1-quic_vikramsa@quicinc.com> References: <20250214095611.2498950-1-quic_vikramsa@quicinc.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: VKfa27-iN99fG_z5t-87JQvuS5zF9agZ X-Proofpoint-GUID: VKfa27-iN99fG_z5t-87JQvuS5zF9agZ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-14_04,2025-02-13_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 mlxscore=0 spamscore=0 bulkscore=0 suspectscore=0 mlxlogscore=999 priorityscore=1501 clxscore=1015 lowpriorityscore=0 phishscore=0 impostorscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2501170000 definitions=main-2502140071 Add CSID support for QCS8300 soc. Signed-off-by: Vikram Sharma --- drivers/media/platform/qcom/camss/camss.c | 136 ++++++++++++++++++++++ 1 file changed, 136 insertions(+) diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c index 108470a2e70f..cf5f7d886c24 100644 --- a/drivers/media/platform/qcom/camss/camss.c +++ b/drivers/media/platform/qcom/camss/camss.c @@ -2229,6 +2229,10 @@ static const struct camss_subdev_resources csiphy_res_8550[] = { } }; +static const struct resources_wrapper csid_wrapper_res_qcs8300 = { + .reg = "csid_wrapper", +}; + static const struct resources_wrapper csid_wrapper_res_sa8775p = { .reg = "csid_wrapper", }; @@ -2495,6 +2499,138 @@ static const struct camss_subdev_resources csiphy_res_8300[] = { }, }; +static const struct camss_subdev_resources csid_res_8300[] = { + /* CSID0 */ + { + .regulators = {}, + .clock = { "csid", "csiphy_rx"}, + .clock_rate = { + { 400000000, 400000000}, + { 400000000, 400000000} + }, + .reg = { "csid0", "csid_top" }, + .interrupt = { "csid0" }, + .csid = { + .is_lite = false, + .hw_ops = &csid_ops_690, + .parent_dev_ops = &vfe_parent_dev_ops, + .formats = &csid_formats_gen2 + } + }, + /* CSID1 */ + { + .regulators = {}, + .clock = { "csid", "csiphy_rx"}, + .clock_rate = { + { 400000000, 400000000}, + { 400000000, 400000000} + }, + .reg = { "csid1", "csid_top" }, + .interrupt = { "csid1" }, + .csid = { + .is_lite = false, + .hw_ops = &csid_ops_690, + .parent_dev_ops = &vfe_parent_dev_ops, + .formats = &csid_formats_gen2 + } + }, + /* CSID2 (lite) */ + { + .regulators = {}, + .clock = { "cpas_ife_lite", "vfe_lite_ahb", + "vfe_lite_csid", "vfe_lite_cphy_rx", + "vfe_lite"}, + .clock_rate = { + { 0, 0, 400000000, 400000000, 0}, + { 0, 0, 400000000, 480000000, 0} + }, + .reg = { "csid_lite0" }, + .interrupt = { "csid-lite0" }, + .csid = { + .is_lite = true, + .hw_ops = &csid_ops_690, + .parent_dev_ops = &vfe_parent_dev_ops, + .formats = &csid_formats_gen2 + } + }, + /* CSID3 (lite) */ + { + .regulators = {}, + .clock = { "cpas_ife_lite", "vfe_lite_ahb", + "vfe_lite_csid", "vfe_lite_cphy_rx", + "vfe_lite"}, + .clock_rate = { + { 0, 0, 400000000, 400000000, 0}, + { 0, 0, 400000000, 480000000, 0} + }, + .reg = { "csid_lite1" }, + .interrupt = { "csid-lite1" }, + .csid = { + .is_lite = true, + .hw_ops = &csid_ops_690, + .parent_dev_ops = &vfe_parent_dev_ops, + .formats = &csid_formats_gen2 + } + }, + /* CSID4 (lite) */ + { + .regulators = {}, + .clock = { "cpas_ife_lite", "vfe_lite_ahb", + "vfe_lite_csid", "vfe_lite_cphy_rx", + "vfe_lite"}, + .clock_rate = { + { 0, 0, 400000000, 400000000, 0}, + { 0, 0, 400000000, 480000000, 0} + }, + .reg = { "csid_lite2" }, + .interrupt = { "csid-lite2" }, + .csid = { + .is_lite = true, + .hw_ops = &csid_ops_690, + .parent_dev_ops = &vfe_parent_dev_ops, + .formats = &csid_formats_gen2 + } + }, + /* CSID5 (lite) */ + { + .regulators = {}, + .clock = { "cpas_ife_lite", "vfe_lite_ahb", + "vfe_lite_csid", "vfe_lite_cphy_rx", + "vfe_lite"}, + .clock_rate = { + { 0, 0, 400000000, 400000000, 0}, + { 0, 0, 400000000, 480000000, 0} + }, + .reg = { "csid_lite3" }, + .interrupt = { "csid-lite3" }, + .csid = { + .is_lite = true, + .hw_ops = &csid_ops_690, + .parent_dev_ops = &vfe_parent_dev_ops, + .formats = &csid_formats_gen2 + } + }, + /* CSID6 (lite) */ + { + .regulators = {}, + .clock = { "cpas_ife_lite", "vfe_lite_ahb", + "vfe_lite_csid", "vfe_lite_cphy_rx", + "vfe_lite"}, + .clock_rate = { + { 0, 0, 400000000, 400000000, 0}, + { 0, 0, 400000000, 480000000, 0} + }, + .reg = { "csid_lite4" }, + .interrupt = { "csid-lite4" }, + .csid = { + .is_lite = true, + .hw_ops = &csid_ops_690, + .parent_dev_ops = &vfe_parent_dev_ops, + .formats = &csid_formats_gen2 + } + }, +}; + static const struct camss_subdev_resources csiphy_res_8775p[] = { /* CSIPHY0 */ { From patchwork Fri Feb 14 09:56:10 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vikram Sharma X-Patchwork-Id: 13974704 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2A60925A640; Fri, 14 Feb 2025 09:56:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739527005; cv=none; b=lR0zNIXXDkmHxalehoPd4Vz374n3nMGOAQGVQkE7XGAxyTmpDthC1bdgFe7ks7zbrwc+gED3daZzvOg+T4Zfzs5zWCtGkRSg2rFEuGCl13nIHMn8GZupW9W1kW5bkC9Igub1duns1SHNkBL6RuIzwOCajPifLJILSVT78rHXlKs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739527005; c=relaxed/simple; bh=qxJdwtA7pU+S5A1iqaEqRWcrkHdE7l/r67Xxt9y1obc=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=r+Wmnt9E53yHxNghvoOROI93XU2kmz6DDdRWKLJHGNHQ7selmZ8mpTep77diDB6H34xDlMaV/uqgzRmllBAK7ZYMiLXRGZKW5XMo3XkuWc1jloNfdScod3B6iDd2LdrBnPvcwAHcnTrEwgOMi7RvBy4qQfngjShXnUr0P1VIJiI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=FoGTJjPS; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="FoGTJjPS" Received: from pps.filterd (m0279868.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 51E0feG1011818; Fri, 14 Feb 2025 09:56:40 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= ZffzYoAveZ7U0OF0zdW/1AfVRzw3fehkfo72vyaiOBE=; b=FoGTJjPSnzGdhxGH UvUqFqj2M2qi1QnD/aDrFI/zCc3vNGdMGuuQTmGTr0Z+HSWU2oNGJNhj0/ta7GG4 UzFGr9tTY44sUxaFXjTiHPB0aFui6YzAMogoZs38azdtSjEwDRZqcZARurWUsWZE zWy4e+aAgKNfAunl3PB8mwHWPTQZLFvBlKJg3yMtYbpxY/fGL34inHgNGv8q13Uz lKur+KJPD4MUaQz25C4IFq6wDpGsRfHfhEvJqv7nww9J4N4jhMDAhuDpEmBYhYI5 LVC8OWgVlyDP/+IJY3eCw4mCgahvrS8cflKmVKLpnFueDVbVesAIxk3oV4zjqwIU TLePrg== Received: from nasanppmta01.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 44sfxwawd3-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 14 Feb 2025 09:56:39 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA01.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 51E9ucM6017632 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 14 Feb 2025 09:56:39 GMT Received: from hu-vikramsa-hyd.qualcomm.com (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Fri, 14 Feb 2025 01:56:36 -0800 From: Vikram Sharma To: , , CC: , , Subject: [PATCH v1 4/5] media: qcom: camss: Add VFE support for QCS8300 Date: Fri, 14 Feb 2025 15:26:10 +0530 Message-ID: <20250214095611.2498950-5-quic_vikramsa@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250214095611.2498950-1-quic_vikramsa@quicinc.com> References: <20250214095611.2498950-1-quic_vikramsa@quicinc.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: DKxTIlMvVlOledXezy3f9gm5zQn2BYSK X-Proofpoint-GUID: DKxTIlMvVlOledXezy3f9gm5zQn2BYSK X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-14_04,2025-02-13_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 priorityscore=1501 lowpriorityscore=0 adultscore=0 mlxlogscore=999 mlxscore=0 impostorscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2501170000 definitions=main-2502140071 Add support for VFE found on qcs8300. qcs8300 supports two full and five lite VFE. Signed-off-by: Vikram Sharma --- drivers/media/platform/qcom/camss/camss-vfe.c | 2 + drivers/media/platform/qcom/camss/camss.c | 180 ++++++++++++++++++ 2 files changed, 182 insertions(+) diff --git a/drivers/media/platform/qcom/camss/camss-vfe.c b/drivers/media/platform/qcom/camss/camss-vfe.c index 71857c68bbed..fbfecd1abb45 100644 --- a/drivers/media/platform/qcom/camss/camss-vfe.c +++ b/drivers/media/platform/qcom/camss/camss-vfe.c @@ -344,6 +344,7 @@ static u32 vfe_src_pad_code(struct vfe_line *line, u32 sink_code, case CAMSS_8x96: case CAMSS_8250: case CAMSS_8280XP: + case CAMSS_8300: case CAMSS_845: case CAMSS_8550: case CAMSS_8775P: @@ -1972,6 +1973,7 @@ static int vfe_bpl_align(struct vfe_device *vfe) case CAMSS_7280: case CAMSS_8250: case CAMSS_8280XP: + case CAMSS_8300: case CAMSS_845: case CAMSS_8550: case CAMSS_8775P: diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c index cf5f7d886c24..2ac3d8814b35 100644 --- a/drivers/media/platform/qcom/camss/camss.c +++ b/drivers/media/platform/qcom/camss/camss.c @@ -2631,6 +2631,186 @@ static const struct camss_subdev_resources csid_res_8300[] = { }, }; +static const struct camss_subdev_resources vfe_res_8300[] = { + /* VFE0 */ + { + .regulators = {}, + .clock = { "cpas_vfe0", "vfe0", "vfe0_fast_ahb", + "cpas_ahb", "gcc_axi_hf", "gcc_axi_sf", + "core_ahb", "cpas_fast_ahb_clk", "camnoc_axi", + "icp_ahb"}, + .clock_rate = { + { 0 }, + { 480000000 }, + { 300000000, 400000000 }, + { 300000000, 400000000 }, + { 0 }, + { 0 }, + { 0, 80000000 }, + { 300000000, 400000000 }, + { 400000000 }, + { 0 }, + }, + .reg = { "vfe0" }, + .interrupt = { "vfe0" }, + .vfe = { + .line_num = 3, + .is_lite = false, + .has_pd = false, + .pd_name = NULL, + .hw_ops = &vfe_ops_690, + .formats_rdi = &vfe_formats_rdi_845, + .formats_pix = &vfe_formats_pix_845 + } + }, + /* VFE1 */ + { + .regulators = {}, + .clock = { "cpas_vfe1", "vfe1", "vfe1_fast_ahb", + "cpas_ahb", "gcc_axi_hf", "gcc_axi_sf", + "core_ahb", "cpas_fast_ahb_clk", "camnoc_axi", + "icp_ahb"}, + .clock_rate = { + { 0 }, + { 480000000 }, + { 300000000, 400000000 }, + { 300000000, 400000000 }, + { 0 }, + { 0 }, + { 0, 80000000 }, + { 300000000, 400000000 }, + { 400000000 }, + { 0 }, + }, + .reg = { "vfe1" }, + .interrupt = { "vfe1" }, + .vfe = { + .line_num = 3, + .is_lite = false, + .has_pd = false, + .pd_name = NULL, + .hw_ops = &vfe_ops_690, + .formats_rdi = &vfe_formats_rdi_845, + .formats_pix = &vfe_formats_pix_845 + } + }, + /* VFE2 (lite) */ + { + .regulators = {}, + .clock = { "cpas_ife_lite", "vfe_lite_ahb", + "vfe_lite_csid", "vfe_lite_cphy_rx", + "vfe_lite"}, + .clock_rate = { + { 0, 0, 0, 0 }, + { 300000000, 400000000, 400000000, 400000000 }, + { 400000000, 400000000, 400000000, 400000000 }, + { 400000000, 400000000, 400000000, 400000000 }, + { 480000000, 600000000, 600000000, 600000000 }, + }, + .reg = { "vfe_lite0" }, + .interrupt = { "vfe-lite0" }, + .vfe = { + .line_num = 4, + .is_lite = true, + .hw_ops = &vfe_ops_690, + .formats_rdi = &vfe_formats_rdi_845, + .formats_pix = &vfe_formats_pix_845 + } + }, + /* VFE3 (lite) */ + { + .regulators = {}, + .clock = { "cpas_ife_lite", "vfe_lite_ahb", + "vfe_lite_csid", "vfe_lite_cphy_rx", + "vfe_lite"}, + .clock_rate = { + { 0, 0, 0, 0 }, + { 300000000, 400000000, 400000000, 400000000 }, + { 400000000, 400000000, 400000000, 400000000 }, + { 400000000, 400000000, 400000000, 400000000 }, + { 480000000, 600000000, 600000000, 600000000 }, + }, + .reg = { "vfe_lite1" }, + .interrupt = { "vfe-lite1" }, + .vfe = { + .line_num = 4, + .is_lite = true, + .hw_ops = &vfe_ops_690, + .formats_rdi = &vfe_formats_rdi_845, + .formats_pix = &vfe_formats_pix_845 + } + }, + /* VFE4 (lite) */ + { + .regulators = {}, + .clock = { "cpas_ife_lite", "vfe_lite_ahb", + "vfe_lite_csid", "vfe_lite_cphy_rx", + "vfe_lite"}, + .clock_rate = { + { 0, 0, 0, 0 }, + { 300000000, 400000000, 400000000, 400000000 }, + { 400000000, 400000000, 400000000, 400000000 }, + { 400000000, 400000000, 400000000, 400000000 }, + { 480000000, 600000000, 600000000, 600000000 }, + }, + .reg = { "vfe_lite2" }, + .interrupt = { "vfe-lite2" }, + .vfe = { + .line_num = 4, + .is_lite = true, + .hw_ops = &vfe_ops_690, + .formats_rdi = &vfe_formats_rdi_845, + .formats_pix = &vfe_formats_pix_845 + } + }, + /* VFE5 (lite) */ + { + .regulators = {}, + .clock = { "cpas_ife_lite", "vfe_lite_ahb", + "vfe_lite_csid", "vfe_lite_cphy_rx", + "vfe_lite"}, + .clock_rate = { + { 0, 0, 0, 0 }, + { 300000000, 400000000, 400000000, 400000000 }, + { 400000000, 400000000, 400000000, 400000000 }, + { 400000000, 400000000, 400000000, 400000000 }, + { 480000000, 600000000, 600000000, 600000000 }, + }, + .reg = { "vfe_lite3" }, + .interrupt = { "vfe-lite3" }, + .vfe = { + .line_num = 4, + .is_lite = true, + .hw_ops = &vfe_ops_690, + .formats_rdi = &vfe_formats_rdi_845, + .formats_pix = &vfe_formats_pix_845 + } + }, + /* VFE6 (lite) */ + { + .regulators = {}, + .clock = { "cpas_ife_lite", "vfe_lite_ahb", + "vfe_lite_csid", "vfe_lite_cphy_rx", + "vfe_lite"}, + .clock_rate = { + { 0, 0, 0, 0 }, + { 300000000, 400000000, 400000000, 400000000 }, + { 400000000, 400000000, 400000000, 400000000 }, + { 400000000, 400000000, 400000000, 400000000 }, + { 480000000, 600000000, 600000000, 600000000 }, + }, + .reg = { "vfe_lite4" }, + .interrupt = { "vfe-lite4" }, + .vfe = { + .line_num = 4, + .is_lite = true, + .hw_ops = &vfe_ops_690, + .formats_rdi = &vfe_formats_rdi_845, + .formats_pix = &vfe_formats_pix_845 + } + }, +}; + static const struct camss_subdev_resources csiphy_res_8775p[] = { /* CSIPHY0 */ { From patchwork Fri Feb 14 09:56:11 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vikram Sharma X-Patchwork-Id: 13974705 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B7F0E25A35E; Fri, 14 Feb 2025 09:56:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739527007; cv=none; b=h0vNAnpOVvuy7HD7pEixT4YTv5UJ4nW1Jivz9T3isCredy55lHth7ETvMAXjtXUay65vWlXQynWElmv5l/ippcu0D/FtbRUcorfWSkrHvrafaft6uwV17hNSNWRfCQ+cwk1jUnOJsJZWgnu0sEI5955bk24vnt+TeJzIRKo1zjI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739527007; c=relaxed/simple; bh=2LO0cXJZgVMVTgsRdZr9kQEfeyBkSEdO1XQGhXms6V8=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=nJbhV3lv+6DFzPjeYxibYWSerje4s5YzFYN1RgPahpOhATMaVBx/2z8DmM/smoyFBl6J0l+IsYEAqTXKFNex8xlVjHTOrgeFkUvpQqTojCsxJH93yMUhqV9ZsK0OSvgONRnxLnMVhkO5+wcfPgG5RVMSW9KeLRkpdjkKWasWZkg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=cG1dOifW; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="cG1dOifW" Received: from pps.filterd (m0279866.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 51E8R23d027806; Fri, 14 Feb 2025 09:56:42 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= rbWj2224SpWSWtxrztfF1M/84AOkSFaVl56P/yckdPo=; b=cG1dOifWdaRdjfjl ErgX9yD5Krbnr3fu2QCh0doKCb4lEyQRHxXJPnW51HYCzN45bOmDMDiWXa6epccY 7NLk10nHDYZj9nEXtw3uMSjHi4dnFf7FqQXjwkp3bEXy2NhUoWNMMumi6wLYAR7H RHyzEgu8x1nsvDc83GNEzzcVBT3e4idhM5ceKwXcjhO9Cnfyq2ugu8yM47LnNgZ2 bBJaAXK2WGJw/CylOt5OdIdj9uEleQzaq1BRLdCnVZ0g/kkOJTA0Iv8vcqN4OwDA rlv082t9tfIVYflX65qhXBFGoSq8bSzxHwsqQCeTNi8W34Jn5RkASqeCDool3URC YEGT7A== Received: from nasanppmta04.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 44sebnbau5-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 14 Feb 2025 09:56:42 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA04.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 51E9ufwc000791 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 14 Feb 2025 09:56:41 GMT Received: from hu-vikramsa-hyd.qualcomm.com (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Fri, 14 Feb 2025 01:56:39 -0800 From: Vikram Sharma To: , , CC: , , Subject: [PATCH v1 5/5] media: qcom: camss: Enumerate resources for QCS8300 Date: Fri, 14 Feb 2025 15:26:11 +0530 Message-ID: <20250214095611.2498950-6-quic_vikramsa@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250214095611.2498950-1-quic_vikramsa@quicinc.com> References: <20250214095611.2498950-1-quic_vikramsa@quicinc.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: OaMLSnJ5kDKdAXi-W_K49TtrHVZGwIzs X-Proofpoint-ORIG-GUID: OaMLSnJ5kDKdAXi-W_K49TtrHVZGwIzs X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-14_04,2025-02-13_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 spamscore=0 lowpriorityscore=0 clxscore=1015 mlxlogscore=999 phishscore=0 suspectscore=0 malwarescore=0 priorityscore=1501 adultscore=0 mlxscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2501170000 definitions=main-2502140071 Enumerate csiphy, csid and vfe resources for qcs8300. Signed-off-by: Vikram Sharma --- drivers/media/platform/qcom/camss/camss.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c index 2ac3d8814b35..cef1b0854eaa 100644 --- a/drivers/media/platform/qcom/camss/camss.c +++ b/drivers/media/platform/qcom/camss/camss.c @@ -4211,7 +4211,14 @@ static const struct camss_resources msm8996_resources = { static const struct camss_resources qcs8300_resources = { .version = CAMSS_8300, .pd_name = "top", + .csiphy_res = csiphy_res_8300, + .csid_res = csid_res_8300, + .csid_wrapper_res = &csid_wrapper_res_qcs8300, + .vfe_res = vfe_res_8300, .icc_res = icc_res_qcs8300, + .csiphy_num = ARRAY_SIZE(csiphy_res_8300), + .csid_num = ARRAY_SIZE(csid_res_8300), + .vfe_num = ARRAY_SIZE(vfe_res_8300), .icc_path_num = ARRAY_SIZE(icc_res_qcs8300), .link_entities = camss_link_entities };