From patchwork Sat Feb 15 01:20:30 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Christopherson X-Patchwork-Id: 13975874 Received: from mail-pj1-f73.google.com (mail-pj1-f73.google.com [209.85.216.73]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7301E42AA3 for ; Sat, 15 Feb 2025 01:20:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.216.73 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739582437; cv=none; b=V+Cc8TqMPAJhDuJq85PUNkQkwFuwAC8Xm29ghQY701cLZ91ucMyWuIs8/obrUcMKKxKV53tw0sHhuD6Xuu2Q8YXG73eYlfQqGkseFdilMPD4CMJvoDP3tRnE60CkbfXMJL/bGhjQM6uNyB8qXcfO3QtQspyeb8GWsZC+v56v3W4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739582437; c=relaxed/simple; bh=nBDkEijhjTx0/Pu6lukitnblAt1hyGlNtVkBkR73eYw=; h=Date:In-Reply-To:Mime-Version:References:Message-ID:Subject:From: To:Cc:Content-Type; b=S020cuYJB8yBnwVrJPjlRYtfmFfrDGmQMttpRCPyLMACAPv1jBuTqch1n5yIcmdDve7H9Z6bwtIaW7wwT/YYuUg47fPuN9fA0+pNHTWVnZ8wsevkf9EBmPs78wCG+BXGx7VZmSw7L/31M/qUZ7mdCDfIFMnTRWmv4WZTSkWsbgg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com; spf=pass smtp.mailfrom=flex--seanjc.bounces.google.com; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b=nNC+jorV; arc=none smtp.client-ip=209.85.216.73 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flex--seanjc.bounces.google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="nNC+jorV" Received: by mail-pj1-f73.google.com with SMTP id 98e67ed59e1d1-2fa440e16ddso5627969a91.0 for ; Fri, 14 Feb 2025 17:20:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1739582436; x=1740187236; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=+xfEszoj9UQOtWpt0zdSxIp6e0ZDqOvipnJKtKXbbyA=; b=nNC+jorV8W75R3ZIEGGeyVaRdzNOpDWSdQMJTDDmRc2gOW3Kwe9qPOrfWBKYCRVYvG RdXh1AeeWnQvFooC/c2AE0iUqJQn2Ao7yk6mv0VA/EAoa5LnZ1TmL2nq89P4mGgaG2w5 wcmo3mdj2MGfAlDViqK40Hvr8KZoL5rR6B33qRcFQXJnWR3JXsxnMLqgph0DHVAliWGw C77jqIY5kA0l8doa7jiKpQX1dPS4b4vdEo46eLafLC/43E79BDVggnVQEGA7/yRXZqxU v1yL3pZLTOzYQT9ut8vXioepjoc7aLyQvSxC5yRiKLU3iQ7FeErk9CRtx0PqUNUBdwY5 RkhA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1739582436; x=1740187236; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=+xfEszoj9UQOtWpt0zdSxIp6e0ZDqOvipnJKtKXbbyA=; b=W+yRmNy+ATU5ifpVH1tOxphVDNTVUOKCEHI9BaBXq4L1fv3PEwSkr19cg8K9d3jb+k 5umaowTALZ0opijweElLGJQDePYyCCxYfUFfaTOYLxk+hgizYat3Z31iQKjbHd0Oh5fL qKygiXqj1iXuvbNadPTapbnuwQ3cxkscTyWFWp6mFLpTe+vfWPN8Sm3V89prPeiHa5pZ 3aW9n1ZyEzRtQdCGGbspJoSTF3iIfmp+kTyNREoPA/bzPddn97m4zKhuBWasIgcrOg15 xr/ohnzwbKXPbr37Zm8NMmag+KGUEMIJDatehhuReoavwpALt7blM20JUDpDTGygSAJY 9vUA== X-Gm-Message-State: AOJu0YyJIsDqlq+l2VA8IeTVMsQVODLTuoMrJFuGCDHj/iCv8CRwgCpY LA9VRIrckmbWL9NBtHa7k9V4dRsnTRpMeVQWH2nDW37yHlcsoSF22jcEgJTZRdewPJOKyPnpKac sag== X-Google-Smtp-Source: AGHT+IGUiqRtrLVQdb+LLEWajt0HeiOol5P+hWUKTvFS25PD5dpD31JczvyHysIChMpInZIS7GnJDC1DR10= X-Received: from pjboh15.prod.google.com ([2002:a17:90b:3a4f:b0:2ef:95f4:4619]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a17:90b:17c1:b0:2f1:2fa5:1924 with SMTP id 98e67ed59e1d1-2fc41046e53mr1619435a91.26.1739582435734; Fri, 14 Feb 2025 17:20:35 -0800 (PST) Reply-To: Sean Christopherson Date: Fri, 14 Feb 2025 17:20:30 -0800 In-Reply-To: <20250215012032.1206409-1-seanjc@google.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20250215012032.1206409-1-seanjc@google.com> X-Mailer: git-send-email 2.48.1.601.g30ceb7b040-goog Message-ID: <20250215012032.1206409-2-seanjc@google.com> Subject: [kvm-unit-tests PATCH 1/3] x86: Make per-CPU stacks page-aligned From: Sean Christopherson To: Paolo Bonzini Cc: kvm@vger.kernel.org, Sean Christopherson Align the per-CPU stacks, and by extension, the per-CPU data area to page boundaries so that when things go sideways, it's at least somewhat obvious that a test overran its stack. E.g. as is, stacks often start at the *bottom* of a page, and so it looks like they're always broken because they immediately split a page. Signed-off-by: Sean Christopherson --- x86/cstart.S | 3 +-- x86/cstart64.S | 3 +-- 2 files changed, 2 insertions(+), 4 deletions(-) diff --git a/x86/cstart.S b/x86/cstart.S index ceee58f9..df3458fe 100644 --- a/x86/cstart.S +++ b/x86/cstart.S @@ -8,9 +8,8 @@ ipi_vector = 0x20 max_cpus = MAX_TEST_CPUS .bss - +.align 4096 . = . + 4096 * max_cpus - .align 16 stacktop: .data diff --git a/x86/cstart64.S b/x86/cstart64.S index 4dff1102..bafb2017 100644 --- a/x86/cstart64.S +++ b/x86/cstart64.S @@ -6,9 +6,8 @@ ipi_vector = 0x20 max_cpus = MAX_TEST_CPUS .bss - +.align 4096 . = . + 4096 * max_cpus - .align 16 stacktop: .data From patchwork Sat Feb 15 01:20:31 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Christopherson X-Patchwork-Id: 13975875 Received: from mail-pj1-f74.google.com (mail-pj1-f74.google.com [209.85.216.74]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E64737CF16 for ; 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Fri, 14 Feb 2025 17:20:37 -0800 (PST) Reply-To: Sean Christopherson Date: Fri, 14 Feb 2025 17:20:31 -0800 In-Reply-To: <20250215012032.1206409-1-seanjc@google.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20250215012032.1206409-1-seanjc@google.com> X-Mailer: git-send-email 2.48.1.601.g30ceb7b040-goog Message-ID: <20250215012032.1206409-3-seanjc@google.com> Subject: [kvm-unit-tests PATCH 2/3] x86: Add a macro for the size of the per-CPU stack/data area From: Sean Christopherson To: Paolo Bonzini Cc: kvm@vger.kernel.org, Sean Christopherson Add a macro to define the size of the per-CPU stack/data area so that it's somewhat possible to make sense of the madness. Signed-off-by: Sean Christopherson --- lib/x86/apic-defs.h | 6 +++--- lib/x86/setup.c | 2 +- lib/x86/smp.c | 2 +- x86/cstart.S | 7 ++++--- x86/cstart64.S | 5 +++-- x86/trampolines.S | 7 +++++-- 6 files changed, 17 insertions(+), 12 deletions(-) diff --git a/lib/x86/apic-defs.h b/lib/x86/apic-defs.h index 4db73da2..fde1db38 100644 --- a/lib/x86/apic-defs.h +++ b/lib/x86/apic-defs.h @@ -2,11 +2,11 @@ #define _X86_APIC_DEFS_H_ /* - * Abuse this header file to hold the number of max-cpus, making it available - * both in C and ASM + * Abuse this header file to hold the number of max-cpus and the size of the + * per-CPU stack/data area, making them available both in C and ASM. */ - #define MAX_TEST_CPUS (255) +#define PER_CPU_SIZE (4096) /* * Constants for various Intel APICs. (local APIC, IOAPIC, etc.) diff --git a/lib/x86/setup.c b/lib/x86/setup.c index d509a248..b4b7fec0 100644 --- a/lib/x86/setup.c +++ b/lib/x86/setup.c @@ -146,7 +146,7 @@ unsigned long setup_tss(u8 *stacktop) set_gdt_entry(TSS_MAIN + id * 8, (unsigned long)tss_entry, 0xffff, 0x89, 0); set_gdt_entry(TSS_MAIN + MAX_TEST_CPUS * 8 + id * 8, - (unsigned long)stacktop - 4096, 0xfffff, 0x93, 0xc0); + (unsigned long)stacktop - PER_CPU_SIZE, 0xfffff, 0x93, 0xc0); return TSS_MAIN + id * 8; } diff --git a/lib/x86/smp.c b/lib/x86/smp.c index e297016c..9706072a 100644 --- a/lib/x86/smp.c +++ b/lib/x86/smp.c @@ -273,7 +273,7 @@ void bringup_aps(void) setup_rm_gdt(); #ifdef CONFIG_EFI - smp_stacktop = ((u64) (&stacktop)) - PAGE_SIZE; + smp_stacktop = ((u64) (&stacktop)) - PER_CPU_SIZE; #endif /* INIT */ diff --git a/x86/cstart.S b/x86/cstart.S index df3458fe..2e396e52 100644 --- a/x86/cstart.S +++ b/x86/cstart.S @@ -5,11 +5,12 @@ ipi_vector = 0x20 +per_cpu_size = PER_CPU_SIZE max_cpus = MAX_TEST_CPUS .bss .align 4096 - . = . + 4096 * max_cpus + . = . + PER_CPU_SIZE * max_cpus stacktop: .data @@ -81,7 +82,7 @@ prepare_32: mov %eax, %cr0 ret -smp_stacktop: .long stacktop - 4096 +smp_stacktop: .long stacktop - per_cpu_size save_id: movl $(APIC_DEFAULT_PHYS_BASE + APIC_ID), %eax @@ -92,7 +93,7 @@ save_id: ap_start32: setup_segments - mov $-4096, %esp + mov $-per_cpu_size, %esp lock xaddl %esp, smp_stacktop setup_tr_and_percpu call prepare_32 diff --git a/x86/cstart64.S b/x86/cstart64.S index bafb2017..a9db65ce 100644 --- a/x86/cstart64.S +++ b/x86/cstart64.S @@ -3,11 +3,12 @@ ipi_vector = 0x20 +per_cpu_size = PER_CPU_SIZE max_cpus = MAX_TEST_CPUS .bss .align 4096 - . = . + 4096 * max_cpus + . = . + PER_CPU_SIZE * max_cpus stacktop: .data @@ -91,7 +92,7 @@ switch_to_5level: call enter_long_mode jmpl $8, $lvl5 -smp_stacktop: .long stacktop - 4096 +smp_stacktop: .long stacktop - per_cpu_size .align 16 diff --git a/x86/trampolines.S b/x86/trampolines.S index 6a3df9c1..02713157 100644 --- a/x86/trampolines.S +++ b/x86/trampolines.S @@ -2,6 +2,9 @@ * Common bootstrapping code to transition from 16-bit to 32-bit code, and to * transition from 32-bit to 64-bit code (x86-64 only) */ +#include "apic-defs.h" + +per_cpu_size = PER_CPU_SIZE /* EFI provides it's own SIPI sequence to handle relocation. */ #ifndef CONFIG_EFI @@ -56,7 +59,7 @@ rm_trampoline_end: MSR_GS_BASE = 0xc0000101 .macro setup_percpu_area - lea -4096(%esp), %eax + lea -per_cpu_size(%esp), %eax mov $0, %edx mov $MSR_GS_BASE, %ecx wrmsr @@ -116,7 +119,7 @@ ap_start32: setup_segments load_absolute_addr $smp_stacktop, %edx - mov $-4096, %esp + mov $-per_cpu_size, %esp lock xaddl %esp, (%edx) setup_percpu_area From patchwork Sat Feb 15 01:20:32 2025 Content-Type: text/plain; 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Fri, 14 Feb 2025 17:20:38 -0800 (PST) Reply-To: Sean Christopherson Date: Fri, 14 Feb 2025 17:20:32 -0800 In-Reply-To: <20250215012032.1206409-1-seanjc@google.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20250215012032.1206409-1-seanjc@google.com> X-Mailer: git-send-email 2.48.1.601.g30ceb7b040-goog Message-ID: <20250215012032.1206409-4-seanjc@google.com> Subject: [kvm-unit-tests PATCH 3/3] x86: Increase per-CPU stack/data area to 12KiB From: Sean Christopherson To: Paolo Bonzini Cc: kvm@vger.kernel.org, Sean Christopherson Increase the size of the per-CPU stack/data area from one page to three, i.e. from 4KiB to 12KiB. KVM-Unit-Tests currently places the per-CPU data at the bottom of the stack page, i.e. the stack "page" is actually a page minus the size of the per-CPU area. And of course there's no guard page or buffer in between the two, and so overflowing the stack clobbers per-CPU data and sends tests into the weeds in weird ways. Punt on less awful infrastructure, and settle for fixing the most egregious problem of tests having less than 4KiB of stack to work with. Signed-off-by: Sean Christopherson --- lib/x86/apic-defs.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/lib/x86/apic-defs.h b/lib/x86/apic-defs.h index fde1db38..5a1dff3a 100644 --- a/lib/x86/apic-defs.h +++ b/lib/x86/apic-defs.h @@ -3,10 +3,11 @@ /* * Abuse this header file to hold the number of max-cpus and the size of the - * per-CPU stack/data area, making them available both in C and ASM. + * per-CPU stack/data area, making them available both in C and ASM. One page + * for per-CPU, and two pages for the stack (plus some buffer in-between). */ #define MAX_TEST_CPUS (255) -#define PER_CPU_SIZE (4096) +#define PER_CPU_SIZE (3 * 4096) /* * Constants for various Intel APICs. (local APIC, IOAPIC, etc.)