From patchwork Sun Feb 16 18:32:00 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Walklin X-Patchwork-Id: 13976635 Received: from fhigh-b4-smtp.messagingengine.com (fhigh-b4-smtp.messagingengine.com [202.12.124.155]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 470854C80; Sun, 16 Feb 2025 18:35:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=202.12.124.155 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739730952; cv=none; b=IZUwr66swz2Yp084hAd9feKJeqzSrSE6BkziKtQh7zCNRA91bwr4eelCV1daI7v3rruz53sJqvvJEK7FFJzNLydvMMVWkHDLzm7GwfuOsvYqpAG74ObkSIW6tjT0dHGwT24WLQorPNY4JV/jR7UnbSqClgOlmRJUPkS8p0iciKU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739730952; c=relaxed/simple; bh=fghv2jcR5WF+wEohYcG7O8yEObk1xs2lk1kf1iC8kuo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=UiHO55mKx7ZZf4q4Bqax2qsKLla2/stn+8Lq/cTqt2Y1ySBM6xyrBNfI724mt1/mX/yqvx3NsH0PBAC6zoTB4UgN4OEylrOdRXh/JEr6ydifT5htIaDgGFmKUxnhgDDbOLgCPj5EItlTZq04xsKpFwFRXE/X0ysUvy4WG+tzD40= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com; spf=pass smtp.mailfrom=testtoast.com; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b=Tf7buCnF; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b=Xx9gnwJu; arc=none smtp.client-ip=202.12.124.155 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=testtoast.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b="Tf7buCnF"; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="Xx9gnwJu" Received: from phl-compute-04.internal (phl-compute-04.phl.internal [10.202.2.44]) by mailfhigh.stl.internal (Postfix) with ESMTP id 9B1F125400E3; Sun, 16 Feb 2025 13:35:47 -0500 (EST) Received: from phl-mailfrontend-02 ([10.202.2.163]) by phl-compute-04.internal (MEProxy); Sun, 16 Feb 2025 13:35:48 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=testtoast.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm3; t=1739730947; x= 1739817347; bh=oCv7Nw4cxeILjr/gqRsALtNFefeEHiqf5aAWTZSsDw0=; b=T f7buCnFnjoGSOy/U/E/Oxmki30lq1dfbvlmwFGNCEA0a4X+zeVLn+ghISrz/n6fK vQLcWa09SlZvgk1zMpAL1O551WgKne3pxVzpfBjGMX413gHt7T6RrjoniF2Zox+g UEfq4+A3IPevPsXOtV6Pmkaz+5mpeo4ztEX5JEiaNM37E2ZL0ZQIDm3y9R+hM80H QPTBoIEW0SRQVi/j1r3EB8OhIMPRQziIJYQwXGVn4qyRmEXyxtt9HI3RnodpleSP TSk4VIZO++kz7yDIxAAhoUK3xdRI4Au7WWshSaDmMwk99duPU/XPMByjzE4hyEJv yizd7i3rsVS+GVPjOTBFw== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-sender :x-me-sender:x-sasl-enc; s=fm3; t=1739730947; x=1739817347; bh=o Cv7Nw4cxeILjr/gqRsALtNFefeEHiqf5aAWTZSsDw0=; b=Xx9gnwJu/X29PMxGL FSmNvF2zn+SHsZ2fMChRnaEnQkoyWISi/paQsGicT5coV9/w3faXM/WLr3alIfMO NrPZiPdFSwWLYJGuArevk/tZbshvoRUForYLYNWm2zT+7hNtcGzYbVSQFHn6/2g8 EwxjzPATT9/hAEEfSUPhbU/Ig88ss5fWcN+hKg0aUNHwSFltmaB83J9Ngvp7RNlW f1dzUfJRhilzCf9erybbVNzatlpAYRvSRc2PpVEImtKJ1BN4Sv0eKP6J+TLO+UVZ nD0ZEVS1bA81ayhr3iX/52uPUQvs5izBHd3hpxN89IBgQuA8MFeilQ4GOtz4v5b4 H5cOg== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeefvddrtddtgdehiedvtdcutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpggftfghnshhusghstghrihgsvgdp uffrtefokffrpgfnqfghnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivg hnthhsucdlqddutddtmdenucfjughrpefhvfevufffkffojghfggfgsedtkeertdertddt necuhfhrohhmpefthigrnhcuhggrlhhklhhinhcuoehrhigrnhesthgvshhtthhorghsth drtghomheqnecuggftrfgrthhtvghrnhepffehieffgedtgfffjeetveegfeekleeileek veeuteffteetudffveegieeiheetnecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrg hmpehmrghilhhfrhhomheprhihrghnsehtvghsthhtohgrshhtrdgtohhmpdhnsggprhgt phhtthhopedvgedpmhhouggvpehsmhhtphhouhhtpdhrtghpthhtohepmhhrihhprghrug eskhgvrhhnvghlrdhorhhgpdhrtghpthhtohepfigvnhhssegtshhivgdrohhrghdprhgt phhtthhopehmrggrrhhtvghnrdhlrghnkhhhohhrshhtsehlihhnuhigrdhinhhtvghlrd gtohhmpdhrtghpthhtohepthiiihhmmhgvrhhmrghnnhesshhushgvrdguvgdprhgtphht thhopegrihhrlhhivggusehgmhgrihhlrdgtohhmpdhrtghpthhtohepuggrnhhivghlse hffhiflhhlrdgthhdprhgtphhtthhopehjvghrnhgvjhdrshhkrhgrsggvtgesghhmrghi lhdrtghomhdprhgtphhtthhopehsrghmuhgvlhesshhhohhllhgrnhgurdhorhhgpdhrtg hpthhtoheprhhosghhsehkvghrnhgvlhdrohhrgh X-ME-Proxy: Feedback-ID: idc0145fc:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Sun, 16 Feb 2025 13:35:40 -0500 (EST) From: Ryan Walklin To: Maxime Ripard , Chen-Yu Tsai , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Daniel Vetter , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: Andre Przywara , Chris Morgan , Hironori KIKUCHI , Philippe Simons , Dmitry Baryshkov , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Ryan Walklin Subject: [PATCH v7 01/27] drm: sun4i: de2/de3: Change CSC argument Date: Mon, 17 Feb 2025 07:32:00 +1300 Message-ID: <20250216183524.12095-2-ryan@testtoast.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250216183524.12095-1-ryan@testtoast.com> References: <20250216183524.12095-1-ryan@testtoast.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Jernej Skrabec Currently, CSC module takes care only for converting YUV to RGB. However, DE3 is more suited to work in YUV color space. Change CSC mode argument to format type to be more neutral. New argument only tells layer format type and doesn't imply output type. This commit doesn't make any functional change. Signed-off-by: Jernej Skrabec Signed-off-by: Ryan Walklin Reviewed-by: Andre Przywara --- Changelog v5..v6: - Rename format enum from format_type to sun8i_format_type --- drivers/gpu/drm/sun4i/sun8i_csc.c | 22 +++++++++++----------- drivers/gpu/drm/sun4i/sun8i_csc.h | 10 +++++----- drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 16 ++++++++-------- 3 files changed, 24 insertions(+), 24 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun8i_csc.c b/drivers/gpu/drm/sun4i/sun8i_csc.c index 58480d8e4f704..a96de701c3304 100644 --- a/drivers/gpu/drm/sun4i/sun8i_csc.c +++ b/drivers/gpu/drm/sun4i/sun8i_csc.c @@ -108,7 +108,7 @@ static const u32 yuv2rgb_de3[2][3][12] = { }; static void sun8i_csc_set_coefficients(struct regmap *map, u32 base, - enum sun8i_csc_mode mode, + enum sun8i_format_type fmt_type, enum drm_color_encoding encoding, enum drm_color_range range) { @@ -118,12 +118,12 @@ static void sun8i_csc_set_coefficients(struct regmap *map, u32 base, table = yuv2rgb[range][encoding]; - switch (mode) { - case SUN8I_CSC_MODE_YUV2RGB: + switch (fmt_type) { + case FORMAT_TYPE_YUV: base_reg = SUN8I_CSC_COEFF(base, 0); regmap_bulk_write(map, base_reg, table, 12); break; - case SUN8I_CSC_MODE_YVU2RGB: + case FORMAT_TYPE_YVU: for (i = 0; i < 12; i++) { if ((i & 3) == 1) base_reg = SUN8I_CSC_COEFF(base, i + 1); @@ -141,7 +141,7 @@ static void sun8i_csc_set_coefficients(struct regmap *map, u32 base, } static void sun8i_de3_ccsc_set_coefficients(struct regmap *map, int layer, - enum sun8i_csc_mode mode, + enum sun8i_format_type fmt_type, enum drm_color_encoding encoding, enum drm_color_range range) { @@ -151,12 +151,12 @@ static void sun8i_de3_ccsc_set_coefficients(struct regmap *map, int layer, table = yuv2rgb_de3[range][encoding]; - switch (mode) { - case SUN8I_CSC_MODE_YUV2RGB: + switch (fmt_type) { + case FORMAT_TYPE_YUV: addr = SUN50I_MIXER_BLEND_CSC_COEFF(DE3_BLD_BASE, layer, 0); regmap_bulk_write(map, addr, table, 12); break; - case SUN8I_CSC_MODE_YVU2RGB: + case FORMAT_TYPE_YVU: for (i = 0; i < 12; i++) { if ((i & 3) == 1) addr = SUN50I_MIXER_BLEND_CSC_COEFF(DE3_BLD_BASE, @@ -206,7 +206,7 @@ static void sun8i_de3_ccsc_enable(struct regmap *map, int layer, bool enable) } void sun8i_csc_set_ccsc_coefficients(struct sun8i_mixer *mixer, int layer, - enum sun8i_csc_mode mode, + enum sun8i_format_type fmt_type, enum drm_color_encoding encoding, enum drm_color_range range) { @@ -214,14 +214,14 @@ void sun8i_csc_set_ccsc_coefficients(struct sun8i_mixer *mixer, int layer, if (mixer->cfg->is_de3) { sun8i_de3_ccsc_set_coefficients(mixer->engine.regs, layer, - mode, encoding, range); + fmt_type, encoding, range); return; } base = ccsc_base[mixer->cfg->ccsc][layer]; sun8i_csc_set_coefficients(mixer->engine.regs, base, - mode, encoding, range); + fmt_type, encoding, range); } void sun8i_csc_enable_ccsc(struct sun8i_mixer *mixer, int layer, bool enable) diff --git a/drivers/gpu/drm/sun4i/sun8i_csc.h b/drivers/gpu/drm/sun4i/sun8i_csc.h index 828b86fd0cabb..e35e0ac951022 100644 --- a/drivers/gpu/drm/sun4i/sun8i_csc.h +++ b/drivers/gpu/drm/sun4i/sun8i_csc.h @@ -22,14 +22,14 @@ struct sun8i_mixer; #define SUN8I_CSC_CTRL_EN BIT(0) -enum sun8i_csc_mode { - SUN8I_CSC_MODE_OFF, - SUN8I_CSC_MODE_YUV2RGB, - SUN8I_CSC_MODE_YVU2RGB, +enum sun8i_format_type { + FORMAT_TYPE_RGB, + FORMAT_TYPE_YUV, + FORMAT_TYPE_YVU, }; void sun8i_csc_set_ccsc_coefficients(struct sun8i_mixer *mixer, int layer, - enum sun8i_csc_mode mode, + enum sun8i_format_type fmt_type, enum drm_color_encoding encoding, enum drm_color_range range); void sun8i_csc_enable_ccsc(struct sun8i_mixer *mixer, int layer, bool enable); diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c index 9c09d9c08496d..8a80934e928fe 100644 --- a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c +++ b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c @@ -193,19 +193,19 @@ static int sun8i_vi_layer_update_coord(struct sun8i_mixer *mixer, int channel, return 0; } -static u32 sun8i_vi_layer_get_csc_mode(const struct drm_format_info *format) +static u32 sun8i_vi_layer_get_format_type(const struct drm_format_info *format) { if (!format->is_yuv) - return SUN8I_CSC_MODE_OFF; + return FORMAT_TYPE_RGB; switch (format->format) { case DRM_FORMAT_YVU411: case DRM_FORMAT_YVU420: case DRM_FORMAT_YVU422: case DRM_FORMAT_YVU444: - return SUN8I_CSC_MODE_YVU2RGB; + return FORMAT_TYPE_YVU; default: - return SUN8I_CSC_MODE_YUV2RGB; + return FORMAT_TYPE_YUV; } } @@ -213,7 +213,7 @@ static int sun8i_vi_layer_update_formats(struct sun8i_mixer *mixer, int channel, int overlay, struct drm_plane *plane) { struct drm_plane_state *state = plane->state; - u32 val, ch_base, csc_mode, hw_fmt; + u32 val, ch_base, fmt_type, hw_fmt; const struct drm_format_info *fmt; int ret; @@ -231,9 +231,9 @@ static int sun8i_vi_layer_update_formats(struct sun8i_mixer *mixer, int channel, SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, overlay), SUN8I_MIXER_CHAN_VI_LAYER_ATTR_FBFMT_MASK, val); - csc_mode = sun8i_vi_layer_get_csc_mode(fmt); - if (csc_mode != SUN8I_CSC_MODE_OFF) { - sun8i_csc_set_ccsc_coefficients(mixer, channel, csc_mode, + fmt_type = sun8i_vi_layer_get_format_type(fmt); + if (fmt_type != FORMAT_TYPE_RGB) { + sun8i_csc_set_ccsc_coefficients(mixer, channel, fmt_type, state->color_encoding, state->color_range); sun8i_csc_enable_ccsc(mixer, channel, true); From patchwork Sun Feb 16 18:36:02 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Walklin X-Patchwork-Id: 13976636 Received: from fhigh-b4-smtp.messagingengine.com (fhigh-b4-smtp.messagingengine.com [202.12.124.155]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F177A1993A3; Sun, 16 Feb 2025 18:37:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=202.12.124.155 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739731057; cv=none; b=A6h/RV5+mGEpDqswLUGLV1q4Gj4m4H/izKlDJEcP6PULOO7JWfz34JxGEoJ9uqNvkaLq2I+A0xbMVHt2R39SfBACkaCik9/qiVxo5cug/HZXNG0p/8PO/mO7HbD+yT+m7BLJYjeZ8HyeM6HZSgUHU3zAQ8kj7E8MLW343gsnQnc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739731057; c=relaxed/simple; bh=yp3Sc1O34hN0hjQNQlpxxkHDYoxC5SprmcypZIBfuZM=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=X+kfX2YT7D55qAozk7l280TDruAbnJ58itqnfTGMnM4Rstk/Bd1zV1GvZEf5ZAKPZCEtN406JwrQvp3pTbavXrxmCrsr6i0QD+6ukOXqWBM0eOfSiTNEce5IQGYzxbVgR8gmh6p1Aaj6xspdr/tkhMiHUK3mWgmrfR9yh6yXTuQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com; spf=pass smtp.mailfrom=testtoast.com; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b=oCyZz038; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b=F/IfmLEb; arc=none smtp.client-ip=202.12.124.155 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=testtoast.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b="oCyZz038"; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="F/IfmLEb" Received: from phl-compute-06.internal (phl-compute-06.phl.internal [10.202.2.46]) by mailfhigh.stl.internal (Postfix) with ESMTP id 44B9C2540111; Sun, 16 Feb 2025 13:37:34 -0500 (EST) Received: from phl-mailfrontend-01 ([10.202.2.162]) by phl-compute-06.internal (MEProxy); Sun, 16 Feb 2025 13:37:34 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=testtoast.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:message-id:mime-version:reply-to:subject :subject:to:to; s=fm3; t=1739731054; x=1739817454; bh=HVDSqb0E38 /RlDHOZVHlNbvC0eTf8DhCXGhraZbrLrE=; b=oCyZz038/tm3Zd+AVAdqHDRRlc 4vnvcpnTUgi51g4Bv4msf6wL41h5V9OnSgrdzog/GY4VZ3KooMmLVwDROnrLvSlX 6k//Dprgd3lb4/B76EZvY/6pWuyEzzE6beX++9u+CbAUrqyviq34ogCtJndAl0Jj wv6PBmOXpGAvUujDa0G5kHv6jxArehAhLeWawFJean7J+QxMxSxdI9BIvZqBlegV 8NIw6amIhFLP/MUiBa9ouJSwVUGU2XTKC9uGA/TC/cf2B+KC1APA4HCv/YpMc7s/ EEa4MuVNVIxv85ZFtUoDtWenjj+hUxAjsjhYsbHeew6iCQ4CaOn5RYBS5oxQ== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:message-id:mime-version:reply-to:subject:subject:to :to:x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s=fm3; t= 1739731054; x=1739817454; bh=HVDSqb0E38/RlDHOZVHlNbvC0eTf8DhCXGh raZbrLrE=; b=F/IfmLEbb3rCnhx0CmFU6GGY7uo79mX+JS2ZPaKw5AHTXa/7IRX 9H9eTSi4Ap3f1FsbViWcsVQqkk3kx2ljUa0soGq+o/FB98U0/Xfh8XOpKFNL0FyU ttpXqY/AKDBjSNloB47VtqYKh12LWl6ADMbyMQzQdkfhcHpkpm4Q5VnsS9vx8NSI zQ3D8/Dw7M9AZXFmyw9XUu+GI6bnHeZA96Wn8DxDyQPp7UJqqYYMJUvGDx7dwYrw hPrH36Xl7D2AZ1SsJAR5h6ZfJbGZIlpwj0xrqnWGfctlopEPYqi753e7al51APvH H+3i8ygq3IG2r2CHCady1uU9eTby7Bmaw3A== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeefvddrtddtgdehiedvtdcutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpggftfghnshhusghstghrihgsvgdp uffrtefokffrpgfnqfghnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivg hnthhsucdlqddutddtmdenucfjughrpefhvfevufffkffoggfgsedtkeertdertddtnecu hfhrohhmpefthigrnhcuhggrlhhklhhinhcuoehrhigrnhesthgvshhtthhorghsthdrtg homheqnecuggftrfgrthhtvghrnhepuddvueduueegtdeuffetveevgeehhedvhfefuddu veekgffgfedtheegtefhhfffnecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpe hmrghilhhfrhhomheprhihrghnsehtvghsthhtohgrshhtrdgtohhmpdhnsggprhgtphht thhopedvgedpmhhouggvpehsmhhtphhouhhtpdhrtghpthhtohepmhhrihhprghrugeskh gvrhhnvghlrdhorhhgpdhrtghpthhtohepfigvnhhssegtshhivgdrohhrghdprhgtphht thhopehmrggrrhhtvghnrdhlrghnkhhhohhrshhtsehlihhnuhigrdhinhhtvghlrdgtoh hmpdhrtghpthhtohepthiiihhmmhgvrhhmrghnnhesshhushgvrdguvgdprhgtphhtthho pegrihhrlhhivggusehgmhgrihhlrdgtohhmpdhrtghpthhtohepuggrnhhivghlsehffh iflhhlrdgthhdprhgtphhtthhopehjvghrnhgvjhdrshhkrhgrsggvtgesghhmrghilhdr tghomhdprhgtphhtthhopehsrghmuhgvlhesshhhohhllhgrnhgurdhorhhgpdhrtghpth htoheprhhosghhsehkvghrnhgvlhdrohhrgh X-ME-Proxy: Feedback-ID: idc0145fc:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Sun, 16 Feb 2025 13:37:27 -0500 (EST) From: Ryan Walklin To: Maxime Ripard , Chen-Yu Tsai , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Daniel Vetter , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: Andre Przywara , Chris Morgan , Hironori KIKUCHI , Philippe Simons , Dmitry Baryshkov , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Ryan Walklin Subject: [PATCH v7 02/27] drm: sun4i: de2/de3: Merge CSC functions into one Date: Mon, 17 Feb 2025 07:36:02 +1300 Message-ID: <20250216183710.8443-3-ryan@testtoast.com> X-Mailer: git-send-email 2.48.1 Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Jernej Skrabec At the moment the colour space conversion is handled by two functions: one to setup the conversion parameters, and another one to enable the conversion. Merging both into one gives more flexibility for upcoming extensions to support whole YUV pipelines, in the DE33. Signed-off-by: Jernej Skrabec Signed-off-by: Ryan Walklin Reviewed-by: Andre Przywara --- drivers/gpu/drm/sun4i/sun8i_csc.c | 89 ++++++++++---------------- drivers/gpu/drm/sun4i/sun8i_csc.h | 9 ++- drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 11 +--- 3 files changed, 40 insertions(+), 69 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun8i_csc.c b/drivers/gpu/drm/sun4i/sun8i_csc.c index a96de701c3304..5606912f92de5 100644 --- a/drivers/gpu/drm/sun4i/sun8i_csc.c +++ b/drivers/gpu/drm/sun4i/sun8i_csc.c @@ -107,23 +107,28 @@ static const u32 yuv2rgb_de3[2][3][12] = { }, }; -static void sun8i_csc_set_coefficients(struct regmap *map, u32 base, - enum sun8i_format_type fmt_type, - enum drm_color_encoding encoding, - enum drm_color_range range) +static void sun8i_csc_setup(struct regmap *map, u32 base, + enum sun8i_format_type fmt_type, + enum drm_color_encoding encoding, + enum drm_color_range range) { + u32 base_reg, val; const u32 *table; - u32 base_reg; int i; table = yuv2rgb[range][encoding]; switch (fmt_type) { + case FORMAT_TYPE_RGB: + val = 0; + break; case FORMAT_TYPE_YUV: + val = SUN8I_CSC_CTRL_EN; base_reg = SUN8I_CSC_COEFF(base, 0); regmap_bulk_write(map, base_reg, table, 12); break; case FORMAT_TYPE_YVU: + val = SUN8I_CSC_CTRL_EN; for (i = 0; i < 12; i++) { if ((i & 3) == 1) base_reg = SUN8I_CSC_COEFF(base, i + 1); @@ -135,28 +140,37 @@ static void sun8i_csc_set_coefficients(struct regmap *map, u32 base, } break; default: + val = 0; DRM_WARN("Wrong CSC mode specified.\n"); return; } + + regmap_write(map, SUN8I_CSC_CTRL(base), val); } -static void sun8i_de3_ccsc_set_coefficients(struct regmap *map, int layer, - enum sun8i_format_type fmt_type, - enum drm_color_encoding encoding, - enum drm_color_range range) +static void sun8i_de3_ccsc_setup(struct regmap *map, int layer, + enum sun8i_format_type fmt_type, + enum drm_color_encoding encoding, + enum drm_color_range range) { + u32 addr, val, mask; const u32 *table; - u32 addr; int i; + mask = SUN50I_MIXER_BLEND_CSC_CTL_EN(layer); table = yuv2rgb_de3[range][encoding]; switch (fmt_type) { + case FORMAT_TYPE_RGB: + val = 0; + break; case FORMAT_TYPE_YUV: + val = mask; addr = SUN50I_MIXER_BLEND_CSC_COEFF(DE3_BLD_BASE, layer, 0); regmap_bulk_write(map, addr, table, 12); break; case FORMAT_TYPE_YVU: + val = mask; for (i = 0; i < 12; i++) { if ((i & 3) == 1) addr = SUN50I_MIXER_BLEND_CSC_COEFF(DE3_BLD_BASE, @@ -173,67 +187,30 @@ static void sun8i_de3_ccsc_set_coefficients(struct regmap *map, int layer, } break; default: + val = 0; DRM_WARN("Wrong CSC mode specified.\n"); return; } -} - -static void sun8i_csc_enable(struct regmap *map, u32 base, bool enable) -{ - u32 val; - - if (enable) - val = SUN8I_CSC_CTRL_EN; - else - val = 0; - - regmap_update_bits(map, SUN8I_CSC_CTRL(base), SUN8I_CSC_CTRL_EN, val); -} - -static void sun8i_de3_ccsc_enable(struct regmap *map, int layer, bool enable) -{ - u32 val, mask; - - mask = SUN50I_MIXER_BLEND_CSC_CTL_EN(layer); - - if (enable) - val = mask; - else - val = 0; regmap_update_bits(map, SUN50I_MIXER_BLEND_CSC_CTL(DE3_BLD_BASE), mask, val); } -void sun8i_csc_set_ccsc_coefficients(struct sun8i_mixer *mixer, int layer, - enum sun8i_format_type fmt_type, - enum drm_color_encoding encoding, - enum drm_color_range range) -{ - u32 base; - - if (mixer->cfg->is_de3) { - sun8i_de3_ccsc_set_coefficients(mixer->engine.regs, layer, - fmt_type, encoding, range); - return; - } - - base = ccsc_base[mixer->cfg->ccsc][layer]; - - sun8i_csc_set_coefficients(mixer->engine.regs, base, - fmt_type, encoding, range); -} - -void sun8i_csc_enable_ccsc(struct sun8i_mixer *mixer, int layer, bool enable) +void sun8i_csc_set_ccsc(struct sun8i_mixer *mixer, int layer, + enum sun8i_format_type fmt_type, + enum drm_color_encoding encoding, + enum drm_color_range range) { u32 base; if (mixer->cfg->is_de3) { - sun8i_de3_ccsc_enable(mixer->engine.regs, layer, enable); + sun8i_de3_ccsc_setup(mixer->engine.regs, layer, + fmt_type, encoding, range); return; } base = ccsc_base[mixer->cfg->ccsc][layer]; - sun8i_csc_enable(mixer->engine.regs, base, enable); + sun8i_csc_setup(mixer->engine.regs, base, + fmt_type, encoding, range); } diff --git a/drivers/gpu/drm/sun4i/sun8i_csc.h b/drivers/gpu/drm/sun4i/sun8i_csc.h index e35e0ac951022..9b63c92782f56 100644 --- a/drivers/gpu/drm/sun4i/sun8i_csc.h +++ b/drivers/gpu/drm/sun4i/sun8i_csc.h @@ -28,10 +28,9 @@ enum sun8i_format_type { FORMAT_TYPE_YVU, }; -void sun8i_csc_set_ccsc_coefficients(struct sun8i_mixer *mixer, int layer, - enum sun8i_format_type fmt_type, - enum drm_color_encoding encoding, - enum drm_color_range range); -void sun8i_csc_enable_ccsc(struct sun8i_mixer *mixer, int layer, bool enable); +void sun8i_csc_set_ccsc(struct sun8i_mixer *mixer, int layer, + enum sun8i_format_type fmt_type, + enum drm_color_encoding encoding, + enum drm_color_range range); #endif diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c index 8a80934e928fe..f3a5329351caa 100644 --- a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c +++ b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c @@ -232,14 +232,9 @@ static int sun8i_vi_layer_update_formats(struct sun8i_mixer *mixer, int channel, SUN8I_MIXER_CHAN_VI_LAYER_ATTR_FBFMT_MASK, val); fmt_type = sun8i_vi_layer_get_format_type(fmt); - if (fmt_type != FORMAT_TYPE_RGB) { - sun8i_csc_set_ccsc_coefficients(mixer, channel, fmt_type, - state->color_encoding, - state->color_range); - sun8i_csc_enable_ccsc(mixer, channel, true); - } else { - sun8i_csc_enable_ccsc(mixer, channel, false); - } + sun8i_csc_set_ccsc(mixer, channel, fmt_type, + state->color_encoding, + state->color_range); if (!fmt->is_yuv) val = SUN8I_MIXER_CHAN_VI_LAYER_ATTR_RGB_MODE; From patchwork Sun Feb 16 18:36:03 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Walklin X-Patchwork-Id: 13976637 Received: from fhigh-b4-smtp.messagingengine.com (fhigh-b4-smtp.messagingengine.com [202.12.124.155]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5D1D34C80; Sun, 16 Feb 2025 18:37:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=202.12.124.155 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739731065; cv=none; b=XMjXaKyGbi6gVYFDSbMbfiNWC1iY15z6T8M7yPrbSPuxVv2jC+lj+Nwn5tWOonctKHqzEwoeGBzMiXV+mglBDg3sOPL8pt3Tm3UP7/LdWAp8ib5aWSvyCqOzaVWjF8uYbFiP64ngl3XaGj59HYfF3wL1r1AuErWmm6Ndde3y8og= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739731065; c=relaxed/simple; bh=hUwygZnC9A8r9r/TTvs8ZuAjeZ3XO7HxLrkm5w8mu8M=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=cLqNdpxmA3vsKT0MVynJL1ThXHwKkYeKd0kE9Dzm3QAo3UTvuPRQgqNnCb+rTX5UkD0IE+qgYGd7FtqpPmtobFzMZXRRv8MUCbq5VlZDcNeHtX9oV+NzGhKl3G/Ic5ZWN4Y7KzxBezw7gaAhdgf7t3BjwaQMTtWbg8KRTtMo4Uk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com; spf=pass smtp.mailfrom=testtoast.com; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b=JohbovOm; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b=j3bkwhz1; arc=none smtp.client-ip=202.12.124.155 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=testtoast.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b="JohbovOm"; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="j3bkwhz1" Received: from phl-compute-11.internal (phl-compute-11.phl.internal [10.202.2.51]) by mailfhigh.stl.internal (Postfix) with ESMTP id E488A2540111; Sun, 16 Feb 2025 13:37:42 -0500 (EST) Received: from phl-mailfrontend-01 ([10.202.2.162]) by phl-compute-11.internal (MEProxy); Sun, 16 Feb 2025 13:37:43 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=testtoast.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm3; t=1739731062; x= 1739817462; bh=FL9di+CvqAZswVCEURGPLsHq/4BTefiQImdfVOi0kBA=; b=J ohbovOmKR0JJodXr3o6ARQcZu5yOWm/UW/1n0Mbg1ZiHt8e3sAt3mxG4rOKH/Upq PcoahRtKbN9BOKSurVvzB64tlfpr8f5NuYGHDT+QKfZFE7h2CysFlGisBtCvRrZu aljiM3nAR3VK3kspvmwdvxQ2AyeP2lNg7pLNPuGs/O74je1uRUaUEvcghrFabdfv zpSNmP1exrH4wOztup8CVAi8lg8quXMhgAgOr3bVGfczJYEFJcy0e6xxP5bVMW0v xCr4/R4WbK4lu+kh7FT00HeSuhAyjrXruvJBBOYBfP1Ic2uMq4UV3SD9qIbhr9Tp w12dETHlzfJQLSa+voNkA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-sender :x-me-sender:x-sasl-enc; s=fm3; t=1739731062; x=1739817462; bh=F L9di+CvqAZswVCEURGPLsHq/4BTefiQImdfVOi0kBA=; b=j3bkwhz1oLMQEbobB 7KRPgxJWS0aIQ2oW1mGlUl8Q/c61yIUtYt0RyZjPWL4pMAarCeHeJNJ/RGpOBM+Z 77+AlvINA7Zia2yjbaryP4FXdKPjKZhiSFMKWdZaTptWURx6nnXes+fwK84KLGMi 8nAhmO8yLv1RNuus91S7AZgbq7JSffjTuFYVWl8WjqJDxVZZHmeysPOWmJ6awkes sOdV7p4IhHb7YKnFQ+OsDlw56rjQ23bu9IJBOxSBwHMcZgRmya+NBGgNNJQdvvQI j4phHJzIxh+aWnUWoecN6O6pAXyF/VzuxwAViQK5jZurFPYr9XNKtcAD3MFknXLZ YpEvA== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeefvddrtddtgdehiedvtdcutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpggftfghnshhusghstghrihgsvgdp uffrtefokffrpgfnqfghnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivg hnthhsucdlqddutddtmdenucfjughrpefhvfevufffkffojghfggfgsedtkeertdertddt necuhfhrohhmpefthigrnhcuhggrlhhklhhinhcuoehrhigrnhesthgvshhtthhorghsth drtghomheqnecuggftrfgrthhtvghrnhepffehieffgedtgfffjeetveegfeekleeileek veeuteffteetudffveegieeiheetnecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrg hmpehmrghilhhfrhhomheprhihrghnsehtvghsthhtohgrshhtrdgtohhmpdhnsggprhgt phhtthhopedvgedpmhhouggvpehsmhhtphhouhhtpdhrtghpthhtohepmhhrihhprghrug eskhgvrhhnvghlrdhorhhgpdhrtghpthhtohepfigvnhhssegtshhivgdrohhrghdprhgt phhtthhopehmrggrrhhtvghnrdhlrghnkhhhohhrshhtsehlihhnuhigrdhinhhtvghlrd gtohhmpdhrtghpthhtohepthiiihhmmhgvrhhmrghnnhesshhushgvrdguvgdprhgtphht thhopegrihhrlhhivggusehgmhgrihhlrdgtohhmpdhrtghpthhtohepuggrnhhivghlse hffhiflhhlrdgthhdprhgtphhtthhopehjvghrnhgvjhdrshhkrhgrsggvtgesghhmrghi lhdrtghomhdprhgtphhtthhopehsrghmuhgvlhesshhhohhllhgrnhgurdhorhhgpdhrtg hpthhtoheprhhosghhsehkvghrnhgvlhdrohhrgh X-ME-Proxy: Feedback-ID: idc0145fc:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Sun, 16 Feb 2025 13:37:36 -0500 (EST) From: Ryan Walklin To: Maxime Ripard , Chen-Yu Tsai , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Daniel Vetter , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: Andre Przywara , Chris Morgan , Hironori KIKUCHI , Philippe Simons , Dmitry Baryshkov , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Ryan Walklin Subject: [PATCH v7 03/27] drm: sun4i: de2/de3: call csc setup also for UI layer Date: Mon, 17 Feb 2025 07:36:03 +1300 Message-ID: <20250216183710.8443-4-ryan@testtoast.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250216183710.8443-3-ryan@testtoast.com> References: <20250216183710.8443-3-ryan@testtoast.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Jernej Skrabec Currently, only VI layer calls CSC setup function. This comes from DE2 limitation, which doesn't have CSC unit for UI layers. However, DE3 has separate CSC units for each layer. This allows display pipeline to make output signal in different color spaces. To support both use cases, add a call to CSC setup function also in UI layer code. For DE2, this will be a no-op, but it will allow DE3 to output signal in multiple formats. Signed-off-by: Jernej Skrabec Signed-off-by: Ryan Walklin --- drivers/gpu/drm/sun4i/sun8i_csc.c | 8 +++++--- drivers/gpu/drm/sun4i/sun8i_ui_layer.c | 6 ++++++ 2 files changed, 11 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun8i_csc.c b/drivers/gpu/drm/sun4i/sun8i_csc.c index 5606912f92de5..558f7a4c1354e 100644 --- a/drivers/gpu/drm/sun4i/sun8i_csc.c +++ b/drivers/gpu/drm/sun4i/sun8i_csc.c @@ -209,8 +209,10 @@ void sun8i_csc_set_ccsc(struct sun8i_mixer *mixer, int layer, return; } - base = ccsc_base[mixer->cfg->ccsc][layer]; + if (layer < mixer->cfg->vi_num) { + base = ccsc_base[mixer->cfg->ccsc][layer]; - sun8i_csc_setup(mixer->engine.regs, base, - fmt_type, encoding, range); + sun8i_csc_setup(mixer->engine.regs, base, + fmt_type, encoding, range); + } } diff --git a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c b/drivers/gpu/drm/sun4i/sun8i_ui_layer.c index b90e5edef4e88..aa987bca1dbb9 100644 --- a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c +++ b/drivers/gpu/drm/sun4i/sun8i_ui_layer.c @@ -20,6 +20,7 @@ #include #include +#include "sun8i_csc.h" #include "sun8i_mixer.h" #include "sun8i_ui_layer.h" #include "sun8i_ui_scaler.h" @@ -135,6 +136,11 @@ static int sun8i_ui_layer_update_formats(struct sun8i_mixer *mixer, int channel, SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ch_base, overlay), SUN8I_MIXER_CHAN_UI_LAYER_ATTR_FBFMT_MASK, val); + /* Note: encoding and range arguments are ignored for RGB */ + sun8i_csc_set_ccsc(mixer, channel, FORMAT_TYPE_RGB, + DRM_COLOR_YCBCR_BT601, + DRM_COLOR_YCBCR_FULL_RANGE); + return 0; } From patchwork Sun Feb 16 18:36:04 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Walklin X-Patchwork-Id: 13976638 Received: from fout-b4-smtp.messagingengine.com (fout-b4-smtp.messagingengine.com [202.12.124.147]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 550011993A3; Sun, 16 Feb 2025 18:37:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=202.12.124.147 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739731074; cv=none; b=nuPyzK2TMfVe+cv6v3ZpXmFnbHFFQiPM1lcRB/KsLR7kFI/z+J0p1LFydmie7pUFllpKp2jozw8Fa14fFgQ8nlDp1QfCorpDSCCi8fZiUJMKPJWkQfhlgzz7hP0dc4HxENanx3eWkeApcljU260mUEXJU7sBq1VAb4YalcJ8MB8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739731074; c=relaxed/simple; bh=+USZhEErcfV+oKUZN5CFx0nzuhAy9TyuXFNKfZ1kxQo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=m/wu4wzFkOnivzpShGjS8fbsffYr7b1pWTRnCiWBvIX5EqjbnffrwJn66+vYHXl+KpQExpXPQrwbeLLi8zepaKRTJBmRQs1jaKAv6LIEgSbEfLZ1F80h9gKpmS3N8zFIVIzH5XVfcFUMQQg1qXTKopI9UrDSSPKw6yYW3dTCLGE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com; spf=pass smtp.mailfrom=testtoast.com; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b=FS6rbJyv; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b=02wnCxUh; arc=none smtp.client-ip=202.12.124.147 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=testtoast.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b="FS6rbJyv"; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="02wnCxUh" Received: from phl-compute-06.internal (phl-compute-06.phl.internal [10.202.2.46]) by mailfout.stl.internal (Postfix) with ESMTP id 7B45211400B1; Sun, 16 Feb 2025 13:37:51 -0500 (EST) Received: from phl-mailfrontend-01 ([10.202.2.162]) by phl-compute-06.internal (MEProxy); Sun, 16 Feb 2025 13:37:52 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=testtoast.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm3; t=1739731071; x= 1739817471; bh=LJb12UNrcw1b4CXj7oJwE7645Xi4wHyCdBE0N2smQ2w=; b=F S6rbJyvmg3Mar38c8UzOgy2/RP9Oc25mB3bZx+jBBR+OjoayovdG7kfo3rlQcsu4 Yk22xkXha7/bBJFrQmDv3pCrYZf8+bKPUUodb+I2JvLNsHiEL/8Y2CBVYOUMqWDK fQkLo9+GVSaxi6jPLwOrbw00ewXRx7Juv01WQVw0x7+o/aa7JkEFlcDs6ObQ1qB7 nLFnBkfwpiwgEkhDqfGqaxPbRw0XHr+oxyYOVlXA/I80r5Sl32LeR7dnS9Bun+4S Z3c7V2uWNZZzhkiq1brDhxC1CXrHgVK3+DeVWN52UvV0jkdualWf9XJUCfCP/UX6 kP3TblMOxqJX/fPFVjG/g== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-sender :x-me-sender:x-sasl-enc; s=fm3; t=1739731071; x=1739817471; bh=L Jb12UNrcw1b4CXj7oJwE7645Xi4wHyCdBE0N2smQ2w=; b=02wnCxUhwzjbdfSvp 7vNh0e6PJ9KE4RJTNUeSNggEsSPdljL9bh1ggXKQUaNupyXlJOTdf0FnSCxqy6HX xuy6AY9zaRHeVfdB22RiUunIaya1s0nO/RvnyvDK0QidyH8NnvIS59mVk6DG4F1s X8eDNgI586G7Ixuk4Ph4OqdaxHr95kmw5TLm+5hQGtB7yr8eLJ15s1lnIFH3M8cU YAtSgmX/b8Wx/Nz42inWYQVqOqPqLdSX7R2K5gX/kxZDf+/svqFKLyXaEi4LUQw5 EceaHPb1Gd/7m0BhGTMgRx16FZzAip/dRUvQi9HeggXIuS4Y2ZZdbI0hH93L7kdg CgAQA== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeefvddrtddtgdehiedvtdcutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpggftfghnshhusghstghrihgsvgdp uffrtefokffrpgfnqfghnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivg hnthhsucdlqddutddtmdenucfjughrpefhvfevufffkffojghfggfgsedtkeertdertddt necuhfhrohhmpefthigrnhcuhggrlhhklhhinhcuoehrhigrnhesthgvshhtthhorghsth drtghomheqnecuggftrfgrthhtvghrnhepffehieffgedtgfffjeetveegfeekleeileek veeuteffteetudffveegieeiheetnecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrg hmpehmrghilhhfrhhomheprhihrghnsehtvghsthhtohgrshhtrdgtohhmpdhnsggprhgt phhtthhopedvgedpmhhouggvpehsmhhtphhouhhtpdhrtghpthhtohepmhhrihhprghrug eskhgvrhhnvghlrdhorhhgpdhrtghpthhtohepfigvnhhssegtshhivgdrohhrghdprhgt phhtthhopehmrggrrhhtvghnrdhlrghnkhhhohhrshhtsehlihhnuhigrdhinhhtvghlrd gtohhmpdhrtghpthhtohepthiiihhmmhgvrhhmrghnnhesshhushgvrdguvgdprhgtphht thhopegrihhrlhhivggusehgmhgrihhlrdgtohhmpdhrtghpthhtohepuggrnhhivghlse hffhiflhhlrdgthhdprhgtphhtthhopehjvghrnhgvjhdrshhkrhgrsggvtgesghhmrghi lhdrtghomhdprhgtphhtthhopehsrghmuhgvlhesshhhohhllhgrnhgurdhorhhgpdhrtg hpthhtoheprhhosghhsehkvghrnhgvlhdrohhrgh X-ME-Proxy: Feedback-ID: idc0145fc:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Sun, 16 Feb 2025 13:37:44 -0500 (EST) From: Ryan Walklin To: Maxime Ripard , Chen-Yu Tsai , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Daniel Vetter , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: Andre Przywara , Chris Morgan , Hironori KIKUCHI , Philippe Simons , Dmitry Baryshkov , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Ryan Walklin Subject: [PATCH v7 04/27] drm: sun4i: de2: Initialize layer fields earlier Date: Mon, 17 Feb 2025 07:36:04 +1300 Message-ID: <20250216183710.8443-5-ryan@testtoast.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250216183710.8443-3-ryan@testtoast.com> References: <20250216183710.8443-3-ryan@testtoast.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Jernej Skrabec drm_universal_plane_init() can already call some callbacks, like format_mod_supported, during initialization. Because of that, fields should be initialized beforehand. Signed-off-by: Jernej Skrabec Co-developed-by: Ryan Walklin Signed-off-by: Ryan Walklin Reviewed-by: Chen-Yu Tsai --- drivers/gpu/drm/sun4i/sun8i_ui_layer.c | 9 +++++---- drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 9 +++++---- 2 files changed, 10 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c b/drivers/gpu/drm/sun4i/sun8i_ui_layer.c index aa987bca1dbb9..cb9b694fef101 100644 --- a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c +++ b/drivers/gpu/drm/sun4i/sun8i_ui_layer.c @@ -295,6 +295,11 @@ struct sun8i_layer *sun8i_ui_layer_init_one(struct drm_device *drm, if (!layer) return ERR_PTR(-ENOMEM); + layer->mixer = mixer; + layer->type = SUN8I_LAYER_TYPE_UI; + layer->channel = channel; + layer->overlay = 0; + if (index == 0) type = DRM_PLANE_TYPE_PRIMARY; @@ -325,10 +330,6 @@ struct sun8i_layer *sun8i_ui_layer_init_one(struct drm_device *drm, } drm_plane_helper_add(&layer->plane, &sun8i_ui_layer_helper_funcs); - layer->mixer = mixer; - layer->type = SUN8I_LAYER_TYPE_UI; - layer->channel = channel; - layer->overlay = 0; return layer; } diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c index f3a5329351caa..3c657b069d1f4 100644 --- a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c +++ b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c @@ -478,6 +478,11 @@ struct sun8i_layer *sun8i_vi_layer_init_one(struct drm_device *drm, if (!layer) return ERR_PTR(-ENOMEM); + layer->mixer = mixer; + layer->type = SUN8I_LAYER_TYPE_VI; + layer->channel = index; + layer->overlay = 0; + if (mixer->cfg->is_de3) { formats = sun8i_vi_layer_de3_formats; format_count = ARRAY_SIZE(sun8i_vi_layer_de3_formats); @@ -536,10 +541,6 @@ struct sun8i_layer *sun8i_vi_layer_init_one(struct drm_device *drm, } drm_plane_helper_add(&layer->plane, &sun8i_vi_layer_helper_funcs); - layer->mixer = mixer; - layer->type = SUN8I_LAYER_TYPE_VI; - layer->channel = index; - layer->overlay = 0; return layer; } From patchwork Sun Feb 16 18:36:05 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Walklin X-Patchwork-Id: 13976639 Received: from fout-b4-smtp.messagingengine.com (fout-b4-smtp.messagingengine.com [202.12.124.147]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1559A1993A3; Sun, 16 Feb 2025 18:38:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=202.12.124.147 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739731085; cv=none; b=Gpwul1C+bCkPWC1W4a2hygWG1nLAZhzILAt8qQmsz1sXNR8iOAiUFhBFW0dEAYqIEebJUl9VMVBVl2pG6GEtBcaV/wraQ1J4eFYkVYge8JFj6+cQb1tlyXzdugguMQbT0xtbJ7DCG+jyNRyknOBpLLBkuF0taqaFwE2WG3lLY8k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739731085; c=relaxed/simple; bh=OQH8xBpVSmMBJGC1J98DyvJigNdQe8QrJVbtmVUixUY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=XZ7w5eALFV/HQt3yLYMg71g/8bHdI0O0DdJ9iKiZ1Ier0n7VbQQhwkEXOB8ejXvSjb1G6Rpr/elUABp04sMn06VpiY7HLXsQu/gnOb7bKedUc2Q9xS22xBuZYLH0iHYkzdzIGdjAmRFM2rT9obkZqCcs2CNPyrRvHvaZlHA5IPo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com; spf=pass smtp.mailfrom=testtoast.com; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b=qc3Tz67w; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b=VuHA/TVg; arc=none smtp.client-ip=202.12.124.147 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=testtoast.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b="qc3Tz67w"; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="VuHA/TVg" Received: from phl-compute-05.internal (phl-compute-05.phl.internal [10.202.2.45]) by mailfout.stl.internal (Postfix) with ESMTP id 850B0114009B; Sun, 16 Feb 2025 13:38:00 -0500 (EST) Received: from phl-mailfrontend-01 ([10.202.2.162]) by phl-compute-05.internal (MEProxy); Sun, 16 Feb 2025 13:38:01 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=testtoast.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm3; t=1739731080; x= 1739817480; bh=RcwicYsDQxn+ZuZ3Jz6jk1myVrK34s6MlQpPwn2SdeE=; b=q c3Tz67w2/FkGNrCcCYi1CPrbf9lsY0/yxfg1P8FRw6uwTo0KFF4Oz7vyJRqxvxnX gz/hAtUdJhq6DnJo/SCRejuSQmF/y/FHw+4bVnklUKr0mjnB8PrjVykR8xoa6WEM NCiUHz6/dtOoOW2pWRXmt+RKuLqBuCZ7zVmF1Op8ltL6nSeWZU/I5Tq6RNMZ+U1m Hdn2lYQBclRxVzItvfE3VY0JkfP5A++vQu1uiwOSZgeihQpDmVQP5GGJpMAWzHKY 4uyKROK69VjpYjzSvynkEAhBebSbLx3DYOLd1mU6HDB8EjK3zD6u2uPu0I3bL5jL M57t1cVo6a9Ysv57OKwHQ== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-sender :x-me-sender:x-sasl-enc; s=fm3; t=1739731080; x=1739817480; bh=R cwicYsDQxn+ZuZ3Jz6jk1myVrK34s6MlQpPwn2SdeE=; b=VuHA/TVgB7+pXR2n9 aSho7wIGHFj07/MKi2WXNRLgY2Z3ar7MQZgb9z/qofVX8KnEMGSuELD8mlAoO57u czI5cRD1I85+tQMJAR0oCB/K4U/j+UUEoNuM/57po1A4iI/AJbKHzJrlk8gQjyAa 6LJ/VfBf93JfMRTU5bYSK+ClqUZVndxK150+nnd+N1X5zqmQFtE2JHcFXS8u5oGn +16iznMuuStXO/6Ie/fN8L5rGZJigHOW7Vu7TJtkqwuAat/82ulB0koGrDxV0DRZ X3qABdkuCST1mbw9oODy5OsShUkeGIawbMHo7V06FqFiLUIOsVZtAP05m8G3vhoD wJNUw== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeefvddrtddtgdehiedvtdcutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpggftfghnshhusghstghrihgsvgdp uffrtefokffrpgfnqfghnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivg hnthhsucdlqddutddtmdenucfjughrpefhvfevufffkffojghfggfgsedtkeertdertddt necuhfhrohhmpefthigrnhcuhggrlhhklhhinhcuoehrhigrnhesthgvshhtthhorghsth drtghomheqnecuggftrfgrthhtvghrnhepffehieffgedtgfffjeetveegfeekleeileek veeuteffteetudffveegieeiheetnecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrg hmpehmrghilhhfrhhomheprhihrghnsehtvghsthhtohgrshhtrdgtohhmpdhnsggprhgt phhtthhopedvgedpmhhouggvpehsmhhtphhouhhtpdhrtghpthhtohepmhhrihhprghrug eskhgvrhhnvghlrdhorhhgpdhrtghpthhtohepfigvnhhssegtshhivgdrohhrghdprhgt phhtthhopehmrggrrhhtvghnrdhlrghnkhhhohhrshhtsehlihhnuhigrdhinhhtvghlrd gtohhmpdhrtghpthhtohepthiiihhmmhgvrhhmrghnnhesshhushgvrdguvgdprhgtphht thhopegrihhrlhhivggusehgmhgrihhlrdgtohhmpdhrtghpthhtohepuggrnhhivghlse hffhiflhhlrdgthhdprhgtphhtthhopehjvghrnhgvjhdrshhkrhgrsggvtgesghhmrghi lhdrtghomhdprhgtphhtthhopehsrghmuhgvlhesshhhohhllhgrnhgurdhorhhgpdhrtg hpthhtoheprhhosghhsehkvghrnhgvlhdrohhrgh X-ME-Proxy: Feedback-ID: idc0145fc:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Sun, 16 Feb 2025 13:37:53 -0500 (EST) From: Ryan Walklin To: Maxime Ripard , Chen-Yu Tsai , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Daniel Vetter , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: Andre Przywara , Chris Morgan , Hironori KIKUCHI , Philippe Simons , Dmitry Baryshkov , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Ryan Walklin Subject: [PATCH v7 05/27] drm: sun4i: de3: Add YUV formatter module Date: Mon, 17 Feb 2025 07:36:05 +1300 Message-ID: <20250216183710.8443-6-ryan@testtoast.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250216183710.8443-3-ryan@testtoast.com> References: <20250216183710.8443-3-ryan@testtoast.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Jernej Skrabec The display engine formatter (FMT) module is present in the DE3 engine and provides YUV444 to YUV422/YUV420 conversion, format re-mapping and color depth conversion. Add support for this module. Signed-off-by: Jernej Skrabec Signed-off-by: Ryan Walklin --- drivers/gpu/drm/sun4i/Makefile | 3 +- drivers/gpu/drm/sun4i/sun50i_fmt.c | 82 ++++++++++++++++++++++++++++++ drivers/gpu/drm/sun4i/sun50i_fmt.h | 32 ++++++++++++ 3 files changed, 116 insertions(+), 1 deletion(-) create mode 100644 drivers/gpu/drm/sun4i/sun50i_fmt.c create mode 100644 drivers/gpu/drm/sun4i/sun50i_fmt.h diff --git a/drivers/gpu/drm/sun4i/Makefile b/drivers/gpu/drm/sun4i/Makefile index bad7497a0d11e..3f516329f51ee 100644 --- a/drivers/gpu/drm/sun4i/Makefile +++ b/drivers/gpu/drm/sun4i/Makefile @@ -16,7 +16,8 @@ sun8i-drm-hdmi-y += sun8i_hdmi_phy_clk.o sun8i-mixer-y += sun8i_mixer.o sun8i_ui_layer.o \ sun8i_vi_layer.o sun8i_ui_scaler.o \ - sun8i_vi_scaler.o sun8i_csc.o + sun8i_vi_scaler.o sun8i_csc.o \ + sun50i_fmt.o sun4i-tcon-y += sun4i_crtc.o sun4i-tcon-y += sun4i_tcon_dclk.o diff --git a/drivers/gpu/drm/sun4i/sun50i_fmt.c b/drivers/gpu/drm/sun4i/sun50i_fmt.c new file mode 100644 index 0000000000000..050a8716ae862 --- /dev/null +++ b/drivers/gpu/drm/sun4i/sun50i_fmt.c @@ -0,0 +1,82 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (C) Jernej Skrabec + */ + +#include + +#include "sun50i_fmt.h" + +static bool sun50i_fmt_is_10bit(u32 format) +{ + switch (format) { + case MEDIA_BUS_FMT_RGB101010_1X30: + case MEDIA_BUS_FMT_YUV10_1X30: + case MEDIA_BUS_FMT_UYYVYY10_0_5X30: + case MEDIA_BUS_FMT_UYVY10_1X20: + return true; + default: + return false; + } +} + +static u32 sun50i_fmt_get_colorspace(u32 format) +{ + switch (format) { + case MEDIA_BUS_FMT_UYYVYY8_0_5X24: + case MEDIA_BUS_FMT_UYYVYY10_0_5X30: + return SUN50I_FMT_CS_YUV420; + case MEDIA_BUS_FMT_UYVY8_1X16: + case MEDIA_BUS_FMT_UYVY10_1X20: + return SUN50I_FMT_CS_YUV422; + default: + return SUN50I_FMT_CS_YUV444RGB; + } +} + +static void sun50i_fmt_de3_limits(u32 *limits, u32 colorspace, bool bit10) +{ + if (colorspace != SUN50I_FMT_CS_YUV444RGB) { + limits[0] = SUN50I_FMT_LIMIT(64, 940); + limits[1] = SUN50I_FMT_LIMIT(64, 960); + limits[2] = SUN50I_FMT_LIMIT(64, 960); + } else if (bit10) { + limits[0] = SUN50I_FMT_LIMIT(0, 1023); + limits[1] = SUN50I_FMT_LIMIT(0, 1023); + limits[2] = SUN50I_FMT_LIMIT(0, 1023); + } else { + limits[0] = SUN50I_FMT_LIMIT(0, 1021); + limits[1] = SUN50I_FMT_LIMIT(0, 1021); + limits[2] = SUN50I_FMT_LIMIT(0, 1021); + } +} + +void sun50i_fmt_setup(struct sun8i_mixer *mixer, u16 width, + u16 height, u32 format) +{ + u32 colorspace, limit[3], base; + struct regmap *regs; + bool bit10; + + colorspace = sun50i_fmt_get_colorspace(format); + bit10 = sun50i_fmt_is_10bit(format); + base = SUN50I_FMT_DE3; + regs = sun8i_blender_regmap(mixer); + + sun50i_fmt_de3_limits(limit, colorspace, bit10); + + regmap_write(regs, SUN50I_FMT_CTRL(base), 0); + + regmap_write(regs, SUN50I_FMT_SIZE(base), + SUN8I_MIXER_SIZE(width, height)); + regmap_write(regs, SUN50I_FMT_SWAP(base), 0); + regmap_write(regs, SUN50I_FMT_DEPTH(base), bit10); + regmap_write(regs, SUN50I_FMT_FORMAT(base), colorspace); + regmap_write(regs, SUN50I_FMT_COEF(base), 0); + + regmap_write(regs, SUN50I_FMT_LMT_Y(base), limit[0]); + regmap_write(regs, SUN50I_FMT_LMT_C0(base), limit[1]); + regmap_write(regs, SUN50I_FMT_LMT_C1(base), limit[2]); + + regmap_write(regs, SUN50I_FMT_CTRL(base), 1); +} diff --git a/drivers/gpu/drm/sun4i/sun50i_fmt.h b/drivers/gpu/drm/sun4i/sun50i_fmt.h new file mode 100644 index 0000000000000..4127f7206aade --- /dev/null +++ b/drivers/gpu/drm/sun4i/sun50i_fmt.h @@ -0,0 +1,32 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Copyright (C) Jernej Skrabec + */ + +#ifndef _SUN50I_FMT_H_ +#define _SUN50I_FMT_H_ + +#include "sun8i_mixer.h" + +#define SUN50I_FMT_DE3 0xa8000 + +#define SUN50I_FMT_CTRL(base) ((base) + 0x00) +#define SUN50I_FMT_SIZE(base) ((base) + 0x04) +#define SUN50I_FMT_SWAP(base) ((base) + 0x08) +#define SUN50I_FMT_DEPTH(base) ((base) + 0x0c) +#define SUN50I_FMT_FORMAT(base) ((base) + 0x10) +#define SUN50I_FMT_COEF(base) ((base) + 0x14) +#define SUN50I_FMT_LMT_Y(base) ((base) + 0x20) +#define SUN50I_FMT_LMT_C0(base) ((base) + 0x24) +#define SUN50I_FMT_LMT_C1(base) ((base) + 0x28) + +#define SUN50I_FMT_LIMIT(low, high) (((high) << 16) | (low)) + +#define SUN50I_FMT_CS_YUV444RGB 0 +#define SUN50I_FMT_CS_YUV422 1 +#define SUN50I_FMT_CS_YUV420 2 + +void sun50i_fmt_setup(struct sun8i_mixer *mixer, u16 width, + u16 height, u32 format); + +#endif From patchwork Sun Feb 16 18:36:06 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Walklin X-Patchwork-Id: 13976640 Received: from fhigh-b4-smtp.messagingengine.com (fhigh-b4-smtp.messagingengine.com [202.12.124.155]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9977F19E99A; Sun, 16 Feb 2025 18:38:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=202.12.124.155 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739731093; cv=none; b=nEg1/VxhGvU66Pysecw6R2wlvt3VE0qFGQQq+QfeqnPEy2iyEn9vetne931Go/k/77/ROdlTntKu+RM5G9bSlvFSxAgQeakORO+k933rIT8Iu9xHlS/T2zrUvkO5e4BzqbGAsG1NkGlXUgXCteZsrMmwhOC5iCfY88epWffyMsk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739731093; c=relaxed/simple; bh=mKQDC0iycCu5m9T3PtSfL2CE+zV2o52gW9fpH+YR4EQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=mzkavYLKrpgWCvGsDVoG6wfyX5ddd8wTiFHn5WleWnbqZiVXQWvYJnjHSecnOITWfjAiIEvwEeJHKp5smrbHIDuOoIHHxtr99fELJ+/ba2HmxwZrQSJLtifjHc2FUIQaMQnXD2cK7NbTdVkEWETlbkvNpJ/FA99SFqTaLUi6bNo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com; spf=pass smtp.mailfrom=testtoast.com; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b=bTXqBcCJ; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b=Mn2m0Z/K; arc=none smtp.client-ip=202.12.124.155 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=testtoast.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b="bTXqBcCJ"; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="Mn2m0Z/K" Received: from phl-compute-06.internal (phl-compute-06.phl.internal [10.202.2.46]) by mailfhigh.stl.internal (Postfix) with ESMTP id 10D4F25400EC; Sun, 16 Feb 2025 13:38:09 -0500 (EST) Received: from phl-mailfrontend-01 ([10.202.2.162]) by phl-compute-06.internal (MEProxy); Sun, 16 Feb 2025 13:38:09 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=testtoast.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm3; t=1739731088; x= 1739817488; bh=cv3R3GZ5j7ybxKWdldciH+Bemda5Bt/xlY41lt6XoL4=; b=b TXqBcCJINbGidMsK6oHft3CvlyHLJdeey8Q1WUNNRhfoD81RYvsAH35BgSSEa23H zMDgXLsmUGx85G9oFcC/BO8gsfd83aBIAdSxID+S06+NYMilj0NCMgmRgbV9svDl Q8l8TKc2Qu1w1lRwk3dIDA1w7hiEg3Uak7C+eE5/sRjDkRU3eWwGL9SV03Lo+dwj 8z4NBWpreR3zCUyMsiYE6mvJZDaXD3ZySYaSSDvGaRG0N4oAKgEpf1Go43APLZb3 y2xTrOw6RPzoUJedAAklJLCc13E0hBJN8EH7pS/eFWUHusumqBNCNMDmjQ7u1dOx PX1t+tOYNGVxRtyr+G8DA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-sender :x-me-sender:x-sasl-enc; s=fm3; t=1739731088; x=1739817488; bh=c v3R3GZ5j7ybxKWdldciH+Bemda5Bt/xlY41lt6XoL4=; b=Mn2m0Z/KmuXjIoULf mZmNCZW5ckIUXMsMucCyBa0z3uuhSSCoD4U9AFrCS3X40GRTw5iljVNGnhBn2wdv zLdjlJC57RU1Ev/5irIFX/gHg20tqa/UbSAMhAaMTO1oIe+1qFVP7v2aw/7AyiQz Jk+ZsFFq3fzdwhQ/Cgv/7QOwd+nhtec0UB37gPN0Wk3oGFN6rC31xrCvXbQ7vpD8 JDTAmLLxUy5+yIXQmC6p7t+mgQqrqnkHtumfbYIXRAaQMCVm1qczE1fvkb8fqLnr Yz3HjVfLdD6cLgj21KE6WbLci65mYtwJwhM4vTODyaUmT64RrAIlnGHKc0VXabtG fJpug== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeefvddrtddtgdehiedvtdcutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpggftfghnshhusghstghrihgsvgdp uffrtefokffrpgfnqfghnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivg hnthhsucdlqddutddtmdenucfjughrpefhvfevufffkffojghfggfgsedtkeertdertddt necuhfhrohhmpefthigrnhcuhggrlhhklhhinhcuoehrhigrnhesthgvshhtthhorghsth drtghomheqnecuggftrfgrthhtvghrnhepffehieffgedtgfffjeetveegfeekleeileek veeuteffteetudffveegieeiheetnecuvehluhhsthgvrhfuihiivgepudenucfrrghrrg hmpehmrghilhhfrhhomheprhihrghnsehtvghsthhtohgrshhtrdgtohhmpdhnsggprhgt phhtthhopedvgedpmhhouggvpehsmhhtphhouhhtpdhrtghpthhtohepmhhrihhprghrug eskhgvrhhnvghlrdhorhhgpdhrtghpthhtohepfigvnhhssegtshhivgdrohhrghdprhgt phhtthhopehmrggrrhhtvghnrdhlrghnkhhhohhrshhtsehlihhnuhigrdhinhhtvghlrd gtohhmpdhrtghpthhtohepthiiihhmmhgvrhhmrghnnhesshhushgvrdguvgdprhgtphht thhopegrihhrlhhivggusehgmhgrihhlrdgtohhmpdhrtghpthhtohepuggrnhhivghlse hffhiflhhlrdgthhdprhgtphhtthhopehjvghrnhgvjhdrshhkrhgrsggvtgesghhmrghi lhdrtghomhdprhgtphhtthhopehsrghmuhgvlhesshhhohhllhgrnhgurdhorhhgpdhrtg hpthhtoheprhhosghhsehkvghrnhgvlhdrohhrgh X-ME-Proxy: Feedback-ID: idc0145fc:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Sun, 16 Feb 2025 13:38:02 -0500 (EST) From: Ryan Walklin To: Maxime Ripard , Chen-Yu Tsai , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Daniel Vetter , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: Andre Przywara , Chris Morgan , Hironori KIKUCHI , Philippe Simons , Dmitry Baryshkov , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Ryan Walklin Subject: [PATCH v7 06/27] drm: sun4i: de3: add format enumeration function to engine Date: Mon, 17 Feb 2025 07:36:06 +1300 Message-ID: <20250216183710.8443-7-ryan@testtoast.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250216183710.8443-3-ryan@testtoast.com> References: <20250216183710.8443-3-ryan@testtoast.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Jernej Skrabec The DE3 display engine supports YUV formats in addition to RGB. Add an optional format enumeration function to the engine. Signed-off-by: Jernej Skrabec Signed-off-by: Ryan Walklin --- drivers/gpu/drm/sun4i/sunxi_engine.h | 29 ++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/drivers/gpu/drm/sun4i/sunxi_engine.h b/drivers/gpu/drm/sun4i/sunxi_engine.h index ec0c4932f15cf..c48cbc1aceb80 100644 --- a/drivers/gpu/drm/sun4i/sunxi_engine.h +++ b/drivers/gpu/drm/sun4i/sunxi_engine.h @@ -123,6 +123,17 @@ struct sunxi_engine_ops { */ void (*mode_set)(struct sunxi_engine *engine, const struct drm_display_mode *mode); + + /** + * @get_supported_fmts + * + * This callback is used to enumerate all supported output + * formats by the engine. They are used for bridge format + * negotiation. + * + * This function is optional. + */ + u32 *(*get_supported_fmts)(struct sunxi_engine *engine, u32 *num); }; /** @@ -215,4 +226,22 @@ sunxi_engine_mode_set(struct sunxi_engine *engine, if (engine->ops && engine->ops->mode_set) engine->ops->mode_set(engine, mode); } + +/** + * sunxi_engine_get_supported_formats - Provide array of supported formats + * @engine: pointer to the engine + * @num: pointer to variable, which will hold number of formats + * + * This list can be used for format negotiation by bridge. + */ +static inline u32 * +sunxi_engine_get_supported_formats(struct sunxi_engine *engine, u32 *num) +{ + if (engine->ops && engine->ops->get_supported_fmts) + return engine->ops->get_supported_fmts(engine, num); + + *num = 0; + + return NULL; +} #endif /* _SUNXI_ENGINE_H_ */ From patchwork Sun Feb 16 18:36:07 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Walklin X-Patchwork-Id: 13976641 Received: from fhigh-b4-smtp.messagingengine.com (fhigh-b4-smtp.messagingengine.com [202.12.124.155]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 950CF19EED3; Sun, 16 Feb 2025 18:38:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=202.12.124.155 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739731113; cv=none; b=T/2V/E5jpOhR7uxnJ1sFk9WIyHEt6KMD8z2sj/2ToAszbwXutP84R9jKbX+TfCBWden43+Rx3PS6+i3QqXEIwuBKnMJ19LaURaU4QcXGzgZlEnENwkZOqVlWlmBRW31OcNKt9o/dwlTPtCeJcRbpKGr6+zQblF+ZQoz/a+Xt0Es= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739731113; c=relaxed/simple; bh=sDH5jjYnu7M2+60BsJLe4gPbJ6Vz5ERxHBLYk/l16u8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=VWk10yvK4bVEy+Ls8QqSW3rfrTy5Zfajmc35Fjw19wHSc3DBUhk5Vulmt8QB4Iges4eHIxkp7W50pQezqhLyBxb1GFfUXUvWdA+5I3765qcW1HpRg+xkBd5x9/+Mbg5sYGAedS6Vz2EYfUSxlMlJNT/+hUlIip0PR0YvydAwa5M= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com; spf=pass smtp.mailfrom=testtoast.com; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b=IZH4Cvbk; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b=pyo8Pddj; arc=none smtp.client-ip=202.12.124.155 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=testtoast.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b="IZH4Cvbk"; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="pyo8Pddj" Received: from phl-compute-04.internal (phl-compute-04.phl.internal [10.202.2.44]) by mailfhigh.stl.internal (Postfix) with ESMTP id 05F4725400C3; Sun, 16 Feb 2025 13:38:29 -0500 (EST) Received: from phl-mailfrontend-01 ([10.202.2.162]) by phl-compute-04.internal (MEProxy); Sun, 16 Feb 2025 13:38:30 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=testtoast.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm3; t=1739731109; x= 1739817509; bh=z3pfBs7YzSNuzdyOnOJTsOCqr/BPrhVKuBEh6b67oZY=; b=I ZH4CvbkibLwqgw7A5KLd3ZquJ04+SnVZgYztHX59QwAJK5F3Sjx3yoVn6cG1cQ62 9UbXUsJTHUJc2K8U0s8JbW2mJKOrSk8uVEz+SRFtArYKJ2x4Tw6e5+K3pNOOpou+ EUOeZLEycPtbZDzqnPdHSWJRD+p/ovN6gQLkD5Wa2tONN9mzENOdcmfS/QyI0JcS TtL8CrfxUNSNYfh+mCxuoRsEwnS9sEnSpPtnS+OXkU0Iz/uJmn1ncemVMxln+5Az eHy1QOjMhNhcmOxYUlnbl6lqBqoI6TCos7wmG+fGHH78wpuoyzjkey3wAB4c1aVk jTTSMe/wYk+NWkxRIilKg== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-sender :x-me-sender:x-sasl-enc; s=fm3; t=1739731109; x=1739817509; bh=z 3pfBs7YzSNuzdyOnOJTsOCqr/BPrhVKuBEh6b67oZY=; b=pyo8PddjzwwHFbn2/ jdFx/a7bfmpTo11nuEqnjDcxnTouexN8Ie+KxuRcsTuY/ZKGhmGeJN0+t5sHdrwk a1njifVVaZ5wu4ztZcWxHp3BuW9h4dDKQogpV9wH8+b/2ROGxp9qIthCVJ+Y9mlu aV16V5K6BKLn8wSzV26OSxUAUOqgJa1/T9wYsa658Jij+3zWhYC6IUjGQIdUttLF K/Jpz9oZeO+u/i5ITDJD40wZ48nb56gy0RfhO6dmxkmVps8Nwhd1lOvLUeLAf/IY J/UyVAc1+Tw7D44GFoWeGXvVKyZV3dQCDrlBLCx0QlOmwDzoe8Ag25fkIPe5Aixf mzVZA== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeefvddrtddtgdehiedvudcutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpggftfghnshhusghstghrihgsvgdp uffrtefokffrpgfnqfghnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivg hnthhsucdlqddutddtmdenucfjughrpefhvfevufffkffojghfggfgsedtkeertdertddt necuhfhrohhmpefthigrnhcuhggrlhhklhhinhcuoehrhigrnhesthgvshhtthhorghsth drtghomheqnecuggftrfgrthhtvghrnhepffehieffgedtgfffjeetveegfeekleeileek veeuteffteetudffveegieeiheetnecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrg hmpehmrghilhhfrhhomheprhihrghnsehtvghsthhtohgrshhtrdgtohhmpdhnsggprhgt phhtthhopedvgedpmhhouggvpehsmhhtphhouhhtpdhrtghpthhtohepmhhrihhprghrug eskhgvrhhnvghlrdhorhhgpdhrtghpthhtohepfigvnhhssegtshhivgdrohhrghdprhgt phhtthhopehmrggrrhhtvghnrdhlrghnkhhhohhrshhtsehlihhnuhigrdhinhhtvghlrd gtohhmpdhrtghpthhtohepthiiihhmmhgvrhhmrghnnhesshhushgvrdguvgdprhgtphht thhopegrihhrlhhivggusehgmhgrihhlrdgtohhmpdhrtghpthhtohepuggrnhhivghlse hffhiflhhlrdgthhdprhgtphhtthhopehjvghrnhgvjhdrshhkrhgrsggvtgesghhmrghi lhdrtghomhdprhgtphhtthhopehsrghmuhgvlhesshhhohhllhgrnhgurdhorhhgpdhrtg hpthhtoheprhhosghhsehkvghrnhgvlhdrohhrgh X-ME-Proxy: Feedback-ID: idc0145fc:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Sun, 16 Feb 2025 13:38:23 -0500 (EST) From: Ryan Walklin To: Maxime Ripard , Chen-Yu Tsai , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Daniel Vetter , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: Andre Przywara , Chris Morgan , Hironori KIKUCHI , Philippe Simons , Dmitry Baryshkov , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Ryan Walklin Subject: [PATCH v7 07/27] drm: sun4i: de3: add formatter flag to mixer config Date: Mon, 17 Feb 2025 07:36:07 +1300 Message-ID: <20250216183710.8443-8-ryan@testtoast.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250216183710.8443-3-ryan@testtoast.com> References: <20250216183710.8443-3-ryan@testtoast.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Jernej Skrabec Only the DE3 (and newer) display engines have a formatter module. This could be inferred from the is_de3 flag alone, however this will not scale with addition of future DE versions in subsequent patches. Add a separate flag to signal this in the mixer configuration. Signed-off-by: Jernej Skrabec Signed-off-by: Ryan Walklin --- drivers/gpu/drm/sun4i/sun8i_mixer.c | 1 + drivers/gpu/drm/sun4i/sun8i_mixer.h | 2 ++ 2 files changed, 3 insertions(+) diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c index 8b41d33baa309..a170f68708b1f 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c @@ -717,6 +717,7 @@ static const struct sun8i_mixer_cfg sun50i_a64_mixer1_cfg = { static const struct sun8i_mixer_cfg sun50i_h6_mixer0_cfg = { .ccsc = CCSC_MIXER0_LAYOUT, .is_de3 = true, + .has_formatter = 1, .mod_rate = 600000000, .scaler_mask = 0xf, .scanline_yuv = 4096, diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.h b/drivers/gpu/drm/sun4i/sun8i_mixer.h index d7898c9c9cc0c..8417b8fef2e1f 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.h +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.h @@ -163,6 +163,7 @@ enum { * @mod_rate: module clock rate that needs to be set in order to have * a functional block. * @is_de3: true, if this is next gen display engine 3.0, false otherwise. + * @has_formatter: true, if mixer has formatter core, for 10-bit and YUV handling * @scaline_yuv: size of a scanline for VI scaler for YUV formats. */ struct sun8i_mixer_cfg { @@ -172,6 +173,7 @@ struct sun8i_mixer_cfg { int ccsc; unsigned long mod_rate; unsigned int is_de3 : 1; + unsigned int has_formatter : 1; unsigned int scanline_yuv; }; From patchwork Sun Feb 16 18:36:08 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Walklin X-Patchwork-Id: 13976642 Received: from fout-b4-smtp.messagingengine.com (fout-b4-smtp.messagingengine.com [202.12.124.147]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A774019F117; Sun, 16 Feb 2025 18:38:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=202.12.124.147 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739731122; cv=none; b=S+8QCP3FyZ50f242jr1lXP8i+NS+3UkY8mk77hlYxI0QOXSN41lqC4F2xxNorCjU3TNq90Vp2+6zodpOGp7QvwfhjpsoP6t/6ZzmVcg/P9l9stl5K1tyeR1Xd9DZbGYuf2q/ExJ1R0teEgie+NLy1db0GkksMMdo3j9BEtdfweY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739731122; c=relaxed/simple; bh=vWIZTT+xKOnjjS1vDB/XncuJdONY4uX2gcXM+nAyZj8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=LIMhQAfKhlzzdl45ZSCoIE2iq6HkfmQwqGyI0quVYw63xxc3ggMCnk6bNZXwzD4wWTnpsvcZGk9rWfAZmLZmAK+EfRYOMXFuHDYYUHj1lyZ3OwakjlvMV6YWSSSFlEabPXHXSxstiGEBxlS4plJozrHH95ug0jPKTT68mV+T+cI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com; spf=pass smtp.mailfrom=testtoast.com; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b=ctIbIvJ/; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b=HSkPc8Db; arc=none smtp.client-ip=202.12.124.147 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=testtoast.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b="ctIbIvJ/"; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="HSkPc8Db" Received: from phl-compute-08.internal (phl-compute-08.phl.internal [10.202.2.48]) by mailfout.stl.internal (Postfix) with ESMTP id 119D011400B1; Sun, 16 Feb 2025 13:38:39 -0500 (EST) Received: from phl-mailfrontend-01 ([10.202.2.162]) by phl-compute-08.internal (MEProxy); Sun, 16 Feb 2025 13:38:39 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=testtoast.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm3; t=1739731118; x= 1739817518; bh=aoEvA/CFJ1os4TjOsG26WNhs1piY3FD4LMZ7JtNG/qw=; b=c tIbIvJ/zPqHhahcxlgZ+1Xm0eku1/8wSA9wTJp5bVNewTvwArG6jAtUUKXs7ZVlE eRk2ExZSKub5tuFL4jD1bn/oS+vLTFc8Mh6VevhxeZ7MX/w/7GePLsC7OkSA8Gec oQ/O3yxK+5KfP4wBoMZ2JzdJi3tgHmDNWmZ0n+QenSjtHsPFXglBAABBJ6kwa9p2 +5cOxtU16VZpcTabvSjKOQ/fCdGR2A57ShMdNPrK2tP7u4FD9JJ/hJbDXHYdyWYe A9yDCfphFZdzpAIMH4U601Wy8dcB3ST5C2ZhwHPjEwnG4i9qs9cnr66Esk+grV9u UJw7Priv8ZINY3SH7vRuQ== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-sender :x-me-sender:x-sasl-enc; s=fm3; t=1739731118; x=1739817518; bh=a oEvA/CFJ1os4TjOsG26WNhs1piY3FD4LMZ7JtNG/qw=; b=HSkPc8Db1pUxJa1CT leh8/xiww72z7WoxLDXGVoCgK/EjaBfukerO/OejCIlrm/v3nwjAqZ2eBeKQ90UG veCJayYZKbIQLH/OayQRBBOP+iR+w7ZDItj8x+9oRL6F0nJPCUKnK9LOhExeqBGx 5BfeCX2L77/K8Pf/Xn44z34VIzbILmxQzDHj11f8EpvwbqsVR06BfDa3JqlehrZy xu1Rxf8EMzE3zeAgi/zwyjbmCvbrLBXUKVP2pbhHm+hYpUG5y+U0rc8erRWRHzfK gvLREVRbuBRGU8FKLu8uonYRZHldMn55UXXLTK6+XcUB70xSRnjCgukGEshcy1JC AyLQA== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeefvddrtddtgdehiedvtdcutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpggftfghnshhusghstghrihgsvgdp uffrtefokffrpgfnqfghnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivg hnthhsucdlqddutddtmdenucfjughrpefhvfevufffkffojghfggfgsedtkeertdertddt necuhfhrohhmpefthigrnhcuhggrlhhklhhinhcuoehrhigrnhesthgvshhtthhorghsth drtghomheqnecuggftrfgrthhtvghrnhepffehieffgedtgfffjeetveegfeekleeileek veeuteffteetudffveegieeiheetnecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrg hmpehmrghilhhfrhhomheprhihrghnsehtvghsthhtohgrshhtrdgtohhmpdhnsggprhgt phhtthhopedvgedpmhhouggvpehsmhhtphhouhhtpdhrtghpthhtohepmhhrihhprghrug eskhgvrhhnvghlrdhorhhgpdhrtghpthhtohepfigvnhhssegtshhivgdrohhrghdprhgt phhtthhopehmrggrrhhtvghnrdhlrghnkhhhohhrshhtsehlihhnuhigrdhinhhtvghlrd gtohhmpdhrtghpthhtohepthiiihhmmhgvrhhmrghnnhesshhushgvrdguvgdprhgtphht thhopegrihhrlhhivggusehgmhgrihhlrdgtohhmpdhrtghpthhtohepuggrnhhivghlse hffhiflhhlrdgthhdprhgtphhtthhopehjvghrnhgvjhdrshhkrhgrsggvtgesghhmrghi lhdrtghomhdprhgtphhtthhopehsrghmuhgvlhesshhhohhllhgrnhgurdhorhhgpdhrtg hpthhtoheprhhosghhsehkvghrnhgvlhdrohhrgh X-ME-Proxy: Feedback-ID: idc0145fc:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Sun, 16 Feb 2025 13:38:32 -0500 (EST) From: Ryan Walklin To: Maxime Ripard , Chen-Yu Tsai , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Daniel Vetter , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: Andre Przywara , Chris Morgan , Hironori KIKUCHI , Philippe Simons , Dmitry Baryshkov , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Ryan Walklin Subject: [PATCH v7 08/27] drm: sun4i: de3: add YUV support to the DE3 mixer Date: Mon, 17 Feb 2025 07:36:08 +1300 Message-ID: <20250216183710.8443-9-ryan@testtoast.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250216183710.8443-3-ryan@testtoast.com> References: <20250216183710.8443-3-ryan@testtoast.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Jernej Skrabec The mixer in the DE3 display engine supports YUV 8 and 10 bit formats in addition to 8-bit RGB. Add the required register configuration and format enumeration callback functions to the mixer, and store the in-use output format (defaulting to RGB) and color encoding in the mixer configuration. Signed-off-by: Jernej Skrabec Signed-off-by: Ryan Walklin --- Changelog v4..v5: - Remove trailing whitespace Changelog v5..v6: - Move color format and encoding flags to mixer and add struct. --- drivers/gpu/drm/sun4i/sun8i_mixer.c | 54 +++++++++++++++++++++++++++-- drivers/gpu/drm/sun4i/sun8i_mixer.h | 11 ++++++ 2 files changed, 62 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c index a170f68708b1f..bc934186bfd6f 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c @@ -23,7 +23,10 @@ #include #include +#include + #include "sun4i_drv.h" +#include "sun50i_fmt.h" #include "sun8i_mixer.h" #include "sun8i_ui_layer.h" #include "sun8i_vi_layer.h" @@ -390,12 +393,52 @@ static void sun8i_mixer_mode_set(struct sunxi_engine *engine, DRM_DEBUG_DRIVER("Switching display mixer interlaced mode %s\n", interlaced ? "on" : "off"); + + if (mixer->color_model.format == MEDIA_BUS_FMT_RGB888_1X24) + val = SUN8I_MIXER_BLEND_COLOR_BLACK; + else + val = 0xff108080; + + regmap_write(mixer->engine.regs, + SUN8I_MIXER_BLEND_BKCOLOR(bld_base), val); + regmap_write(mixer->engine.regs, + SUN8I_MIXER_BLEND_ATTR_FCOLOR(bld_base, 0), val); + + if (mixer->cfg->has_formatter) + sun50i_fmt_setup(mixer, mode->hdisplay, + mode->vdisplay, mixer->color_model.format); +} + +static u32 *sun8i_mixer_get_supported_fmts(struct sunxi_engine *engine, u32 *num) +{ + struct sun8i_mixer *mixer = engine_to_sun8i_mixer(engine); + u32 *formats, count; + + count = 0; + + formats = kcalloc(5, sizeof(*formats), GFP_KERNEL); + if (!formats) + return NULL; + + if (mixer->cfg->has_formatter) { + formats[count++] = MEDIA_BUS_FMT_UYYVYY10_0_5X30; + formats[count++] = MEDIA_BUS_FMT_YUV8_1X24; + formats[count++] = MEDIA_BUS_FMT_UYVY8_1X16; + formats[count++] = MEDIA_BUS_FMT_UYYVYY8_0_5X24; + } + + formats[count++] = MEDIA_BUS_FMT_RGB888_1X24; + + *num = count; + + return formats; } static const struct sunxi_engine_ops sun8i_engine_ops = { - .commit = sun8i_mixer_commit, - .layers_init = sun8i_layers_init, - .mode_set = sun8i_mixer_mode_set, + .commit = sun8i_mixer_commit, + .layers_init = sun8i_layers_init, + .mode_set = sun8i_mixer_mode_set, + .get_supported_fmts = sun8i_mixer_get_supported_fmts, }; static const struct regmap_config sun8i_mixer_regmap_config = { @@ -484,6 +527,11 @@ static int sun8i_mixer_bind(struct device *dev, struct device *master, if (!mixer->cfg) return -EINVAL; + /* default output format, supported by all mixers */ + mixer->color_model.format = MEDIA_BUS_FMT_RGB888_1X24; + /* default color encoding, ignored with RGB I/O */ + mixer->color_model.encoding = DRM_COLOR_YCBCR_BT601; + regs = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(regs)) return PTR_ERR(regs); diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.h b/drivers/gpu/drm/sun4i/sun8i_mixer.h index 8417b8fef2e1f..5f465a974fbdf 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.h +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.h @@ -9,6 +9,7 @@ #include #include #include +#include #include #include "sunxi_engine.h" @@ -177,6 +178,11 @@ struct sun8i_mixer_cfg { unsigned int scanline_yuv; }; +struct sun8i_color_model { + u32 format; + enum drm_color_encoding encoding; +}; + struct sun8i_mixer { struct sunxi_engine engine; @@ -186,6 +192,11 @@ struct sun8i_mixer { struct clk *bus_clk; struct clk *mod_clk; + + struct regmap *top_regs; + struct regmap *disp_regs; + + struct sun8i_color_model color_model; }; enum { From patchwork Sun Feb 16 18:36:09 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Walklin X-Patchwork-Id: 13976643 Received: from fhigh-b4-smtp.messagingengine.com (fhigh-b4-smtp.messagingengine.com [202.12.124.155]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C0BAB19F116; Sun, 16 Feb 2025 18:38:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=202.12.124.155 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739731131; cv=none; b=mNdN2gnnV1IXESz72rP2wmItKvEw6Mxgy7kC8Ou52sFtCuEqY3jvdR7DZ4gm7STdzlmpc6sGAXKI1H9jyR+mBwWaqfuo74BWmeDVah0J/53E1KoeyUbk8EsJJLUv892I9jzpsiWDdgYGen6pIN2njf/FdWaIq7AkZ/9swjOO/6E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739731131; c=relaxed/simple; bh=KllBecj1gAxqKa/l8eAVT8/134TMEvzDMd8PgUGeBQY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=UA2+bMxTY8HbML/jx7r57G+qw5Bkm9lWpOf1Q/wZ6bgyD4iW7His8A5uvQ+1gNA1usj2PdCf6bHi1rDkALohEB4OKyNWuop6tosR3wAhRfx6B2ZgsWFvXBHq0nEPzZGHJCWFILBn2dsPMtOXFlCzwcRjcSBf97Cc0qx7i97zqYQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com; spf=pass smtp.mailfrom=testtoast.com; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b=dxURs7eH; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b=Fy9a6MGk; arc=none smtp.client-ip=202.12.124.155 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=testtoast.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b="dxURs7eH"; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="Fy9a6MGk" Received: from phl-compute-06.internal (phl-compute-06.phl.internal [10.202.2.46]) by mailfhigh.stl.internal (Postfix) with ESMTP id 2497425400C3; Sun, 16 Feb 2025 13:38:48 -0500 (EST) Received: from phl-mailfrontend-01 ([10.202.2.162]) by phl-compute-06.internal (MEProxy); Sun, 16 Feb 2025 13:38:48 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=testtoast.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm3; t=1739731127; x= 1739817527; bh=aSpdqmQhmaEaEyQnbvHD5WvuW8sxRaHfdBO7i1cX1dg=; b=d xURs7eHIZJSDD8ALfRKboyDXWphmZ/BGyvN1Vc8ypKj8RBMlbK3bppPCODAoHsD1 lXdMtEcgjwG5OAF1WtBBqjdiHyAFkR4kuL66kPYs+bzL+YQaxAh9abUQ8FlWkK+N tL9D77rNXBJcYymgEsVIaf0leV8q2Go5Qn/Dd5Y3UDAFV579GBRVOhteH4a+1RQ2 zUJBL1Y4pzQvzVq0ib41/EF6bwvipoNhPxArhNlmbCV9IfXUQbChNcgB0vht1Lw8 HY8uc5JhxL5B73mVOTIimxrMoQ9BPM6TJkBpw2HxBO+7Rm3sYINlKhYkcRJPXpYy 33LYzRssqe80oVe5+5sGg== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-sender :x-me-sender:x-sasl-enc; s=fm3; t=1739731127; x=1739817527; bh=a SpdqmQhmaEaEyQnbvHD5WvuW8sxRaHfdBO7i1cX1dg=; b=Fy9a6MGkq57Wa+BOE PSdcrwK5dPIE3wd6HbtljvUBZQrYpa10gb+JKnMTZXFY7gcqPWzDEp7XrEve5bv9 tIOJXlUhBsqM28mSvH5OGEWka7j3PzRTCxPWbGJME6rBgWoaS/HeozrVUYazE7vO JHfBm5pk4NAloGiM7MOraFFX6hgb3A3QHDFaH6zLmkuFdWBI2Akgmo4rlGUxfrc1 nKTSvA0YMd5kF4+BQd0T648q3HwzldfBtIperwocKI5C8M5MDC5MxgUCYX9vku6y 2mIvjozLEUjpieOmK2P+Kb+12JwvK8E3/Dc9DWcHFArCtLOkvTbP+GRezuNCI0jU SAjRA== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeefvddrtddtgdehiedvtdcutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpggftfghnshhusghstghrihgsvgdp uffrtefokffrpgfnqfghnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivg hnthhsucdlqddutddtmdenucfjughrpefhvfevufffkffojghfggfgsedtkeertdertddt necuhfhrohhmpefthigrnhcuhggrlhhklhhinhcuoehrhigrnhesthgvshhtthhorghsth drtghomheqnecuggftrfgrthhtvghrnhepffehieffgedtgfffjeetveegfeekleeileek veeuteffteetudffveegieeiheetnecuvehluhhsthgvrhfuihiivgepvdenucfrrghrrg hmpehmrghilhhfrhhomheprhihrghnsehtvghsthhtohgrshhtrdgtohhmpdhnsggprhgt phhtthhopedvgedpmhhouggvpehsmhhtphhouhhtpdhrtghpthhtohepmhhrihhprghrug eskhgvrhhnvghlrdhorhhgpdhrtghpthhtohepfigvnhhssegtshhivgdrohhrghdprhgt phhtthhopehmrggrrhhtvghnrdhlrghnkhhhohhrshhtsehlihhnuhigrdhinhhtvghlrd gtohhmpdhrtghpthhtohepthiiihhmmhgvrhhmrghnnhesshhushgvrdguvgdprhgtphht thhopegrihhrlhhivggusehgmhgrihhlrdgtohhmpdhrtghpthhtohepuggrnhhivghlse hffhiflhhlrdgthhdprhgtphhtthhopehjvghrnhgvjhdrshhkrhgrsggvtgesghhmrghi lhdrtghomhdprhgtphhtthhopehsrghmuhgvlhesshhhohhllhgrnhgurdhorhhgpdhrtg hpthhtoheprhhosghhsehkvghrnhgvlhdrohhrgh X-ME-Proxy: Feedback-ID: idc0145fc:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Sun, 16 Feb 2025 13:38:41 -0500 (EST) From: Ryan Walklin To: Maxime Ripard , Chen-Yu Tsai , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Daniel Vetter , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: Andre Przywara , Chris Morgan , Hironori KIKUCHI , Philippe Simons , Dmitry Baryshkov , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Ryan Walklin Subject: [PATCH v7 09/27] drm: sun4i: de3: refactor YUV formatter module setup Date: Mon, 17 Feb 2025 07:36:09 +1300 Message-ID: <20250216183710.8443-10-ryan@testtoast.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250216183710.8443-3-ryan@testtoast.com> References: <20250216183710.8443-3-ryan@testtoast.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Because the format is stored in the mixer configuration, the formatter module setup function no longer requires the color format to be passed separately. Remove this from the setup function declaration and access the format via the mixer object. Signed-off-by: Ryan Walklin --- Changelog v5..v6: - Add this commit updating the sun50i_fmt_setup function --- drivers/gpu/drm/sun4i/sun50i_fmt.c | 5 +++-- drivers/gpu/drm/sun4i/sun50i_fmt.h | 3 +-- drivers/gpu/drm/sun4i/sun8i_mixer.c | 3 +-- 3 files changed, 5 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun50i_fmt.c b/drivers/gpu/drm/sun4i/sun50i_fmt.c index 050a8716ae862..376a3c9b993f4 100644 --- a/drivers/gpu/drm/sun4i/sun50i_fmt.c +++ b/drivers/gpu/drm/sun4i/sun50i_fmt.c @@ -51,13 +51,14 @@ static void sun50i_fmt_de3_limits(u32 *limits, u32 colorspace, bool bit10) } } -void sun50i_fmt_setup(struct sun8i_mixer *mixer, u16 width, - u16 height, u32 format) +void sun50i_fmt_setup(struct sun8i_mixer *mixer, u16 width, u16 height) { u32 colorspace, limit[3], base; struct regmap *regs; bool bit10; + u32 format; + format = mixer->color_model.format; colorspace = sun50i_fmt_get_colorspace(format); bit10 = sun50i_fmt_is_10bit(format); base = SUN50I_FMT_DE3; diff --git a/drivers/gpu/drm/sun4i/sun50i_fmt.h b/drivers/gpu/drm/sun4i/sun50i_fmt.h index 4127f7206aade..dd6816c90dfcd 100644 --- a/drivers/gpu/drm/sun4i/sun50i_fmt.h +++ b/drivers/gpu/drm/sun4i/sun50i_fmt.h @@ -26,7 +26,6 @@ #define SUN50I_FMT_CS_YUV422 1 #define SUN50I_FMT_CS_YUV420 2 -void sun50i_fmt_setup(struct sun8i_mixer *mixer, u16 width, - u16 height, u32 format); +void sun50i_fmt_setup(struct sun8i_mixer *mixer, u16 width, u16 height); #endif diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c index bc934186bfd6f..3069329210085 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c @@ -405,8 +405,7 @@ static void sun8i_mixer_mode_set(struct sunxi_engine *engine, SUN8I_MIXER_BLEND_ATTR_FCOLOR(bld_base, 0), val); if (mixer->cfg->has_formatter) - sun50i_fmt_setup(mixer, mode->hdisplay, - mode->vdisplay, mixer->color_model.format); + sun50i_fmt_setup(mixer, mode->hdisplay, mode->vdisplay); } static u32 *sun8i_mixer_get_supported_fmts(struct sunxi_engine *engine, u32 *num) From patchwork Sun Feb 16 18:36:10 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Walklin X-Patchwork-Id: 13976644 Received: from fout-b4-smtp.messagingengine.com (fout-b4-smtp.messagingengine.com [202.12.124.147]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7F41A38385; Sun, 16 Feb 2025 18:38:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=202.12.124.147 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739731140; cv=none; b=h7rU+zuAS21MZQ+4KXzpz08+xXI3yYEytZOKrTylW+PjIfjTit8bH9ZBICUdK/aSZHogLZKGWWBBJJHYh82zZfsy9v7Kutfz8zb+nedbPzdAIz9nzhAfpGyBSs8rV5bjBs25B1IKBzyQrHR6RIUwnBZEJYJKyVO7//fYURNw0cg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739731140; c=relaxed/simple; bh=9JvHuKNb1HNTv2SFCS4Vc2HbrzSswSCllScgkrEDBvI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=C/t24Nnn87Xu8IfNSFN9LAF/OL//RQ5ZJq0soBXA+D94YEBF999BX97ebZfSjNm/70CzxLkzymf+5grIq/3CMPwof3NRf24Ms8SUl2VoqJ44817EKwGSe1gZY2AHjScWMF/V+VfrNy85LXPlu/QnapP3ZXtqUB23Lnclos/AW7o= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com; spf=pass smtp.mailfrom=testtoast.com; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b=LSrM/AZG; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b=RoWgJcKF; arc=none smtp.client-ip=202.12.124.147 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=testtoast.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b="LSrM/AZG"; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="RoWgJcKF" Received: from phl-compute-04.internal (phl-compute-04.phl.internal [10.202.2.44]) by mailfout.stl.internal (Postfix) with ESMTP id E4F45114011D; Sun, 16 Feb 2025 13:38:56 -0500 (EST) Received: from phl-mailfrontend-01 ([10.202.2.162]) by phl-compute-04.internal (MEProxy); Sun, 16 Feb 2025 13:38:57 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=testtoast.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm3; t=1739731136; x= 1739817536; bh=1dDCRF3dbNnQV39blNgTNc7VbdL72A86bgF17fXGjsc=; b=L SrM/AZGxoCD7XTONIZyJpALRhK9KM+A6vt918P9UB08hIUPpZyUSPwrsCrjyoeK0 CEeB7RCLOK2ElZb/lIVB55vKdck7nhAUrR0N+z8FC3fI0JmgGRX8KMMTqABtS9EP 3jXQYDngIO7elnj9pSbdSc5EISMg6p3Dnfrwkk99oWIFuXqh938bZbKxRK7kH92c ixR2X2/N6jfzktEKMjY9NnwHSZS3bs4nxst3lOa85FtsfZ2p8jdsRyAz3ItXSQcD bJRzMtC0qkQJoPMgYhOXItDM44WR9yMoG8djwf2UkWq6cnmKL3LcfYMLK7A76+aH iV0bkFeVRcQ/DcOvK52oQ== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-sender :x-me-sender:x-sasl-enc; s=fm3; t=1739731136; x=1739817536; bh=1 dDCRF3dbNnQV39blNgTNc7VbdL72A86bgF17fXGjsc=; b=RoWgJcKFos9Gi0T5s R0WnFOT7nlLkjvszfKhlBmacy4GJD4lV9h3SfQRqDHXf4QIK+CAbm17uZbOJKpfq E7Qo2pcs/hB9uSxLNnJfy8ZMbzi7GNzY3wNrym0a2WfWIJjjBqh12RkSDI4/UuHb cT66w0chC6HJ5xHOD2Ixz1RVfljnmIu/Z9CA2Kn4thksm05F533YfWPlrNgHNT3T Xt5jmYN7VpqGOn5j4r1XvSPW/dmhpJ+hWYMWf41OMk6o0BeLHE9mOvBDQADAuYM8 R6maPfOH3bYz8m3yw0aHqPwik+Dk6ED4Mtxqk4AmiWaMy8NMCqgjcA1Oe0TPAmNS S3KKA== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeefvddrtddtgdehiedvudcutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpggftfghnshhusghstghrihgsvgdp uffrtefokffrpgfnqfghnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivg hnthhsucdlqddutddtmdenucfjughrpefhvfevufffkffojghfggfgsedtkeertdertddt necuhfhrohhmpefthigrnhcuhggrlhhklhhinhcuoehrhigrnhesthgvshhtthhorghsth drtghomheqnecuggftrfgrthhtvghrnhepffehieffgedtgfffjeetveegfeekleeileek veeuteffteetudffveegieeiheetnecuvehluhhsthgvrhfuihiivgepudenucfrrghrrg hmpehmrghilhhfrhhomheprhihrghnsehtvghsthhtohgrshhtrdgtohhmpdhnsggprhgt phhtthhopedvgedpmhhouggvpehsmhhtphhouhhtpdhrtghpthhtohepmhhrihhprghrug eskhgvrhhnvghlrdhorhhgpdhrtghpthhtohepfigvnhhssegtshhivgdrohhrghdprhgt phhtthhopehmrggrrhhtvghnrdhlrghnkhhhohhrshhtsehlihhnuhigrdhinhhtvghlrd gtohhmpdhrtghpthhtohepthiiihhmmhgvrhhmrghnnhesshhushgvrdguvgdprhgtphht thhopegrihhrlhhivggusehgmhgrihhlrdgtohhmpdhrtghpthhtohepuggrnhhivghlse hffhiflhhlrdgthhdprhgtphhtthhopehjvghrnhgvjhdrshhkrhgrsggvtgesghhmrghi lhdrtghomhdprhgtphhtthhopehsrghmuhgvlhesshhhohhllhgrnhgurdhorhhgpdhrtg hpthhtoheprhhosghhsehkvghrnhgvlhdrohhrgh X-ME-Proxy: Feedback-ID: idc0145fc:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Sun, 16 Feb 2025 13:38:50 -0500 (EST) From: Ryan Walklin To: Maxime Ripard , Chen-Yu Tsai , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Daniel Vetter , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: Andre Przywara , Chris Morgan , Hironori KIKUCHI , Philippe Simons , Dmitry Baryshkov , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Ryan Walklin Subject: [PATCH v7 10/27] drm: sun4i: de3: pass mixer reference to ccsc setup function Date: Mon, 17 Feb 2025 07:36:10 +1300 Message-ID: <20250216183710.8443-11-ryan@testtoast.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250216183710.8443-3-ryan@testtoast.com> References: <20250216183710.8443-3-ryan@testtoast.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Jernej Skrabec Configuration of the DE3 colorspace and dynamic range correction module requires knowledge of the current video format and encoding. Pass the display mixer by reference to the csc setup function, rather than the register map alone, to allow access to this information. Signed-off-by: Jernej Skrabec Signed-off-by: Ryan Walklin Changelog v5..v6: - Pass mixer instead of engine now that mixer holds color information. --- drivers/gpu/drm/sun4i/sun8i_csc.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun8i_csc.c b/drivers/gpu/drm/sun4i/sun8i_csc.c index 558f7a4c1354e..7f3dc6a7b550d 100644 --- a/drivers/gpu/drm/sun4i/sun8i_csc.c +++ b/drivers/gpu/drm/sun4i/sun8i_csc.c @@ -148,17 +148,19 @@ static void sun8i_csc_setup(struct regmap *map, u32 base, regmap_write(map, SUN8I_CSC_CTRL(base), val); } -static void sun8i_de3_ccsc_setup(struct regmap *map, int layer, +static void sun8i_de3_ccsc_setup(struct sun8i_mixer *mixer, int layer, enum sun8i_format_type fmt_type, enum drm_color_encoding encoding, enum drm_color_range range) { u32 addr, val, mask; + struct regmap *map; const u32 *table; int i; mask = SUN50I_MIXER_BLEND_CSC_CTL_EN(layer); table = yuv2rgb_de3[range][encoding]; + map = mixer->engine.regs; switch (fmt_type) { case FORMAT_TYPE_RGB: @@ -204,7 +206,7 @@ void sun8i_csc_set_ccsc(struct sun8i_mixer *mixer, int layer, u32 base; if (mixer->cfg->is_de3) { - sun8i_de3_ccsc_setup(mixer->engine.regs, layer, + sun8i_de3_ccsc_setup(mixer, layer, fmt_type, encoding, range); return; } From patchwork Sun Feb 16 18:36:11 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Walklin X-Patchwork-Id: 13976645 Received: from fout-b4-smtp.messagingengine.com (fout-b4-smtp.messagingengine.com [202.12.124.147]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4E43719F116; Sun, 16 Feb 2025 18:39:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=202.12.124.147 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739731148; cv=none; b=n/dql7OtsP/VwZVbKkOFLWKqvxQyKwh9rCKR0vUgYYODMLLn60pd4Qkk2lDiMqdlASLphby2apkD7acTobbX7+ogdCCYNnfVOcZ4J15fwH+jSkWIIqvaYQ+/ReSDG71CVVyUg26itI/2vWiOEtmbFZP/V/LGIannT2Z9xVRojWw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739731148; c=relaxed/simple; bh=aXvx7DxxKVHQq2JWmCAXmH4YVK+MLZC6Y4oznejmgfo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=dS2LXBpihl7XHUtNB3PTBhY9U2gpHkZHwNJdsfYLsFYGW2+GLVLXBhoKsS1sZbSTCfEVqBoI9Pe8cDpJYCCUYwy/k3robr7f7Y5KAm38Iy5DHEo9kI9cOTLsWVez1nccegC1/hgrDqKy/4ssOh9NGuHSHMhcPA5xXvtBP4B6pRQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com; spf=pass smtp.mailfrom=testtoast.com; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b=gkVIOT/x; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b=TE7mvO/I; arc=none smtp.client-ip=202.12.124.147 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=testtoast.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b="gkVIOT/x"; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="TE7mvO/I" Received: from phl-compute-05.internal (phl-compute-05.phl.internal [10.202.2.45]) by mailfout.stl.internal (Postfix) with ESMTP id B44AF114009B; Sun, 16 Feb 2025 13:39:04 -0500 (EST) Received: from phl-mailfrontend-01 ([10.202.2.162]) by phl-compute-05.internal (MEProxy); Sun, 16 Feb 2025 13:39:05 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=testtoast.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm3; t=1739731144; x= 1739817544; bh=chkqY/i57N5j2R/MW6F2Rhln1vRxxr1L0R2oXQh0CuQ=; b=g kVIOT/xsDuRhj/QNdMW9er/wfpZoqwzx0K3BCk3jUJqtNpd2SwWkxhxr555imyhL eQ84g7uS9ZuiV2gp5NyAs47CO0xKtwIwXKRSxypNkV7xfkr/B1uGwTWf+4KvQw2X gLvyF9qGB7qmga+1Q9yTpTs5kdUohraEL6As1bNlcAWvXmn0AxXSSzeGyPSfpZ6T 6rceRk5jdBZ3/d5AudLmS178l31tId5Fe5v555+pxjVt8+tiNl2GMnKsKDADyuDb Ik6icmBkI/hugAtnqGXE6kO6RXVAbrrAsdNfJEwNkvPEMqCOkDb/JFeRx8jf5QHq MFV2TpeTCNgFb7IMCP44g== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-sender :x-me-sender:x-sasl-enc; s=fm3; t=1739731144; x=1739817544; bh=c hkqY/i57N5j2R/MW6F2Rhln1vRxxr1L0R2oXQh0CuQ=; b=TE7mvO/I3v7dUFR/s 5mB/A7ppADPjKUEGHNCnGOK9Ginj8XvYWXWoUnTVlvZtscua2w9mde7gG8/IYs9P 4rTPG3obXsHzSxiiMf/vVuEP3PYkraf0eptIO40O1MHQxvvWLf1I+NYHjpngkQkt WdCaEed1JfPEKa1ncbzlRbDgKdQMnCBQOOvE7zqRWslgUatsBt87k9bWo2S0IZpp FdrUXF5Zss7KJ1hPNhiiN6lDEz9ao+mFkUTPjAUi6fFd1pSwYBThDLIgXoMXFGmC oBF7Qf2vTScTocb+SaWsf78qj6E0yBo4rY7yEvyPb+H9aCAUAOy67hEesh4Drick 86yfg== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeefvddrtddtgdehiedvtdcutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpggftfghnshhusghstghrihgsvgdp uffrtefokffrpgfnqfghnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivg hnthhsucdlqddutddtmdenucfjughrpefhvfevufffkffojghfggfgsedtkeertdertddt necuhfhrohhmpefthigrnhcuhggrlhhklhhinhcuoehrhigrnhesthgvshhtthhorghsth drtghomheqnecuggftrfgrthhtvghrnhepffehieffgedtgfffjeetveegfeekleeileek veeuteffteetudffveegieeiheetnecuvehluhhsthgvrhfuihiivgepudenucfrrghrrg hmpehmrghilhhfrhhomheprhihrghnsehtvghsthhtohgrshhtrdgtohhmpdhnsggprhgt phhtthhopedvgedpmhhouggvpehsmhhtphhouhhtpdhrtghpthhtohepmhhrihhprghrug eskhgvrhhnvghlrdhorhhgpdhrtghpthhtohepfigvnhhssegtshhivgdrohhrghdprhgt phhtthhopehmrggrrhhtvghnrdhlrghnkhhhohhrshhtsehlihhnuhigrdhinhhtvghlrd gtohhmpdhrtghpthhtohepthiiihhmmhgvrhhmrghnnhesshhushgvrdguvgdprhgtphht thhopegrihhrlhhivggusehgmhgrihhlrdgtohhmpdhrtghpthhtohepuggrnhhivghlse hffhiflhhlrdgthhdprhgtphhtthhopehjvghrnhgvjhdrshhkrhgrsggvtgesghhmrghi lhdrtghomhdprhgtphhtthhopehsrghmuhgvlhesshhhohhllhgrnhgurdhorhhgpdhrtg hpthhtoheprhhosghhsehkvghrnhgvlhdrohhrgh X-ME-Proxy: Feedback-ID: idc0145fc:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Sun, 16 Feb 2025 13:38:57 -0500 (EST) From: Ryan Walklin To: Maxime Ripard , Chen-Yu Tsai , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Daniel Vetter , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: Andre Przywara , Chris Morgan , Hironori KIKUCHI , Philippe Simons , Dmitry Baryshkov , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Ryan Walklin Subject: [PATCH v7 11/27] drm: sun4i: de3: add YUV support to the color space correction module Date: Mon, 17 Feb 2025 07:36:11 +1300 Message-ID: <20250216183710.8443-12-ryan@testtoast.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250216183710.8443-3-ryan@testtoast.com> References: <20250216183710.8443-3-ryan@testtoast.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Jernej Skrabec Add coefficients and support for YUV formats to the display engine colorspace and dynamic range correction submodule. Signed-off-by: Jernej Skrabec Signed-off-by: Ryan Walklin --- Changelog v6..v7: - Restore sun8i_csc_get_de3_yuv_table() helper omitted from previous version. --- drivers/gpu/drm/sun4i/sun8i_csc.c | 166 +++++++++++++++++++++++++++++- 1 file changed, 164 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun8i_csc.c b/drivers/gpu/drm/sun4i/sun8i_csc.c index 7f3dc6a7b550d..275589d64e52b 100644 --- a/drivers/gpu/drm/sun4i/sun8i_csc.c +++ b/drivers/gpu/drm/sun4i/sun8i_csc.c @@ -5,6 +5,8 @@ #include +#include + #include "sun8i_csc.h" #include "sun8i_mixer.h" @@ -107,6 +109,135 @@ static const u32 yuv2rgb_de3[2][3][12] = { }, }; +/* always convert to limited mode */ +static const u32 rgb2yuv_de3[3][12] = { + [DRM_COLOR_YCBCR_BT601] = { + 0x0000837A, 0x0001021D, 0x00003221, 0x00000040, + 0xFFFFB41C, 0xFFFF6B03, 0x0000E0E1, 0x00000200, + 0x0000E0E1, 0xFFFF43B1, 0xFFFFDB6E, 0x00000200, + }, + [DRM_COLOR_YCBCR_BT709] = { + 0x00005D7C, 0x00013A7C, 0x00001FBF, 0x00000040, + 0xFFFFCC78, 0xFFFF52A7, 0x0000E0E1, 0x00000200, + 0x0000E0E1, 0xFFFF33BE, 0xFFFFEB61, 0x00000200, + }, + [DRM_COLOR_YCBCR_BT2020] = { + 0x00007384, 0x00012A21, 0x00001A13, 0x00000040, + 0xFFFFC133, 0xFFFF5DEC, 0x0000E0E1, 0x00000200, + 0x0000E0E1, 0xFFFF3135, 0xFFFFEDEA, 0x00000200, + }, +}; + +/* always convert to limited mode */ +static const u32 yuv2yuv_de3[2][3][3][12] = { + [DRM_COLOR_YCBCR_LIMITED_RANGE] = { + [DRM_COLOR_YCBCR_BT601] = { + [DRM_COLOR_YCBCR_BT601] = { + 0x00020000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00020000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00020000, 0x00000000, + }, + [DRM_COLOR_YCBCR_BT709] = { + 0x00020000, 0xFFFFC4D7, 0xFFFF9589, 0xFFC00040, + 0x00000000, 0x0002098B, 0x00003AAF, 0xFE000200, + 0x00000000, 0x0000266D, 0x00020CF8, 0xFE000200, + }, + [DRM_COLOR_YCBCR_BT2020] = { + 0x00020000, 0xFFFFBFCE, 0xFFFFC5FF, 0xFFC00040, + 0x00000000, 0x00020521, 0x00001F89, 0xFE000200, + 0x00000000, 0x00002C87, 0x00020F07, 0xFE000200, + }, + }, + [DRM_COLOR_YCBCR_BT709] = { + [DRM_COLOR_YCBCR_BT601] = { + 0x00020000, 0x000032D9, 0x00006226, 0xFFC00040, + 0x00000000, 0x0001FACE, 0xFFFFC759, 0xFE000200, + 0x00000000, 0xFFFFDAE7, 0x0001F780, 0xFE000200, + }, + [DRM_COLOR_YCBCR_BT709] = { + 0x00020000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00020000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00020000, 0x00000000, + }, + [DRM_COLOR_YCBCR_BT2020] = { + 0x00020000, 0xFFFFF782, 0x00003036, 0xFFC00040, + 0x00000000, 0x0001FD99, 0xFFFFE5CA, 0xFE000200, + 0x00000000, 0x000005E4, 0x0002015A, 0xFE000200, + }, + }, + [DRM_COLOR_YCBCR_BT2020] = { + [DRM_COLOR_YCBCR_BT601] = { + 0x00020000, 0x00003B03, 0x000034D2, 0xFFC00040, + 0x00000000, 0x0001FD8C, 0xFFFFE183, 0xFE000200, + 0x00000000, 0xFFFFD4F3, 0x0001F3FA, 0xFE000200, + }, + [DRM_COLOR_YCBCR_BT709] = { + 0x00020000, 0x00000916, 0xFFFFD061, 0xFFC00040, + 0x00000000, 0x0002021C, 0x00001A40, 0xFE000200, + 0x00000000, 0xFFFFFA19, 0x0001FE5A, 0xFE000200, + }, + [DRM_COLOR_YCBCR_BT2020] = { + 0x00020000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00020000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00020000, 0x00000000, + }, + }, + }, + [DRM_COLOR_YCBCR_FULL_RANGE] = { + [DRM_COLOR_YCBCR_BT601] = { + [DRM_COLOR_YCBCR_BT601] = { + 0x0001B7B8, 0x00000000, 0x00000000, 0x00000040, + 0x00000000, 0x0001C1C2, 0x00000000, 0xFE000200, + 0x00000000, 0x00000000, 0x0001C1C2, 0xFE000200, + }, + [DRM_COLOR_YCBCR_BT709] = { + 0x0001B7B8, 0xFFFFCC08, 0xFFFFA27B, 0x00000040, + 0x00000000, 0x0001CA24, 0x0000338D, 0xFE000200, + 0x00000000, 0x000021C1, 0x0001CD26, 0xFE000200, + }, + [DRM_COLOR_YCBCR_BT2020] = { + 0x0001B7B8, 0xFFFFC79C, 0xFFFFCD0C, 0x00000040, + 0x00000000, 0x0001C643, 0x00001BB4, 0xFE000200, + 0x00000000, 0x0000271D, 0x0001CEF5, 0xFE000200, + }, + }, + [DRM_COLOR_YCBCR_BT709] = { + [DRM_COLOR_YCBCR_BT601] = { + 0x0001B7B8, 0x00002CAB, 0x00005638, 0x00000040, + 0x00000000, 0x0001BD32, 0xFFFFCE3C, 0xFE000200, + 0x00000000, 0xFFFFDF6A, 0x0001BA4A, 0xFE000200, + }, + [DRM_COLOR_YCBCR_BT709] = { + 0x0001B7B8, 0x00000000, 0x00000000, 0x00000040, + 0x00000000, 0x0001C1C2, 0x00000000, 0xFE000200, + 0x00000000, 0x00000000, 0x0001C1C2, 0xFE000200, + }, + [DRM_COLOR_YCBCR_BT2020] = { + 0x0001B7B8, 0xFFFFF88A, 0x00002A5A, 0x00000040, + 0x00000000, 0x0001BFA5, 0xFFFFE8FA, 0xFE000200, + 0x00000000, 0x0000052D, 0x0001C2F1, 0xFE000200, + }, + }, + [DRM_COLOR_YCBCR_BT2020] = { + [DRM_COLOR_YCBCR_BT601] = { + 0x0001B7B8, 0x000033D6, 0x00002E66, 0x00000040, + 0x00000000, 0x0001BF9A, 0xFFFFE538, 0xFE000200, + 0x00000000, 0xFFFFDA2F, 0x0001B732, 0xFE000200, + }, + [DRM_COLOR_YCBCR_BT709] = { + 0x0001B7B8, 0x000007FB, 0xFFFFD62B, 0x00000040, + 0x00000000, 0x0001C39D, 0x0000170F, 0xFE000200, + 0x00000000, 0xFFFFFAD1, 0x0001C04F, 0xFE000200, + }, + [DRM_COLOR_YCBCR_BT2020] = { + 0x0001B7B8, 0x00000000, 0x00000000, 0x00000040, + 0x00000000, 0x0001C1C2, 0x00000000, 0xFE000200, + 0x00000000, 0x00000000, 0x0001C1C2, 0xFE000200, + }, + }, + }, +}; + static void sun8i_csc_setup(struct regmap *map, u32 base, enum sun8i_format_type fmt_type, enum drm_color_encoding encoding, @@ -148,30 +279,61 @@ static void sun8i_csc_setup(struct regmap *map, u32 base, regmap_write(map, SUN8I_CSC_CTRL(base), val); } +static const u32 *sun8i_csc_get_de3_yuv_table(enum drm_color_encoding in_enc, + enum drm_color_range in_range, + u32 out_format, + enum drm_color_encoding out_enc) +{ + if (out_format == MEDIA_BUS_FMT_RGB888_1X24) + return yuv2rgb_de3[in_range][in_enc]; + + /* check for identity transformation */ + if (in_range == DRM_COLOR_YCBCR_LIMITED_RANGE && out_enc == in_enc) + return NULL; + + return yuv2yuv_de3[in_range][in_enc][out_enc]; +} + static void sun8i_de3_ccsc_setup(struct sun8i_mixer *mixer, int layer, enum sun8i_format_type fmt_type, enum drm_color_encoding encoding, enum drm_color_range range) { - u32 addr, val, mask; + u32 addr, val = 0, mask; struct regmap *map; const u32 *table; int i; + struct sun8i_color_model model; mask = SUN50I_MIXER_BLEND_CSC_CTL_EN(layer); table = yuv2rgb_de3[range][encoding]; map = mixer->engine.regs; + model = mixer->color_model; switch (fmt_type) { case FORMAT_TYPE_RGB: - val = 0; + if (model.format == MEDIA_BUS_FMT_RGB888_1X24) + break; + val = mask; + addr = SUN50I_MIXER_BLEND_CSC_COEFF(DE3_BLD_BASE, layer, 0); + regmap_bulk_write(map, addr, rgb2yuv_de3[model.encoding], 12); break; case FORMAT_TYPE_YUV: + table = sun8i_csc_get_de3_yuv_table(encoding, range, + model.format, + model.encoding); + if (!table) + break; val = mask; addr = SUN50I_MIXER_BLEND_CSC_COEFF(DE3_BLD_BASE, layer, 0); regmap_bulk_write(map, addr, table, 12); break; case FORMAT_TYPE_YVU: + table = sun8i_csc_get_de3_yuv_table(encoding, range, + model.format, + model.encoding); + if (!table) + table = yuv2yuv_de3[range][encoding][encoding]; val = mask; for (i = 0; i < 12; i++) { if ((i & 3) == 1) From patchwork Sun Feb 16 18:36:12 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Walklin X-Patchwork-Id: 13976646 Received: from fout-b4-smtp.messagingengine.com (fout-b4-smtp.messagingengine.com [202.12.124.147]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D24D119F117; Sun, 16 Feb 2025 18:39:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=202.12.124.147 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739731155; cv=none; b=f6wtoK1/Ds0TDT1Z04o7JZ46f1ixmWyvC1SYFF3kKlIK5Z/1380Lokc/b8TItyX8CiEg6sesVJcZUNxg+9SSr2xWP/DSmT8fJ0aSv1tJAqMhdC/B5TGdoIBk2Eg0vKKHC/t6byauok6g2YfxRXvV3AwoLEf9lIKrVX3EFKq1304= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739731155; c=relaxed/simple; bh=m/HQEOs3sIqQx5pHpxexvu6bxOLHwr9LC471uzTV+Cg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=f32DhNywck2qQ3fznqCdheRAc1Zf3QUfE87mW9WLng1ph7uSUc1sovfrYv3iprvE3/LinuENZKsxrRTLOzfYSiZQ/NH9LwCNcIripDDcwsVl65L7qSkJV+91tIWX3fySFZODt4NTcmFaXujlC0zl0mNFEkjhnR7mzIlL/nzsDTQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com; spf=pass smtp.mailfrom=testtoast.com; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b=Suba2//H; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b=IhL7evoN; arc=none smtp.client-ip=202.12.124.147 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=testtoast.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b="Suba2//H"; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="IhL7evoN" Received: from phl-compute-11.internal (phl-compute-11.phl.internal [10.202.2.51]) by mailfout.stl.internal (Postfix) with ESMTP id 67DFE114009B; Sun, 16 Feb 2025 13:39:12 -0500 (EST) Received: from phl-mailfrontend-01 ([10.202.2.162]) by phl-compute-11.internal (MEProxy); Sun, 16 Feb 2025 13:39:13 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=testtoast.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm3; t=1739731152; x= 1739817552; bh=pNN4RBGoTZlMx5uVmdpRTe10uEZ7WZE2J9+a1pOThlU=; b=S uba2//HkPip1ot1UjCBOmAo8E1BP2DQOSGu3486t0V1Nx/PxkImpac0yLtfYcT9o h38j0hXPHAXWn9NGNYbFYEFkhMTQEIucwyLStrslP3L+NCBjxBzv8waQG4uL0fw7 g1lPiH/3CDP8qRU0uzAoeIf6Oj/Jcyuk0LZXzCYcd7Nrg6S544Cxy2ExGesFzWA5 l5eHwfnpEPu1izG0NvXooozwb7BhYViJWE6KSDxj19b14CuiyxcGB7Yms6kmf9OH F1sIRNuq9j90aRyPgxQdgJhlbWSjnCLk481FKaPsJ/smDJ2veJMlCbTLGx52MtUy +Z4ouP+uP6UD2xQI07YSw== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-sender :x-me-sender:x-sasl-enc; s=fm3; t=1739731152; x=1739817552; bh=p NN4RBGoTZlMx5uVmdpRTe10uEZ7WZE2J9+a1pOThlU=; b=IhL7evoNBQsIBAYS6 qvciG05Wm5GHieZMZNFmrIb8qqXw19relm0cuq9YlusvSLoqmo+D73BtNfkiDy7/ 093yL/2Z0MA+pI1d9t69ZiEx3XWsP/sVNRceST6/p7LIGoHFNj7VeRiLBD3qgYWU LEPBsljPrbhXYINwAzmVUtAzY3zzGYjrWhGQe762adcbGjya9tSwzuOV3W5R+eNe TyuCBLTOhr3+x065/OhduSgv3uueLQqdbpKs2fdOXXbxgDGv+LLzIIRVHN9LC08Y riivUIrADx0uqrrrbcaHnk83+0kHR+vMzkfoQZ0G9CE0MOr25myOgBvF4pAJfdto OsGsg== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeefvddrtddtgdehiedvtdcutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpggftfghnshhusghstghrihgsvgdp uffrtefokffrpgfnqfghnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivg hnthhsucdlqddutddtmdenucfjughrpefhvfevufffkffojghfggfgsedtkeertdertddt necuhfhrohhmpefthigrnhcuhggrlhhklhhinhcuoehrhigrnhesthgvshhtthhorghsth drtghomheqnecuggftrfgrthhtvghrnhepffehieffgedtgfffjeetveegfeekleeileek veeuteffteetudffveegieeiheetnecuvehluhhsthgvrhfuihiivgepudenucfrrghrrg hmpehmrghilhhfrhhomheprhihrghnsehtvghsthhtohgrshhtrdgtohhmpdhnsggprhgt phhtthhopedvgedpmhhouggvpehsmhhtphhouhhtpdhrtghpthhtohepmhhrihhprghrug eskhgvrhhnvghlrdhorhhgpdhrtghpthhtohepfigvnhhssegtshhivgdrohhrghdprhgt phhtthhopehmrggrrhhtvghnrdhlrghnkhhhohhrshhtsehlihhnuhigrdhinhhtvghlrd gtohhmpdhrtghpthhtohepthiiihhmmhgvrhhmrghnnhesshhushgvrdguvgdprhgtphht thhopegrihhrlhhivggusehgmhgrihhlrdgtohhmpdhrtghpthhtohepuggrnhhivghlse hffhiflhhlrdgthhdprhgtphhtthhopehjvghrnhgvjhdrshhkrhgrsggvtgesghhmrghi lhdrtghomhdprhgtphhtthhopehsrghmuhgvlhesshhhohhllhgrnhgurdhorhhgpdhrtg hpthhtoheprhhosghhsehkvghrnhgvlhdrohhrgh X-ME-Proxy: Feedback-ID: idc0145fc:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Sun, 16 Feb 2025 13:39:05 -0500 (EST) From: Ryan Walklin To: Maxime Ripard , Chen-Yu Tsai , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Daniel Vetter , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: Andre Przywara , Chris Morgan , Hironori KIKUCHI , Philippe Simons , Dmitry Baryshkov , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Ryan Walklin Subject: [PATCH v7 12/27] drm: sun4i: de3: add YUV support to the TCON Date: Mon, 17 Feb 2025 07:36:12 +1300 Message-ID: <20250216183710.8443-13-ryan@testtoast.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250216183710.8443-3-ryan@testtoast.com> References: <20250216183710.8443-3-ryan@testtoast.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Jernej Skrabec Account for U/V channel subsampling by reducing the dot clock and resolution with a divider in the DE3 timing controller if a YUV format is selected. Signed-off-by: Jernej Skrabec Signed-off-by: Ryan Walklin --- Changelog v5..v6: - Update to obtain color format from mixer if required. --- drivers/gpu/drm/sun4i/sun4i_tcon.c | 28 +++++++++++++++++++++------- 1 file changed, 21 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c index 960e83c8291da..4cd3a07daf6e4 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c @@ -37,6 +37,7 @@ #include "sun4i_tcon.h" #include "sun6i_mipi_dsi.h" #include "sun4i_tcon_dclk.h" +#include "sun8i_mixer.h" #include "sun8i_tcon_top.h" #include "sunxi_engine.h" @@ -598,14 +599,27 @@ static void sun4i_tcon0_mode_set_rgb(struct sun4i_tcon *tcon, static void sun4i_tcon1_mode_set(struct sun4i_tcon *tcon, const struct drm_display_mode *mode) { - unsigned int bp, hsync, vsync, vtotal; + unsigned int bp, hsync, vsync, vtotal, div; + struct sun4i_crtc *scrtc = tcon->crtc; + struct sun8i_mixer *mixer = engine_to_sun8i_mixer(scrtc->engine); + u8 clk_delay; u32 val; WARN_ON(!tcon->quirks->has_channel_1); + switch (mixer->color_model.format) { + case MEDIA_BUS_FMT_UYYVYY8_0_5X24: + case MEDIA_BUS_FMT_UYYVYY10_0_5X30: + div = 2; + break; + default: + div = 1; + break; + } + /* Configure the dot clock */ - clk_set_rate(tcon->sclk1, mode->crtc_clock * 1000); + clk_set_rate(tcon->sclk1, mode->crtc_clock * 1000 / div); /* Adjust clock delay */ clk_delay = sun4i_tcon_get_clk_delay(mode, 1); @@ -624,17 +638,17 @@ static void sun4i_tcon1_mode_set(struct sun4i_tcon *tcon, /* Set the input resolution */ regmap_write(tcon->regs, SUN4I_TCON1_BASIC0_REG, - SUN4I_TCON1_BASIC0_X(mode->crtc_hdisplay) | + SUN4I_TCON1_BASIC0_X(mode->crtc_hdisplay / div) | SUN4I_TCON1_BASIC0_Y(mode->crtc_vdisplay)); /* Set the upscaling resolution */ regmap_write(tcon->regs, SUN4I_TCON1_BASIC1_REG, - SUN4I_TCON1_BASIC1_X(mode->crtc_hdisplay) | + SUN4I_TCON1_BASIC1_X(mode->crtc_hdisplay / div) | SUN4I_TCON1_BASIC1_Y(mode->crtc_vdisplay)); /* Set the output resolution */ regmap_write(tcon->regs, SUN4I_TCON1_BASIC2_REG, - SUN4I_TCON1_BASIC2_X(mode->crtc_hdisplay) | + SUN4I_TCON1_BASIC2_X(mode->crtc_hdisplay / div) | SUN4I_TCON1_BASIC2_Y(mode->crtc_vdisplay)); /* Set horizontal display timings */ @@ -642,8 +656,8 @@ static void sun4i_tcon1_mode_set(struct sun4i_tcon *tcon, DRM_DEBUG_DRIVER("Setting horizontal total %d, backporch %d\n", mode->htotal, bp); regmap_write(tcon->regs, SUN4I_TCON1_BASIC3_REG, - SUN4I_TCON1_BASIC3_H_TOTAL(mode->crtc_htotal) | - SUN4I_TCON1_BASIC3_H_BACKPORCH(bp)); + SUN4I_TCON1_BASIC3_H_TOTAL(mode->crtc_htotal / div) | + SUN4I_TCON1_BASIC3_H_BACKPORCH(bp / div)); bp = mode->crtc_vtotal - mode->crtc_vsync_start; DRM_DEBUG_DRIVER("Setting vertical total %d, backporch %d\n", From patchwork Sun Feb 16 18:36:13 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Walklin X-Patchwork-Id: 13976647 Received: from fhigh-b4-smtp.messagingengine.com (fhigh-b4-smtp.messagingengine.com [202.12.124.155]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8389419F471; Sun, 16 Feb 2025 18:39:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=202.12.124.155 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739731163; cv=none; b=PZm7qkv4mkZ5n25RgE5qcD74LIBcKLmzEUxZO2a6rHEG8YMayY4TgYqxS+/3u8braXjX4A7V4uFU1GPTPD0Qpqld8S5hcejLlffn6R1qkn83L0e9Rxo08cjILje+6jhE60zxB3HbH3+fftyp2pahwIQJxDW1/y0S42jKBPcMXYE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739731163; c=relaxed/simple; bh=zZVcifmkgd/u3S7kLE/8MgYbekuuOtV/2J+F10hktB8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=hGAzCk1j7YMrQF+ktHtD2nPiMMMDy8sgXJEF0VgeUHEzu2Q7ffTlVgIY8U/wJ0T+zRKcbudU8lvtxQ3zSB9ZHg+oYzw92eSYRvSS1hqUp5VN6+IdHZY3LIoqIgQ/7A28ETK0okpW16zSe+75E6b656uIUtT3qXyxmt9ZQGG3/wk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com; spf=pass smtp.mailfrom=testtoast.com; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b=B5zP1nEy; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b=bPfBOxUL; arc=none smtp.client-ip=202.12.124.155 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=testtoast.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b="B5zP1nEy"; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="bPfBOxUL" Received: from phl-compute-04.internal (phl-compute-04.phl.internal [10.202.2.44]) by mailfhigh.stl.internal (Postfix) with ESMTP id E4620254011F; Sun, 16 Feb 2025 13:39:19 -0500 (EST) Received: from phl-mailfrontend-01 ([10.202.2.162]) by phl-compute-04.internal (MEProxy); Sun, 16 Feb 2025 13:39:20 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=testtoast.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm3; t=1739731159; x= 1739817559; bh=SR4aNkCAYUtHiaJCGIpwOMkLEnS0n+g9NnW3F1+kf3I=; b=B 5zP1nEypBcefYQS4KGo5Zg96E3TWkhVCTmUYZtrzicvHnII/4bbMFM1HlcuhgpDZ SSwfXJ3ZC5FTfaKMVcPSyrxgUQB+Q+pGZdFQo36uWi85BiNdPyKfMwKOOEoUZGE6 KWmOsx+da8p5q0GP+kBzQDWnzTkmfykF0WTTlAffSEow+pfjKZqAWlWAe8uJ1H9s mZwrHU5tEYOXplkhSmVbmbKOMdTGmty/x9dv8dpFw3K+aO6KKXmqORmTQN80T8Vl FzKENQHCg4I5Q8GcZS4I727GX5C+CEnYTWulwlSX5Rb/8Nc2QfeN4KkLL5YnnyA1 TzfQpCe8Pg/6oBd/fk+dg== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-sender :x-me-sender:x-sasl-enc; s=fm3; t=1739731159; x=1739817559; bh=S R4aNkCAYUtHiaJCGIpwOMkLEnS0n+g9NnW3F1+kf3I=; b=bPfBOxULQgvbhgWnx +mqTN41bDjXYVdLRvZ7njLHesG4vYs/SxlfT8Pl906c7y421JKRtlmfTAWg5n7e3 VfSKPK4xSwuR51lS1ejDtSxvzQjwAdVjrldCdHj0k+mSY5dF++bJBdAlqyfesppP mE2q3aQXUK5pQmQsc9Yr8/p3eJPPMYuUmveZyvlUWgJuu2jBfgi4/13LU3YgCx8B eEVIlj8XGDbThtmiwifOAycm8tiULbt7z+29sI7hHv9iYbOZGJUXPdXUGjCjLM+q lQCk8s6ag2XUbIPDayQXOsndaeVBEdDsZ0OLc1VjwKMYMXd+TQwnbo1EkGeSK5qC 0aqmQ== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeefvddrtddtgdehiedvudcutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpggftfghnshhusghstghrihgsvgdp uffrtefokffrpgfnqfghnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivg hnthhsucdlqddutddtmdenucfjughrpefhvfevufffkffojghfggfgsedtkeertdertddt necuhfhrohhmpefthigrnhcuhggrlhhklhhinhcuoehrhigrnhesthgvshhtthhorghsth drtghomheqnecuggftrfgrthhtvghrnhepffehieffgedtgfffjeetveegfeekleeileek veeuteffteetudffveegieeiheetnecuvehluhhsthgvrhfuihiivgepvdenucfrrghrrg hmpehmrghilhhfrhhomheprhihrghnsehtvghsthhtohgrshhtrdgtohhmpdhnsggprhgt phhtthhopedvgedpmhhouggvpehsmhhtphhouhhtpdhrtghpthhtohepmhhrihhprghrug eskhgvrhhnvghlrdhorhhgpdhrtghpthhtohepfigvnhhssegtshhivgdrohhrghdprhgt phhtthhopehmrggrrhhtvghnrdhlrghnkhhhohhrshhtsehlihhnuhigrdhinhhtvghlrd gtohhmpdhrtghpthhtohepthiiihhmmhgvrhhmrghnnhesshhushgvrdguvgdprhgtphht thhopegrihhrlhhivggusehgmhgrihhlrdgtohhmpdhrtghpthhtohepuggrnhhivghlse hffhiflhhlrdgthhdprhgtphhtthhopehjvghrnhgvjhdrshhkrhgrsggvtgesghhmrghi lhdrtghomhdprhgtphhtthhopehsrghmuhgvlhesshhhohhllhgrnhgurdhorhhgpdhrtg hpthhtoheprhhosghhsehkvghrnhgvlhdrohhrgh X-ME-Proxy: Feedback-ID: idc0145fc:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Sun, 16 Feb 2025 13:39:13 -0500 (EST) From: Ryan Walklin To: Maxime Ripard , Chen-Yu Tsai , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Daniel Vetter , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: Andre Przywara , Chris Morgan , Hironori KIKUCHI , Philippe Simons , Dmitry Baryshkov , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Ryan Walklin Subject: [PATCH v7 13/27] drm: sun4i: support YUV formats in VI scaler Date: Mon, 17 Feb 2025 07:36:13 +1300 Message-ID: <20250216183710.8443-14-ryan@testtoast.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250216183710.8443-3-ryan@testtoast.com> References: <20250216183710.8443-3-ryan@testtoast.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Jernej Skrabec Now that YUV formats are available, enable support in the VI scaler. Signed-off-by: Jernej Skrabec Signed-off-by: Ryan Walklin Changelog v4..v5: - Add commit description --- drivers/gpu/drm/sun4i/sun8i_vi_scaler.c | 85 +++++++++++++++++-------- 1 file changed, 58 insertions(+), 27 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_scaler.c b/drivers/gpu/drm/sun4i/sun8i_vi_scaler.c index 7ba75011adf9f..2e49a6e5f1f1c 100644 --- a/drivers/gpu/drm/sun4i/sun8i_vi_scaler.c +++ b/drivers/gpu/drm/sun4i/sun8i_vi_scaler.c @@ -843,6 +843,11 @@ static u32 sun8i_vi_scaler_base(struct sun8i_mixer *mixer, int channel) DE2_VI_SCALER_UNIT_SIZE * channel; } +static bool sun8i_vi_scaler_is_vi_plane(struct sun8i_mixer *mixer, int channel) +{ + return true; +} + static int sun8i_vi_scaler_coef_index(unsigned int step) { unsigned int scale, int_part, float_part; @@ -867,44 +872,65 @@ static int sun8i_vi_scaler_coef_index(unsigned int step) } } -static void sun8i_vi_scaler_set_coeff(struct regmap *map, u32 base, - u32 hstep, u32 vstep, - const struct drm_format_info *format) +static void sun8i_vi_scaler_set_coeff_vi(struct regmap *map, u32 base, + u32 hstep, u32 vstep, + const struct drm_format_info *format) { const u32 *ch_left, *ch_right, *cy; - int offset, i; + int offset; - if (format->hsub == 1 && format->vsub == 1) { - ch_left = lan3coefftab32_left; - ch_right = lan3coefftab32_right; - cy = lan2coefftab32; - } else { + if (format->is_yuv) { ch_left = bicubic8coefftab32_left; ch_right = bicubic8coefftab32_right; cy = bicubic4coefftab32; + } else { + ch_left = lan3coefftab32_left; + ch_right = lan3coefftab32_right; + cy = lan2coefftab32; } offset = sun8i_vi_scaler_coef_index(hstep) * SUN8I_VI_SCALER_COEFF_COUNT; - for (i = 0; i < SUN8I_VI_SCALER_COEFF_COUNT; i++) { - regmap_write(map, SUN8I_SCALER_VSU_YHCOEFF0(base, i), - lan3coefftab32_left[offset + i]); - regmap_write(map, SUN8I_SCALER_VSU_YHCOEFF1(base, i), - lan3coefftab32_right[offset + i]); - regmap_write(map, SUN8I_SCALER_VSU_CHCOEFF0(base, i), - ch_left[offset + i]); - regmap_write(map, SUN8I_SCALER_VSU_CHCOEFF1(base, i), - ch_right[offset + i]); - } + regmap_bulk_write(map, SUN8I_SCALER_VSU_YHCOEFF0(base, 0), + &lan3coefftab32_left[offset], + SUN8I_VI_SCALER_COEFF_COUNT); + regmap_bulk_write(map, SUN8I_SCALER_VSU_YHCOEFF1(base, 0), + &lan3coefftab32_right[offset], + SUN8I_VI_SCALER_COEFF_COUNT); + regmap_bulk_write(map, SUN8I_SCALER_VSU_CHCOEFF0(base, 0), + &ch_left[offset], SUN8I_VI_SCALER_COEFF_COUNT); + regmap_bulk_write(map, SUN8I_SCALER_VSU_CHCOEFF1(base, 0), + &ch_right[offset], SUN8I_VI_SCALER_COEFF_COUNT); offset = sun8i_vi_scaler_coef_index(hstep) * SUN8I_VI_SCALER_COEFF_COUNT; - for (i = 0; i < SUN8I_VI_SCALER_COEFF_COUNT; i++) { - regmap_write(map, SUN8I_SCALER_VSU_YVCOEFF(base, i), - lan2coefftab32[offset + i]); - regmap_write(map, SUN8I_SCALER_VSU_CVCOEFF(base, i), - cy[offset + i]); - } + regmap_bulk_write(map, SUN8I_SCALER_VSU_YVCOEFF(base, 0), + &lan2coefftab32[offset], SUN8I_VI_SCALER_COEFF_COUNT); + regmap_bulk_write(map, SUN8I_SCALER_VSU_CVCOEFF(base, 0), + &cy[offset], SUN8I_VI_SCALER_COEFF_COUNT); +} + +static void sun8i_vi_scaler_set_coeff_ui(struct regmap *map, u32 base, + u32 hstep, u32 vstep, + const struct drm_format_info *format) +{ + const u32 *table; + int offset; + + offset = sun8i_vi_scaler_coef_index(hstep) * + SUN8I_VI_SCALER_COEFF_COUNT; + regmap_bulk_write(map, SUN8I_SCALER_VSU_YHCOEFF0(base, 0), + &lan2coefftab32[offset], SUN8I_VI_SCALER_COEFF_COUNT); + offset = sun8i_vi_scaler_coef_index(vstep) * + SUN8I_VI_SCALER_COEFF_COUNT; + regmap_bulk_write(map, SUN8I_SCALER_VSU_YVCOEFF(base, 0), + &lan2coefftab32[offset], SUN8I_VI_SCALER_COEFF_COUNT); + + table = format->is_yuv ? bicubic4coefftab32 : lan2coefftab32; + offset = sun8i_vi_scaler_coef_index(hstep) * + SUN8I_VI_SCALER_COEFF_COUNT; + regmap_bulk_write(map, SUN8I_SCALER_VSU_CHCOEFF0(base, 0), + &table[offset], SUN8I_VI_SCALER_COEFF_COUNT); } void sun8i_vi_scaler_enable(struct sun8i_mixer *mixer, int layer, bool enable) @@ -994,6 +1020,11 @@ void sun8i_vi_scaler_setup(struct sun8i_mixer *mixer, int layer, SUN8I_SCALER_VSU_CHPHASE(base), chphase); regmap_write(mixer->engine.regs, SUN8I_SCALER_VSU_CVPHASE(base), cvphase); - sun8i_vi_scaler_set_coeff(mixer->engine.regs, base, - hscale, vscale, format); + + if (sun8i_vi_scaler_is_vi_plane(mixer, layer)) + sun8i_vi_scaler_set_coeff_vi(mixer->engine.regs, base, + hscale, vscale, format); + else + sun8i_vi_scaler_set_coeff_ui(mixer->engine.regs, base, + hscale, vscale, format); } From patchwork Sun Feb 16 18:36:14 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Walklin X-Patchwork-Id: 13976648 Received: from fout-b4-smtp.messagingengine.com (fout-b4-smtp.messagingengine.com [202.12.124.147]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3A56419F117; Sun, 16 Feb 2025 18:39:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=202.12.124.147 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739731171; cv=none; b=VYMad6WG6ouaOImo1xpm/MSfu6yax4SUs7Kzfs+BohZVvBaVOaO6HfxvIZftsQqnoY9QqF1VGsyB6F3diAE6/1K0FRL5lH6JDzYt/69hu29xWDLDP8zK31Y2+ldZF/XnuWWdiABf8vurh4DWw5QOG6bIM3JkR6bN1nik1Tjy5jg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739731171; c=relaxed/simple; bh=Mr81wlSxNxeOlM9KVML3qv2MCK5JPtZd8IMuRqKJS7I=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=oYbv2aYTMgh7B5x6P+YqN2dRlfn7VJSB9dl7ZnlRGa9Yi1xoqrgnTDKIFp2m5hyO5h+/sEHz5upI98KHOVivHdw1puVKKyjDU+sRYxbeaF0fQqM9EAtFNBEwuxNu7YBzvkE0c5vpFuKAS8TLKrsLmuZ58IzICxvaYuLvH/ZpIk8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com; spf=pass smtp.mailfrom=testtoast.com; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b=GNJ6CG5R; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b=iZYQ/1YD; arc=none smtp.client-ip=202.12.124.147 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=testtoast.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b="GNJ6CG5R"; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="iZYQ/1YD" Received: from phl-compute-10.internal (phl-compute-10.phl.internal [10.202.2.50]) by mailfout.stl.internal (Postfix) with ESMTP id 8A1E9114009B; Sun, 16 Feb 2025 13:39:27 -0500 (EST) Received: from phl-mailfrontend-01 ([10.202.2.162]) by phl-compute-10.internal (MEProxy); Sun, 16 Feb 2025 13:39:28 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=testtoast.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm3; t=1739731167; x= 1739817567; bh=gKcmqGZKorsiIlCNL9/PGjupHdxWBSc2lFaECuipVpI=; b=G NJ6CG5RFUpJQrEB91XPVWJamHbZ0DZgI84HD+rr+9EjitDC4ri2XVrWae/Bd1km1 JyLj02NUEUUelpZojglawWlSpToWtYDBg0lvf8nbbYap4eD5KcO8+Qs8TkSgTu7S 5Dj86+oBv6KYM810IR4kluVmdrBG1ubpPFl7lhFqtU3pDfkhFIUzkHbL+K1aIUU4 9Q7OQpFX7u7gpf0wGooB+gwdrUQIY44b72WBkLtm9bjVRPZwlniAlyKrhVzfx9Ns 2eLn/CEN/+DqoDYtJZK8hTjZ3b3GA0j8VgPkKnpg8Zh8weB+oWUuQMjye85OGERB JVwek39Z7ScbUkA1eKw1A== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-sender :x-me-sender:x-sasl-enc; s=fm3; t=1739731167; x=1739817567; bh=g KcmqGZKorsiIlCNL9/PGjupHdxWBSc2lFaECuipVpI=; b=iZYQ/1YDCLj5b3gt2 UDtFWq3mv27oV2h0Uv4awTzHia5vanpgAHeXE4yIvPrtzNZBcNHgzwygGPBKhgGn CT3NGXgOVgcVIBrHcSuyqgCWA3M4HbJnMTLin8YCdggFDk1RS4AP7iJvfE/GjFLC 1FQcuT80Kw8IqviggfP2Q3C9ng3kCKTooB+1176BREK3AwFO3+2cW77MGEz18eZZ /Fwa3vfXMTml5+aLpq6ExXtVMoaWHjBmIZaHhUXA00cwiqvvfNwI/RvbuvqjBk2H pyHcKrg5gHqgMfUN+M4ZwMxrRQRMaJ+6OZUyZV+Xp8rZkVg0O/vV/TfYHiCgIeaw AdITA== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeefvddrtddtgdehiedvtdcutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpggftfghnshhusghstghrihgsvgdp uffrtefokffrpgfnqfghnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivg hnthhsucdlqddutddtmdenucfjughrpefhvfevufffkffojghfggfgsedtkeertdertddt necuhfhrohhmpefthigrnhcuhggrlhhklhhinhcuoehrhigrnhesthgvshhtthhorghsth drtghomheqnecuggftrfgrthhtvghrnhepffehieffgedtgfffjeetveegfeekleeileek veeuteffteetudffveegieeiheetnecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrg hmpehmrghilhhfrhhomheprhihrghnsehtvghsthhtohgrshhtrdgtohhmpdhnsggprhgt phhtthhopedvgedpmhhouggvpehsmhhtphhouhhtpdhrtghpthhtohepmhhrihhprghrug eskhgvrhhnvghlrdhorhhgpdhrtghpthhtohepfigvnhhssegtshhivgdrohhrghdprhgt phhtthhopehmrggrrhhtvghnrdhlrghnkhhhohhrshhtsehlihhnuhigrdhinhhtvghlrd gtohhmpdhrtghpthhtohepthiiihhmmhgvrhhmrghnnhesshhushgvrdguvgdprhgtphht thhopegrihhrlhhivggusehgmhgrihhlrdgtohhmpdhrtghpthhtohepuggrnhhivghlse hffhiflhhlrdgthhdprhgtphhtthhopehjvghrnhgvjhdrshhkrhgrsggvtgesghhmrghi lhdrtghomhdprhgtphhtthhopehsrghmuhgvlhesshhhohhllhgrnhgurdhorhhgpdhrtg hpthhtoheprhhosghhsehkvghrnhgvlhdrohhrgh X-ME-Proxy: Feedback-ID: idc0145fc:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Sun, 16 Feb 2025 13:39:20 -0500 (EST) From: Ryan Walklin To: Maxime Ripard , Chen-Yu Tsai , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Daniel Vetter , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: Andre Przywara , Chris Morgan , Hironori KIKUCHI , Philippe Simons , Dmitry Baryshkov , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Ryan Walklin Subject: [PATCH v7 14/27] drm: sun4i: de2/de3: add mixer version enum Date: Mon, 17 Feb 2025 07:36:14 +1300 Message-ID: <20250216183710.8443-15-ryan@testtoast.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250216183710.8443-3-ryan@testtoast.com> References: <20250216183710.8443-3-ryan@testtoast.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Jernej Skrabec The Allwinner DE2 and DE3 display engine mixers are currently identified by a simple boolean flag. This will not scale to support additional DE variants. Convert the boolean flag to an enum. Signed-off-by: Jernej Skrabec Signed-off-by: Ryan Walklin Reviewed-by: Andre Przywara --- Changelog v5..v6: - Update struct comment regarding change from is_de3 flag to de_type --- drivers/gpu/drm/sun4i/sun8i_csc.c | 2 +- drivers/gpu/drm/sun4i/sun8i_mixer.c | 14 +++++++++++-- drivers/gpu/drm/sun4i/sun8i_mixer.h | 27 +++++++++++++++---------- drivers/gpu/drm/sun4i/sun8i_ui_scaler.c | 2 +- drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 8 ++++---- drivers/gpu/drm/sun4i/sun8i_vi_scaler.c | 4 ++-- 6 files changed, 36 insertions(+), 21 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun8i_csc.c b/drivers/gpu/drm/sun4i/sun8i_csc.c index 275589d64e52b..66c9ee29842cd 100644 --- a/drivers/gpu/drm/sun4i/sun8i_csc.c +++ b/drivers/gpu/drm/sun4i/sun8i_csc.c @@ -367,7 +367,7 @@ void sun8i_csc_set_ccsc(struct sun8i_mixer *mixer, int layer, { u32 base; - if (mixer->cfg->is_de3) { + if (mixer->cfg->de_type == sun8i_mixer_de3) { sun8i_de3_ccsc_setup(mixer, layer, fmt_type, encoding, range); return; diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c index 3069329210085..ea1f477700d4a 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c @@ -584,7 +584,7 @@ static int sun8i_mixer_bind(struct device *dev, struct device *master, base = sun8i_blender_base(mixer); /* Reset registers and disable unused sub-engines */ - if (mixer->cfg->is_de3) { + if (mixer->cfg->de_type == sun8i_mixer_de3) { for (i = 0; i < DE3_MIXER_UNIT_SIZE; i += 4) regmap_write(mixer->engine.regs, i, 0); @@ -675,6 +675,7 @@ static void sun8i_mixer_remove(struct platform_device *pdev) static const struct sun8i_mixer_cfg sun8i_a83t_mixer0_cfg = { .ccsc = CCSC_MIXER0_LAYOUT, + .de_type = sun8i_mixer_de2, .scaler_mask = 0xf, .scanline_yuv = 2048, .ui_num = 3, @@ -683,6 +684,7 @@ static const struct sun8i_mixer_cfg sun8i_a83t_mixer0_cfg = { static const struct sun8i_mixer_cfg sun8i_a83t_mixer1_cfg = { .ccsc = CCSC_MIXER1_LAYOUT, + .de_type = sun8i_mixer_de2, .scaler_mask = 0x3, .scanline_yuv = 2048, .ui_num = 1, @@ -691,6 +693,7 @@ static const struct sun8i_mixer_cfg sun8i_a83t_mixer1_cfg = { static const struct sun8i_mixer_cfg sun8i_h3_mixer0_cfg = { .ccsc = CCSC_MIXER0_LAYOUT, + .de_type = sun8i_mixer_de2, .mod_rate = 432000000, .scaler_mask = 0xf, .scanline_yuv = 2048, @@ -700,6 +703,7 @@ static const struct sun8i_mixer_cfg sun8i_h3_mixer0_cfg = { static const struct sun8i_mixer_cfg sun8i_r40_mixer0_cfg = { .ccsc = CCSC_MIXER0_LAYOUT, + .de_type = sun8i_mixer_de2, .mod_rate = 297000000, .scaler_mask = 0xf, .scanline_yuv = 2048, @@ -709,6 +713,7 @@ static const struct sun8i_mixer_cfg sun8i_r40_mixer0_cfg = { static const struct sun8i_mixer_cfg sun8i_r40_mixer1_cfg = { .ccsc = CCSC_MIXER1_LAYOUT, + .de_type = sun8i_mixer_de2, .mod_rate = 297000000, .scaler_mask = 0x3, .scanline_yuv = 2048, @@ -717,6 +722,7 @@ static const struct sun8i_mixer_cfg sun8i_r40_mixer1_cfg = { }; static const struct sun8i_mixer_cfg sun8i_v3s_mixer_cfg = { + .de_type = sun8i_mixer_de2, .vi_num = 2, .ui_num = 1, .scaler_mask = 0x3, @@ -727,6 +733,7 @@ static const struct sun8i_mixer_cfg sun8i_v3s_mixer_cfg = { static const struct sun8i_mixer_cfg sun20i_d1_mixer0_cfg = { .ccsc = CCSC_D1_MIXER0_LAYOUT, + .de_type = sun8i_mixer_de2, .mod_rate = 297000000, .scaler_mask = 0x3, .scanline_yuv = 2048, @@ -736,6 +743,7 @@ static const struct sun8i_mixer_cfg sun20i_d1_mixer0_cfg = { static const struct sun8i_mixer_cfg sun20i_d1_mixer1_cfg = { .ccsc = CCSC_MIXER1_LAYOUT, + .de_type = sun8i_mixer_de2, .mod_rate = 297000000, .scaler_mask = 0x1, .scanline_yuv = 1024, @@ -745,6 +753,7 @@ static const struct sun8i_mixer_cfg sun20i_d1_mixer1_cfg = { static const struct sun8i_mixer_cfg sun50i_a64_mixer0_cfg = { .ccsc = CCSC_MIXER0_LAYOUT, + .de_type = sun8i_mixer_de2, .mod_rate = 297000000, .scaler_mask = 0xf, .scanline_yuv = 4096, @@ -754,6 +763,7 @@ static const struct sun8i_mixer_cfg sun50i_a64_mixer0_cfg = { static const struct sun8i_mixer_cfg sun50i_a64_mixer1_cfg = { .ccsc = CCSC_MIXER1_LAYOUT, + .de_type = sun8i_mixer_de2, .mod_rate = 297000000, .scaler_mask = 0x3, .scanline_yuv = 2048, @@ -763,7 +773,7 @@ static const struct sun8i_mixer_cfg sun50i_a64_mixer1_cfg = { static const struct sun8i_mixer_cfg sun50i_h6_mixer0_cfg = { .ccsc = CCSC_MIXER0_LAYOUT, - .is_de3 = true, + .de_type = sun8i_mixer_de3, .has_formatter = 1, .mod_rate = 600000000, .scaler_mask = 0xf, diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.h b/drivers/gpu/drm/sun4i/sun8i_mixer.h index 5f465a974fbdf..baf2d024898a9 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.h +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.h @@ -152,6 +152,11 @@ enum { CCSC_D1_MIXER0_LAYOUT, }; +enum sun8i_mixer_type { + sun8i_mixer_de2, + sun8i_mixer_de3, +}; + /** * struct sun8i_mixer_cfg - mixer HW configuration * @vi_num: number of VI channels @@ -163,19 +168,19 @@ enum { * @ccsc: select set of CCSC base addresses from the enumeration above. * @mod_rate: module clock rate that needs to be set in order to have * a functional block. - * @is_de3: true, if this is next gen display engine 3.0, false otherwise. + * @de_type: sun8i_mixer_type enum representing the display engine generation. * @has_formatter: true, if mixer has formatter core, for 10-bit and YUV handling * @scaline_yuv: size of a scanline for VI scaler for YUV formats. */ struct sun8i_mixer_cfg { - int vi_num; - int ui_num; - int scaler_mask; - int ccsc; - unsigned long mod_rate; - unsigned int is_de3 : 1; - unsigned int has_formatter : 1; - unsigned int scanline_yuv; + int vi_num; + int ui_num; + int scaler_mask; + int ccsc; + unsigned long mod_rate; + unsigned int de_type; + unsigned int has_formatter : 1; + unsigned int scanline_yuv; }; struct sun8i_color_model { @@ -227,13 +232,13 @@ engine_to_sun8i_mixer(struct sunxi_engine *engine) static inline u32 sun8i_blender_base(struct sun8i_mixer *mixer) { - return mixer->cfg->is_de3 ? DE3_BLD_BASE : DE2_BLD_BASE; + return mixer->cfg->de_type == sun8i_mixer_de3 ? DE3_BLD_BASE : DE2_BLD_BASE; } static inline u32 sun8i_channel_base(struct sun8i_mixer *mixer, int channel) { - if (mixer->cfg->is_de3) + if (mixer->cfg->de_type == sun8i_mixer_de3) return DE3_CH_BASE + channel * DE3_CH_SIZE; else return DE2_CH_BASE + channel * DE2_CH_SIZE; diff --git a/drivers/gpu/drm/sun4i/sun8i_ui_scaler.c b/drivers/gpu/drm/sun4i/sun8i_ui_scaler.c index ae0806bccac7f..504ffa0971a4f 100644 --- a/drivers/gpu/drm/sun4i/sun8i_ui_scaler.c +++ b/drivers/gpu/drm/sun4i/sun8i_ui_scaler.c @@ -93,7 +93,7 @@ static u32 sun8i_ui_scaler_base(struct sun8i_mixer *mixer, int channel) { int vi_num = mixer->cfg->vi_num; - if (mixer->cfg->is_de3) + if (mixer->cfg->de_type == sun8i_mixer_de3) return DE3_VI_SCALER_UNIT_BASE + DE3_VI_SCALER_UNIT_SIZE * vi_num + DE3_UI_SCALER_UNIT_SIZE * (channel - vi_num); diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c index 3c657b069d1f4..4647e9bcccaa7 100644 --- a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c +++ b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c @@ -25,7 +25,7 @@ static void sun8i_vi_layer_update_alpha(struct sun8i_mixer *mixer, int channel, ch_base = sun8i_channel_base(mixer, channel); - if (mixer->cfg->is_de3) { + if (mixer->cfg->de_type >= sun8i_mixer_de3) { mask = SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA_MASK | SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA_MODE_MASK; val = SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA @@ -483,7 +483,7 @@ struct sun8i_layer *sun8i_vi_layer_init_one(struct drm_device *drm, layer->channel = index; layer->overlay = 0; - if (mixer->cfg->is_de3) { + if (mixer->cfg->de_type >= sun8i_mixer_de3) { formats = sun8i_vi_layer_de3_formats; format_count = ARRAY_SIZE(sun8i_vi_layer_de3_formats); } else { @@ -507,7 +507,7 @@ struct sun8i_layer *sun8i_vi_layer_init_one(struct drm_device *drm, plane_cnt = mixer->cfg->ui_num + mixer->cfg->vi_num; - if (mixer->cfg->vi_num == 1 || mixer->cfg->is_de3) { + if (mixer->cfg->vi_num == 1 || mixer->cfg->de_type >= sun8i_mixer_de3) { ret = drm_plane_create_alpha_property(&layer->plane); if (ret) { dev_err(drm->dev, "Couldn't add alpha property\n"); @@ -524,7 +524,7 @@ struct sun8i_layer *sun8i_vi_layer_init_one(struct drm_device *drm, supported_encodings = BIT(DRM_COLOR_YCBCR_BT601) | BIT(DRM_COLOR_YCBCR_BT709); - if (mixer->cfg->is_de3) + if (mixer->cfg->de_type >= sun8i_mixer_de3) supported_encodings |= BIT(DRM_COLOR_YCBCR_BT2020); supported_ranges = BIT(DRM_COLOR_YCBCR_LIMITED_RANGE) | diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_scaler.c b/drivers/gpu/drm/sun4i/sun8i_vi_scaler.c index 2e49a6e5f1f1c..aa346c3beb303 100644 --- a/drivers/gpu/drm/sun4i/sun8i_vi_scaler.c +++ b/drivers/gpu/drm/sun4i/sun8i_vi_scaler.c @@ -835,7 +835,7 @@ static const u32 bicubic4coefftab32[480] = { static u32 sun8i_vi_scaler_base(struct sun8i_mixer *mixer, int channel) { - if (mixer->cfg->is_de3) + if (mixer->cfg->de_type == sun8i_mixer_de3) return DE3_VI_SCALER_UNIT_BASE + DE3_VI_SCALER_UNIT_SIZE * channel; else @@ -982,7 +982,7 @@ void sun8i_vi_scaler_setup(struct sun8i_mixer *mixer, int layer, cvphase = vphase; } - if (mixer->cfg->is_de3) { + if (mixer->cfg->de_type >= sun8i_mixer_de3) { u32 val; if (format->hsub == 1 && format->vsub == 1) From patchwork Sun Feb 16 18:36:15 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Walklin X-Patchwork-Id: 13976649 Received: from fhigh-b4-smtp.messagingengine.com (fhigh-b4-smtp.messagingengine.com [202.12.124.155]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EC15019F471; Sun, 16 Feb 2025 18:39:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=202.12.124.155 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739731178; cv=none; b=mA1DKu0+5iW9XxSZRpZm98YZJk7YribfPLdh75QiFkIwrsCfIM1syhpTx5+obxfvzB36w2mCzSQK7LssB1AsQ3pFqIP/DFXNmEl9tKxii8G2483CM5wYn9/QaiNYFxJ9LDsVd51Xk/CWfRmf3QQ+fLCy1qQIhSXbD0NbAgTQPZk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739731178; c=relaxed/simple; bh=rJvT+4VpUip2piau7Iz5oqiXdeItr4msXZgZlzj0EeQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=UOM1XBjIKm9G4Y+rGbxZJd/R3ZW0C7I1c9RDW0KQ41F1HxJZa8YkmZRaJziTfMM0vvbShJNz9VesdDntoob5A84njt/H0TjKHU6FcsXx8QGnjqWAQOQQsHmDJO3CLfp/ctwhSdbsKrnteQ7xh7OsPHLzbcTs/oxc8ebALwcLhcI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com; spf=pass smtp.mailfrom=testtoast.com; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b=pB4DyWYF; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b=W2URzKjC; arc=none smtp.client-ip=202.12.124.155 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=testtoast.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b="pB4DyWYF"; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="W2URzKjC" Received: from phl-compute-04.internal (phl-compute-04.phl.internal [10.202.2.44]) by mailfhigh.stl.internal (Postfix) with ESMTP id 12F592540111; Sun, 16 Feb 2025 13:39:35 -0500 (EST) Received: from phl-mailfrontend-01 ([10.202.2.162]) by phl-compute-04.internal (MEProxy); Sun, 16 Feb 2025 13:39:35 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=testtoast.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm3; t=1739731174; x= 1739817574; bh=BNPX+KdnFL4esoxbEGM54umv5o7+XhVVNtr6t4NDn5w=; b=p B4DyWYFHlEYDVNmC9yTF4dn0hLrLl+CzYhBgAAF/hCH5P+YdcxHw3Mo/pqM7Dr5S o7QbZywkjI0BCEzJvvpoj0kMXQYkeA3lYPKHf911wqTeQ71YAG30taUUzGF/hKlb nCZH9Sf8/RzhVW4ryQGXT0ZuvzEbPzoI9DYdiEXs2uIKtGa+Y7K5P3anlFzdf8hJ 6xZxr/1YwFdF+qF4hkcHR7eKnCdvFMpqPtUzQXH05/91GqfP720cgwXgyi+C9Vjl fzAv14leeEUgAHRXdjAd8YoWHBjFd064v7MjEOJGty54QqY2CIG+D6LYYSNvOWDX +3ykC/fwxwm1xf0+gnckA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-sender :x-me-sender:x-sasl-enc; s=fm3; t=1739731174; x=1739817574; bh=B NPX+KdnFL4esoxbEGM54umv5o7+XhVVNtr6t4NDn5w=; b=W2URzKjC5ssQySw3i xTWupVyX26Ya9UWTSxomcmKXuws0cBBIr/AZ3t8Lrj2Z0eNUpuxl9Z8qaVB66oyV lfCaZvjrE/pEVTy5tm0FdtBOJVEfprU/shMaUJmRxkmn3uWroy7Hu3AAZCYZPR7Q Fx6wA+Y673gxjdy3pPUMsOBdpE0x7DS60wOJiNsianAQjg1TRzxe8+DQ83/lzTPs KKvtRjr76WYZQ0vLccv3ESRqb5k2oExGxP8oqq+VhMkRjKwPpCfQFqQGaBO0NJaE emRfh4Qjv6F5Lv5GdfaI3SXV7fYgSXCr+I6kHNxm86TM5Qri1ZNtdy7JG6d88Y+N l45bg== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeefvddrtddtgdehiedvudcutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpggftfghnshhusghstghrihgsvgdp uffrtefokffrpgfnqfghnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivg hnthhsucdlqddutddtmdenucfjughrpefhvfevufffkffojghfggfgsedtkeertdertddt necuhfhrohhmpefthigrnhcuhggrlhhklhhinhcuoehrhigrnhesthgvshhtthhorghsth drtghomheqnecuggftrfgrthhtvghrnhepffehieffgedtgfffjeetveegfeekleeileek veeuteffteetudffveegieeiheetnecuvehluhhsthgvrhfuihiivgepfeenucfrrghrrg hmpehmrghilhhfrhhomheprhihrghnsehtvghsthhtohgrshhtrdgtohhmpdhnsggprhgt phhtthhopedvgedpmhhouggvpehsmhhtphhouhhtpdhrtghpthhtohepmhhrihhprghrug eskhgvrhhnvghlrdhorhhgpdhrtghpthhtohepfigvnhhssegtshhivgdrohhrghdprhgt phhtthhopehmrggrrhhtvghnrdhlrghnkhhhohhrshhtsehlihhnuhigrdhinhhtvghlrd gtohhmpdhrtghpthhtohepthiiihhmmhgvrhhmrghnnhesshhushgvrdguvgdprhgtphht thhopegrihhrlhhivggusehgmhgrihhlrdgtohhmpdhrtghpthhtohepuggrnhhivghlse hffhiflhhlrdgthhdprhgtphhtthhopehjvghrnhgvjhdrshhkrhgrsggvtgesghhmrghi lhdrtghomhdprhgtphhtthhopehsrghmuhgvlhesshhhohhllhgrnhgurdhorhhgpdhrtg hpthhtoheprhhosghhsehkvghrnhgvlhdrohhrgh X-ME-Proxy: Feedback-ID: idc0145fc:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Sun, 16 Feb 2025 13:39:28 -0500 (EST) From: Ryan Walklin To: Maxime Ripard , Chen-Yu Tsai , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Daniel Vetter , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: Andre Przywara , Chris Morgan , Hironori KIKUCHI , Philippe Simons , Dmitry Baryshkov , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Ryan Walklin Subject: [PATCH v7 15/27] drm: sun4i: de2/de3: refactor mixer initialisation Date: Mon, 17 Feb 2025 07:36:15 +1300 Message-ID: <20250216183710.8443-16-ryan@testtoast.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250216183710.8443-3-ryan@testtoast.com> References: <20250216183710.8443-3-ryan@testtoast.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Jernej Skrabec Now that the DE variant can be selected by enum, take the oppportunity to factor out some common initialisation code to a separate function. Signed-off-by: Jernej Skrabec Signed-off-by: Ryan Walklin Reviewed-by: Andre Przywara --- Changelog v1..v2: - Combine base register allocation and initialisation in sun8i_mixer_init - Whitespace fix Changelog v4..v5: - Remove trailing whitespace --- drivers/gpu/drm/sun4i/sun8i_mixer.c | 64 +++++++++++++++-------------- 1 file changed, 34 insertions(+), 30 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c index ea1f477700d4a..acebbaa60785c 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c @@ -467,6 +467,38 @@ static int sun8i_mixer_of_get_id(struct device_node *node) return of_ep.id; } +static void sun8i_mixer_init(struct sun8i_mixer *mixer) +{ + unsigned int base = sun8i_blender_base(mixer); + int plane_cnt, i; + + /* Enable the mixer */ + regmap_write(mixer->engine.regs, SUN8I_MIXER_GLOBAL_CTL, + SUN8I_MIXER_GLOBAL_CTL_RT_EN); + + /* Set background color to black */ + regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_BKCOLOR(base), + SUN8I_MIXER_BLEND_COLOR_BLACK); + + /* + * Set fill color of bottom plane to black. Generally not needed + * except when VI plane is at bottom (zpos = 0) and enabled. + */ + regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_PIPE_CTL(base), + SUN8I_MIXER_BLEND_PIPE_CTL_FC_EN(0)); + regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_ATTR_FCOLOR(base, 0), + SUN8I_MIXER_BLEND_COLOR_BLACK); + + plane_cnt = mixer->cfg->vi_num + mixer->cfg->ui_num; + for (i = 0; i < plane_cnt; i++) + regmap_write(mixer->engine.regs, + SUN8I_MIXER_BLEND_MODE(base, i), + SUN8I_MIXER_BLEND_MODE_DEF); + + regmap_update_bits(mixer->engine.regs, SUN8I_MIXER_BLEND_PIPE_CTL(base), + SUN8I_MIXER_BLEND_PIPE_CTL_EN_MSK, 0); +} + static int sun8i_mixer_bind(struct device *dev, struct device *master, void *data) { @@ -475,8 +507,6 @@ static int sun8i_mixer_bind(struct device *dev, struct device *master, struct sun4i_drv *drv = drm->dev_private; struct sun8i_mixer *mixer; void __iomem *regs; - unsigned int base; - int plane_cnt; int i, ret; /* @@ -581,8 +611,6 @@ static int sun8i_mixer_bind(struct device *dev, struct device *master, list_add_tail(&mixer->engine.list, &drv->engine_list); - base = sun8i_blender_base(mixer); - /* Reset registers and disable unused sub-engines */ if (mixer->cfg->de_type == sun8i_mixer_de3) { for (i = 0; i < DE3_MIXER_UNIT_SIZE; i += 4) @@ -598,7 +626,7 @@ static int sun8i_mixer_bind(struct device *dev, struct device *master, regmap_write(mixer->engine.regs, SUN50I_MIXER_FMT_EN, 0); regmap_write(mixer->engine.regs, SUN50I_MIXER_CDC0_EN, 0); regmap_write(mixer->engine.regs, SUN50I_MIXER_CDC1_EN, 0); - } else { + } else if (mixer->cfg->de_type == sun8i_mixer_de2) { for (i = 0; i < DE2_MIXER_UNIT_SIZE; i += 4) regmap_write(mixer->engine.regs, i, 0); @@ -611,31 +639,7 @@ static int sun8i_mixer_bind(struct device *dev, struct device *master, regmap_write(mixer->engine.regs, SUN8I_MIXER_DCSC_EN, 0); } - /* Enable the mixer */ - regmap_write(mixer->engine.regs, SUN8I_MIXER_GLOBAL_CTL, - SUN8I_MIXER_GLOBAL_CTL_RT_EN); - - /* Set background color to black */ - regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_BKCOLOR(base), - SUN8I_MIXER_BLEND_COLOR_BLACK); - - /* - * Set fill color of bottom plane to black. Generally not needed - * except when VI plane is at bottom (zpos = 0) and enabled. - */ - regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_PIPE_CTL(base), - SUN8I_MIXER_BLEND_PIPE_CTL_FC_EN(0)); - regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_ATTR_FCOLOR(base, 0), - SUN8I_MIXER_BLEND_COLOR_BLACK); - - plane_cnt = mixer->cfg->vi_num + mixer->cfg->ui_num; - for (i = 0; i < plane_cnt; i++) - regmap_write(mixer->engine.regs, - SUN8I_MIXER_BLEND_MODE(base, i), - SUN8I_MIXER_BLEND_MODE_DEF); - - regmap_update_bits(mixer->engine.regs, SUN8I_MIXER_BLEND_PIPE_CTL(base), - SUN8I_MIXER_BLEND_PIPE_CTL_EN_MSK, 0); + sun8i_mixer_init(mixer); return 0; From patchwork Sun Feb 16 18:36:16 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Walklin X-Patchwork-Id: 13976650 Received: from fhigh-b4-smtp.messagingengine.com (fhigh-b4-smtp.messagingengine.com [202.12.124.155]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 38A8219F42C; Sun, 16 Feb 2025 18:39:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=202.12.124.155 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739731185; cv=none; b=gQkgVBm34qQLNYqZlEeaLCeo88aCH6FvDyt3BVjmPpnIE8VlMje2ZJURaGUuaw5UcO2KjCNnZzBh3f2BjXIBDCXthPj4c8rX773U1FmC2SCswMqjyBD0HcCTAvz6j4CoJJKFYOR6WO7T4fYJgh8gVfSDCAOvEoH2r4ddXGPPXog= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739731185; c=relaxed/simple; bh=H2CmJzZlIqEdqJTJQv1HZaA70aXe/izn7EVD70+91oU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=aay3ZYQ9si7BfnKMWTCWjarRHTp+uh2gpSuYWFc870z75c6PHzLsQsrOQzfsQeIqGats8hxsGdZFCdhTUVzZMTY4JPqSjw3uOeD2MQiRGGUNHkpOYvatn00b/Y9L4ZwfgMVzj74AAiHGiQwBVLNuZR4/MOjGdpiH7M5pnKvAyLI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com; spf=pass smtp.mailfrom=testtoast.com; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b=N6sA/xGZ; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b=TfB98W7s; arc=none smtp.client-ip=202.12.124.155 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=testtoast.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b="N6sA/xGZ"; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="TfB98W7s" Received: from phl-compute-06.internal (phl-compute-06.phl.internal [10.202.2.46]) by mailfhigh.stl.internal (Postfix) with ESMTP id C598725400EC; Sun, 16 Feb 2025 13:39:42 -0500 (EST) Received: from phl-mailfrontend-01 ([10.202.2.162]) by phl-compute-06.internal (MEProxy); Sun, 16 Feb 2025 13:39:43 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=testtoast.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm3; t=1739731182; x= 1739817582; bh=kZ9Uzv86ybQZFZyTdhZ/s15g0zn12UtC1p/M6eL3cGg=; b=N 6sA/xGZCrrsYSbChuSfJNM+yuRtvAv09O8TlPrbDrR8vjS/bL+cq6BqoVtawWV0h VoA0tvtdoBpq13GiRfpi2v2PtPKgRr2mY0ZM1tpnzqgJo03sQ5sKG8E7yhDxqxY3 /dlvU/z3qZDuq0Yoj5GZWN7jgz4MFuPDvqppHScu5q6PAlIT58IprAVO0IFdT8ZX v7i5HqaLGyQgDlK/3H/PRX5BDvOS8Ci44HJ47bf3UTljc8gybA0yWTitkRa/oSnN uNRFANsxBJfq0kI9CRTmKb5TkVfw30ftwDAOJX+GLF20MalxdFfwfdRyJriIKQIi YJLUPL5jp3jbQ+vO3OfAQ== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-sender :x-me-sender:x-sasl-enc; s=fm3; t=1739731182; x=1739817582; bh=k Z9Uzv86ybQZFZyTdhZ/s15g0zn12UtC1p/M6eL3cGg=; b=TfB98W7sPOQW8E/kW MvoEoP/fLvlJigxd/kHuROXSFf4KISXAYZoJbRLA6rhw70u353vxM0qoHVlgcAnM 02A9E+sC+DIVeqy38B1w8VGgPz4kvpBSU1wCqOh1NtpDpxeDQgz8qryshTBM2PIr irGzVEf9ytbGoy7NZWr6RTHe2liHcR+K/XFyQoWPs+R6Wvmaq1FOT7XdWTaf0PZt Jic0kXjpb7f6e/u8CiQ4c/OTcNtV9n3Fy9n9PKNdFGr+PGXM6s+WBr0gNXoriBkf hFN81Yno5bGUMs9Ea7rPgNW0gXyriCknJYqWMP04SpSw2m7xkLKKL78+y6C/1jfe r/T9A== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeefvddrtddtgdehiedvtdcutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpggftfghnshhusghstghrihgsvgdp uffrtefokffrpgfnqfghnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivg hnthhsucdlqddutddtmdenucfjughrpefhvfevufffkffojghfggfgsedtkeertdertddt necuhfhrohhmpefthigrnhcuhggrlhhklhhinhcuoehrhigrnhesthgvshhtthhorghsth drtghomheqnecuggftrfgrthhtvghrnhepffehieffgedtgfffjeetveegfeekleeileek veeuteffteetudffveegieeiheetnecuvehluhhsthgvrhfuihiivgepfeenucfrrghrrg hmpehmrghilhhfrhhomheprhihrghnsehtvghsthhtohgrshhtrdgtohhmpdhnsggprhgt phhtthhopedvgedpmhhouggvpehsmhhtphhouhhtpdhrtghpthhtohepmhhrihhprghrug eskhgvrhhnvghlrdhorhhgpdhrtghpthhtohepfigvnhhssegtshhivgdrohhrghdprhgt phhtthhopehmrggrrhhtvghnrdhlrghnkhhhohhrshhtsehlihhnuhigrdhinhhtvghlrd gtohhmpdhrtghpthhtohepthiiihhmmhgvrhhmrghnnhesshhushgvrdguvgdprhgtphht thhopegrihhrlhhivggusehgmhgrihhlrdgtohhmpdhrtghpthhtohepuggrnhhivghlse hffhiflhhlrdgthhdprhgtphhtthhopehjvghrnhgvjhdrshhkrhgrsggvtgesghhmrghi lhdrtghomhdprhgtphhtthhopehsrghmuhgvlhesshhhohhllhgrnhgurdhorhhgpdhrtg hpthhtoheprhhosghhsehkvghrnhgvlhdrohhrgh X-ME-Proxy: Feedback-ID: idc0145fc:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Sun, 16 Feb 2025 13:39:36 -0500 (EST) From: Ryan Walklin To: Maxime Ripard , Chen-Yu Tsai , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Daniel Vetter , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: Andre Przywara , Chris Morgan , Hironori KIKUCHI , Philippe Simons , Dmitry Baryshkov , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Ryan Walklin Subject: [PATCH v7 16/27] drm: sun4i: vi_scaler refactor vi_scaler enablement Date: Mon, 17 Feb 2025 07:36:16 +1300 Message-ID: <20250216183710.8443-17-ryan@testtoast.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250216183710.8443-3-ryan@testtoast.com> References: <20250216183710.8443-3-ryan@testtoast.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Jernej Skrabec If the video scaler is required, then it is obligatory to set the relevant register to enable it, so move this to the sun8i_vi_scaler_setup() function. This simplifies the alternate case (scaler not required) so replace the vi_scaler_enable() function with a vi_scaler_disable() function. Signed-off-by: Jernej Skrabec Signed-off-by: Ryan Walklin --- drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 3 +-- drivers/gpu/drm/sun4i/sun8i_vi_scaler.c | 21 +++++++++++---------- drivers/gpu/drm/sun4i/sun8i_vi_scaler.h | 2 +- 3 files changed, 13 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c index 4647e9bcccaa7..e348fd0a3d81c 100644 --- a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c +++ b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c @@ -156,10 +156,9 @@ static int sun8i_vi_layer_update_coord(struct sun8i_mixer *mixer, int channel, sun8i_vi_scaler_setup(mixer, channel, src_w, src_h, dst_w, dst_h, hscale, vscale, hphase, vphase, format); - sun8i_vi_scaler_enable(mixer, channel, true); } else { DRM_DEBUG_DRIVER("HW scaling is not needed\n"); - sun8i_vi_scaler_enable(mixer, channel, false); + sun8i_vi_scaler_disable(mixer, channel); } regmap_write(mixer->engine.regs, diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_scaler.c b/drivers/gpu/drm/sun4i/sun8i_vi_scaler.c index aa346c3beb303..e7242301b312c 100644 --- a/drivers/gpu/drm/sun4i/sun8i_vi_scaler.c +++ b/drivers/gpu/drm/sun4i/sun8i_vi_scaler.c @@ -933,20 +933,13 @@ static void sun8i_vi_scaler_set_coeff_ui(struct regmap *map, u32 base, &table[offset], SUN8I_VI_SCALER_COEFF_COUNT); } -void sun8i_vi_scaler_enable(struct sun8i_mixer *mixer, int layer, bool enable) +void sun8i_vi_scaler_disable(struct sun8i_mixer *mixer, int layer) { - u32 val, base; + u32 base; base = sun8i_vi_scaler_base(mixer, layer); - if (enable) - val = SUN8I_SCALER_VSU_CTRL_EN | - SUN8I_SCALER_VSU_CTRL_COEFF_RDY; - else - val = 0; - - regmap_write(mixer->engine.regs, - SUN8I_SCALER_VSU_CTRL(base), val); + regmap_write(mixer->engine.regs, SUN8I_SCALER_VSU_CTRL(base), 0); } void sun8i_vi_scaler_setup(struct sun8i_mixer *mixer, int layer, @@ -982,6 +975,9 @@ void sun8i_vi_scaler_setup(struct sun8i_mixer *mixer, int layer, cvphase = vphase; } + regmap_write(mixer->engine.regs, SUN8I_SCALER_VSU_CTRL(base), + SUN8I_SCALER_VSU_CTRL_EN); + if (mixer->cfg->de_type >= sun8i_mixer_de3) { u32 val; @@ -1027,4 +1023,9 @@ void sun8i_vi_scaler_setup(struct sun8i_mixer *mixer, int layer, else sun8i_vi_scaler_set_coeff_ui(mixer->engine.regs, base, hscale, vscale, format); + + if (mixer->cfg->de_type <= sun8i_mixer_de3) + regmap_write(mixer->engine.regs, SUN8I_SCALER_VSU_CTRL(base), + SUN8I_SCALER_VSU_CTRL_EN | + SUN8I_SCALER_VSU_CTRL_COEFF_RDY); } diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_scaler.h b/drivers/gpu/drm/sun4i/sun8i_vi_scaler.h index 68f6593b369ab..e801bc7a4189e 100644 --- a/drivers/gpu/drm/sun4i/sun8i_vi_scaler.h +++ b/drivers/gpu/drm/sun4i/sun8i_vi_scaler.h @@ -69,7 +69,7 @@ #define SUN50I_SCALER_VSU_ANGLE_SHIFT(x) (((x) << 16) & 0xF) #define SUN50I_SCALER_VSU_ANGLE_OFFSET(x) ((x) & 0xFF) -void sun8i_vi_scaler_enable(struct sun8i_mixer *mixer, int layer, bool enable); +void sun8i_vi_scaler_disable(struct sun8i_mixer *mixer, int layer); void sun8i_vi_scaler_setup(struct sun8i_mixer *mixer, int layer, u32 src_w, u32 src_h, u32 dst_w, u32 dst_h, u32 hscale, u32 vscale, u32 hphase, u32 vphase, From patchwork Sun Feb 16 18:36:17 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Walklin X-Patchwork-Id: 13976651 Received: from fhigh-b4-smtp.messagingengine.com (fhigh-b4-smtp.messagingengine.com [202.12.124.155]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CE90319F471; Sun, 16 Feb 2025 18:39:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=202.12.124.155 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739731193; cv=none; b=Ppp9Rxdd4vMrQZOIL2ZQ5LbB0iEDJKcuIbRxMTtq2J12GMG7wrdvtb/bV2/0pzw9g3Ade1eoNdrpp0eVGxb2+OxItmElfKmGjD/uh+tcsq8BofJG6HwIDtDkLn9wohdXprJdcJIteknrhKIOg57U0vA3w/sBCGi6OWxO1BU7l0s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739731193; c=relaxed/simple; bh=uzgXJJMEaruw9VJ7FltBzG7mE6vBjD2r0bOVD1fXLv0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ozn18YsQaXnwleOJK7c40zHIXU/jnOLU3fJUEeQrKZv3tdv84oh4lYT4X9IdWnxPm+MM7zl2CzN9ihZ0rrHZnu+ZsLdwFYC29JMtVidjsnrqHXPA01Bagjkn5qQyaMl71WWaR6OXkChZpPdVhm6y7OCVbn+iV7tdQWogiBqr4TI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com; spf=pass smtp.mailfrom=testtoast.com; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b=b58uyOyq; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b=TsSF14+s; arc=none smtp.client-ip=202.12.124.155 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=testtoast.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b="b58uyOyq"; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="TsSF14+s" Received: from phl-compute-04.internal (phl-compute-04.phl.internal [10.202.2.44]) by mailfhigh.stl.internal (Postfix) with ESMTP id 67CBA25400C3; Sun, 16 Feb 2025 13:39:50 -0500 (EST) Received: from phl-mailfrontend-01 ([10.202.2.162]) by phl-compute-04.internal (MEProxy); Sun, 16 Feb 2025 13:39:51 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=testtoast.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm3; t=1739731190; x= 1739817590; bh=hVbx/e/0O8lGVMfw6nGdAuWIs0CL+nJx0lLTRkCftPw=; b=b 58uyOyqJ5jv9OsllnTaGcbf0ahweqov/I7rhV6tq5guHoiXk5PfnqjH5ASMjK7Gz o7ISZP77bh7lCmWU0sBH9bBWb46xQpfN35tSA8sAmvP0F7TcIMepiyUoiV7wykQl DKdcZd/e7j+BtEK8GnclsXplA2LSWc+sofn65cDxIqtCbAIpciMS1x7Q60FPb7II Az9aWERfqC0trXttTMl54x3wGBofxvBjPwLeEZ7xuaGgjmrW8F+lRCdBh5vuNrrY 4XVWLbik+ZiN7jg+MjlgFkR/wC26XxUnN7NnUERrQLHyNkejwXbfcXH54Nn4wIBw fGcmRMgbGASgAEDyjZtUQ== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-sender :x-me-sender:x-sasl-enc; s=fm3; t=1739731190; x=1739817590; bh=h Vbx/e/0O8lGVMfw6nGdAuWIs0CL+nJx0lLTRkCftPw=; b=TsSF14+ssyzaTz07+ 5uF87Ooh98jX/TJ4BYzO0jc/V62b7cc9SiRzdDAbYxL5vUGgP7qWawOsOLgvqhSj 0HcqJv0xiAveWWoCZJUjglNfGehh1uNe+bIguzsUtK/qO78/KiiOzJYcYQcB48sK oJ6sYvQ0laYVmUuZJqHn3pE9LRoPAK1KjNdpUkpNlj5b7K+s9fTh37B1sopPEpqp QtkE7VDLar2+yJ4OVy/SwlJqr8ENlaXM0kuU6Y6HkiQmtVORba4ZccOXEtqpTW4X c89LdM1RcApYcHydKaB4W1ewZ58cwXXMlPKnOMVhbWHrR5YNtAqNhwbdDHRcovuu GclUg== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeefvddrtddtgdehiedvudcutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpggftfghnshhusghstghrihgsvgdp uffrtefokffrpgfnqfghnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivg hnthhsucdlqddutddtmdenucfjughrpefhvfevufffkffojghfggfgsedtkeertdertddt necuhfhrohhmpefthigrnhcuhggrlhhklhhinhcuoehrhigrnhesthgvshhtthhorghsth drtghomheqnecuggftrfgrthhtvghrnhepffehieffgedtgfffjeetveegfeekleeileek veeuteffteetudffveegieeiheetnecuvehluhhsthgvrhfuihiivgepgeenucfrrghrrg hmpehmrghilhhfrhhomheprhihrghnsehtvghsthhtohgrshhtrdgtohhmpdhnsggprhgt phhtthhopedvgedpmhhouggvpehsmhhtphhouhhtpdhrtghpthhtohepmhhrihhprghrug eskhgvrhhnvghlrdhorhhgpdhrtghpthhtohepfigvnhhssegtshhivgdrohhrghdprhgt phhtthhopehmrggrrhhtvghnrdhlrghnkhhhohhrshhtsehlihhnuhigrdhinhhtvghlrd gtohhmpdhrtghpthhtohepthiiihhmmhgvrhhmrghnnhesshhushgvrdguvgdprhgtphht thhopegrihhrlhhivggusehgmhgrihhlrdgtohhmpdhrtghpthhtohepuggrnhhivghlse hffhiflhhlrdgthhdprhgtphhtthhopehjvghrnhgvjhdrshhkrhgrsggvtgesghhmrghi lhdrtghomhdprhgtphhtthhopehsrghmuhgvlhesshhhohhllhgrnhgurdhorhhgpdhrtg hpthhtoheprhhosghhsehkvghrnhgvlhdrohhrgh X-ME-Proxy: Feedback-ID: idc0145fc:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Sun, 16 Feb 2025 13:39:43 -0500 (EST) From: Ryan Walklin To: Maxime Ripard , Chen-Yu Tsai , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Daniel Vetter , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: Andre Przywara , Chris Morgan , Hironori KIKUCHI , Philippe Simons , Dmitry Baryshkov , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Ryan Walklin Subject: [PATCH v7 17/27] drm: sun4i: de2/de3: add generic blender register reference function Date: Mon, 17 Feb 2025 07:36:17 +1300 Message-ID: <20250216183710.8443-18-ryan@testtoast.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250216183710.8443-3-ryan@testtoast.com> References: <20250216183710.8443-3-ryan@testtoast.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Jernej Skrabec The DE2 and DE3 engines have a blender register range within the mixer engine register map, whereas the DE33 separates this out into a separate display group. Prepare for this by adding a function to look the blender reference up, with a subsequent patch to add a conditional based on the DE type. Signed-off-by: Jernej Skrabec Signed-off-by: Ryan Walklin --- drivers/gpu/drm/sun4i/sun8i_mixer.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.h b/drivers/gpu/drm/sun4i/sun8i_mixer.h index baf2d024898a9..db962ccd66964 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.h +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.h @@ -235,6 +235,12 @@ sun8i_blender_base(struct sun8i_mixer *mixer) return mixer->cfg->de_type == sun8i_mixer_de3 ? DE3_BLD_BASE : DE2_BLD_BASE; } +static inline struct regmap * +sun8i_blender_regmap(struct sun8i_mixer *mixer) +{ + return mixer->engine.regs; +} + static inline u32 sun8i_channel_base(struct sun8i_mixer *mixer, int channel) { From patchwork Sun Feb 16 18:36:18 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Walklin X-Patchwork-Id: 13976652 Received: from fhigh-b4-smtp.messagingengine.com (fhigh-b4-smtp.messagingengine.com [202.12.124.155]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B000119F471; Sun, 16 Feb 2025 18:39:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=202.12.124.155 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739731201; cv=none; b=jh5Gj/OJsV2VkqmTt5a8T6QNa4n1WLMEXGKex7Mz6+8lzcgyYMmI+WYdNL5fYlGZGRxK6lpO8/lyw9jlnOsbcqDaaZg9YeeIwpUdD8HgJYZdTjU8O03UDxY0CPvJrEzB1Wc1YFdsIsEYAfD2KrenpXFy3+APvqbvQ40Lsq1jbvI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739731201; c=relaxed/simple; bh=5a3WJ4vN0jQVlZlqpdMa46odcjFczTtBEL5VlOOUucQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=U1fdo4KLlh574KK2ZXYWLPVT2u2ux46GL0dCuQzVesqVOT3hJ8TNF7no6RVUzKOk3xfSK8ppo1q+kWtgv38zQrCZCcBaVbQKNtlFsVjGu8G/uIVZ1ivlnciN9q8hgz46K+HxROD/E0wt/uHY4IzdyL/VS0Yl8kTsa5CMrwa0P9I= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com; spf=pass smtp.mailfrom=testtoast.com; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b=FC7Uydqo; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b=yHuGUqQm; arc=none smtp.client-ip=202.12.124.155 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=testtoast.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b="FC7Uydqo"; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="yHuGUqQm" Received: from phl-compute-11.internal (phl-compute-11.phl.internal [10.202.2.51]) by mailfhigh.stl.internal (Postfix) with ESMTP id 0AB6425400EC; Sun, 16 Feb 2025 13:39:58 -0500 (EST) Received: from phl-mailfrontend-01 ([10.202.2.162]) by phl-compute-11.internal (MEProxy); Sun, 16 Feb 2025 13:39:58 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=testtoast.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm3; t=1739731197; x= 1739817597; bh=KKYj19PCNF+aI9EiVNVBvzfmUWleJEMpK2qkXaq7+DA=; b=F C7Uydqo6IbV8eJTv3OWp7Xm1jHNIFkIknjM1S6dapxzp+482NOuaIqHMHpnAX5f9 F0bFh87v+/8Qw6ufWCfWBJ0TQ4DeV7Vh/iuc+LixCade79to6YLqKXt+NMk8oWbk RN3miXHzZwNklK8gpFJuxQ+GzoUQpTDb/M9jVR/HajAWz1bvc05Bq1rI5nYOoWLi ZB44nKhljqroHkR+kdwHPJZLxxIWcYao/wRL/Mhp3Qyep297TOpnVy1LIHZm5Nnb UZPswfUUHz2NzwxtKcsNbBcEaXnytIT00WH7YV+nVso74vPORI+lk4rgG5DbphCC R9Mq12r1Se7WjtX0datbA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-sender :x-me-sender:x-sasl-enc; s=fm3; t=1739731197; x=1739817597; bh=K KYj19PCNF+aI9EiVNVBvzfmUWleJEMpK2qkXaq7+DA=; b=yHuGUqQmvrLwkewBW 8faCkwOkNQ8QMNP0TA2DNmCIIUw3Kd8lYKBw4LdhS3Ok0mxZBWCP9lD8zMG6/aj6 iF1efPwMucdqmsOu+8qBmcQ9jxYvifSML+0GrDsWTd45NokQ2WUcz/KwEckQOIOD XoUkN0iJNOtcCJHrydJ3K4sKNxFNMZjmyicHZPLH/HU8wHjYan/Wr9o3B8zkOgyu KFZWZFhgLh6BAcLJX0NNP6OMsYum9jNT0oO+nnpZAm9LkUMcJq7ivDgl8YdVE6li vwgT1y9QovQ5gFTQE6dHXx6KaiD914KZP+qGMa6KkaT0RavBt0kFAaW/cxEb3/al T5KWQ== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeefvddrtddtgdehiedvtdcutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpggftfghnshhusghstghrihgsvgdp uffrtefokffrpgfnqfghnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivg hnthhsucdlqddutddtmdenucfjughrpefhvfevufffkffojghfggfgsedtkeertdertddt necuhfhrohhmpefthigrnhcuhggrlhhklhhinhcuoehrhigrnhesthgvshhtthhorghsth drtghomheqnecuggftrfgrthhtvghrnhepffehieffgedtgfffjeetveegfeekleeileek veeuteffteetudffveegieeiheetnecuvehluhhsthgvrhfuihiivgepvdenucfrrghrrg hmpehmrghilhhfrhhomheprhihrghnsehtvghsthhtohgrshhtrdgtohhmpdhnsggprhgt phhtthhopedvgedpmhhouggvpehsmhhtphhouhhtpdhrtghpthhtohepmhhrihhprghrug eskhgvrhhnvghlrdhorhhgpdhrtghpthhtohepfigvnhhssegtshhivgdrohhrghdprhgt phhtthhopehmrggrrhhtvghnrdhlrghnkhhhohhrshhtsehlihhnuhigrdhinhhtvghlrd gtohhmpdhrtghpthhtohepthiiihhmmhgvrhhmrghnnhesshhushgvrdguvgdprhgtphht thhopegrihhrlhhivggusehgmhgrihhlrdgtohhmpdhrtghpthhtohepuggrnhhivghlse hffhiflhhlrdgthhdprhgtphhtthhopehjvghrnhgvjhdrshhkrhgrsggvtgesghhmrghi lhdrtghomhdprhgtphhtthhopehsrghmuhgvlhesshhhohhllhgrnhgurdhorhhgpdhrtg hpthhtoheprhhosghhsehkvghrnhgvlhdrohhrgh X-ME-Proxy: Feedback-ID: idc0145fc:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Sun, 16 Feb 2025 13:39:51 -0500 (EST) From: Ryan Walklin To: Maxime Ripard , Chen-Yu Tsai , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Daniel Vetter , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: Andre Przywara , Chris Morgan , Hironori KIKUCHI , Philippe Simons , Dmitry Baryshkov , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Ryan Walklin Subject: [PATCH v7 18/27] drm: sun4i: de2/de3: use generic register reference function for layer configuration Date: Mon, 17 Feb 2025 07:36:18 +1300 Message-ID: <20250216183710.8443-19-ryan@testtoast.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250216183710.8443-3-ryan@testtoast.com> References: <20250216183710.8443-3-ryan@testtoast.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Jernej Skrabec Use the new blender register lookup function where required in the layer commit and update code. Signed-off-by: Jernej Skrabec Signed-off-by: Ryan Walklin --- Changelog v2..v3: - Refactor for 6.11 layer init/modesetting changes --- drivers/gpu/drm/sun4i/sun8i_mixer.c | 5 +++-- drivers/gpu/drm/sun4i/sun8i_ui_layer.c | 7 +++++-- drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 6 ++++-- 3 files changed, 12 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c index acebbaa60785c..f0d48796d651f 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c @@ -277,6 +277,7 @@ static void sun8i_mixer_commit(struct sunxi_engine *engine, { struct sun8i_mixer *mixer = engine_to_sun8i_mixer(engine); u32 bld_base = sun8i_blender_base(mixer); + struct regmap *bld_regs = sun8i_blender_regmap(mixer); struct drm_plane_state *plane_state; struct drm_plane *plane; u32 route = 0, pipe_en = 0; @@ -316,8 +317,8 @@ static void sun8i_mixer_commit(struct sunxi_engine *engine, pipe_en |= SUN8I_MIXER_BLEND_PIPE_CTL_EN(zpos); } - regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_ROUTE(bld_base), route); - regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_PIPE_CTL(bld_base), + regmap_write(bld_regs, SUN8I_MIXER_BLEND_ROUTE(bld_base), route); + regmap_write(bld_regs, SUN8I_MIXER_BLEND_PIPE_CTL(bld_base), pipe_en | SUN8I_MIXER_BLEND_PIPE_CTL_FC_EN(0)); regmap_write(engine->regs, SUN8I_MIXER_GLOBAL_DBUFF, diff --git a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c b/drivers/gpu/drm/sun4i/sun8i_ui_layer.c index cb9b694fef101..7f1231cf0f012 100644 --- a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c +++ b/drivers/gpu/drm/sun4i/sun8i_ui_layer.c @@ -24,6 +24,7 @@ #include "sun8i_mixer.h" #include "sun8i_ui_layer.h" #include "sun8i_ui_scaler.h" +#include "sun8i_vi_scaler.h" static void sun8i_ui_layer_update_alpha(struct sun8i_mixer *mixer, int channel, int overlay, struct drm_plane *plane) @@ -52,6 +53,7 @@ static int sun8i_ui_layer_update_coord(struct sun8i_mixer *mixer, int channel, { struct drm_plane_state *state = plane->state; u32 src_w, src_h, dst_w, dst_h; + struct regmap *bld_regs; u32 bld_base, ch_base; u32 outsize, insize; u32 hphase, vphase; @@ -60,6 +62,7 @@ static int sun8i_ui_layer_update_coord(struct sun8i_mixer *mixer, int channel, channel, overlay); bld_base = sun8i_blender_base(mixer); + bld_regs = sun8i_blender_regmap(mixer); ch_base = sun8i_channel_base(mixer, channel); src_w = drm_rect_width(&state->src) >> 16; @@ -104,10 +107,10 @@ static int sun8i_ui_layer_update_coord(struct sun8i_mixer *mixer, int channel, DRM_DEBUG_DRIVER("Layer destination coordinates X: %d Y: %d\n", state->dst.x1, state->dst.y1); DRM_DEBUG_DRIVER("Layer destination size W: %d H: %d\n", dst_w, dst_h); - regmap_write(mixer->engine.regs, + regmap_write(bld_regs, SUN8I_MIXER_BLEND_ATTR_COORD(bld_base, zpos), SUN8I_MIXER_COORD(state->dst.x1, state->dst.y1)); - regmap_write(mixer->engine.regs, + regmap_write(bld_regs, SUN8I_MIXER_BLEND_ATTR_INSIZE(bld_base, zpos), outsize); diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c index e348fd0a3d81c..d19349eecc9de 100644 --- a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c +++ b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c @@ -55,6 +55,7 @@ static int sun8i_vi_layer_update_coord(struct sun8i_mixer *mixer, int channel, struct drm_plane_state *state = plane->state; const struct drm_format_info *format = state->fb->format; u32 src_w, src_h, dst_w, dst_h; + struct regmap *bld_regs; u32 bld_base, ch_base; u32 outsize, insize; u32 hphase, vphase; @@ -66,6 +67,7 @@ static int sun8i_vi_layer_update_coord(struct sun8i_mixer *mixer, int channel, channel, overlay); bld_base = sun8i_blender_base(mixer); + bld_regs = sun8i_blender_regmap(mixer); ch_base = sun8i_channel_base(mixer, channel); src_w = drm_rect_width(&state->src) >> 16; @@ -182,10 +184,10 @@ static int sun8i_vi_layer_update_coord(struct sun8i_mixer *mixer, int channel, DRM_DEBUG_DRIVER("Layer destination coordinates X: %d Y: %d\n", state->dst.x1, state->dst.y1); DRM_DEBUG_DRIVER("Layer destination size W: %d H: %d\n", dst_w, dst_h); - regmap_write(mixer->engine.regs, + regmap_write(bld_regs, SUN8I_MIXER_BLEND_ATTR_COORD(bld_base, zpos), SUN8I_MIXER_COORD(state->dst.x1, state->dst.y1)); - regmap_write(mixer->engine.regs, + regmap_write(bld_regs, SUN8I_MIXER_BLEND_ATTR_INSIZE(bld_base, zpos), outsize); From patchwork Sun Feb 16 18:36:19 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Walklin X-Patchwork-Id: 13976653 Received: from fout-b4-smtp.messagingengine.com (fout-b4-smtp.messagingengine.com [202.12.124.147]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6B76E19F471; Sun, 16 Feb 2025 18:40:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=202.12.124.147 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739731209; cv=none; b=e7KVaN4wHYBwFNrK+8nE+RLwuFl6LxGvhrrHgH6XTMhCphmgumtAdi5lWBqNHcBvzkkJuQj4c9eFStrykCE4D5fUKmh/1kV0jkHmDxzZ4Mxsw4D12sW4+oZRLoO/Lk1wI09bBKvYfoi9PgL318BgycY/p+OYu9tBu7Ac4GTQ0u8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739731209; c=relaxed/simple; bh=gWHqyU83Fd3ybf9d69EBAOQ6hA14SA+zr2KQAvUSysI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Y7COCZiIPqbK27eoCRq+c7Un8u5jlx/NuRKLEBf9+FRYZU3YUpbO+dSLZmSkFpzUo1TJvG88DIxsZJ1sw0cqEsOSswK8OmHJt8XKXjizRnxtiDH+6cqwz/nsCGn+o++Eyh7D+lnGYvPYc9Ngwuy2BN17dtbWTPC5iogWUBNM6eo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com; spf=pass smtp.mailfrom=testtoast.com; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b=rV9uhfHy; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b=Rfiib1tq; arc=none smtp.client-ip=202.12.124.147 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=testtoast.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b="rV9uhfHy"; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="Rfiib1tq" Received: from phl-compute-02.internal (phl-compute-02.phl.internal [10.202.2.42]) by mailfout.stl.internal (Postfix) with ESMTP id 002471140123; Sun, 16 Feb 2025 13:40:05 -0500 (EST) Received: from phl-mailfrontend-01 ([10.202.2.162]) by phl-compute-02.internal (MEProxy); Sun, 16 Feb 2025 13:40:06 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=testtoast.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm3; t=1739731205; x= 1739817605; bh=7xPhmGeOjkDRn5m4+mMlChMirWEBD57Hjth9oN5rLsM=; b=r V9uhfHyo87ha/IMgMkvxHSGU3hCDA9glsfil3KUckQDCHVWPx1QJW8nukFPWkvt6 4I55LIvoPrM7wZ5tNOs3SV6Zi5bBJMdclDDkuVNugFprvcrVz5geTXxeQ3YmnlIh lGTkzamrfb8mGPZVC36RK+zYHLaJzjmoOTw2H3D81nY1DIYiBu4SrWOuSe5ne3MR SQeI7p+DaBUVNoTyH/SU4MS61yv4uKjXmJYMFGxffwKBVEbc0gof0oS3TTK2B3eu nKqHcjKWmy/wZwPy7QlonYqJekWpmJyOJgaSFZ0JeIFhB6ZIT2XOtFa2ogBZHv3m PsiRXGMXuzqvT3GwgpzCQ== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-sender :x-me-sender:x-sasl-enc; s=fm3; t=1739731205; x=1739817605; bh=7 xPhmGeOjkDRn5m4+mMlChMirWEBD57Hjth9oN5rLsM=; b=Rfiib1tqVcff+38Ql gucvRG2vcftTMJwWrRB264G00oGL2cJ2aBfWndLAZrWAc1TFVvaqL759D4TXw8Y6 HOSuzFksoG/JRKq8V/DwEARlsSJH9+ZdiH9RxHgGkXqwjdLwH9cNRflvh2N2SdRk 08tqi2h2ZgptOH8ffdja7F6xv0rRdUiL2V1qyKgsdgiVCxeI7D/RuR317qit98yZ Hwyet1l4d3pnP1C/DhYBRYFOaRvt0fscu0IzIDm3Jd8bBq9YIGU/YxyYiuAezY6X eusZk4UcX05A8CStwHXrOJRS1qWe3skYzB482rh26fGUKgpEDrOLjJrNNCaIw4Yv BbOHg== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeefvddrtddtgdehiedvtdcutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpggftfghnshhusghstghrihgsvgdp uffrtefokffrpgfnqfghnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivg hnthhsucdlqddutddtmdenucfjughrpefhvfevufffkffojghfggfgsedtkeertdertddt necuhfhrohhmpefthigrnhcuhggrlhhklhhinhcuoehrhigrnhesthgvshhtthhorghsth drtghomheqnecuggftrfgrthhtvghrnhepffehieffgedtgfffjeetveegfeekleeileek veeuteffteetudffveegieeiheetnecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrg hmpehmrghilhhfrhhomheprhihrghnsehtvghsthhtohgrshhtrdgtohhmpdhnsggprhgt phhtthhopedvgedpmhhouggvpehsmhhtphhouhhtpdhrtghpthhtohepmhhrihhprghrug eskhgvrhhnvghlrdhorhhgpdhrtghpthhtohepfigvnhhssegtshhivgdrohhrghdprhgt phhtthhopehmrggrrhhtvghnrdhlrghnkhhhohhrshhtsehlihhnuhigrdhinhhtvghlrd gtohhmpdhrtghpthhtohepthiiihhmmhgvrhhmrghnnhesshhushgvrdguvgdprhgtphht thhopegrihhrlhhivggusehgmhgrihhlrdgtohhmpdhrtghpthhtohepuggrnhhivghlse hffhiflhhlrdgthhdprhgtphhtthhopehjvghrnhgvjhdrshhkrhgrsggvtgesghhmrghi lhdrtghomhdprhgtphhtthhopehsrghmuhgvlhesshhhohhllhgrnhgurdhorhhgpdhrtg hpthhtoheprhhosghhsehkvghrnhgvlhdrohhrgh X-ME-Proxy: Feedback-ID: idc0145fc:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Sun, 16 Feb 2025 13:39:58 -0500 (EST) From: Ryan Walklin To: Maxime Ripard , Chen-Yu Tsai , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Daniel Vetter , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: Andre Przywara , Chris Morgan , Hironori KIKUCHI , Philippe Simons , Dmitry Baryshkov , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Ryan Walklin Subject: [PATCH v7 19/27] drm: sun4i: de3: Implement AFBC support Date: Mon, 17 Feb 2025 07:36:19 +1300 Message-ID: <20250216183710.8443-20-ryan@testtoast.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250216183710.8443-3-ryan@testtoast.com> References: <20250216183710.8443-3-ryan@testtoast.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Jernej Skrabec Buffers, compressed with AFBC, are supported by the DE3 and above, and are generally more efficient for memory transfers. Add support for them. Currently it's implemented only for VI layers, but vendor code and documentation suggest UI layers can have them too. However, I haven't observed any SoC with such feature. Signed-off-by: Jernej Skrabec Signed-off-by: Ryan Walklin --- Changelog v4..v5: - Correct strict mode warnings from checkpatch.pl Changelog v5..v6: - convert uint64_t to u64 as suggested by checkpatch.pl --- drivers/gpu/drm/sun4i/Makefile | 2 +- drivers/gpu/drm/sun4i/sun50i_afbc.c | 250 +++++++++++++++++++++++++ drivers/gpu/drm/sun4i/sun50i_afbc.h | 87 +++++++++ drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 84 +++++++-- 4 files changed, 409 insertions(+), 14 deletions(-) create mode 100644 drivers/gpu/drm/sun4i/sun50i_afbc.c create mode 100644 drivers/gpu/drm/sun4i/sun50i_afbc.h diff --git a/drivers/gpu/drm/sun4i/Makefile b/drivers/gpu/drm/sun4i/Makefile index 3f516329f51ee..78290f1660fbd 100644 --- a/drivers/gpu/drm/sun4i/Makefile +++ b/drivers/gpu/drm/sun4i/Makefile @@ -17,7 +17,7 @@ sun8i-drm-hdmi-y += sun8i_hdmi_phy_clk.o sun8i-mixer-y += sun8i_mixer.o sun8i_ui_layer.o \ sun8i_vi_layer.o sun8i_ui_scaler.o \ sun8i_vi_scaler.o sun8i_csc.o \ - sun50i_fmt.o + sun50i_fmt.o sun50i_afbc.o sun4i-tcon-y += sun4i_crtc.o sun4i-tcon-y += sun4i_tcon_dclk.o diff --git a/drivers/gpu/drm/sun4i/sun50i_afbc.c b/drivers/gpu/drm/sun4i/sun50i_afbc.c new file mode 100644 index 0000000000000..b55e1c5533714 --- /dev/null +++ b/drivers/gpu/drm/sun4i/sun50i_afbc.c @@ -0,0 +1,250 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (C) Jernej Skrabec + */ + +#include +#include +#include +#include +#include +#include + +#include "sun50i_afbc.h" +#include "sun8i_mixer.h" + +static u32 sun50i_afbc_get_base(struct sun8i_mixer *mixer, unsigned int channel) +{ + u32 base = sun8i_channel_base(mixer, channel); + + if (mixer->cfg->de_type == sun8i_mixer_de3) + return base + SUN50I_AFBC_CH_OFFSET; + + return base + 0x4000; +} + +bool sun50i_afbc_format_mod_supported(struct sun8i_mixer *mixer, + u32 format, u64 modifier) +{ + u64 mode; + + if (modifier == DRM_FORMAT_MOD_INVALID) + return false; + + if (modifier == DRM_FORMAT_MOD_LINEAR) { + if (format == DRM_FORMAT_YUV420_8BIT || + format == DRM_FORMAT_YUV420_10BIT || + format == DRM_FORMAT_Y210) + return false; + return true; + } + + if (mixer->cfg->de_type == sun8i_mixer_de2) + return false; + + mode = AFBC_FORMAT_MOD_BLOCK_SIZE_16x16 | + AFBC_FORMAT_MOD_SPARSE | + AFBC_FORMAT_MOD_SPLIT; + + switch (format) { + case DRM_FORMAT_RGBA8888: + case DRM_FORMAT_RGB888: + case DRM_FORMAT_RGB565: + case DRM_FORMAT_RGBA4444: + case DRM_FORMAT_RGBA5551: + case DRM_FORMAT_RGBA1010102: + mode |= AFBC_FORMAT_MOD_YTR; + break; + case DRM_FORMAT_YUYV: + case DRM_FORMAT_Y210: + case DRM_FORMAT_YUV420_8BIT: + case DRM_FORMAT_YUV420_10BIT: + break; + default: + return false; + } + + return modifier == DRM_FORMAT_MOD_ARM_AFBC(mode); +} + +void sun50i_afbc_atomic_update(struct sun8i_mixer *mixer, unsigned int channel, + struct drm_plane *plane) +{ + struct drm_plane_state *state = plane->state; + struct drm_framebuffer *fb = state->fb; + const struct drm_format_info *format = fb->format; + struct drm_gem_dma_object *gem; + u32 base, val, src_w, src_h; + u32 def_color0, def_color1; + struct regmap *regs; + dma_addr_t dma_addr; + + base = sun50i_afbc_get_base(mixer, channel); + regs = mixer->engine.regs; + + src_w = drm_rect_width(&state->src) >> 16; + src_h = drm_rect_height(&state->src) >> 16; + + val = SUN50I_FBD_SIZE_HEIGHT(src_h); + val |= SUN50I_FBD_SIZE_WIDTH(src_w); + regmap_write(regs, SUN50I_FBD_SIZE(base), val); + + val = SUN50I_FBD_BLK_SIZE_HEIGHT(DIV_ROUND_UP(src_h, 16)); + val = SUN50I_FBD_BLK_SIZE_WIDTH(DIV_ROUND_UP(src_w, 16)); + regmap_write(regs, SUN50I_FBD_BLK_SIZE(base), val); + + val = SUN50I_FBD_SRC_CROP_TOP(0); + val |= SUN50I_FBD_SRC_CROP_LEFT(0); + regmap_write(regs, SUN50I_FBD_SRC_CROP(base), val); + + val = SUN50I_FBD_LAY_CROP_TOP(state->src.y1 >> 16); + val |= SUN50I_FBD_LAY_CROP_LEFT(state->src.x1 >> 16); + regmap_write(regs, SUN50I_FBD_LAY_CROP(base), val); + + /* + * Default color is always set to white, in colorspace and bitness + * that coresponds to used format. If it is actually used or not + * depends on AFBC buffer. At least in Cedrus it can be turned on + * or off. + * NOTE: G and B channels are off by 1 (up). It's unclear if this + * is because HW need such value or it is due to good enough code + * in vendor driver and HW clips the value anyway. + */ + def_color0 = 0; + def_color1 = 0; + + val = 0; + switch (format->format) { + case DRM_FORMAT_YUYV: + case DRM_FORMAT_YUV420_10BIT: + val |= SUN50I_FBD_FMT_SBS1(2); + val |= SUN50I_FBD_FMT_SBS0(1); + break; + case DRM_FORMAT_Y210: + val |= SUN50I_FBD_FMT_SBS1(3); + val |= SUN50I_FBD_FMT_SBS0(2); + break; + default: + val |= SUN50I_FBD_FMT_SBS1(1); + val |= SUN50I_FBD_FMT_SBS0(1); + break; + } + switch (format->format) { + case DRM_FORMAT_RGBA8888: + val |= SUN50I_FBD_FMT_YUV_TRAN; + val |= SUN50I_FBD_FMT_IN_FMT(SUN50I_AFBC_RGBA_8888); + def_color0 = SUN50I_FBD_DEFAULT_COLOR0_ALPHA(255) | + SUN50I_FBD_DEFAULT_COLOR0_YR(255); + def_color1 = SUN50I_FBD_DEFAULT_COLOR1_UG(256) | + SUN50I_FBD_DEFAULT_COLOR1_VB(256); + break; + case DRM_FORMAT_RGB888: + val |= SUN50I_FBD_FMT_YUV_TRAN; + val |= SUN50I_FBD_FMT_IN_FMT(SUN50I_AFBC_RGB_888); + def_color0 = SUN50I_FBD_DEFAULT_COLOR0_ALPHA(0) | + SUN50I_FBD_DEFAULT_COLOR0_YR(255); + def_color1 = SUN50I_FBD_DEFAULT_COLOR1_UG(256) | + SUN50I_FBD_DEFAULT_COLOR1_VB(256); + break; + case DRM_FORMAT_RGB565: + val |= SUN50I_FBD_FMT_YUV_TRAN; + val |= SUN50I_FBD_FMT_IN_FMT(SUN50I_AFBC_RGB_565); + def_color0 = SUN50I_FBD_DEFAULT_COLOR0_ALPHA(0) | + SUN50I_FBD_DEFAULT_COLOR0_YR(31); + def_color1 = SUN50I_FBD_DEFAULT_COLOR1_UG(64) | + SUN50I_FBD_DEFAULT_COLOR1_VB(32); + break; + case DRM_FORMAT_RGBA4444: + val |= SUN50I_FBD_FMT_YUV_TRAN; + val |= SUN50I_FBD_FMT_IN_FMT(SUN50I_AFBC_RGBA_4444); + def_color0 = SUN50I_FBD_DEFAULT_COLOR0_ALPHA(15) | + SUN50I_FBD_DEFAULT_COLOR0_YR(15); + def_color1 = SUN50I_FBD_DEFAULT_COLOR1_UG(16) | + SUN50I_FBD_DEFAULT_COLOR1_VB(16); + break; + case DRM_FORMAT_RGBA5551: + val |= SUN50I_FBD_FMT_YUV_TRAN; + val |= SUN50I_FBD_FMT_IN_FMT(SUN50I_AFBC_RGBA_5551); + def_color0 = SUN50I_FBD_DEFAULT_COLOR0_ALPHA(1) | + SUN50I_FBD_DEFAULT_COLOR0_YR(31); + def_color1 = SUN50I_FBD_DEFAULT_COLOR1_UG(32) | + SUN50I_FBD_DEFAULT_COLOR1_VB(32); + break; + case DRM_FORMAT_RGBA1010102: + val |= SUN50I_FBD_FMT_YUV_TRAN; + val |= SUN50I_FBD_FMT_IN_FMT(SUN50I_AFBC_RGBA1010102); + def_color0 = SUN50I_FBD_DEFAULT_COLOR0_ALPHA(3) | + SUN50I_FBD_DEFAULT_COLOR0_YR(1023); + def_color1 = SUN50I_FBD_DEFAULT_COLOR1_UG(1024) | + SUN50I_FBD_DEFAULT_COLOR1_VB(1024); + break; + case DRM_FORMAT_YUV420_8BIT: + val |= SUN50I_FBD_FMT_IN_FMT(SUN50I_AFBC_YUV420); + def_color0 = SUN50I_FBD_DEFAULT_COLOR0_ALPHA(0) | + SUN50I_FBD_DEFAULT_COLOR0_YR(255); + def_color1 = SUN50I_FBD_DEFAULT_COLOR1_UG(128) | + SUN50I_FBD_DEFAULT_COLOR1_VB(128); + break; + case DRM_FORMAT_YUYV: + val |= SUN50I_FBD_FMT_IN_FMT(SUN50I_AFBC_YUV422); + def_color0 = SUN50I_FBD_DEFAULT_COLOR0_ALPHA(0) | + SUN50I_FBD_DEFAULT_COLOR0_YR(255); + def_color1 = SUN50I_FBD_DEFAULT_COLOR1_UG(128) | + SUN50I_FBD_DEFAULT_COLOR1_VB(128); + break; + case DRM_FORMAT_YUV420_10BIT: + val |= SUN50I_FBD_FMT_IN_FMT(SUN50I_AFBC_P010); + def_color0 = SUN50I_FBD_DEFAULT_COLOR0_ALPHA(0) | + SUN50I_FBD_DEFAULT_COLOR0_YR(1023); + def_color1 = SUN50I_FBD_DEFAULT_COLOR1_UG(512) | + SUN50I_FBD_DEFAULT_COLOR1_VB(512); + break; + case DRM_FORMAT_Y210: + val |= SUN50I_FBD_FMT_IN_FMT(SUN50I_AFBC_P210); + def_color0 = SUN50I_FBD_DEFAULT_COLOR0_ALPHA(0) | + SUN50I_FBD_DEFAULT_COLOR0_YR(1023); + def_color1 = SUN50I_FBD_DEFAULT_COLOR1_UG(512) | + SUN50I_FBD_DEFAULT_COLOR1_VB(512); + break; + } + regmap_write(regs, SUN50I_FBD_FMT(base), val); + + /* Get the physical address of the buffer in memory */ + gem = drm_fb_dma_get_gem_obj(fb, 0); + + DRM_DEBUG_DRIVER("Using GEM @ %pad\n", &gem->dma_addr); + + /* Compute the start of the displayed memory */ + dma_addr = gem->dma_addr + fb->offsets[0]; + + regmap_write(regs, SUN50I_FBD_LADDR(base), lower_32_bits(dma_addr)); + regmap_write(regs, SUN50I_FBD_HADDR(base), upper_32_bits(dma_addr)); + + val = SUN50I_FBD_OVL_SIZE_HEIGHT(src_h); + val |= SUN50I_FBD_OVL_SIZE_WIDTH(src_w); + regmap_write(regs, SUN50I_FBD_OVL_SIZE(base), val); + + val = SUN50I_FBD_OVL_COOR_Y(0); + val |= SUN50I_FBD_OVL_COOR_X(0); + regmap_write(regs, SUN50I_FBD_OVL_COOR(base), val); + + regmap_write(regs, SUN50I_FBD_OVL_BG_COLOR(base), + SUN8I_MIXER_BLEND_COLOR_BLACK); + regmap_write(regs, SUN50I_FBD_DEFAULT_COLOR0(base), def_color0); + regmap_write(regs, SUN50I_FBD_DEFAULT_COLOR1(base), def_color1); + + val = SUN50I_FBD_CTL_GLB_ALPHA(state->alpha >> 16); + val |= SUN50I_FBD_CTL_CLK_GATE; + val |= (state->alpha == DRM_BLEND_ALPHA_OPAQUE) ? + SUN50I_FBD_CTL_ALPHA_MODE_PIXEL : + SUN50I_FBD_CTL_ALPHA_MODE_COMBINED; + val |= SUN50I_FBD_CTL_FBD_EN; + regmap_write(regs, SUN50I_FBD_CTL(base), val); +} + +void sun50i_afbc_disable(struct sun8i_mixer *mixer, unsigned int channel) +{ + u32 base = sun50i_afbc_get_base(mixer, channel); + + regmap_write(mixer->engine.regs, SUN50I_FBD_CTL(base), 0); +} diff --git a/drivers/gpu/drm/sun4i/sun50i_afbc.h b/drivers/gpu/drm/sun4i/sun50i_afbc.h new file mode 100644 index 0000000000000..cea685c868550 --- /dev/null +++ b/drivers/gpu/drm/sun4i/sun50i_afbc.h @@ -0,0 +1,87 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Copyright (C) Jernej Skrabec + */ + +#ifndef _SUN50I_AFBC_H_ +#define _SUN50I_AFBC_H_ + +#include + +#define SUN50I_AFBC_CH_OFFSET 0x300 + +#define SUN50I_AFBC_RGBA_8888 0x02 +#define SUN50I_AFBC_RGB_888 0x08 +#define SUN50I_AFBC_RGB_565 0x0a +#define SUN50I_AFBC_RGBA_4444 0x0e +#define SUN50I_AFBC_RGBA_5551 0x12 +#define SUN50I_AFBC_RGBA1010102 0x16 +#define SUN50I_AFBC_YUV422 0x26 +#define SUN50I_AFBC_YUV420 0x2a +#define SUN50I_AFBC_P010 0x30 +#define SUN50I_AFBC_P210 0x32 + +#define SUN50I_FBD_CTL(base) ((base) + 0x00) +#define SUN50I_FBD_CTL_GLB_ALPHA(v) ((v) << 24) +#define SUN50I_FBD_CTL_CLK_GATE BIT(4) +#define SUN50I_FBD_CTL_ALPHA_MODE_PIXEL ((0) << 2) +#define SUN50I_FBD_CTL_ALPHA_MODE_LAYER ((1) << 2) +#define SUN50I_FBD_CTL_ALPHA_MODE_COMBINED ((2) << 2) +#define SUN50I_FBD_CTL_FBD_FCEN BIT(1) +#define SUN50I_FBD_CTL_FBD_EN BIT(0) + +#define SUN50I_FBD_SIZE(base) ((base) + 0x08) +#define SUN50I_FBD_SIZE_HEIGHT(v) (((v) - 1) << 16) +#define SUN50I_FBD_SIZE_WIDTH(v) (((v) - 1) << 0) + +#define SUN50I_FBD_BLK_SIZE(base) ((base) + 0x0c) +#define SUN50I_FBD_BLK_SIZE_HEIGHT(v) ((v) << 16) +#define SUN50I_FBD_BLK_SIZE_WIDTH(v) ((v) << 0) + +#define SUN50I_FBD_SRC_CROP(base) ((base) + 0x10) +#define SUN50I_FBD_SRC_CROP_TOP(v) ((v) << 16) +#define SUN50I_FBD_SRC_CROP_LEFT(v) ((v) << 0) + +#define SUN50I_FBD_LAY_CROP(base) ((base) + 0x14) +#define SUN50I_FBD_LAY_CROP_TOP(v) ((v) << 16) +#define SUN50I_FBD_LAY_CROP_LEFT(v) ((v) << 0) + +#define SUN50I_FBD_FMT(base) ((base) + 0x18) +#define SUN50I_FBD_FMT_SBS1(v) ((v) << 18) +#define SUN50I_FBD_FMT_SBS0(v) ((v) << 16) +#define SUN50I_FBD_FMT_YUV_TRAN BIT(7) +#define SUN50I_FBD_FMT_IN_FMT(v) ((v) << 0) + +#define SUN50I_FBD_LADDR(base) ((base) + 0x20) +#define SUN50I_FBD_HADDR(base) ((base) + 0x24) + +#define SUN50I_FBD_OVL_SIZE(base) ((base) + 0x30) +#define SUN50I_FBD_OVL_SIZE_HEIGHT(v) (((v) - 1) << 16) +#define SUN50I_FBD_OVL_SIZE_WIDTH(v) (((v) - 1) << 0) + +#define SUN50I_FBD_OVL_COOR(base) ((base) + 0x34) +#define SUN50I_FBD_OVL_COOR_Y(v) ((v) << 16) +#define SUN50I_FBD_OVL_COOR_X(v) ((v) << 0) + +#define SUN50I_FBD_OVL_BG_COLOR(base) ((base) + 0x38) +#define SUN50I_FBD_OVL_FILL_COLOR(base) ((base) + 0x3c) + +#define SUN50I_FBD_DEFAULT_COLOR0(base) ((base) + 0x50) +#define SUN50I_FBD_DEFAULT_COLOR0_ALPHA(v) ((v) << 16) +#define SUN50I_FBD_DEFAULT_COLOR0_YR(v) ((v) << 0) + +#define SUN50I_FBD_DEFAULT_COLOR1(base) ((base) + 0x54) +#define SUN50I_FBD_DEFAULT_COLOR1_VB(v) ((v) << 16) +#define SUN50I_FBD_DEFAULT_COLOR1_UG(v) ((v) << 0) + +struct sun8i_mixer; +struct drm_plane; + +bool sun50i_afbc_format_mod_supported(struct sun8i_mixer *mixer, + u32 format, u64 modifier); + +void sun50i_afbc_atomic_update(struct sun8i_mixer *mixer, unsigned int channel, + struct drm_plane *plane); +void sun50i_afbc_disable(struct sun8i_mixer *mixer, unsigned int channel); + +#endif diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c index d19349eecc9de..539b654585796 100644 --- a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c +++ b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c @@ -11,8 +11,10 @@ #include #include #include +#include #include +#include "sun50i_afbc.h" #include "sun8i_csc.h" #include "sun8i_mixer.h" #include "sun8i_vi_layer.h" @@ -50,7 +52,7 @@ static void sun8i_vi_layer_update_alpha(struct sun8i_mixer *mixer, int channel, static int sun8i_vi_layer_update_coord(struct sun8i_mixer *mixer, int channel, int overlay, struct drm_plane *plane, - unsigned int zpos) + unsigned int zpos, bool afbc) { struct drm_plane_state *state = plane->state; const struct drm_format_info *format = state->fb->format; @@ -135,7 +137,7 @@ static int sun8i_vi_layer_update_coord(struct sun8i_mixer *mixer, int channel, required = src_h * 100 / dst_h; - if (ability < required) { + if (!afbc && ability < required) { DRM_DEBUG_DRIVER("Using vertical coarse scaling\n"); vm = src_h; vn = (u32)ability * dst_h / 100; @@ -145,7 +147,7 @@ static int sun8i_vi_layer_update_coord(struct sun8i_mixer *mixer, int channel, /* it seems that every RGB scaler has buffer for 2048 pixels */ scanline = subsampled ? mixer->cfg->scanline_yuv : 2048; - if (src_w > scanline) { + if (!afbc && src_w > scanline) { DRM_DEBUG_DRIVER("Using horizontal coarse scaling\n"); hm = src_w; hn = scanline; @@ -308,6 +310,15 @@ static int sun8i_vi_layer_update_buffer(struct sun8i_mixer *mixer, int channel, return 0; } +static void sun8i_vi_layer_prepare_non_linear(struct sun8i_mixer *mixer, + int channel, int overlay) +{ + u32 base = sun8i_channel_base(mixer, channel); + + regmap_write(mixer->engine.regs, + SUN8I_MIXER_CHAN_VI_LAYER_ATTR(base, overlay), 0); +} + static int sun8i_vi_layer_atomic_check(struct drm_plane *plane, struct drm_atomic_state *state) { @@ -348,18 +359,45 @@ static void sun8i_vi_layer_atomic_update(struct drm_plane *plane, struct sun8i_layer *layer = plane_to_sun8i_layer(plane); unsigned int zpos = new_state->normalized_zpos; struct sun8i_mixer *mixer = layer->mixer; + struct drm_framebuffer *fb = plane->state->fb; + bool afbc = drm_is_afbc(fb->modifier); - if (!new_state->crtc || !new_state->visible) + if (!new_state->crtc || !new_state->visible) { + if (mixer->cfg->de_type >= sun8i_mixer_de3) + sun50i_afbc_disable(mixer, layer->channel); return; + } sun8i_vi_layer_update_coord(mixer, layer->channel, - layer->overlay, plane, zpos); - sun8i_vi_layer_update_alpha(mixer, layer->channel, - layer->overlay, plane); - sun8i_vi_layer_update_formats(mixer, layer->channel, - layer->overlay, plane); - sun8i_vi_layer_update_buffer(mixer, layer->channel, - layer->overlay, plane); + layer->overlay, plane, zpos, afbc); + + if (afbc) { + u32 fmt_type; + + sun8i_vi_layer_prepare_non_linear(mixer, layer->channel, + layer->overlay); + sun50i_afbc_atomic_update(mixer, layer->channel, plane); + + fmt_type = sun8i_vi_layer_get_format_type(fb->format); + sun8i_csc_set_ccsc(mixer, layer->channel, fmt_type, + plane->state->color_encoding, + plane->state->color_range); + } else { + sun8i_vi_layer_update_alpha(mixer, layer->channel, + layer->overlay, plane); + sun8i_vi_layer_update_formats(mixer, layer->channel, + layer->overlay, plane); + sun8i_vi_layer_update_buffer(mixer, layer->channel, + layer->overlay, plane); + } +} + +static bool sun8i_vi_layer_format_mod_supported(struct drm_plane *plane, + u32 format, u64 modifier) +{ + struct sun8i_layer *layer = plane_to_sun8i_layer(plane); + + return sun50i_afbc_format_mod_supported(layer->mixer, format, modifier); } static const struct drm_plane_helper_funcs sun8i_vi_layer_helper_funcs = { @@ -374,6 +412,7 @@ static const struct drm_plane_funcs sun8i_vi_layer_funcs = { .disable_plane = drm_atomic_helper_disable_plane, .reset = drm_atomic_helper_plane_reset, .update_plane = drm_atomic_helper_update_plane, + .format_mod_supported = sun8i_vi_layer_format_mod_supported, }; /* @@ -457,6 +496,11 @@ static const u32 sun8i_vi_layer_de3_formats[] = { DRM_FORMAT_YVU411, DRM_FORMAT_YVU420, DRM_FORMAT_YVU422, + + /* AFBC only formats */ + DRM_FORMAT_YUV420_8BIT, + DRM_FORMAT_YUV420_10BIT, + DRM_FORMAT_Y210, }; static const uint64_t sun8i_layer_modifiers[] = { @@ -464,6 +508,18 @@ static const uint64_t sun8i_layer_modifiers[] = { DRM_FORMAT_MOD_INVALID }; +static const u64 sun50i_layer_de3_modifiers[] = { + DRM_FORMAT_MOD_ARM_AFBC(AFBC_FORMAT_MOD_BLOCK_SIZE_16x16 | + AFBC_FORMAT_MOD_SPARSE | + AFBC_FORMAT_MOD_SPLIT), + DRM_FORMAT_MOD_ARM_AFBC(AFBC_FORMAT_MOD_BLOCK_SIZE_16x16 | + AFBC_FORMAT_MOD_YTR | + AFBC_FORMAT_MOD_SPARSE | + AFBC_FORMAT_MOD_SPLIT), + DRM_FORMAT_MOD_LINEAR, + DRM_FORMAT_MOD_INVALID +}; + struct sun8i_layer *sun8i_vi_layer_init_one(struct drm_device *drm, struct sun8i_mixer *mixer, int index) @@ -472,6 +528,7 @@ struct sun8i_layer *sun8i_vi_layer_init_one(struct drm_device *drm, u32 supported_encodings, supported_ranges; unsigned int plane_cnt, format_count; struct sun8i_layer *layer; + const u64 *modifiers; const u32 *formats; int ret; @@ -487,9 +544,11 @@ struct sun8i_layer *sun8i_vi_layer_init_one(struct drm_device *drm, if (mixer->cfg->de_type >= sun8i_mixer_de3) { formats = sun8i_vi_layer_de3_formats; format_count = ARRAY_SIZE(sun8i_vi_layer_de3_formats); + modifiers = sun50i_layer_de3_modifiers; } else { formats = sun8i_vi_layer_formats; format_count = ARRAY_SIZE(sun8i_vi_layer_formats); + modifiers = sun8i_layer_modifiers; } if (!mixer->cfg->ui_num && index == 0) @@ -499,8 +558,7 @@ struct sun8i_layer *sun8i_vi_layer_init_one(struct drm_device *drm, ret = drm_universal_plane_init(drm, &layer->plane, 0, &sun8i_vi_layer_funcs, formats, format_count, - sun8i_layer_modifiers, - type, NULL); + modifiers, type, NULL); if (ret) { dev_err(drm->dev, "Couldn't initialize layer\n"); return ERR_PTR(ret); From patchwork Sun Feb 16 18:36:20 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Walklin X-Patchwork-Id: 13976654 Received: from fhigh-b4-smtp.messagingengine.com (fhigh-b4-smtp.messagingengine.com [202.12.124.155]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AE2A61A00ED; Sun, 16 Feb 2025 18:40:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=202.12.124.155 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739731217; cv=none; b=kPZ0n9aBOcAYid2bvc8kpfYaCWCevVvXoi1p381pXc0vv/W4S1rpgGusGKgkvnhaniwJc1sl2e00eW+KrZZ2iqQYNojbRYIMdy5yMsGlNosmNUX7FvOzdm8kRmL5facnv4vtb13HoKB1Lf3uWR0DWdpcePA+e1HYeghXolKdiRI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739731217; c=relaxed/simple; bh=GxmJA29+HiacNFcc1pD/DAk2xoAeB9EDa9VQhsNGzZ8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=YMo16ajut9JJHeGnZxLxTk9iGBr2AxkKxMYURnzOyo50bNcCy/ukjgNrRsccMZwRWbeynf4WQRwhzi7A2szfqSrSeAyFpaoOCPTODfO+o3Ly60OJ3nTC1xY3Yx3DKoMtqn07tXamRgNQgz65LMDqmtbYs1FqtOSZDJqdpMo+T1g= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com; spf=pass smtp.mailfrom=testtoast.com; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b=K3iTI4vm; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b=H7uFJplD; arc=none smtp.client-ip=202.12.124.155 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=testtoast.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b="K3iTI4vm"; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="H7uFJplD" Received: from phl-compute-05.internal (phl-compute-05.phl.internal [10.202.2.45]) by mailfhigh.stl.internal (Postfix) with ESMTP id 433FE25400C3; Sun, 16 Feb 2025 13:40:14 -0500 (EST) Received: from phl-mailfrontend-01 ([10.202.2.162]) by phl-compute-05.internal (MEProxy); Sun, 16 Feb 2025 13:40:14 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=testtoast.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm3; t=1739731214; x= 1739817614; bh=BJw/apkD9aGn51IELkXxp/idESG6pC1H6gAPScSoptk=; b=K 3iTI4vmFvxu3qmPRAyN6NKLbUQDs+uvE4PDgBnT1JTOFv+Dki0Id5371AYeYugbB maKBucXiOYeXE2qw420KZAhgAyyutpajeyO0padtMIs9cBxtf3GKeLUq14aZpU2D qLNDvPi47KymMjoR1BxX1lyteZPUzQy/NPioDGpwcNb7jWXqUMJxQkeiGVEAwoRb WfEbqvZDu3ooA+mbD6/kQNIVGw64MMuArZ3Zb4VvPmQYfRcO4Agn1VOyeI3IquFp N7h5mbwQpjOoMbdkkjBQJs4ZmxlfIhaV8lkIFjeNvfCvz+nhuMOo3LfkrYxrnCoB 05n8eo1PcvBVycIMIo5vg== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-sender :x-me-sender:x-sasl-enc; s=fm3; t=1739731214; x=1739817614; bh=B Jw/apkD9aGn51IELkXxp/idESG6pC1H6gAPScSoptk=; b=H7uFJplDX0y/cWnUW 8sskksipym/7VyiwoA+cPGFR6fCMDRL9TmA4aHz0oi8tDzOdrTdwFeRH2e5H0VCW ojcR32RT5IYoUCA1m22CXvmfSLqspk0bxtqZZpp4d/E+0nAu0S/86H8lQ4kZjQmg xu4G6XNOoopCwMbudpCLJflJLkf1Ti/OfJnapjLh/ppF+sT+BnaAPPWoBnFT6cun ixUk8LBFyZnWDUwUfB5q5DPm4QrYuuB4CIXHQJVvIdo7q7O58rrJb4EmYrAwRoHK +npJ65QQfIhRpdvgjXso4aZ/JVBhLZpepUFomdEzqbp94ypsm+uSjDmlhxs+tPNN 87Qrw== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeefvddrtddtgdehiedvtdcutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpggftfghnshhusghstghrihgsvgdp uffrtefokffrpgfnqfghnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivg hnthhsucdlqddutddtmdenucfjughrpefhvfevufffkffojghfggfgsedtkeertdertddt necuhfhrohhmpefthigrnhcuhggrlhhklhhinhcuoehrhigrnhesthgvshhtthhorghsth drtghomheqnecuggftrfgrthhtvghrnhepffehieffgedtgfffjeetveegfeekleeileek veeuteffteetudffveegieeiheetnecuvehluhhsthgvrhfuihiivgepvdenucfrrghrrg hmpehmrghilhhfrhhomheprhihrghnsehtvghsthhtohgrshhtrdgtohhmpdhnsggprhgt phhtthhopedvhedpmhhouggvpehsmhhtphhouhhtpdhrtghpthhtohepmhhrihhprghrug eskhgvrhhnvghlrdhorhhgpdhrtghpthhtohepfigvnhhssegtshhivgdrohhrghdprhgt phhtthhopehmrggrrhhtvghnrdhlrghnkhhhohhrshhtsehlihhnuhigrdhinhhtvghlrd gtohhmpdhrtghpthhtohepthiiihhmmhgvrhhmrghnnhesshhushgvrdguvgdprhgtphht thhopegrihhrlhhivggusehgmhgrihhlrdgtohhmpdhrtghpthhtohepuggrnhhivghlse hffhiflhhlrdgthhdprhgtphhtthhopehjvghrnhgvjhdrshhkrhgrsggvtgesghhmrghi lhdrtghomhdprhgtphhtthhopehsrghmuhgvlhesshhhohhllhgrnhgurdhorhhgpdhrtg hpthhtoheprhhosghhsehkvghrnhgvlhdrohhrgh X-ME-Proxy: Feedback-ID: idc0145fc:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Sun, 16 Feb 2025 13:40:06 -0500 (EST) From: Ryan Walklin To: Maxime Ripard , Chen-Yu Tsai , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Daniel Vetter , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: Andre Przywara , Chris Morgan , Hironori KIKUCHI , Philippe Simons , Dmitry Baryshkov , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Ryan Walklin , Conor Dooley Subject: [PATCH v7 20/27] dt-bindings: allwinner: add H616 DE33 bus binding Date: Mon, 17 Feb 2025 07:36:20 +1300 Message-ID: <20250216183710.8443-21-ryan@testtoast.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250216183710.8443-3-ryan@testtoast.com> References: <20250216183710.8443-3-ryan@testtoast.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The Allwinner H616 and variants have a new display engine revision (DE33). Add a display engine bus binding for the DE33 and increase reg maxItems to 3 to accommodate additional register blocks. Signed-off-by: Ryan Walklin Acked-by: Conor Dooley Reviewed-by: Chen-Yu Tsai --- Changelog v1..v2: - Correct DE2 bus enum to reflect fallback devices accurately. Changelog v2..v3: - Separate content into three patches for three separate subsystems Changelog v5..v6: - Increase reg maxItems to 3. --- .../devicetree/bindings/bus/allwinner,sun50i-a64-de2.yaml | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/bus/allwinner,sun50i-a64-de2.yaml b/Documentation/devicetree/bindings/bus/allwinner,sun50i-a64-de2.yaml index 9845a187bdf65..317a27cf590b3 100644 --- a/Documentation/devicetree/bindings/bus/allwinner,sun50i-a64-de2.yaml +++ b/Documentation/devicetree/bindings/bus/allwinner,sun50i-a64-de2.yaml @@ -24,11 +24,14 @@ properties: oneOf: - const: allwinner,sun50i-a64-de2 - items: - - const: allwinner,sun50i-h6-de3 + - enum: + - allwinner,sun50i-h6-de3 + - allwinner,sun50i-h616-de33 - const: allwinner,sun50i-a64-de2 reg: - maxItems: 1 + minItems: 1 + maxItems: 3 allwinner,sram: description: From patchwork Sun Feb 16 18:36:21 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Walklin X-Patchwork-Id: 13976655 Received: from fhigh-b4-smtp.messagingengine.com (fhigh-b4-smtp.messagingengine.com [202.12.124.155]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 905611A0714; Sun, 16 Feb 2025 18:40:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=202.12.124.155 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739731225; cv=none; b=r8WYYO/K6nnL0A7idyKJijoG09oOEG9+CindWD7McoRItN4hYr/4Nqgm/5/mo1htQLMejrrtotNJQLEt6NxkccEJjEkvGvUeHxQIRMBwoy5xnslWnQDkwSxc5qAwa+Lzm5TqUUhXyfFzUoQtsuKr+lkN09usCGiOtPMCS9+EQxM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739731225; c=relaxed/simple; bh=XYVT+05ZUp9STT/svO0FkxXdAaFevUI5l1FknCIZU14=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=JV9XS/5Szk0yiR9aqQIBlpLI6RT2d/FeealFo7ghJJmZ7Joe4MKremRyevtMY5s633zha8fusDyCvOeiFCaXoouQm+XixTAFKiea3tq1aWDEVH32jYnsEDcQ4iYDM3YzvTOeB/pGdxnTma97NdE1yMOLSzRfKD5iNDy+GaODjyw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com; spf=pass smtp.mailfrom=testtoast.com; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b=S9/Ruk9O; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b=g7iJc4tM; arc=none smtp.client-ip=202.12.124.155 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=testtoast.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b="S9/Ruk9O"; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="g7iJc4tM" Received: from phl-compute-11.internal (phl-compute-11.phl.internal [10.202.2.51]) by mailfhigh.stl.internal (Postfix) with ESMTP id 1CB7625400C3; Sun, 16 Feb 2025 13:40:22 -0500 (EST) Received: from phl-mailfrontend-01 ([10.202.2.162]) by phl-compute-11.internal (MEProxy); Sun, 16 Feb 2025 13:40:22 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=testtoast.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm3; t=1739731221; x= 1739817621; bh=8S0LM67ZallGhiis5MmmYmAmKnXDOKUkcZarC5rYtYI=; b=S 9/Ruk9OGI1fHRkob/9Y67jzlqMZaeKF/NeUc2Bk6b54vs4OHDfenmvKsry+67Hcn Bmbxc8F1ZQ+2YIva1p01QoIUKlM0fGPiQumZUBCQOP5comKy1mNxuDSSvzMEeY5M 3ey+Sccm3MphM3TwHCBRnrDt/W1IPugoRdB3O0TVA0lnd4Wbj975jO9nmteaXVFp V3CpiEQVmQZcO9Hn/SLzULNkNoKUGy5XMeyswZj4VDpOcbAHRiwCaZYqmo6R6mKA 84sE3W7EM7xx66VdUTL4Kt6bvO+tAh6UE6ZvLyasbGe9xRX4MoF+70e9BeiTGqw9 le304pp+xyk7hYf/kQHFQ== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-sender :x-me-sender:x-sasl-enc; s=fm3; t=1739731221; x=1739817621; bh=8 S0LM67ZallGhiis5MmmYmAmKnXDOKUkcZarC5rYtYI=; b=g7iJc4tMVK4JDm2pu NTnaEbGA3DcV90CBTXvUFzGSn9gftSGIaNVTQxIbBERMAMBV/iAQKfhoomNVC8+y 3CZkbuYKH1QjdollwISLWjFv7CCWM89LxGNLzBHRlTaBDj+Vn+NPlXpSCXgxYOqi OsIwhGuOrtgcQVWf/RremJ2YthD0FJyBpwshrpu6UeiqAijHzjCgSQr7ioks0/r+ NfZSVZI3PPZbyt7rw9h6SCcKzwD/41xXbSg2QgzX5RY8XeS0QAYN+bLsBbHSZKts 6E/JGOCwkPo0EvTkCbsolCx1OGUzxcvUQrX7MVTZ0EkZ5/qv3lxu43rPb0rH36R4 Bq7Gg== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeefvddrtddtgdehiedvtdcutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpggftfghnshhusghstghrihgsvgdp uffrtefokffrpgfnqfghnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivg hnthhsucdlqddutddtmdenucfjughrpefhvfevufffkffojghfggfgsedtkeertdertddt necuhfhrohhmpefthigrnhcuhggrlhhklhhinhcuoehrhigrnhesthgvshhtthhorghsth drtghomheqnecuggftrfgrthhtvghrnhepffehieffgedtgfffjeetveegfeekleeileek veeuteffteetudffveegieeiheetnecuvehluhhsthgvrhfuihiivgepfeenucfrrghrrg hmpehmrghilhhfrhhomheprhihrghnsehtvghsthhtohgrshhtrdgtohhmpdhnsggprhgt phhtthhopedvhedpmhhouggvpehsmhhtphhouhhtpdhrtghpthhtohepmhhrihhprghrug eskhgvrhhnvghlrdhorhhgpdhrtghpthhtohepfigvnhhssegtshhivgdrohhrghdprhgt phhtthhopehmrggrrhhtvghnrdhlrghnkhhhohhrshhtsehlihhnuhigrdhinhhtvghlrd gtohhmpdhrtghpthhtohepthiiihhmmhgvrhhmrghnnhesshhushgvrdguvgdprhgtphht thhopegrihhrlhhivggusehgmhgrihhlrdgtohhmpdhrtghpthhtohepuggrnhhivghlse hffhiflhhlrdgthhdprhgtphhtthhopehjvghrnhgvjhdrshhkrhgrsggvtgesghhmrghi lhdrtghomhdprhgtphhtthhopehsrghmuhgvlhesshhhohhllhgrnhgurdhorhhgpdhrtg hpthhtoheprhhosghhsehkvghrnhgvlhdrohhrgh X-ME-Proxy: Feedback-ID: idc0145fc:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Sun, 16 Feb 2025 13:40:15 -0500 (EST) From: Ryan Walklin To: Maxime Ripard , Chen-Yu Tsai , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Daniel Vetter , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: Andre Przywara , Chris Morgan , Hironori KIKUCHI , Philippe Simons , Dmitry Baryshkov , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Ryan Walklin , Conor Dooley Subject: [PATCH v7 21/27] dt-bindings: allwinner: add H616 DE33 clock binding Date: Mon, 17 Feb 2025 07:36:21 +1300 Message-ID: <20250216183710.8443-22-ryan@testtoast.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250216183710.8443-3-ryan@testtoast.com> References: <20250216183710.8443-3-ryan@testtoast.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The Allwinner H616 and variants have a new display engine revision (DE33). Add a clock binding for the DE33. Signed-off-by: Ryan Walklin Acked-by: Conor Dooley Reviewed-by: Chen-Yu Tsai --- Changelog v2..v3: - Separate content into three patches for three separate subsystems --- .../devicetree/bindings/clock/allwinner,sun8i-a83t-de2-clk.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun8i-a83t-de2-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun8i-a83t-de2-clk.yaml index 70369bd633e40..7fcd55d468d49 100644 --- a/Documentation/devicetree/bindings/clock/allwinner,sun8i-a83t-de2-clk.yaml +++ b/Documentation/devicetree/bindings/clock/allwinner,sun8i-a83t-de2-clk.yaml @@ -25,6 +25,7 @@ properties: - const: allwinner,sun50i-a64-de2-clk - const: allwinner,sun50i-h5-de2-clk - const: allwinner,sun50i-h6-de3-clk + - const: allwinner,sun50i-h616-de33-clk - items: - const: allwinner,sun8i-r40-de2-clk - const: allwinner,sun8i-h3-de2-clk From patchwork Sun Feb 16 18:36:22 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Walklin X-Patchwork-Id: 13976656 Received: from fout-b4-smtp.messagingengine.com (fout-b4-smtp.messagingengine.com [202.12.124.147]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D7A501A0714; Sun, 16 Feb 2025 18:40:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=202.12.124.147 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739731234; cv=none; b=f5hNTHbkPD5JN0ZMiV/KAH8Qs8EHYiH74QQ+7EvtnVZSN09MvjeyLv6Gk/azHhIwifkCJGhB68XSOgcO2l4lv5KGkA3DqoCE7lzWLwc7IuIClq6SG5SEapbFwztto7rtI4CJARyAfF/0PdXK8mxYqpTnS0ElPjRBtOiJUmqSO9o= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739731234; c=relaxed/simple; bh=Ct+Muw7MCCDwvd/3l6Jw/3dvyEMKoNpJSEqLbJh/HfA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=MXmwHKSOro/XLXBgw9npw+yabHRQMbKDg1OLOtQkE60aiqjPImtVnrO75ctYfMkeUkjbW25xtoWcX8sYkBxTWiNBWB6bmXAQStdaQu0VEkl9OR1bJlMua9gyVfufwcoJ+R7xArRa74Wt6ahkrAsecu5s3j4nYcYYoPI9tCH+O4E= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com; spf=pass smtp.mailfrom=testtoast.com; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b=iG99F3mJ; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b=vzq66jYG; arc=none smtp.client-ip=202.12.124.147 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=testtoast.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b="iG99F3mJ"; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="vzq66jYG" Received: from phl-compute-04.internal (phl-compute-04.phl.internal [10.202.2.44]) by mailfout.stl.internal (Postfix) with ESMTP id 44FAA114009B; Sun, 16 Feb 2025 13:40:30 -0500 (EST) Received: from phl-mailfrontend-01 ([10.202.2.162]) by phl-compute-04.internal (MEProxy); Sun, 16 Feb 2025 13:40:30 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=testtoast.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm3; t=1739731230; x= 1739817630; bh=MHFZi57lqGB7elcnnVw9vwRemFAicTlVo9LJ+zS40fQ=; b=i G99F3mJbOXIouy+T+w06ojkGWhkqIcY6N9P7fAOh19ja1/cNPkiDyLHCAZJcRYgJ GSgmvxiCiTLCldafHAoVWi+MRYJ1wdp/9+4LnUhS1iHXSOC/Cu267Ls3cWcbXBXW ZSioF9Jmkk9qLrjHQ7ZLs9BWVQyYqRZPaL0k8ecHlofrY1DRoLS9DOFgNnQeggP9 0YVPM4bmqoM7MrwPFtnY5XRJSCBdLOM37D+cWmFDiHC+4CkM0g3nvK0Mj72Andhp 4ZFrD0ykFMSGbdgTXqxWIhswTW1rKv6AIr4YBpOLg0VeeKNNscOl/sT18VdNyUGM 9Ms+M1wjK5HMypPwAfh4g== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-sender :x-me-sender:x-sasl-enc; s=fm3; t=1739731230; x=1739817630; bh=M HFZi57lqGB7elcnnVw9vwRemFAicTlVo9LJ+zS40fQ=; b=vzq66jYGyrbmIo3Ln FMXVH9kQCOyHEevCE8P/3SvI+1v/7RoYcQsPKPMAMVQ5LkUgACEdiCVgckSS0tqX XopXzcl8HZOsztw7GjW6RTBrOF9i/CdI30f0Ow71EwCcGnFEQAxeCGCebYVoEGjb KmTqtTpnwkcc4z/rkTvcMkEOLMP09Xc+YcHZwuaiFIeUPrVEVzL6g0Sx63AU7Ibj TXNwPfQpzRjB6NWimOePNg9t1NvDKrzJN6gFO8OJUyRa0Y2Bh0LClWj20NLwCyOE mHtsxTjTIA7TQv0YiETRBCODfBED+vRIjXl2v+PaWkHylyG2IHea88RqOVQusK7x gDNsg== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeefvddrtddtgdehiedvudcutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpggftfghnshhusghstghrihgsvgdp uffrtefokffrpgfnqfghnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivg hnthhsucdlqddutddtmdenucfjughrpefhvfevufffkffojghfggfgsedtkeertdertddt necuhfhrohhmpefthigrnhcuhggrlhhklhhinhcuoehrhigrnhesthgvshhtthhorghsth drtghomheqnecuggftrfgrthhtvghrnhepffehieffgedtgfffjeetveegfeekleeileek veeuteffteetudffveegieeiheetnecuvehluhhsthgvrhfuihiivgepheenucfrrghrrg hmpehmrghilhhfrhhomheprhihrghnsehtvghsthhtohgrshhtrdgtohhmpdhnsggprhgt phhtthhopedvhedpmhhouggvpehsmhhtphhouhhtpdhrtghpthhtohepmhhrihhprghrug eskhgvrhhnvghlrdhorhhgpdhrtghpthhtohepfigvnhhssegtshhivgdrohhrghdprhgt phhtthhopehmrggrrhhtvghnrdhlrghnkhhhohhrshhtsehlihhnuhigrdhinhhtvghlrd gtohhmpdhrtghpthhtohepthiiihhmmhgvrhhmrghnnhesshhushgvrdguvgdprhgtphht thhopegrihhrlhhivggusehgmhgrihhlrdgtohhmpdhrtghpthhtohepuggrnhhivghlse hffhiflhhlrdgthhdprhgtphhtthhopehjvghrnhgvjhdrshhkrhgrsggvtgesghhmrghi lhdrtghomhdprhgtphhtthhopehsrghmuhgvlhesshhhohhllhgrnhgurdhorhhgpdhrtg hpthhtoheprhhosghhsehkvghrnhgvlhdrohhrgh X-ME-Proxy: Feedback-ID: idc0145fc:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Sun, 16 Feb 2025 13:40:23 -0500 (EST) From: Ryan Walklin To: Maxime Ripard , Chen-Yu Tsai , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Daniel Vetter , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: Andre Przywara , Chris Morgan , Hironori KIKUCHI , Philippe Simons , Dmitry Baryshkov , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Ryan Walklin , Conor Dooley Subject: [PATCH v7 22/27] dt-bindings: allwinner: add H616 DE33 mixer binding Date: Mon, 17 Feb 2025 07:36:22 +1300 Message-ID: <20250216183710.8443-23-ryan@testtoast.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250216183710.8443-3-ryan@testtoast.com> References: <20250216183710.8443-3-ryan@testtoast.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The Allwinner H616 and variants have a new display engine revision (DE33). The mixer configuration registers are significantly different to the DE3 and DE2 revisions, being split into separate top and display blocks, therefore a fallback for the mixer compatible is not provided. Add a display engine mixer binding for the DE33. Signed-off-by: Ryan Walklin Acked-by: Conor Dooley Reviewed-by: Chen-Yu Tsai --- Changelog v2..v3: - Separate content into three patches for three separate subsystems Changelog v5..v6: - increase reg maxItems to 3 and add conditional for h616-de33 --- .../allwinner,sun8i-a83t-de2-mixer.yaml | 21 ++++++++++++++++++- 1 file changed, 20 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-de2-mixer.yaml b/Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-de2-mixer.yaml index b75c1ec686ad2..274f5e6327333 100644 --- a/Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-de2-mixer.yaml +++ b/Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-de2-mixer.yaml @@ -24,9 +24,11 @@ properties: - allwinner,sun50i-a64-de2-mixer-0 - allwinner,sun50i-a64-de2-mixer-1 - allwinner,sun50i-h6-de3-mixer-0 + - allwinner,sun50i-h616-de33-mixer-0 reg: - maxItems: 1 + minItems: 1 + maxItems: 3 clocks: items: @@ -61,6 +63,23 @@ properties: required: - port@1 +allOf: + - if: + properties: + compatible: + enum: + - allwinner,sun50i-h616-de33-mixer-0 + + then: + properties: + reg: + maxItems: 3 + + else: + properties: + reg: + maxItems: 1 + required: - compatible - reg From patchwork Sun Feb 16 18:36:23 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Walklin X-Patchwork-Id: 13976657 Received: from fout-b4-smtp.messagingengine.com (fout-b4-smtp.messagingengine.com [202.12.124.147]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 447121A08A3; Sun, 16 Feb 2025 18:40:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=202.12.124.147 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739731241; cv=none; b=kbZMMcVnGdjY3nM2h87GEWkHbrq4fBSsoJ6iK8wDWpWkZOtfKzMsjwZYWXn5tJfgY8XMnfVfYZdILPU/2r5w3FgJFLQWME6THrcPcbeFWW1rG358YXNulaKbqc1u8+AMrDTx+IpqzMWAzhQBOUjLdpYehyJ1MqWwu9IxxU/ys8M= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739731241; c=relaxed/simple; bh=YANJjXJrDkAnZMQ65C65OOP+gY38Q+Hekj0ZV50V5WU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=laFsnHxJDpnmIhYzZ+y55OfEq7lcNYb/UQw+b2c7MCV9IDK2sppVkjjDsCJn92TCJ3AOPWV6VmWi7OXqw4PBbMataAJulnfp3M9kmJJ1d9PPJGMKqjEsZdpLQO5dnh2ip3MTtNFaBb52dBPG3vEOr2tidZVcXHA8QUqayIa2QHA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com; spf=pass smtp.mailfrom=testtoast.com; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b=AjSyOChM; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b=DDTU31Qb; arc=none smtp.client-ip=202.12.124.147 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=testtoast.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b="AjSyOChM"; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="DDTU31Qb" Received: from phl-compute-11.internal (phl-compute-11.phl.internal [10.202.2.51]) by mailfout.stl.internal (Postfix) with ESMTP id D12FA114009B; Sun, 16 Feb 2025 13:40:38 -0500 (EST) Received: from phl-mailfrontend-01 ([10.202.2.162]) by phl-compute-11.internal (MEProxy); Sun, 16 Feb 2025 13:40:39 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=testtoast.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm3; t=1739731238; x= 1739817638; bh=OtGWG9y1AsSlSEynEhNVYtoJVgdMgxP49x1/jztGSxA=; b=A jSyOChMGQvPXAQ2alZcCQyT1oCEu0GAgmiRu8s+KygY2zTb1Ra/XSwJ31RE9Yfxp AQzlwMl5mqyyX91V48WVRAHp+4wjxEABqwHRxyNZ92wAM0yi9ZCJJbgSldVnTXxs lV9hO8cWPWo5ixUDZVBGK3juMHUVIABIj5UdRi+5hBZcjsG56Od+gw3vrdt8WIpf wzbUR71Jfm8UN83hBa1pG4EW6sIMHjA13lm9Hcc9KIs7ukpFztwnBrqmjpZXt9kr 3eFQs6YQqN9bkuXVr0c2+0Q+A57RcRn6aTboiumQiGIym3TivkQ+1qkLwu9/m0WA HGQ/6FHn7NsuoMEbpQyOw== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-sender :x-me-sender:x-sasl-enc; s=fm3; t=1739731238; x=1739817638; bh=O tGWG9y1AsSlSEynEhNVYtoJVgdMgxP49x1/jztGSxA=; b=DDTU31Qb6NsNyBpJq EhpcVhhO0y9JnJgiroiwzK07nTgbNk42Gasdj/sPFPsTzp28L0CgRyI2mZ+zto4k E91W2DFt6kgbNx7oVNYj5Iv74ctNHogpXWlrekLx+T4L9V76CcD3x3nK9lx+MQ93 yadXRTV8A6pXPbIoC2zelet5sINr4KsDtc9IYXG6TOIMX0lbPHCvXOtrfzpSS4Y5 3UjhL/ITDFKm5v20aXuRmkupw9ImKG2QiLwLTFPyoRfQ36Tn1EeAbWGsSXLqnonc vKNHS0UYjsMNIEyHQE3Js9oZB3vDRT8+0vwv9kalPU1ox/6ir0E7sJt57IPRRKst jU9uA== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeefvddrtddtgdehiedvtdcutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpggftfghnshhusghstghrihgsvgdp uffrtefokffrpgfnqfghnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivg hnthhsucdlqddutddtmdenucfjughrpefhvfevufffkffojghfggfgsedtkeertdertddt necuhfhrohhmpefthigrnhcuhggrlhhklhhinhcuoehrhigrnhesthgvshhtthhorghsth drtghomheqnecuggftrfgrthhtvghrnhepffehieffgedtgfffjeetveegfeekleeileek veeuteffteetudffveegieeiheetnecuvehluhhsthgvrhfuihiivgepgeenucfrrghrrg hmpehmrghilhhfrhhomheprhihrghnsehtvghsthhtohgrshhtrdgtohhmpdhnsggprhgt phhtthhopedvgedpmhhouggvpehsmhhtphhouhhtpdhrtghpthhtohepmhhrihhprghrug eskhgvrhhnvghlrdhorhhgpdhrtghpthhtohepfigvnhhssegtshhivgdrohhrghdprhgt phhtthhopehmrggrrhhtvghnrdhlrghnkhhhohhrshhtsehlihhnuhigrdhinhhtvghlrd gtohhmpdhrtghpthhtohepthiiihhmmhgvrhhmrghnnhesshhushgvrdguvgdprhgtphht thhopegrihhrlhhivggusehgmhgrihhlrdgtohhmpdhrtghpthhtohepuggrnhhivghlse hffhiflhhlrdgthhdprhgtphhtthhopehjvghrnhgvjhdrshhkrhgrsggvtgesghhmrghi lhdrtghomhdprhgtphhtthhopehsrghmuhgvlhesshhhohhllhgrnhgurdhorhhgpdhrtg hpthhtoheprhhosghhsehkvghrnhgvlhdrohhrgh X-ME-Proxy: Feedback-ID: idc0145fc:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Sun, 16 Feb 2025 13:40:31 -0500 (EST) From: Ryan Walklin To: Maxime Ripard , Chen-Yu Tsai , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Daniel Vetter , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: Andre Przywara , Chris Morgan , Hironori KIKUCHI , Philippe Simons , Dmitry Baryshkov , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Ryan Walklin Subject: [PATCH v7 23/27] clk: sunxi-ng: ccu: add Display Engine 3.3 (DE33) support Date: Mon, 17 Feb 2025 07:36:23 +1300 Message-ID: <20250216183710.8443-24-ryan@testtoast.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250216183710.8443-3-ryan@testtoast.com> References: <20250216183710.8443-3-ryan@testtoast.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The DE33 is a newer version of the Allwinner Display Engine IP block, found in the H616, H618, H700 and T507 SoCs. DE2 and DE3 are already supported by the mainline driver. The DE33 in the H616 has mixer0 and writeback units. The clocks and resets required are identical to the H3 and H5 respectively, so use those existing structs for the H616 description. There are two additional 32-bit registers (at offsets 0x24 and 0x28) which require clearing and setting respectively to bring up the hardware. The function of these registers is currently unknown, and the values are taken from the out-of-tree driver. Add the required clock description struct and compatible string to the DE2 driver. Signed-off-by: Ryan Walklin --- Changelog v2..v3: - Lowercase hex value Changelog v2..v3: - Correct #include for writel() Changelog v4..v5: - Whitespace fix --- drivers/clk/sunxi-ng/ccu-sun8i-de2.c | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-de2.c b/drivers/clk/sunxi-ng/ccu-sun8i-de2.c index f2aa71206bc20..a6cd0f988859d 100644 --- a/drivers/clk/sunxi-ng/ccu-sun8i-de2.c +++ b/drivers/clk/sunxi-ng/ccu-sun8i-de2.c @@ -5,6 +5,7 @@ #include #include +#include #include #include #include @@ -239,6 +240,16 @@ static const struct sunxi_ccu_desc sun50i_h5_de2_clk_desc = { .num_resets = ARRAY_SIZE(sun50i_h5_de2_resets), }; +static const struct sunxi_ccu_desc sun50i_h616_de33_clk_desc = { + .ccu_clks = sun8i_de2_ccu_clks, + .num_ccu_clks = ARRAY_SIZE(sun8i_de2_ccu_clks), + + .hw_clks = &sun8i_h3_de2_hw_clks, + + .resets = sun50i_h5_de2_resets, + .num_resets = ARRAY_SIZE(sun50i_h5_de2_resets), +}; + static int sunxi_de2_clk_probe(struct platform_device *pdev) { struct clk *bus_clk, *mod_clk; @@ -291,6 +302,16 @@ static int sunxi_de2_clk_probe(struct platform_device *pdev) goto err_disable_mod_clk; } + /* + * The DE33 requires these additional (unknown) registers set + * during initialisation. + */ + if (of_device_is_compatible(pdev->dev.of_node, + "allwinner,sun50i-h616-de33-clk")) { + writel(0, reg + 0x24); + writel(0x0000a980, reg + 0x28); + } + ret = devm_sunxi_ccu_probe(&pdev->dev, reg, ccu_desc); if (ret) goto err_assert_reset; @@ -335,6 +356,10 @@ static const struct of_device_id sunxi_de2_clk_ids[] = { .compatible = "allwinner,sun50i-h6-de3-clk", .data = &sun50i_h5_de2_clk_desc, }, + { + .compatible = "allwinner,sun50i-h616-de33-clk", + .data = &sun50i_h616_de33_clk_desc, + }, { } }; MODULE_DEVICE_TABLE(of, sunxi_de2_clk_ids); From patchwork Sun Feb 16 18:36:24 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Walklin X-Patchwork-Id: 13976666 Received: from fhigh-b4-smtp.messagingengine.com (fhigh-b4-smtp.messagingengine.com [202.12.124.155]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AEC351A0714; Sun, 16 Feb 2025 18:40:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=202.12.124.155 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739731250; cv=none; b=LkZQMTXoPdfqTtO6jI/zD2AUb37tzkYzMp/RvfEhU2wa0mDRNCs1UXjohqCY2COwREyRUpQspxnkTIGlJ7GA4vsMXzI0eUL7U6KaHTEPRA+Utdec74fSBNQZaZ8wNeu4dSsd6dReJ86lLgwLTM5S7XTrF9u89hTSUuLmzPRxtcI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739731250; c=relaxed/simple; bh=+UnHNLyyYeGCZXVpCmkCTzdYE4JOE+RSo/gEicmALRM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=YBrjirryWp8jqAg2Srb9l8b9WRD8NCDBsjCR8v9+CEOUXgLmv45EHvUGvxSaTjFoHwznuPAAWb3+qwDcF1n3OMBaUFC3zf6R4Hm+SsO6Bo8qnCxv/VDEq3xXhRHBHQDORPR1P44ltOe/86mtUYAfjxkptcAqnZgRL/rYzz6jtoA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com; spf=pass smtp.mailfrom=testtoast.com; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b=AkWSHZxp; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b=zBu/lWnH; arc=none smtp.client-ip=202.12.124.155 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=testtoast.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b="AkWSHZxp"; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="zBu/lWnH" Received: from phl-compute-10.internal (phl-compute-10.phl.internal [10.202.2.50]) by mailfhigh.stl.internal (Postfix) with ESMTP id 49CF825400C3; Sun, 16 Feb 2025 13:40:47 -0500 (EST) Received: from phl-mailfrontend-01 ([10.202.2.162]) by phl-compute-10.internal (MEProxy); Sun, 16 Feb 2025 13:40:47 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=testtoast.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm3; t=1739731247; x= 1739817647; bh=qTrgI4pTmO4u0Lv+OA3OrVhIhys5fJYhQ/UKTPXJAw4=; b=A kWSHZxpizbPd8pOJBT5s8IR6LiXnoYRayRS1aT8ukFqUDLvU6v4dqMWYW5T+3eVf Kta/BMJ1r7x2Mc0J3sUfzzORVG7O3ERod79A0NTfB4MwfWbUEN6fUqVcHlVEpAcf ORG++ZdC0Fm8+kyiUK+kbwUuMO6KKLM9ADtZKiobw4qYlAw1fzfFPA3IGp5+F5d5 3p/XMBUVsS1dzxjnaeN/MYMbfzdvJ7VCxD4c34yIUp7uim4AeyzBxz7zWzW2Qd1Y /RA/7n9YKYO4+xAYLsnQWNqr45ThEIneE3QOm+PQTup3+veBIIp8imb3doWMO1So d8Hsm12EwCF+QWeXywkEw== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-sender :x-me-sender:x-sasl-enc; s=fm3; t=1739731247; x=1739817647; bh=q TrgI4pTmO4u0Lv+OA3OrVhIhys5fJYhQ/UKTPXJAw4=; b=zBu/lWnHCoE6Z0YGh uHH+rq548qsbllLqdm6blbmbiGsyGRJV4mFznbT3jz7E2k8EV8wBsXSTvNTfSjn9 VFHI7V/XSwN7nXSwqa09IZOx5BxyW/0Yn89+SQTuhyN4CHokQFIduTIhdgnTM9T1 +jt+xUloeRNQdyvgDQbca4Xib82FhT8OQ5ewaDKYrXDkXJqHoeyan8nHdJnvxAYW DtVS6PoaBMEmtQyucYql7XhbhWCVDSwSkr3YyFboA+7ghJZ8vxbpNtZXlNirA8xB tZK5+GNqXw1AFO8tIfBqzp/rY7XBDRWBEv7FtXi4NP5FLbhUA0DlH91hhvi7yNk4 CnpgQ== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeefvddrtddtgdehiedvtdcutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpggftfghnshhusghstghrihgsvgdp uffrtefokffrpgfnqfghnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivg hnthhsucdlqddutddtmdenucfjughrpefhvfevufffkffojghfggfgsedtkeertdertddt necuhfhrohhmpefthigrnhcuhggrlhhklhhinhcuoehrhigrnhesthgvshhtthhorghsth drtghomheqnecuggftrfgrthhtvghrnhepffehieffgedtgfffjeetveegfeekleeileek veeuteffteetudffveegieeiheetnecuvehluhhsthgvrhfuihiivgepudenucfrrghrrg hmpehmrghilhhfrhhomheprhihrghnsehtvghsthhtohgrshhtrdgtohhmpdhnsggprhgt phhtthhopedvgedpmhhouggvpehsmhhtphhouhhtpdhrtghpthhtohepmhhrihhprghrug eskhgvrhhnvghlrdhorhhgpdhrtghpthhtohepfigvnhhssegtshhivgdrohhrghdprhgt phhtthhopehmrggrrhhtvghnrdhlrghnkhhhohhrshhtsehlihhnuhigrdhinhhtvghlrd gtohhmpdhrtghpthhtohepthiiihhmmhgvrhhmrghnnhesshhushgvrdguvgdprhgtphht thhopegrihhrlhhivggusehgmhgrihhlrdgtohhmpdhrtghpthhtohepuggrnhhivghlse hffhiflhhlrdgthhdprhgtphhtthhopehjvghrnhgvjhdrshhkrhgrsggvtgesghhmrghi lhdrtghomhdprhgtphhtthhopehsrghmuhgvlhesshhhohhllhgrnhgurdhorhhgpdhrtg hpthhtoheprhhosghhsehkvghrnhgvlhdrohhrgh X-ME-Proxy: Feedback-ID: idc0145fc:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Sun, 16 Feb 2025 13:40:39 -0500 (EST) From: Ryan Walklin To: Maxime Ripard , Chen-Yu Tsai , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Daniel Vetter , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: Andre Przywara , Chris Morgan , Hironori KIKUCHI , Philippe Simons , Dmitry Baryshkov , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Ryan Walklin Subject: [PATCH v7 24/27] drm: sun4i: de33: mixer: add Display Engine 3.3 (DE33) support Date: Mon, 17 Feb 2025 07:36:24 +1300 Message-ID: <20250216183710.8443-25-ryan@testtoast.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250216183710.8443-3-ryan@testtoast.com> References: <20250216183710.8443-3-ryan@testtoast.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Jernej Skrabec The DE33 is a newer version of the Allwinner Display Engine IP block, found in the H616, H618, H700 and T507 SoCs. DE2 and DE3 are already supported by the mainline driver. Notable features (from the H616 datasheet and implemented): - 4096 x 2048 (4K) output support - AFBC ARM Frame Buffer Compression support - YUV420 input support The DE2 and DE3 engines have a blender register range within the mixer engine register map, whereas the DE33 separates this out into a separate display group, and adds a top register map. Extend the mixer to support the DE33. Signed-off-by: Jernej Skrabec Signed-off-by: Ryan Walklin --- Changelog v4..v5: - Whitespace fixes - Correct strict mode warnings from checkpatch.pl --- drivers/gpu/drm/sun4i/sun8i_mixer.c | 109 ++++++++++++++++++++++++---- drivers/gpu/drm/sun4i/sun8i_mixer.h | 13 +++- 2 files changed, 105 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c index f0d48796d651f..3584b496c5d58 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c @@ -321,8 +321,12 @@ static void sun8i_mixer_commit(struct sunxi_engine *engine, regmap_write(bld_regs, SUN8I_MIXER_BLEND_PIPE_CTL(bld_base), pipe_en | SUN8I_MIXER_BLEND_PIPE_CTL_FC_EN(0)); - regmap_write(engine->regs, SUN8I_MIXER_GLOBAL_DBUFF, - SUN8I_MIXER_GLOBAL_DBUFF_ENABLE); + if (mixer->cfg->de_type == sun8i_mixer_de33) + regmap_write(mixer->top_regs, SUN50I_MIXER_GLOBAL_DBUFF, + SUN8I_MIXER_GLOBAL_DBUFF_ENABLE); + else + regmap_write(engine->regs, SUN8I_MIXER_GLOBAL_DBUFF, + SUN8I_MIXER_GLOBAL_DBUFF_ENABLE); } static struct drm_plane **sun8i_layers_init(struct drm_device *drm, @@ -371,25 +375,33 @@ static void sun8i_mixer_mode_set(struct sunxi_engine *engine, const struct drm_display_mode *mode) { struct sun8i_mixer *mixer = engine_to_sun8i_mixer(engine); + struct regmap *bld_regs, *disp_regs; u32 bld_base, size, val; bool interlaced; bld_base = sun8i_blender_base(mixer); + bld_regs = sun8i_blender_regmap(mixer); interlaced = !!(mode->flags & DRM_MODE_FLAG_INTERLACE); size = SUN8I_MIXER_SIZE(mode->hdisplay, mode->vdisplay); DRM_DEBUG_DRIVER("Updating global size W: %u H: %u\n", mode->hdisplay, mode->vdisplay); - regmap_write(engine->regs, SUN8I_MIXER_GLOBAL_SIZE, size); - regmap_write(engine->regs, SUN8I_MIXER_BLEND_OUTSIZE(bld_base), size); + if (mixer->cfg->de_type == sun8i_mixer_de33) { + disp_regs = mixer->disp_regs; + regmap_write(mixer->top_regs, SUN50I_MIXER_GLOBAL_SIZE, size); + } else { + disp_regs = mixer->engine.regs; + regmap_write(mixer->engine.regs, SUN8I_MIXER_GLOBAL_SIZE, size); + } + regmap_write(bld_regs, SUN8I_MIXER_BLEND_OUTSIZE(bld_base), size); if (interlaced) val = SUN8I_MIXER_BLEND_OUTCTL_INTERLACED; else val = 0; - regmap_update_bits(engine->regs, SUN8I_MIXER_BLEND_OUTCTL(bld_base), + regmap_update_bits(bld_regs, SUN8I_MIXER_BLEND_OUTCTL(bld_base), SUN8I_MIXER_BLEND_OUTCTL_INTERLACED, val); DRM_DEBUG_DRIVER("Switching display mixer interlaced mode %s\n", @@ -400,10 +412,8 @@ static void sun8i_mixer_mode_set(struct sunxi_engine *engine, else val = 0xff108080; - regmap_write(mixer->engine.regs, - SUN8I_MIXER_BLEND_BKCOLOR(bld_base), val); - regmap_write(mixer->engine.regs, - SUN8I_MIXER_BLEND_ATTR_FCOLOR(bld_base, 0), val); + regmap_write(disp_regs, SUN8I_MIXER_BLEND_BKCOLOR(bld_base), val); + regmap_write(disp_regs, SUN8I_MIXER_BLEND_ATTR_FCOLOR(bld_base, 0), val); if (mixer->cfg->has_formatter) sun50i_fmt_setup(mixer, mode->hdisplay, mode->vdisplay); @@ -442,12 +452,29 @@ static const struct sunxi_engine_ops sun8i_engine_ops = { }; static const struct regmap_config sun8i_mixer_regmap_config = { + .name = "layers", .reg_bits = 32, .val_bits = 32, .reg_stride = 4, .max_register = 0xffffc, /* guessed */ }; +static const struct regmap_config sun8i_top_regmap_config = { + .name = "top", + .reg_bits = 32, + .val_bits = 32, + .reg_stride = 4, + .max_register = 0x3c, +}; + +static const struct regmap_config sun8i_disp_regmap_config = { + .name = "display", + .reg_bits = 32, + .val_bits = 32, + .reg_stride = 4, + .max_register = 0x20000, +}; + static int sun8i_mixer_of_get_id(struct device_node *node) { struct device_node *ep, *remote; @@ -470,33 +497,45 @@ static int sun8i_mixer_of_get_id(struct device_node *node) static void sun8i_mixer_init(struct sun8i_mixer *mixer) { + struct regmap *top_regs, *disp_regs; unsigned int base = sun8i_blender_base(mixer); int plane_cnt, i; + if (mixer->cfg->de_type == sun8i_mixer_de33) { + top_regs = mixer->top_regs; + disp_regs = mixer->disp_regs; + } else { + top_regs = mixer->engine.regs; + disp_regs = mixer->engine.regs; + } + /* Enable the mixer */ - regmap_write(mixer->engine.regs, SUN8I_MIXER_GLOBAL_CTL, + regmap_write(top_regs, SUN8I_MIXER_GLOBAL_CTL, SUN8I_MIXER_GLOBAL_CTL_RT_EN); + if (mixer->cfg->de_type == sun8i_mixer_de33) + regmap_write(top_regs, SUN50I_MIXER_GLOBAL_CLK, 1); + /* Set background color to black */ - regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_BKCOLOR(base), + regmap_write(disp_regs, SUN8I_MIXER_BLEND_BKCOLOR(base), SUN8I_MIXER_BLEND_COLOR_BLACK); /* * Set fill color of bottom plane to black. Generally not needed * except when VI plane is at bottom (zpos = 0) and enabled. */ - regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_PIPE_CTL(base), + regmap_write(disp_regs, SUN8I_MIXER_BLEND_PIPE_CTL(base), SUN8I_MIXER_BLEND_PIPE_CTL_FC_EN(0)); - regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_ATTR_FCOLOR(base, 0), + regmap_write(disp_regs, SUN8I_MIXER_BLEND_ATTR_FCOLOR(base, 0), SUN8I_MIXER_BLEND_COLOR_BLACK); plane_cnt = mixer->cfg->vi_num + mixer->cfg->ui_num; for (i = 0; i < plane_cnt; i++) - regmap_write(mixer->engine.regs, + regmap_write(disp_regs, SUN8I_MIXER_BLEND_MODE(base, i), SUN8I_MIXER_BLEND_MODE_DEF); - regmap_update_bits(mixer->engine.regs, SUN8I_MIXER_BLEND_PIPE_CTL(base), + regmap_update_bits(disp_regs, SUN8I_MIXER_BLEND_PIPE_CTL(base), SUN8I_MIXER_BLEND_PIPE_CTL_EN_MSK, 0); } @@ -573,6 +612,30 @@ static int sun8i_mixer_bind(struct device *dev, struct device *master, return PTR_ERR(mixer->engine.regs); } + if (mixer->cfg->de_type == sun8i_mixer_de33) { + regs = devm_platform_ioremap_resource(pdev, 1); + if (IS_ERR(regs)) + return PTR_ERR(regs); + + mixer->top_regs = devm_regmap_init_mmio(dev, regs, + &sun8i_top_regmap_config); + if (IS_ERR(mixer->top_regs)) { + dev_err(dev, "Couldn't create the top regmap\n"); + return PTR_ERR(mixer->top_regs); + } + + regs = devm_platform_ioremap_resource(pdev, 2); + if (IS_ERR(regs)) + return PTR_ERR(regs); + + mixer->disp_regs = devm_regmap_init_mmio(dev, regs, + &sun8i_disp_regmap_config); + if (IS_ERR(mixer->disp_regs)) { + dev_err(dev, "Couldn't create the disp regmap\n"); + return PTR_ERR(mixer->disp_regs); + } + } + mixer->reset = devm_reset_control_get(dev, NULL); if (IS_ERR(mixer->reset)) { dev_err(dev, "Couldn't get our reset line\n"); @@ -787,6 +850,18 @@ static const struct sun8i_mixer_cfg sun50i_h6_mixer0_cfg = { .vi_num = 1, }; +static const struct sun8i_mixer_cfg sun50i_h616_mixer0_cfg = { + .ccsc = CCSC_MIXER0_LAYOUT, + .de_type = sun8i_mixer_de33, + .has_formatter = 1, + .mod_rate = 600000000, + .scaler_mask = 0xf, + .scanline_yuv = 4096, + .ui_num = 3, + .vi_num = 1, + .map = {0, 6, 7, 8}, +}; + static const struct of_device_id sun8i_mixer_of_table[] = { { .compatible = "allwinner,sun8i-a83t-de2-mixer-0", @@ -832,6 +907,10 @@ static const struct of_device_id sun8i_mixer_of_table[] = { .compatible = "allwinner,sun50i-h6-de3-mixer-0", .data = &sun50i_h6_mixer0_cfg, }, + { + .compatible = "allwinner,sun50i-h616-de33-mixer-0", + .data = &sun50i_h616_mixer0_cfg, + }, { } }; MODULE_DEVICE_TABLE(of, sun8i_mixer_of_table); diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.h b/drivers/gpu/drm/sun4i/sun8i_mixer.h index db962ccd66964..a8afc37dc80d5 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.h +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.h @@ -22,6 +22,10 @@ #define SUN8I_MIXER_GLOBAL_DBUFF 0x8 #define SUN8I_MIXER_GLOBAL_SIZE 0xc +#define SUN50I_MIXER_GLOBAL_SIZE 0x8 +#define SUN50I_MIXER_GLOBAL_CLK 0xc +#define SUN50I_MIXER_GLOBAL_DBUFF 0x10 + #define SUN8I_MIXER_GLOBAL_CTL_RT_EN BIT(0) #define SUN8I_MIXER_GLOBAL_DBUFF_ENABLE BIT(0) @@ -155,6 +159,7 @@ enum { enum sun8i_mixer_type { sun8i_mixer_de2, sun8i_mixer_de3, + sun8i_mixer_de33, }; /** @@ -181,6 +186,7 @@ struct sun8i_mixer_cfg { unsigned int de_type; unsigned int has_formatter : 1; unsigned int scanline_yuv; + unsigned int map[6]; }; struct sun8i_color_model { @@ -238,13 +244,16 @@ sun8i_blender_base(struct sun8i_mixer *mixer) static inline struct regmap * sun8i_blender_regmap(struct sun8i_mixer *mixer) { - return mixer->engine.regs; + return mixer->cfg->de_type == sun8i_mixer_de33 ? + mixer->disp_regs : mixer->engine.regs; } static inline u32 sun8i_channel_base(struct sun8i_mixer *mixer, int channel) { - if (mixer->cfg->de_type == sun8i_mixer_de3) + if (mixer->cfg->de_type == sun8i_mixer_de33) + return mixer->cfg->map[channel] * 0x20000 + DE2_CH_SIZE; + else if (mixer->cfg->de_type == sun8i_mixer_de3) return DE3_CH_BASE + channel * DE3_CH_SIZE; else return DE2_CH_BASE + channel * DE2_CH_SIZE; From patchwork Sun Feb 16 18:36:25 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Walklin X-Patchwork-Id: 13976667 Received: from fhigh-b4-smtp.messagingengine.com (fhigh-b4-smtp.messagingengine.com [202.12.124.155]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AEE5A1A08A3; Sun, 16 Feb 2025 18:40:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=202.12.124.155 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739731259; cv=none; b=jbkksopcxm/6ZNw+UsFDbEYMfrtdW5Xw1uDo+ZEbEz+Sus2xTjiXnD8flWHmsl4wgHyT2EdXbWrCt11xOtLIUAsM0zPmD7mGEuRIXFhOj1e28YdCJmkfw27wqTuRkiHNpXcvwE1CkIAfNtB7hpXR86LzHAz69uZ6l6te844HkwM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739731259; c=relaxed/simple; bh=QvaaEw1/bMvVxNHss/KH3wDZ2qgHg/A//EueXYa0HIY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=IwO2R/QnMA58grWnkPUzBac7DTDEfmcd9BV4l2V0oG7JzFsKblL/GjxAD5xt4qTN1jHt7hmEOU52KaZA/Wi2nnnxy1VUS13KMR7hI941vGk4SJ02KP43vCI4kkwYKRO0tGVByWHd9S+dNMDiNeJNX5Zz1TROYumwLHM0EJXzO7k= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com; spf=pass smtp.mailfrom=testtoast.com; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b=c++VGV0m; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b=Hszy5to4; arc=none smtp.client-ip=202.12.124.155 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=testtoast.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b="c++VGV0m"; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="Hszy5to4" Received: from phl-compute-08.internal (phl-compute-08.phl.internal [10.202.2.48]) by mailfhigh.stl.internal (Postfix) with ESMTP id 224BF25400EC; Sun, 16 Feb 2025 13:40:56 -0500 (EST) Received: from phl-mailfrontend-01 ([10.202.2.162]) by phl-compute-08.internal (MEProxy); Sun, 16 Feb 2025 13:40:56 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=testtoast.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm3; t=1739731255; x= 1739817655; bh=QjD1ZDjTlOdhXrU8c38PMPCZ6hMJn574nV8c+MDBJsM=; b=c ++VGV0meB3oaRXQCdYncFUZgwKI48SzRnwGdc34rKclBmgPDNGwOB/dQBVhQdVTE cTejqNu/ld2m64eSvbEcBJffDFjejADdDSgWP3BWbO5Y6AAh2tivsY/4XPuLeKZb UhXkIgYhwuQdgoXb3ilT7KS40VV3VoIXbjejgePdXVGWzvUeYHmf53bpYV/27Yh1 1MxUb9FQvdptEvUvy9fy3aCX/p1BhZRB4w2zY+iJGIUaTSLg5Bvcpp6VmfIOEdtH D6hzPuUxmkjGIXItFbnahXZnmIX43vAScdtrYVXD2JyXkwcKdFU6M9iY65jEI0lW iiBRHl/UJH9ei28OOGOMg== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-sender :x-me-sender:x-sasl-enc; s=fm3; t=1739731255; x=1739817655; bh=Q jD1ZDjTlOdhXrU8c38PMPCZ6hMJn574nV8c+MDBJsM=; b=Hszy5to4jGFtfMzu8 WwpSp2PFaqtb85i/CWRaCS2kLUuA7qYc0Spl2WkHNrnut6voD82rsXv7xCy8FQ7/ fc6Vx0XME5g3EpBha7MFzAp/cYm4lASTN7Sv+2I2aWDVYfQEnTIKeaGXQ3pGTqAK 1rwdilxlP35yxaG/eP3gnayjQcthLzw7759LZkqfm5QVE9ATBPLg0xr8Ys+Wm5e1 XeBymzdYU4loW9rajUYhLU0VXi8P9XcyBWUsbnXXb9vfYunJjYo2K52v92d0X+UP hsGdDVfijF0CGgeKDdUU4YKdnt91qxokvCXpjTCTIodmdsop+qbybuUZdHtclEW6 /cOQA== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeefvddrtddtgdehiedvtdcutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpggftfghnshhusghstghrihgsvgdp uffrtefokffrpgfnqfghnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivg hnthhsucdlqddutddtmdenucfjughrpefhvfevufffkffojghfggfgsedtkeertdertddt necuhfhrohhmpefthigrnhcuhggrlhhklhhinhcuoehrhigrnhesthgvshhtthhorghsth drtghomheqnecuggftrfgrthhtvghrnhepffehieffgedtgfffjeetveegfeekleeileek veeuteffteetudffveegieeiheetnecuvehluhhsthgvrhfuihiivgepudenucfrrghrrg hmpehmrghilhhfrhhomheprhihrghnsehtvghsthhtohgrshhtrdgtohhmpdhnsggprhgt phhtthhopedvgedpmhhouggvpehsmhhtphhouhhtpdhrtghpthhtohepmhhrihhprghrug eskhgvrhhnvghlrdhorhhgpdhrtghpthhtohepfigvnhhssegtshhivgdrohhrghdprhgt phhtthhopehmrggrrhhtvghnrdhlrghnkhhhohhrshhtsehlihhnuhigrdhinhhtvghlrd gtohhmpdhrtghpthhtohepthiiihhmmhgvrhhmrghnnhesshhushgvrdguvgdprhgtphht thhopegrihhrlhhivggusehgmhgrihhlrdgtohhmpdhrtghpthhtohepuggrnhhivghlse hffhiflhhlrdgthhdprhgtphhtthhopehjvghrnhgvjhdrshhkrhgrsggvtgesghhmrghi lhdrtghomhdprhgtphhtthhopehsrghmuhgvlhesshhhohhllhgrnhgurdhorhhgpdhrtg hpthhtoheprhhosghhsehkvghrnhgvlhdrohhrgh X-ME-Proxy: Feedback-ID: idc0145fc:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Sun, 16 Feb 2025 13:40:48 -0500 (EST) From: Ryan Walklin To: Maxime Ripard , Chen-Yu Tsai , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Daniel Vetter , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: Andre Przywara , Chris Morgan , Hironori KIKUCHI , Philippe Simons , Dmitry Baryshkov , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Ryan Walklin Subject: [PATCH v7 25/27] drm: sun4i: de33: vi_scaler: add Display Engine 3.3 (DE33) support Date: Mon, 17 Feb 2025 07:36:25 +1300 Message-ID: <20250216183710.8443-26-ryan@testtoast.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250216183710.8443-3-ryan@testtoast.com> References: <20250216183710.8443-3-ryan@testtoast.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Jernej Skrabec The vi_scaler appears to be used in preference to the ui_scaler module for hardware video scaling in the DE33. Enable support for this scaler. Signed-off-by: Jernej Skrabec Signed-off-by: Ryan Walklin --- drivers/gpu/drm/sun4i/sun8i_ui_layer.c | 19 +++++++++++++++---- drivers/gpu/drm/sun4i/sun8i_vi_scaler.c | 7 ++++++- 2 files changed, 21 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c b/drivers/gpu/drm/sun4i/sun8i_ui_layer.c index 7f1231cf0f012..180be9d67d9c3 100644 --- a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c +++ b/drivers/gpu/drm/sun4i/sun8i_ui_layer.c @@ -95,12 +95,23 @@ static int sun8i_ui_layer_update_coord(struct sun8i_mixer *mixer, int channel, hscale = state->src_w / state->crtc_w; vscale = state->src_h / state->crtc_h; - sun8i_ui_scaler_setup(mixer, channel, src_w, src_h, dst_w, - dst_h, hscale, vscale, hphase, vphase); - sun8i_ui_scaler_enable(mixer, channel, true); + if (mixer->cfg->de_type == sun8i_mixer_de33) { + sun8i_vi_scaler_setup(mixer, channel, src_w, src_h, + dst_w, dst_h, hscale, vscale, + hphase, vphase, + state->fb->format); + } else { + sun8i_ui_scaler_setup(mixer, channel, src_w, src_h, + dst_w, dst_h, hscale, vscale, + hphase, vphase); + sun8i_ui_scaler_enable(mixer, channel, true); + } } else { DRM_DEBUG_DRIVER("HW scaling is not needed\n"); - sun8i_ui_scaler_enable(mixer, channel, false); + if (mixer->cfg->de_type == sun8i_mixer_de33) + sun8i_vi_scaler_disable(mixer, channel); + else + sun8i_ui_scaler_enable(mixer, channel, false); } /* Set base coordinates */ diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_scaler.c b/drivers/gpu/drm/sun4i/sun8i_vi_scaler.c index e7242301b312c..9c7f6e7d71d50 100644 --- a/drivers/gpu/drm/sun4i/sun8i_vi_scaler.c +++ b/drivers/gpu/drm/sun4i/sun8i_vi_scaler.c @@ -835,7 +835,9 @@ static const u32 bicubic4coefftab32[480] = { static u32 sun8i_vi_scaler_base(struct sun8i_mixer *mixer, int channel) { - if (mixer->cfg->de_type == sun8i_mixer_de3) + if (mixer->cfg->de_type == sun8i_mixer_de33) + return sun8i_channel_base(mixer, channel) + 0x3000; + else if (mixer->cfg->de_type == sun8i_mixer_de3) return DE3_VI_SCALER_UNIT_BASE + DE3_VI_SCALER_UNIT_SIZE * channel; else @@ -845,6 +847,9 @@ static u32 sun8i_vi_scaler_base(struct sun8i_mixer *mixer, int channel) static bool sun8i_vi_scaler_is_vi_plane(struct sun8i_mixer *mixer, int channel) { + if (mixer->cfg->de_type == sun8i_mixer_de33) + return mixer->cfg->map[channel] < mixer->cfg->vi_num; + return true; } From patchwork Sun Feb 16 18:36:26 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Walklin X-Patchwork-Id: 13976668 Received: from fhigh-b4-smtp.messagingengine.com (fhigh-b4-smtp.messagingengine.com [202.12.124.155]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 139A71A08A3; Sun, 16 Feb 2025 18:41:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=202.12.124.155 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739731267; cv=none; b=QDTTE9267SZg1sBXqP3iQGwddfSTbcaZXYs/Mckmir16PPurw78prP2AorNveMT7n6FNd2FWGZGZH8OI/k8Juw5w95iDabduHCO3pX9hCEfvJ1Xyf+Y59LNICx4Pw9kYFswn07Z6OpenCP6++rjK7YEcI7P/9QNUkMMJ6GB8qcY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739731267; c=relaxed/simple; bh=ls1Ariv/blMzm0cXOEj9UvfC+7GGVrknKJ0knjqKKDM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Pow54kBVxDpC7LNGF93eysdCqINXuRZoyN2FNu1nK5Mo/ATsC0tfLaHhE0qt/PHD0dGbL6W9MuWaousNa3jceNzbnjhehW0ri+ioOcUEDVQx7fpT6rrvOtjIylwYHcmdng+QSdnPlJ4rFKv3MUAxvTcxp1xA0xlmORnPZoCGLxs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com; spf=pass smtp.mailfrom=testtoast.com; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b=rTVis3JI; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b=CDHvsdkx; arc=none smtp.client-ip=202.12.124.155 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=testtoast.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b="rTVis3JI"; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="CDHvsdkx" Received: from phl-compute-04.internal (phl-compute-04.phl.internal [10.202.2.44]) by mailfhigh.stl.internal (Postfix) with ESMTP id 9E18D25400C3; Sun, 16 Feb 2025 13:41:04 -0500 (EST) Received: from phl-mailfrontend-01 ([10.202.2.162]) by phl-compute-04.internal (MEProxy); Sun, 16 Feb 2025 13:41:05 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=testtoast.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm3; t=1739731264; x= 1739817664; bh=owmp13+PRVCZr2KaoeYEeTrebxFfw3J5vKLj7UHan04=; b=r TVis3JI6IbhMfm1QieteT8pxK+JNnJJqHZOj8G11xtF02VvlRS+n0zXzbRU00z73 qqOEZa6orLbm9Bz9szRF69ziZazInZmaymroEwpwPAZLKqDlFfgCIArhDBjEc2dl sqpsjxLVIDCGuib/9KmXze/Vr7ZZMEcfokB1dwRwk0+GHvKrv3XFer9CWpMAkc9w GTx++CxHmsLFW75hCscKppQNn1XF93CUDBZMyk5TPQXNkxL+x0q08TdCmeiRasVV OvDlgPxHFg1qUCuaCXG+Rb+2zblyiCl4rHTy/rmsMJatj8qvceCZkmOHu9Uz4wU2 mVQxccVLctVVcThw19XEg== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-sender :x-me-sender:x-sasl-enc; s=fm3; t=1739731264; x=1739817664; bh=o wmp13+PRVCZr2KaoeYEeTrebxFfw3J5vKLj7UHan04=; b=CDHvsdkxRpy0jVxAq XBTVGKInAvrMW7XPYAy6fMpF6ye1isZtnQTxdqw7YMV4SHAKEo6B71qB0i1jy2JO 7I+yLUMLu1A9288pQCGPSqid5nXzoUUZTRR/S/ySHxFdBZCcvZtZI8T2Y9Hm65a/ NfcyHlUFIkFLXQKlWwWHrLRN9NvKxrf49kdZB+usu9E627OxR8CQyF7dJmF98cQf 4EonyXMpcdkT+ATAkSCbsI2Arl8AgvDQ2lhXk4kcP2NvR4+Q9cWFWQU/ga4sRu/Q XpVOZwTxcpqdnW6j0CKxeRf90iRtEh8JpTtcQkOowSWeb2gdOPRr6cF3nygG4dPN h0T0A== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeefvddrtddtgdehiedvudcutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpggftfghnshhusghstghrihgsvgdp uffrtefokffrpgfnqfghnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivg hnthhsucdlqddutddtmdenucfjughrpefhvfevufffkffojghfggfgsedtkeertdertddt necuhfhrohhmpefthigrnhcuhggrlhhklhhinhcuoehrhigrnhesthgvshhtthhorghsth drtghomheqnecuggftrfgrthhtvghrnhepffehieffgedtgfffjeetveegfeekleeileek veeuteffteetudffveegieeiheetnecuvehluhhsthgvrhfuihiivgepieenucfrrghrrg hmpehmrghilhhfrhhomheprhihrghnsehtvghsthhtohgrshhtrdgtohhmpdhnsggprhgt phhtthhopedvgedpmhhouggvpehsmhhtphhouhhtpdhrtghpthhtohepmhhrihhprghrug eskhgvrhhnvghlrdhorhhgpdhrtghpthhtohepfigvnhhssegtshhivgdrohhrghdprhgt phhtthhopehmrggrrhhtvghnrdhlrghnkhhhohhrshhtsehlihhnuhigrdhinhhtvghlrd gtohhmpdhrtghpthhtohepthiiihhmmhgvrhhmrghnnhesshhushgvrdguvgdprhgtphht thhopegrihhrlhhivggusehgmhgrihhlrdgtohhmpdhrtghpthhtohepuggrnhhivghlse hffhiflhhlrdgthhdprhgtphhtthhopehjvghrnhgvjhdrshhkrhgrsggvtgesghhmrghi lhdrtghomhdprhgtphhtthhopehsrghmuhgvlhesshhhohhllhgrnhgurdhorhhgpdhrtg hpthhtoheprhhosghhsehkvghrnhgvlhdrohhrgh X-ME-Proxy: Feedback-ID: idc0145fc:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Sun, 16 Feb 2025 13:40:57 -0500 (EST) From: Ryan Walklin To: Maxime Ripard , Chen-Yu Tsai , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Daniel Vetter , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: Andre Przywara , Chris Morgan , Hironori KIKUCHI , Philippe Simons , Dmitry Baryshkov , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Ryan Walklin Subject: [PATCH v7 26/27] drm: sun4i: de33: fmt: add Display Engine 3.3 (DE33) support Date: Mon, 17 Feb 2025 07:36:26 +1300 Message-ID: <20250216183710.8443-27-ryan@testtoast.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250216183710.8443-3-ryan@testtoast.com> References: <20250216183710.8443-3-ryan@testtoast.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Jernej Skrabec Like the DE3, the DE33 has a FMT (formatter) module, which provides YUV444 to YUV422/YUV420 conversion, format re-mapping and color depth conversion, although the DE33 module appears significantly more capable, including up to 4K video support. Add support for the DE33. Signed-off-by: Jernej Skrabec Signed-off-by: Ryan Walklin --- drivers/gpu/drm/sun4i/sun50i_fmt.c | 21 +++++++++++++++++++-- drivers/gpu/drm/sun4i/sun50i_fmt.h | 1 + 2 files changed, 20 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun50i_fmt.c b/drivers/gpu/drm/sun4i/sun50i_fmt.c index 376a3c9b993f4..03d5d7132d1aa 100644 --- a/drivers/gpu/drm/sun4i/sun50i_fmt.c +++ b/drivers/gpu/drm/sun4i/sun50i_fmt.c @@ -51,6 +51,19 @@ static void sun50i_fmt_de3_limits(u32 *limits, u32 colorspace, bool bit10) } } +static void sun50i_fmt_de33_limits(u32 *limits, u32 colorspace) +{ + if (colorspace == SUN50I_FMT_CS_YUV444RGB) { + limits[0] = SUN50I_FMT_LIMIT(0, 4095); + limits[1] = SUN50I_FMT_LIMIT(0, 4095); + limits[2] = SUN50I_FMT_LIMIT(0, 4095); + } else { + limits[0] = SUN50I_FMT_LIMIT(256, 3840); + limits[1] = SUN50I_FMT_LIMIT(256, 3840); + limits[2] = SUN50I_FMT_LIMIT(256, 3840); + } +} + void sun50i_fmt_setup(struct sun8i_mixer *mixer, u16 width, u16 height) { u32 colorspace, limit[3], base; @@ -61,10 +74,14 @@ void sun50i_fmt_setup(struct sun8i_mixer *mixer, u16 width, u16 height) format = mixer->color_model.format; colorspace = sun50i_fmt_get_colorspace(format); bit10 = sun50i_fmt_is_10bit(format); - base = SUN50I_FMT_DE3; + base = mixer->cfg->de_type == sun8i_mixer_de3 ? + SUN50I_FMT_DE3 : SUN50I_FMT_DE33; regs = sun8i_blender_regmap(mixer); - sun50i_fmt_de3_limits(limit, colorspace, bit10); + if (mixer->cfg->de_type == sun8i_mixer_de3) + sun50i_fmt_de3_limits(limit, colorspace, bit10); + else + sun50i_fmt_de33_limits(limit, colorspace); regmap_write(regs, SUN50I_FMT_CTRL(base), 0); diff --git a/drivers/gpu/drm/sun4i/sun50i_fmt.h b/drivers/gpu/drm/sun4i/sun50i_fmt.h index dd6816c90dfcd..e15f9803b3574 100644 --- a/drivers/gpu/drm/sun4i/sun50i_fmt.h +++ b/drivers/gpu/drm/sun4i/sun50i_fmt.h @@ -9,6 +9,7 @@ #include "sun8i_mixer.h" #define SUN50I_FMT_DE3 0xa8000 +#define SUN50I_FMT_DE33 0x5000 #define SUN50I_FMT_CTRL(base) ((base) + 0x00) #define SUN50I_FMT_SIZE(base) ((base) + 0x04) From patchwork Sun Feb 16 18:36:27 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Walklin X-Patchwork-Id: 13976669 Received: from fout-b4-smtp.messagingengine.com (fout-b4-smtp.messagingengine.com [202.12.124.147]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 04D0C1A08A3; Sun, 16 Feb 2025 18:41:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=202.12.124.147 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739731276; cv=none; b=Sw4Jm+Tx8K6GTxjMBNDoScwZ2ogTpYYybEJZS2IIDJjVNoEDcVcoTNL9JeCmo7ukmKoNmcvP/SaRY9lzQI4PxNmF3dBLly/i+8A0osmGb6Ta8X7uSRystuKBGVQV5wjbLrDv5JtYbMWd1gw61ESuuWZsTTClm5GXQV61NzWRSLc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739731276; c=relaxed/simple; bh=FgdOGHYO0gvjEX4F+2Pv1ZOHkT3jwclpoYLe5Lr7Gio=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=TMa+jxhUUcNYjcvehxAbYGIEQl9wV9tTM32o8XLNBJ2YsrlSanRjTf7PiKKwvySBBUYbvj/+dHC9TYiXjPxDiEjclN/18scyaUQE7itTyKdFs3ax/DDC27wa38NmUAKzdTeJ2jRyXA315PUQCxHLPckBWlCwdFrl8orVik+fD0M= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com; spf=pass smtp.mailfrom=testtoast.com; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b=KrTVil1P; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b=MR2e+PAs; arc=none smtp.client-ip=202.12.124.147 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=testtoast.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=testtoast.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=testtoast.com header.i=@testtoast.com header.b="KrTVil1P"; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="MR2e+PAs" Received: from phl-compute-04.internal (phl-compute-04.phl.internal [10.202.2.44]) by mailfout.stl.internal (Postfix) with ESMTP id 66EA61140114; Sun, 16 Feb 2025 13:41:13 -0500 (EST) Received: from phl-mailfrontend-01 ([10.202.2.162]) by phl-compute-04.internal (MEProxy); Sun, 16 Feb 2025 13:41:14 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=testtoast.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm3; t=1739731273; x= 1739817673; bh=yn06nNMTN3kxcpZkZJtZKmYTN2rUWD3mBgjPfdEVi54=; b=K rTVil1P8qkkoDMJY6hJSN7BPViuIMzoPyWQTydIpHUANaNPX1UzbXIdV+GZpymOi DrcQ5nO9KKkqfntjmcHq2TNxrdRlcYWuFUocSl7ztcHny1M6OetrKbFbl/VgBqOr YKZhnrqptYCAmJhP2gv5gOiWfFzj0MTKn/Y6FSn91ow4MtqUIOpsi5pP4FjnJtCR PTBdGi7HxcikZ8HgP4eZY4ESGjsatJUJPB8DVjf1Jwp3+y6kUEluMLDs2BNjKRnF YmNFyBDu9eXMgp6MyQbG2HBk9TmN0KNYs+kaCpRqIDUeukf4TEXvQEldcb3IRz3h gXWSVAfzqvrdWL+0L4PwA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-sender :x-me-sender:x-sasl-enc; s=fm3; t=1739731273; x=1739817673; bh=y n06nNMTN3kxcpZkZJtZKmYTN2rUWD3mBgjPfdEVi54=; b=MR2e+PAs5SYel3vaQ fBcQNiEpZIhNVdDFIj7EXkledti4o6MG1Vq/doWT/lwGXrnIExyevNfEMLS06NOk uGWiNwd5By/B3x1f2363tYmJZ8LthJOgEsfXnN/sc+xrQY6vEtDMz9ZtekgWUIWC rwBheGs3jxu7FmxZiUKp4y+CC6lIDMKZ9BibP/YAle4C8DjBeVH7dD1N7S/sz6II 1Axi+8JYelF3vMLq/HgRS5USMhE34qfFUEH31mhQ5iOYethY7R+DKoob5stuQmJ9 bk8CIVUCJSgSBr77CfRmrKainxReC365Z6X+Mh61HnyepeuswCH1/UFtajiIyPjn PoV4Q== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgeefvddrtddtgdehiedvudcutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpggftfghnshhusghstghrihgsvgdp uffrtefokffrpgfnqfghnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivg hnthhsucdlqddutddtmdenucfjughrpefhvfevufffkffojghfggfgsedtkeertdertddt necuhfhrohhmpefthigrnhcuhggrlhhklhhinhcuoehrhigrnhesthgvshhtthhorghsth drtghomheqnecuggftrfgrthhtvghrnhepffehieffgedtgfffjeetveegfeekleeileek veeuteffteetudffveegieeiheetnecuvehluhhsthgvrhfuihiivgepjeenucfrrghrrg hmpehmrghilhhfrhhomheprhihrghnsehtvghsthhtohgrshhtrdgtohhmpdhnsggprhgt phhtthhopedvhedpmhhouggvpehsmhhtphhouhhtpdhrtghpthhtohepmhhrihhprghrug eskhgvrhhnvghlrdhorhhgpdhrtghpthhtohepfigvnhhssegtshhivgdrohhrghdprhgt phhtthhopehmrggrrhhtvghnrdhlrghnkhhhohhrshhtsehlihhnuhigrdhinhhtvghlrd gtohhmpdhrtghpthhtohepthiiihhmmhgvrhhmrghnnhesshhushgvrdguvgdprhgtphht thhopegrihhrlhhivggusehgmhgrihhlrdgtohhmpdhrtghpthhtohepuggrnhhivghlse hffhiflhhlrdgthhdprhgtphhtthhopehjvghrnhgvjhdrshhkrhgrsggvtgesghhmrghi lhdrtghomhdprhgtphhtthhopehsrghmuhgvlhesshhhohhllhgrnhgurdhorhhgpdhrtg hpthhtoheprhhosghhsehkvghrnhgvlhdrohhrgh X-ME-Proxy: Feedback-ID: idc0145fc:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Sun, 16 Feb 2025 13:41:05 -0500 (EST) From: Ryan Walklin To: Maxime Ripard , Chen-Yu Tsai , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Daniel Vetter , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: Andre Przywara , Chris Morgan , Hironori KIKUCHI , Philippe Simons , Dmitry Baryshkov , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Ryan Walklin , Chris Morgan Subject: [PATCH v7 27/27] drm: sun4i: de33: csc: add Display Engine 3.3 (DE33) support Date: Mon, 17 Feb 2025 07:36:27 +1300 Message-ID: <20250216183710.8443-28-ryan@testtoast.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250216183710.8443-3-ryan@testtoast.com> References: <20250216183710.8443-3-ryan@testtoast.com> Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Like earlier DE versions, the DE33 has a CSC (Color Space Correction) module. which provides color space conversion between BT2020/BT709, and dynamic range conversion between SDR/ST2084/HLG. Add support for the DE33. Signed-off-by: Jernej Skrabec Signed-off-by: Ryan Walklin Tested-by: Philippe Simons Tested-by: Chris Morgan --- Changelog v5..v6: - Amend format_type to sun8i_format_type - Add Tested-by: tags --- drivers/gpu/drm/sun4i/sun8i_csc.c | 98 +++++++++++++++++++++++++++++++ drivers/gpu/drm/sun4i/sun8i_csc.h | 3 + 2 files changed, 101 insertions(+) diff --git a/drivers/gpu/drm/sun4i/sun8i_csc.c b/drivers/gpu/drm/sun4i/sun8i_csc.c index 66c9ee29842cd..2274a82223164 100644 --- a/drivers/gpu/drm/sun4i/sun8i_csc.c +++ b/drivers/gpu/drm/sun4i/sun8i_csc.c @@ -238,6 +238,14 @@ static const u32 yuv2yuv_de3[2][3][3][12] = { }, }; +static u32 sun8i_csc_base(struct sun8i_mixer *mixer, int layer) +{ + if (mixer->cfg->de_type == sun8i_mixer_de33) + return sun8i_channel_base(mixer, layer) - 0x800; + else + return ccsc_base[mixer->cfg->ccsc][layer]; +} + static void sun8i_csc_setup(struct regmap *map, u32 base, enum sun8i_format_type fmt_type, enum drm_color_encoding encoding, @@ -360,6 +368,92 @@ static void sun8i_de3_ccsc_setup(struct sun8i_mixer *mixer, int layer, mask, val); } +/* extract constant from high word and invert sign if necessary */ +static u32 sun8i_de33_ccsc_get_constant(u32 value) +{ + value >>= 16; + + if (value & BIT(15)) + return 0x400 - (value & 0x3ff); + + return value; +} + +static void sun8i_de33_convert_table(const u32 *src, u32 *dst) +{ + dst[0] = sun8i_de33_ccsc_get_constant(src[3]); + dst[1] = sun8i_de33_ccsc_get_constant(src[7]); + dst[2] = sun8i_de33_ccsc_get_constant(src[11]); + memcpy(&dst[3], src, sizeof(u32) * 12); + dst[6] &= 0xffff; + dst[10] &= 0xffff; + dst[14] &= 0xffff; +} + +static void sun8i_de33_ccsc_setup(struct sun8i_mixer *mixer, int layer, + enum sun8i_format_type fmt_type, + enum drm_color_encoding encoding, + enum drm_color_range range) +{ + u32 addr, val = 0, base, csc[15]; + struct sunxi_engine *engine; + struct regmap *map; + const u32 *table; + int i; + struct sun8i_color_model model; + + table = yuv2rgb_de3[range][encoding]; + base = sun8i_csc_base(mixer, layer); + model = mixer->color_model; + engine = &mixer->engine; + map = engine->regs; + + switch (fmt_type) { + case FORMAT_TYPE_RGB: + if (mixer->color_model.format == MEDIA_BUS_FMT_RGB888_1X24) + break; + val = SUN8I_CSC_CTRL_EN; + sun8i_de33_convert_table(rgb2yuv_de3[mixer->color_model.encoding], csc); + regmap_bulk_write(map, SUN50I_CSC_COEFF(base, 0), csc, 15); + break; + case FORMAT_TYPE_YUV: + table = sun8i_csc_get_de3_yuv_table(encoding, range, + model.format, + model.encoding); + if (!table) + break; + val = SUN8I_CSC_CTRL_EN; + sun8i_de33_convert_table(table, csc); + regmap_bulk_write(map, SUN50I_CSC_COEFF(base, 0), csc, 15); + break; + case FORMAT_TYPE_YVU: + table = sun8i_csc_get_de3_yuv_table(encoding, range, + model.format, + model.encoding); + if (!table) + table = yuv2yuv_de3[range][encoding][encoding]; + val = SUN8I_CSC_CTRL_EN; + sun8i_de33_convert_table(table, csc); + for (i = 0; i < 15; i++) { + addr = SUN50I_CSC_COEFF(base, i); + if (i > 3) { + if (((i - 3) & 3) == 1) + addr = SUN50I_CSC_COEFF(base, i + 1); + else if (((i - 3) & 3) == 2) + addr = SUN50I_CSC_COEFF(base, i - 1); + } + regmap_write(map, addr, csc[i]); + } + break; + default: + val = 0; + DRM_WARN("Wrong CSC mode specified.\n"); + return; + } + + regmap_write(map, SUN8I_CSC_CTRL(base), val); +} + void sun8i_csc_set_ccsc(struct sun8i_mixer *mixer, int layer, enum sun8i_format_type fmt_type, enum drm_color_encoding encoding, @@ -371,6 +465,10 @@ void sun8i_csc_set_ccsc(struct sun8i_mixer *mixer, int layer, sun8i_de3_ccsc_setup(mixer, layer, fmt_type, encoding, range); return; + } else if (mixer->cfg->de_type == sun8i_mixer_de33) { + sun8i_de33_ccsc_setup(mixer, layer, fmt_type, + encoding, range); + return; } if (layer < mixer->cfg->vi_num) { diff --git a/drivers/gpu/drm/sun4i/sun8i_csc.h b/drivers/gpu/drm/sun4i/sun8i_csc.h index 9b63c92782f56..4a06fc43de2d0 100644 --- a/drivers/gpu/drm/sun4i/sun8i_csc.h +++ b/drivers/gpu/drm/sun4i/sun8i_csc.h @@ -20,6 +20,9 @@ struct sun8i_mixer; #define SUN8I_CSC_CTRL(base) ((base) + 0x0) #define SUN8I_CSC_COEFF(base, i) ((base) + 0x10 + 4 * (i)) +#define SUN50I_CSC_COEFF(base, i) ((base) + 0x04 + 4 * (i)) +#define SUN50I_CSC_ALPHA(base) ((base) + 0x40) + #define SUN8I_CSC_CTRL_EN BIT(0) enum sun8i_format_type {