From patchwork Tue Feb 18 19:52:12 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Packham X-Patchwork-Id: 13980737 Received: from gate2.alliedtelesis.co.nz (gate2.alliedtelesis.co.nz [202.36.163.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 091C31EB5CA for ; Tue, 18 Feb 2025 19:52:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=202.36.163.20 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739908349; cv=none; b=mIfeQ/oVnvTwxeRf261Hr5mfOYwOeqy+mjfq+3bOfkiOAnKsn7LDpTeEumOtoh8E7JXG0/AUQAf/PJXmI6wQ/3LR6wM5VWvWP7GuXGfSwAXpEWDN1k2eNZklYGjoQtsGmJg0vlE2KPpXBQB8b4oVdPXDGRKtTL7LqINbsL6xNAU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739908349; c=relaxed/simple; bh=9ovPTmcz3r5Z+SxqJ+uSZAzBU52u2lOiu6lP7nJBR68=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=MCk0zKW4Cy99aI+nSuiz4IIQNrHsk8toT1hn99hCDOt7x8tQ0+NuwIuhSmwWWlEI9xzSGtaUGvI9P/e9QPDMIXtPnDYB79iKnqmVOOSncMx6P3+1/Sbr3X1Z7z30dJ1yBG+ctKNdVoLZDt8hPjhweZQanwlO26l6MDZjWqwwSIg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=alliedtelesis.co.nz; spf=pass smtp.mailfrom=alliedtelesis.co.nz; dkim=pass (2048-bit key) header.d=alliedtelesis.co.nz header.i=@alliedtelesis.co.nz header.b=eAWNQ4I3; arc=none smtp.client-ip=202.36.163.20 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=alliedtelesis.co.nz Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=alliedtelesis.co.nz Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=alliedtelesis.co.nz header.i=@alliedtelesis.co.nz header.b="eAWNQ4I3" Received: from svr-chch-seg1.atlnz.lc (mmarshal3.atlnz.lc [10.32.18.43]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by gate2.alliedtelesis.co.nz (Postfix) with ESMTPS id 0FE192C03C6; Wed, 19 Feb 2025 08:52:24 +1300 (NZDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alliedtelesis.co.nz; s=mail181024; t=1739908344; bh=qtQSybJN4jzTBTh2b1fTYdZXFDPv02QDw6AL0pSDuEU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=eAWNQ4I35gSXIFq6Dhb9MMBu+xvL+okS9Pu5SjVRcO/toegkkzJeFo2Sj0YFJCqvN b0Q1/lVjuBI62PMsKLmI3oLkwwBrkArhvjSJ6/XZMV5gf7N/JqcAkN9W3eZq1FiHa4 45CIlmwNKQbtAkuvm9bwuo1FdEu6/q5kahQLG/Qy2pHnNqGS8OhnikHW5pRyuYe8EA Vp7g1V+65oVjb8Nby5CTQbLPXnwFdTL4Uy9HY7HIqwVUn+2OhKk8ljvh5Vm/2n8dru zu2usgy0uF4UJF91R3tloteTh6rpCOePF6Xbt52nyUCTvQm71PgOSmuC207Ic1fd/M itnz+fIr5+E5A== Received: from pat.atlnz.lc (Not Verified[10.32.16.33]) by svr-chch-seg1.atlnz.lc with Trustwave SEG (v8,2,6,11305) id ; Wed, 19 Feb 2025 08:52:23 +1300 Received: from chrisp-dl.ws.atlnz.lc (chrisp-dl.ws.atlnz.lc [10.33.22.30]) by pat.atlnz.lc (Postfix) with ESMTP id AD51E13EE36; Wed, 19 Feb 2025 08:52:23 +1300 (NZDT) Received: by chrisp-dl.ws.atlnz.lc (Postfix, from userid 1030) id AAB6E2804FB; Wed, 19 Feb 2025 08:52:23 +1300 (NZDT) From: Chris Packham To: lee@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, tsbogend@alpha.franken.de Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-mips@vger.kernel.org, Chris Packham Subject: [RESEND PATCH net-next 1/5] dt-bindings: net: Move realtek,rtl9301-switch to net Date: Wed, 19 Feb 2025 08:52:12 +1300 Message-ID: <20250218195216.1034220-2-chris.packham@alliedtelesis.co.nz> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250218195216.1034220-1-chris.packham@alliedtelesis.co.nz> References: <20250218195216.1034220-1-chris.packham@alliedtelesis.co.nz> Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-SEG-SpamProfiler-Analysis: v=2.4 cv=ccpxrWDM c=1 sm=1 tr=0 ts=67b4e4f7 a=KLBiSEs5mFS1a/PbTCJxuA==:117 a=T2h4t0Lz3GQA:10 a=gEfo2CItAAAA:8 a=58PV4f5cLMXd0nVRbvoA:9 a=3ZKOabzyN94A:10 a=sptkURWiP4Gy88Gu7hUp:22 X-SEG-SpamProfiler-Score: 0 x-atlnz-ls: pat Initially realtek,rtl9301-switch was placed under mfd/ because it had some non-switch related blocks (specifically i2c and reset) but with a bit more review it has become apparent that this was wrong and the binding should live under net/. Signed-off-by: Chris Packham Acked-by: Lee Jones Acked-by: Rob Herring (Arm) --- Notes: It would probably be simplest for this to come in via net-next with an ack from Lee. .../bindings/{mfd => net}/realtek,rtl9301-switch.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) rename Documentation/devicetree/bindings/{mfd => net}/realtek,rtl9301-switch.yaml (97%) diff --git a/Documentation/devicetree/bindings/mfd/realtek,rtl9301-switch.yaml b/Documentation/devicetree/bindings/net/realtek,rtl9301-switch.yaml similarity index 97% rename from Documentation/devicetree/bindings/mfd/realtek,rtl9301-switch.yaml rename to Documentation/devicetree/bindings/net/realtek,rtl9301-switch.yaml index f053303ab1e6..d0a93d5f03aa 100644 --- a/Documentation/devicetree/bindings/mfd/realtek,rtl9301-switch.yaml +++ b/Documentation/devicetree/bindings/net/realtek,rtl9301-switch.yaml @@ -1,7 +1,7 @@ # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- -$id: http://devicetree.org/schemas/mfd/realtek,rtl9301-switch.yaml# +$id: http://devicetree.org/schemas/net/realtek,rtl9301-switch.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Realtek Switch with Internal CPU From patchwork Tue Feb 18 19:52:13 2025 Content-Type: text/plain; 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Wed, 19 Feb 2025 08:52:28 +1300 (NZDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alliedtelesis.co.nz; s=mail181024; t=1739908348; bh=jZNBKo8BJn+Cpmm+/0ORd6aDcui99DR/5RTy8qbveT4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ANwvycTNGFsVzV8BngrzJ0WSjMq9jfat/xE6yQuWh3jV9oJoUfh/Ke5H9R7z3YGbA zz19x1+SzCVCRXuNzSu+VzoNKtKIhBIXNsVMgAtcl8FDYXmXyLXMrfwJLDZw10dGf3 WSHZXpVz51VstWbBQtwu4BRwV/99IkyRzM5BC3dNKKpbmhyrS1yGhljQWNFOQiEbjJ IZBGT7Sxsg1jHOQWY/zvLBcYUoXpgPKHsqu51jcSWrc90zwuwlxjRIZghiJIriFaa2 NEAj6hU51TG2cnWoKQv1t2pts2E3yrPQLjt7LZCukfQ0xbmFNvLGN0pyY6QRqIj8Rf L08PRpLXfwJLw== Received: from pat.atlnz.lc (Not Verified[10.32.16.33]) by svr-chch-seg1.atlnz.lc with Trustwave SEG (v8,2,6,11305) id ; Wed, 19 Feb 2025 08:52:27 +1300 Received: from chrisp-dl.ws.atlnz.lc (chrisp-dl.ws.atlnz.lc [10.33.22.30]) by pat.atlnz.lc (Postfix) with ESMTP id A063713EE36; Wed, 19 Feb 2025 08:52:27 +1300 (NZDT) Received: by chrisp-dl.ws.atlnz.lc (Postfix, from userid 1030) id 9D10F2804FB; Wed, 19 Feb 2025 08:52:27 +1300 (NZDT) From: Chris Packham To: lee@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, tsbogend@alpha.franken.de Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-mips@vger.kernel.org, Chris Packham Subject: [RESEND PATCH net-next 2/5] dt-bindings: net: Add switch ports and interrupts to RTL9300 Date: Wed, 19 Feb 2025 08:52:13 +1300 Message-ID: <20250218195216.1034220-3-chris.packham@alliedtelesis.co.nz> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250218195216.1034220-1-chris.packham@alliedtelesis.co.nz> References: <20250218195216.1034220-1-chris.packham@alliedtelesis.co.nz> Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-SEG-SpamProfiler-Analysis: v=2.4 cv=ccpxrWDM c=1 sm=1 tr=0 ts=67b4e4fb a=KLBiSEs5mFS1a/PbTCJxuA==:117 a=T2h4t0Lz3GQA:10 a=VwQbUJbxAAAA:8 a=ONnuDqgNxj6Q2WPecnAA:9 a=3ZKOabzyN94A:10 a=o4McRIDJWpQDfD5EwD6I:22 X-SEG-SpamProfiler-Score: 0 x-atlnz-ls: pat Add bindings for the ethernet-switch and interrupt properties for the RTL9300. Signed-off-by: Chris Packham Reviewed-by: Rob Herring (Arm) --- Notes: This is tecnically v7 of [1] changes from that are: - Use ethernet-switch.yaml#/$defs/ethernet-ports - Enforce "ethernet-ports" be used instead of just "ports" - Add interrupts for the switch block [1] - https://lore.kernel.org/lkml/20250204030249.1965444-2-chris.packham@alliedtelesis.co.nz/ .../bindings/net/realtek,rtl9301-switch.yaml | 30 +++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/Documentation/devicetree/bindings/net/realtek,rtl9301-switch.yaml b/Documentation/devicetree/bindings/net/realtek,rtl9301-switch.yaml index d0a93d5f03aa..5d29647bea2d 100644 --- a/Documentation/devicetree/bindings/net/realtek,rtl9301-switch.yaml +++ b/Documentation/devicetree/bindings/net/realtek,rtl9301-switch.yaml @@ -14,6 +14,8 @@ description: number of different peripherals are accessed through a common register block, represented here as a syscon node. +$ref: ethernet-switch.yaml#/$defs/ethernet-ports + properties: compatible: items: @@ -28,12 +30,23 @@ properties: reg: maxItems: 1 + interrupts: + maxItems: 2 + + interrupt-names: + items: + - const: switch + - const: nic + '#address-cells': const: 1 '#size-cells': const: 1 + ethernet-ports: + type: object + patternProperties: 'reboot@[0-9a-f]+$': $ref: /schemas/power/reset/syscon-reboot.yaml# @@ -44,6 +57,8 @@ patternProperties: required: - compatible - reg + - interrupts + - interrupt-names additionalProperties: false @@ -52,6 +67,9 @@ examples: ethernet-switch@1b000000 { compatible = "realtek,rtl9301-switch", "syscon", "simple-mfd"; reg = <0x1b000000 0x10000>; + interrupt-parent = <&intc>; + interrupts = <23>, <24>; + interrupt-names = "switch", "nic"; #address-cells = <1>; #size-cells = <1>; @@ -110,5 +128,17 @@ examples: }; }; }; + + ethernet-ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + }; + port@1 { + reg = <1>; + }; + }; }; From patchwork Tue Feb 18 19:52:14 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Packham X-Patchwork-Id: 13980739 Received: from gate2.alliedtelesis.co.nz (gate2.alliedtelesis.co.nz [202.36.163.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 67DD81EB5DC for ; Tue, 18 Feb 2025 19:52:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=202.36.163.20 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739908354; 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Wed, 19 Feb 2025 08:52:30 +1300 Received: from chrisp-dl.ws.atlnz.lc (chrisp-dl.ws.atlnz.lc [10.33.22.30]) by pat.atlnz.lc (Postfix) with ESMTP id 7FD2713EE36; Wed, 19 Feb 2025 08:52:30 +1300 (NZDT) Received: by chrisp-dl.ws.atlnz.lc (Postfix, from userid 1030) id 7CAFC2804FB; Wed, 19 Feb 2025 08:52:30 +1300 (NZDT) From: Chris Packham To: lee@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, tsbogend@alpha.franken.de Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-mips@vger.kernel.org, Chris Packham Subject: [RESEND PATCH net-next 3/5] dt-bindings: net: Add Realtek MDIO controller Date: Wed, 19 Feb 2025 08:52:14 +1300 Message-ID: <20250218195216.1034220-4-chris.packham@alliedtelesis.co.nz> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250218195216.1034220-1-chris.packham@alliedtelesis.co.nz> References: <20250218195216.1034220-1-chris.packham@alliedtelesis.co.nz> Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-SEG-SpamProfiler-Analysis: v=2.4 cv=ccpxrWDM c=1 sm=1 tr=0 ts=67b4e4fe a=KLBiSEs5mFS1a/PbTCJxuA==:117 a=T2h4t0Lz3GQA:10 a=VwQbUJbxAAAA:8 a=gEfo2CItAAAA:8 a=c9Y0P7eFa9iVWmZcgD4A:9 a=3ZKOabzyN94A:10 a=sptkURWiP4Gy88Gu7hUp:22 X-SEG-SpamProfiler-Score: 0 x-atlnz-ls: pat Add dtschema for the MDIO controller found in the RTL9300 Ethernet switch. The controller is slightly unusual in that direct MDIO communication is not possible. We model the MDIO controller with the MDIO buses as child nodes and the PHYs as children of the buses. The mapping of switch port number to MDIO bus/addr requires the ethernet-ports sibling to provide the mapping via the phy-handle property. Signed-off-by: Chris Packham Reviewed-by: Rob Herring (Arm) --- Notes: This is technically v7 of [1] and [2] which are combined now that rtl9301-switch.yaml under net/ the only change from those is that the $ref: in rtl9301-switch.yaml can now use a relative path I could technically do away with the reg property on the mdio-controller node. I don't currently need to use it in my driver and it looks like the register offsets are the same between the RTL9300 and RTL9310. [1] - https://lore.kernel.org/lkml/20250204030249.1965444-6-chris.packham@alliedtelesis.co.nz/ [2] - https://lore.kernel.org/lkml/20250204030249.1965444-4-chris.packham@alliedtelesis.co.nz/ .../bindings/net/realtek,rtl9301-mdio.yaml | 86 +++++++++++++++++++ .../bindings/net/realtek,rtl9301-switch.yaml | 31 +++++++ 2 files changed, 117 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/realtek,rtl9301-mdio.yaml diff --git a/Documentation/devicetree/bindings/net/realtek,rtl9301-mdio.yaml b/Documentation/devicetree/bindings/net/realtek,rtl9301-mdio.yaml new file mode 100644 index 000000000000..02e4e33e9969 --- /dev/null +++ b/Documentation/devicetree/bindings/net/realtek,rtl9301-mdio.yaml @@ -0,0 +1,86 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/realtek,rtl9301-mdio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Realtek RTL9300 MDIO Controller + +maintainers: + - Chris Packham + +properties: + compatible: + oneOf: + - items: + - enum: + - realtek,rtl9302b-mdio + - realtek,rtl9302c-mdio + - realtek,rtl9303-mdio + - const: realtek,rtl9301-mdio + - const: realtek,rtl9301-mdio + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + reg: + maxItems: 1 + +patternProperties: + '^mdio-bus@[0-3]$': + $ref: mdio.yaml# + + properties: + reg: + maxItems: 1 + + required: + - reg + + patternProperties: + '^ethernet-phy@[a-f0-9]+$': + type: object + $ref: ethernet-phy.yaml# + unevaluatedProperties: false + + unevaluatedProperties: false + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + mdio-controller@ca00 { + compatible = "realtek,rtl9301-mdio"; + reg = <0xca00 0x200>; + #address-cells = <1>; + #size-cells = <0>; + + mdio-bus@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <0>; + }; + }; + + mdio-bus@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <0>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/net/realtek,rtl9301-switch.yaml b/Documentation/devicetree/bindings/net/realtek,rtl9301-switch.yaml index 5d29647bea2d..80eabc170669 100644 --- a/Documentation/devicetree/bindings/net/realtek,rtl9301-switch.yaml +++ b/Documentation/devicetree/bindings/net/realtek,rtl9301-switch.yaml @@ -54,6 +54,9 @@ patternProperties: 'i2c@[0-9a-f]+$': $ref: /schemas/i2c/realtek,rtl9301-i2c.yaml# + 'mdio-controller@[0-9a-f]+$': + $ref: realtek,rtl9301-mdio.yaml# + required: - compatible - reg @@ -129,15 +132,43 @@ examples: }; }; + mdio-controller@ca00 { + compatible = "realtek,rtl9301-mdio"; + reg = <0xca00 0x200>; + #address-cells = <1>; + #size-cells = <0>; + + mdio-bus@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + phy1: ethernet-phy@0 { + reg = <0>; + }; + }; + mdio-bus@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + phy2: ethernet-phy@0 { + reg = <0>; + }; + }; + }; + ethernet-ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; + phy-handle = <&phy1>; }; port@1 { reg = <1>; + phy-handle = <&phy2>; }; }; }; From patchwork Tue Feb 18 19:52:15 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Packham X-Patchwork-Id: 13980740 Received: from gate2.alliedtelesis.co.nz (gate2.alliedtelesis.co.nz [202.36.163.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DB75126FA60 for ; Tue, 18 Feb 2025 19:52:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Signed-off-by: Chris Packham --- arch/mips/boot/dts/realtek/rtl930x.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/mips/boot/dts/realtek/rtl930x.dtsi b/arch/mips/boot/dts/realtek/rtl930x.dtsi index 17577457d159..beb5ab41cb64 100644 --- a/arch/mips/boot/dts/realtek/rtl930x.dtsi +++ b/arch/mips/boot/dts/realtek/rtl930x.dtsi @@ -33,6 +33,9 @@ lx_clk: clock-175mhz { switch0: switch@1b000000 { compatible = "realtek,rtl9301-switch", "syscon", "simple-mfd"; reg = <0x1b000000 0x10000>; + interrupt-parent = <&intc>; + interrupts = <23>, <24>; + interrupt-names = "switch", "nic"; #address-cells = <1>; #size-cells = <1>; From patchwork Tue Feb 18 19:52:16 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Packham X-Patchwork-Id: 13980741 Received: from gate2.alliedtelesis.co.nz (gate2.alliedtelesis.co.nz [202.36.163.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 71541271269 for ; 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Wed, 19 Feb 2025 08:52:37 +1300 Received: from chrisp-dl.ws.atlnz.lc (chrisp-dl.ws.atlnz.lc [10.33.22.30]) by pat.atlnz.lc (Postfix) with ESMTP id C1FD713EE36; Wed, 19 Feb 2025 08:52:37 +1300 (NZDT) Received: by chrisp-dl.ws.atlnz.lc (Postfix, from userid 1030) id BEB022804FB; Wed, 19 Feb 2025 08:52:37 +1300 (NZDT) From: Chris Packham To: lee@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, tsbogend@alpha.franken.de Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-mips@vger.kernel.org, Chris Packham Subject: [RESEND PATCH net-next 5/5] mips: dts: cameo-rtl9302c: Add switch block Date: Wed, 19 Feb 2025 08:52:16 +1300 Message-ID: <20250218195216.1034220-6-chris.packham@alliedtelesis.co.nz> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250218195216.1034220-1-chris.packham@alliedtelesis.co.nz> References: <20250218195216.1034220-1-chris.packham@alliedtelesis.co.nz> Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-SEG-SpamProfiler-Analysis: v=2.4 cv=ccpxrWDM c=1 sm=1 tr=0 ts=67b4e505 a=KLBiSEs5mFS1a/PbTCJxuA==:117 a=T2h4t0Lz3GQA:10 a=VwQbUJbxAAAA:8 a=PSQZVNSXpqiPPuIuS3oA:9 a=3ZKOabzyN94A:10 a=Ouh7WndvZ0esTx3naE_M:22 X-SEG-SpamProfiler-Score: 0 x-atlnz-ls: pat Add the switch port and phys to the cameo-rtl9302c-2x-rtl8224-2xge board. Signed-off-by: Chris Packham --- Notes: This is technically v7 of [1]. Differences from that are that I've omitted the MDIO busses and PHYs while I'm trying to sort out the switch bindings. I'll add these back in a follow up series. [1] - https://lore.kernel.org/lkml/20250204030249.1965444-7-chris.packham@alliedtelesis.co.nz/ .../cameo-rtl9302c-2x-rtl8224-2xge.dts | 48 +++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/arch/mips/boot/dts/realtek/cameo-rtl9302c-2x-rtl8224-2xge.dts b/arch/mips/boot/dts/realtek/cameo-rtl9302c-2x-rtl8224-2xge.dts index 6789bf374044..51306c104b01 100644 --- a/arch/mips/boot/dts/realtek/cameo-rtl9302c-2x-rtl8224-2xge.dts +++ b/arch/mips/boot/dts/realtek/cameo-rtl9302c-2x-rtl8224-2xge.dts @@ -71,3 +71,51 @@ partition@1180000 { }; }; }; + +&switch0 { + ethernet-ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + phy-mode = "usxgmii"; + }; + port@1 { + reg = <1>; + phy-mode = "usxgmii"; + }; + port@2 { + reg = <2>; + phy-mode = "usxgmii"; + }; + port@3 { + reg = <3>; + phy-mode = "usxgmii"; + }; + port@16 { + reg = <16>; + phy-mode = "usxgmii"; + }; + port@17 { + reg = <17>; + phy-mode = "usxgmii"; + }; + port@18 { + reg = <18>; + phy-mode = "usxgmii"; + }; + port@19 { + reg = <19>; + phy-mode = "usxgmii"; + }; + port@24{ + reg = <24>; + phy-mode = "10gbase-r"; + }; + port@25{ + reg = <25>; + phy-mode = "10gbase-r"; + }; + }; +};