From patchwork Wed Feb 19 09:07:50 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 13981781 Received: from mail-ej1-f50.google.com (mail-ej1-f50.google.com [209.85.218.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 10AC71805B for ; Wed, 19 Feb 2025 09:07:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.50 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739956079; cv=none; b=DzwWWklSXvPs3Sc87gHLfXZz5WSPJMygeTPTaC4bnvs+vn8CyZor3m7+8fAEM3dlXo+Yhh93m1Wa25OhyAF2mHdaUgYnRIK5F3xvAVztbO5+UzjsQgP5BqsPVLcWHoDS/gs27tsrIgFM2AlWwgcNlEisUu6cBxTZYxXzTUivUW0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739956079; c=relaxed/simple; bh=y9+jjNrpYcM245Swk87rbOZAHH07o2CouN1Un1joEhY=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=QwykzD4Qt8doqFkcu/8zbdLFHh4AjqayMgwzaUJt6uQ7ulNbZykaJZxPAAVHu0x2sOrRSeUOy3KF6X7KMFSVY2L23fbOoM9TM4IocUXDt7s8d2liXj3eBaPr5daX82r8b1BIXZGEZx76IXIVKaUVDi2XD3PYdW7jQpTHBb/1ghI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=QTo5ZVyD; arc=none smtp.client-ip=209.85.218.50 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="QTo5ZVyD" Received: by mail-ej1-f50.google.com with SMTP id a640c23a62f3a-abb9fac29d8so56621266b.0 for ; Wed, 19 Feb 2025 01:07:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1739956075; x=1740560875; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=A4rf1uuU3YUUfNCVhsKahUo7qqP1R1Q6wSumwLKUuCA=; b=QTo5ZVyDFovRNXtvGjIOhyjiHG+YAvB0ASyble6KO3CcUkjUDwYBb8Noab73z6NQng WqjGqi8gJmoYVr+FC8mRd7Ld7f2FT96zYVUBDH5chR7zpEHC6gz5wLvtrSd81k7adMQ6 U+pzSlcHzk5A1OPkjsn3OFmin3BOJg95ggYJu5zFoyOzEiR5mMjtl0yG1x0aV3p91FZN nh8Qwt7PFSqojBwojKW4tDjoZaBH14HQshl1GwXf4BAqh5EuYA+7+f2s7uLwH5n/w7CQ 2XmzgIit5HF83XUn4ZeFIEmy4fp2Gh+8qqX9AvSIydXG8xfuG+Oe+oDDMziH3P/PQpxu bBHw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1739956075; x=1740560875; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=A4rf1uuU3YUUfNCVhsKahUo7qqP1R1Q6wSumwLKUuCA=; b=sBeqO1p5sA4e8PRPh1YYcxrEvvosWtmuKnNdRXNYMBvEAnKxQevXE2TOhl6wjBmY2R 9mIPsWtKCExEV6qxI5EMAqZaKIECUSkVKTvm5wZi96t+G7lCzT8ZB9Vd94Dc4dELGKNr TQid8k6G6v7oUkHZDVOp+Oe11/iy5A9pIrfSpWrmJ6iUARGs0J+w50Q6uiwTz5uYktpU TWmCr9Cb6QNmKKpTDwnZy6W6MrOuKOXQeU45i30E8rO6gUxqVp0/VKWc8aL3Pcvs8qnz 3LMEZYDShFQzW6PpTxEHjySs1AzdT0RQNRSK4mTxoip9cpt9FTGx1wxEDreDW69ROawC VuNw== X-Forwarded-Encrypted: i=1; AJvYcCXBbubd7pNesY/84s9bQMKLPbRDtPrP2dKOw0+Ph5sRJLowS/6jYHu8wIFTS4JVZ/LqSPAYpTHPIVtPh0EW@vger.kernel.org X-Gm-Message-State: AOJu0YyzcKGYXg+nkFe6oWvyy6PM/KfVtsCfjSofUUdW4Ds/b0pNskXW 8u8uQRA6LowMF0mLMnfbUf9C0et7wg29j+onqmlSGqQ881nU5kGIZS1w65wUXwk= X-Gm-Gg: ASbGncsVS8cab6A5vEU2CEdgofLLxQt+clBwhil1muW4cYNq/Tx+MiSzuwIOGWd+iOd RKEipaBOx045e2IdO9SOsWgCznilsSU0YRYZcgpViOagBHaGzIWgJPkRH2QuNYqLdJRfUv1ktCs a6NaK0GdjPgofbesEPX/1AsDrwgI3NpT36vIAB6c73hxhE/M9DI3lZN1f/rZmLIGRQrFOjLI/ip q+yQsCvtBzbH4iwn3DxmYo4Kovv9DGvEohEuB+2C/3tv++kcGSZKKf3GzieASfBG7kjJFkPIofD n9wimdNL0ifLSs6KADNncnXcRIq1UQ== X-Google-Smtp-Source: AGHT+IFityvjq83wUTEdE8yjTveE+b43ohcX+t8dYdc8VYTkgfSmcSiAm3lB7Ph2sUv1UfqtdfKuZg== X-Received: by 2002:a17:906:c116:b0:ab6:d519:f039 with SMTP id a640c23a62f3a-abb70d95951mr781534166b.8.1739956075448; Wed, 19 Feb 2025 01:07:55 -0800 (PST) Received: from krzk-bin.. ([178.197.206.225]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-abbac3242dcsm407695666b.107.2025.02.19.01.07.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Feb 2025 01:07:54 -0800 (PST) From: Krzysztof Kozlowski To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH 1/2] arm64: dts: qcom: sm8750: Change labels to lower-case Date: Wed, 19 Feb 2025 10:07:50 +0100 Message-ID: <20250219090751.124267-1-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 DTS coding style expects labels to be lowercase. No functional impact. Verified with comparing decompiled DTB (dtx_diff and fdtdump+diff). Signed-off-by: Krzysztof Kozlowski Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm8750.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8750.dtsi b/arch/arm64/boot/dts/qcom/sm8750.dtsi index 3bbd7d18598e..abb92c81c76b 100644 --- a/arch/arm64/boot/dts/qcom/sm8750.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8750.dtsi @@ -95,11 +95,11 @@ cpu6: cpu@10000 { compatible = "qcom,oryon"; reg = <0x0 0x10000>; enable-method = "psci"; - next-level-cache = <&L2_1>; + next-level-cache = <&l2_1>; power-domains = <&cpu_pd6>; power-domain-names = "psci"; - L2_1: l2-cache { + l2_1: l2-cache { compatible = "cache"; cache-level = <2>; cache-unified; @@ -111,7 +111,7 @@ cpu7: cpu@10100 { compatible = "qcom,oryon"; reg = <0x0 0x10100>; enable-method = "psci"; - next-level-cache = <&L2_1>; + next-level-cache = <&l2_1>; power-domains = <&cpu_pd7>; power-domain-names = "psci"; }; From patchwork Wed Feb 19 09:07:51 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 13981782 Received: from mail-ed1-f43.google.com (mail-ed1-f43.google.com [209.85.208.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F00A61E0DCB for ; Wed, 19 Feb 2025 09:07:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.43 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739956080; cv=none; b=AIHvX60QbJnRPOLhsAXVvKAdFr4fjCRNDDeDVfzIDez/glv6+PD0U2r8DXVUNO1j49gax0pD/p6ChpFxxuKDS2QoIlcNxGVyT/7viNdnQ9Yj7dRt4mpVP/F7KpqBZXBZcaRWPzaAMGIoeF8D1Fqp3GZ7WAHh8PVhYZts0+r7yqM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1739956080; c=relaxed/simple; bh=eVMT887Zl9nmg8Aj/EZhckpL2rRL2zR2XvxzGjBNVrc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=QZ6kiHXjHYcALk/06LXZCZCam/qXNvoeYH1/Vv9TGwK4jimW0nRrYh1TskUYeWi9cyfkRKHM88qTZKYsKlKvUAICHjwODNaGS52GafzdQczywaJc1sU54ld7X2c+YezzGCHk04dbDBkRg2ZAMRnXz2nqjuk+3W+tEg9ck2zH83A= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=bsj6W421; arc=none smtp.client-ip=209.85.208.43 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="bsj6W421" Received: by mail-ed1-f43.google.com with SMTP id 4fb4d7f45d1cf-5dfb26020dbso761611a12.3 for ; Wed, 19 Feb 2025 01:07:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1739956077; x=1740560877; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=7e/kyLMpdbaW4hoGX8KhqKMu7hDSW4KWzFrVgpwh0Io=; b=bsj6W421XreFzYk8gxKY9WyZKDypaz3X3O0KErl2iIG/MnfvdxDl/gwjsKff5hN8U0 KuhcJwSs7KrbRVEOSQLIzul2wbVhstDV9n0bYT4lgEKa1T8BMj40/t44X/KPmXUsd78f /Cclj2lW79OZJleK5Jzkk1D72rCEbodl1MsowQPB8NvAQZ3NNCjEAYDEoXzR3YX/HnR4 T5/d9zEf8BWVoX5ym3SDdKPsFcIDktowNb5dS6V2OMJYEN2nWVkRVNbIf5FwNMz69nte PSVGHDqW6IlZwtQch0y7WrGUygUlZ0PfsTxkvYfV91PwuTsut+9SBk09DqyaPExlL/Z5 dMuA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1739956077; x=1740560877; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=7e/kyLMpdbaW4hoGX8KhqKMu7hDSW4KWzFrVgpwh0Io=; b=vcsjbgrJv2p/9nwu6DKY0MM1hgV6ofS4XbDIQ5WaAz8UYODZVZFTMhO+MTuCqeWhhH GaPIhOFtgXsp9NBHqlgSF+nuo/EJ6n+PmqLbuDt+BLy7woGZJKI2mWbkvTjEL7PHhFbM 5WfVc2s+j1kdyIjWmyOGaHZycjxdDK8Zt6NUl7AdwXRyPrYgTSQmwsoVotrZNXtnhMkW 68E5nqxKzoLgHd5o8K6B7YC8362gNIKEKe5NPaCOWz7noaIQm4/CJ2BlLEcrY5S4+6ls edSNkHB+bt0FIGjj2BloqIUWFWrEssgEuetqLSCP3nvmT7KmVUdOk0XZWdVKZCyCkS3I EO9A== X-Forwarded-Encrypted: i=1; AJvYcCVMZ0MTbXGUMqrxXYX423NC2mQUinfjH2mzwmZpBZViHokdPxWyb5tC5K5xvPsO5mRRHBD/zNgCsZp7XQ5R@vger.kernel.org X-Gm-Message-State: AOJu0YwaFmQNcxCnjFuzCIQxwLUeE8WW7Fakm+JOo85DX+gV2Lkp+ukl F+WruZQv4xoLx6TrdsF8nqtHN5Hj68YDf+GjfF87SjQVU/DsdLiy9JiJkpuMVX7fR52K+SeBW9X IZsU= X-Gm-Gg: ASbGncsAll5wmOVXuyrDAPrb/RFm6wdcdr4MyZ8TG2l7lakDIwg9vzLVPHeNrc6obvC IoKNkkKxaj6DwzgF5qLFtM/Aqjw5IvuyYFtUBvGGig0SRksAWqnCBOybUWUBwqLddBRlL0lawEC rKjIL59/Suf9sH4KqHivA3T5zSuQgLCR8ssB0l3qtsZm/EoHCdYj5Y4lzKkOsvmAhypIWEiioMl zvfuj5VGeVEBnPTdnyLz2KliHpxGdLWe9n/vnCwZnG5+SDy6/MKPA/Oh2lmqt9HKDbN4T5ceVp2 v8zDpfdGZsNkdJAeCoP20gOb1uI9cA== X-Google-Smtp-Source: AGHT+IFGjkpX3+TLejfc88gfo31XjrHN5z9eYLiDkjiUP6WJ9W8wR2ONeZILHGObL6JLboIUqAXhYg== X-Received: by 2002:a17:907:d8b:b0:ab7:b545:b2eb with SMTP id a640c23a62f3a-abb70932f6cmr690990666b.2.1739956077105; Wed, 19 Feb 2025 01:07:57 -0800 (PST) Received: from krzk-bin.. ([178.197.206.225]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-abbac3242dcsm407695666b.107.2025.02.19.01.07.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Feb 2025 01:07:56 -0800 (PST) From: Krzysztof Kozlowski To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH 2/2] arm64: dts: qcom: Corret white-space style Date: Wed, 19 Feb 2025 10:07:51 +0100 Message-ID: <20250219090751.124267-2-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250219090751.124267-1-krzysztof.kozlowski@linaro.org> References: <20250219090751.124267-1-krzysztof.kozlowski@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 There should be exactly one space before and after '=', and one space before '{'. No functional impact. Verified with comparing decompiled DTB (dtx_diff and fdtdump+diff). Signed-off-by: Krzysztof Kozlowski Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/ipq9574.dtsi | 40 +++++++++---------- .../boot/dts/qcom/msm8917-xiaomi-riva.dts | 2 +- arch/arm64/boot/dts/qcom/msm8917.dtsi | 2 +- arch/arm64/boot/dts/qcom/qcs615.dtsi | 16 ++++---- arch/arm64/boot/dts/qcom/sm8750.dtsi | 2 +- 5 files changed, 31 insertions(+), 31 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi index 942290028972..cac58352182e 100644 --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi @@ -876,11 +876,11 @@ frame@b128000 { pcie1: pcie@10000000 { compatible = "qcom,pcie-ipq9574"; - reg = <0x10000000 0xf1d>, - <0x10000f20 0xa8>, - <0x10001000 0x1000>, - <0x000f8000 0x4000>, - <0x10100000 0x1000>; + reg = <0x10000000 0xf1d>, + <0x10000f20 0xa8>, + <0x10001000 0x1000>, + <0x000f8000 0x4000>, + <0x10100000 0x1000>; reg-names = "dbi", "elbi", "atu", "parf", "config"; device_type = "pci"; linux,pci-domain = <1>; @@ -956,11 +956,11 @@ pcie1: pcie@10000000 { pcie3: pcie@18000000 { compatible = "qcom,pcie-ipq9574"; - reg = <0x18000000 0xf1d>, - <0x18000f20 0xa8>, - <0x18001000 0x1000>, - <0x000f0000 0x4000>, - <0x18100000 0x1000>; + reg = <0x18000000 0xf1d>, + <0x18000f20 0xa8>, + <0x18001000 0x1000>, + <0x000f0000 0x4000>, + <0x18100000 0x1000>; reg-names = "dbi", "elbi", "atu", "parf", "config"; device_type = "pci"; linux,pci-domain = <3>; @@ -1036,11 +1036,11 @@ pcie3: pcie@18000000 { pcie2: pcie@20000000 { compatible = "qcom,pcie-ipq9574"; - reg = <0x20000000 0xf1d>, - <0x20000f20 0xa8>, - <0x20001000 0x1000>, - <0x00088000 0x4000>, - <0x20100000 0x1000>; + reg = <0x20000000 0xf1d>, + <0x20000f20 0xa8>, + <0x20001000 0x1000>, + <0x00088000 0x4000>, + <0x20100000 0x1000>; reg-names = "dbi", "elbi", "atu", "parf", "config"; device_type = "pci"; linux,pci-domain = <2>; @@ -1116,11 +1116,11 @@ pcie2: pcie@20000000 { pcie0: pci@28000000 { compatible = "qcom,pcie-ipq9574"; - reg = <0x28000000 0xf1d>, - <0x28000f20 0xa8>, - <0x28001000 0x1000>, - <0x00080000 0x4000>, - <0x28100000 0x1000>; + reg = <0x28000000 0xf1d>, + <0x28000f20 0xa8>, + <0x28001000 0x1000>, + <0x00080000 0x4000>, + <0x28100000 0x1000>; reg-names = "dbi", "elbi", "atu", "parf", "config"; device_type = "pci"; linux,pci-domain = <0>; diff --git a/arch/arm64/boot/dts/qcom/msm8917-xiaomi-riva.dts b/arch/arm64/boot/dts/qcom/msm8917-xiaomi-riva.dts index f1d22535fedd..df135f9891a8 100644 --- a/arch/arm64/boot/dts/qcom/msm8917-xiaomi-riva.dts +++ b/arch/arm64/boot/dts/qcom/msm8917-xiaomi-riva.dts @@ -119,7 +119,7 @@ bq27426@55 { monitored-battery = <&battery>; }; - bq25601@6b{ + bq25601@6b { compatible = "ti,bq25601"; reg = <0x6b>; interrupts-extended = <&tlmm 61 IRQ_TYPE_EDGE_FALLING>; diff --git a/arch/arm64/boot/dts/qcom/msm8917.dtsi b/arch/arm64/boot/dts/qcom/msm8917.dtsi index 7bf58dd0146e..9d8358745c91 100644 --- a/arch/arm64/boot/dts/qcom/msm8917.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8917.dtsi @@ -587,7 +587,7 @@ tsens_s4_p2: s4-p2@217 { bits = <1 6>; }; - tsens_s9_p1: s9-p1@230{ + tsens_s9_p1: s9-p1@230 { reg = <0x230 1>; bits = <0 6>; }; diff --git a/arch/arm64/boot/dts/qcom/qcs615.dtsi b/arch/arm64/boot/dts/qcom/qcs615.dtsi index f4abfad474ea..6c17860dd6c8 100644 --- a/arch/arm64/boot/dts/qcom/qcs615.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs615.dtsi @@ -1819,7 +1819,7 @@ replicator@6046000 { in-ports { port { replicator0_in: endpoint { - remote-endpoint= <&tmc_etf_out>; + remote-endpoint = <&tmc_etf_out>; }; }; }; @@ -1832,7 +1832,7 @@ port@1 { reg = <1>; replicator0_out1: endpoint { - remote-endpoint= <&replicator1_in>; + remote-endpoint = <&replicator1_in>; }; }; }; @@ -1872,7 +1872,7 @@ replicator@604a000 { in-ports { port { replicator1_in: endpoint { - remote-endpoint= <&replicator0_out1>; + remote-endpoint = <&replicator0_out1>; }; }; }; @@ -1880,7 +1880,7 @@ replicator1_in: endpoint { out-ports { port { replicator1_out: endpoint { - remote-endpoint= <&funnel_swao_in6>; + remote-endpoint = <&funnel_swao_in6>; }; }; }; @@ -2311,7 +2311,7 @@ port@6 { reg = <6>; funnel_swao_in6: endpoint { - remote-endpoint= <&replicator1_out>; + remote-endpoint = <&replicator1_out>; }; }; @@ -2319,7 +2319,7 @@ port@7 { reg = <7>; funnel_swao_in7: endpoint { - remote-endpoint= <&tpda_swao_out>; + remote-endpoint = <&tpda_swao_out>; }; }; }; @@ -2343,7 +2343,7 @@ tmc@6b09000 { in-ports { port { tmc_etf_swao_in: endpoint { - remote-endpoint= <&funnel_swao_out>; + remote-endpoint = <&funnel_swao_out>; }; }; }; @@ -2351,7 +2351,7 @@ tmc_etf_swao_in: endpoint { out-ports { port { tmc_etf_swao_out: endpoint { - remote-endpoint= <&replicator_swao_in>; + remote-endpoint = <&replicator_swao_in>; }; }; }; diff --git a/arch/arm64/boot/dts/qcom/sm8750.dtsi b/arch/arm64/boot/dts/qcom/sm8750.dtsi index abb92c81c76b..f81a3c3ae334 100644 --- a/arch/arm64/boot/dts/qcom/sm8750.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8750.dtsi @@ -990,7 +990,7 @@ uart14: serial@898000 { clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>; clock-names = "se"; - interconnects = <&clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS + interconnects = <&clk_virt MASTER_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS &clk_virt SLAVE_QUP_CORE_2 QCOM_ICC_TAG_ALWAYS>, <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS &config_noc SLAVE_QUP_2 QCOM_ICC_TAG_ALWAYS>;