From patchwork Thu Feb 20 10:55:12 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 13983737 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BF025C021B2 for ; Thu, 20 Feb 2025 10:58:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=iXOAYxnUw9TxW+8GOBFrlSm0OG7j/OtGl1u0/o1Ujzw=; b=EVFSfqxVEPl/0fP86ZN+2NCrZD SumsP2oBiBDn2eYuomMvdXX+8nMne0VJCQnWDGwtRy8UGGo6SGFbIW6gL7iXk13pq0S5s4NUMkqKC YS6cCGCCTF11Ol7m26hkefPzptm742rvy386zSDkoCoCiVNKmO1cre0QoSGl8C5V8h6pR1bz4KiSh h9KlrAAUGtCK++eiuy8XVrrJUvbuhtuu7H0d0GO6SIRXo5Bcg7G2bE8AUnBvhuxr56at05HCOngSl T5iwqwuB2/3a0zFlwNoIKF1PSCzYCfxbTeYSn+k/8hAoT3KdEYu/uXiqApF4quVLNi/7SwVYVXOtP wrcl8/8A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tl4GW-00000000Pt8-3bOw; Thu, 20 Feb 2025 10:58:48 +0000 Received: from bali.collaboradmins.com ([2a01:4f8:201:9162::2]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tl4Da-00000000P2C-0Mqf; Thu, 20 Feb 2025 10:55:47 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1740048944; bh=f2rxjrxNyDjW9jW41agW0DUC3PfepPxgabZ7lkxtmWA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=IbJbv7Zdchqyk4XjqtZbLFVggpFmVfCDpPkJVFyi1wyOhbJBWyei11xfOcnIlIqxw Jwgfi0kc9GBaHYj5p84rT99IFlADPJrnFr96N7R9ak0Uln3q357Gk7L3AeIy2WT64O +c1RTjKkQmTV8JQ+7Gu+P1/Oa5DJ2h6e9PP9lvo+KDVow8Zsic5LKOF7vfbbaOTx6y K1g4Acaui0mCOizaIJVQ9mHkSQfBfGmpU7/Y3QeggBY+dpcXKrFVAAXl1m8Q/PahNH 2wgkVvHDrOWHGzjlfOo9kITL0CbS8ZzzJkkGoBOBfhky52ZgIn4AdwfMMpq7pVdFU+ qLWfq3/4J/qpQ== Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by bali.collaboradmins.com (Postfix) with ESMTPSA id A12F717E1569; Thu, 20 Feb 2025 11:55:43 +0100 (CET) From: AngeloGioacchino Del Regno To: chunfeng.yun@mediatek.com Cc: gregkh@linuxfoundation.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, linux-usb@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, kernel@collabora.com, pablo.sun@mediatek.com Subject: [PATCH v3 1/3] dt-bindings: usb: mediatek,mtk-xhci: Add port for SuperSpeed EP Date: Thu, 20 Feb 2025 11:55:12 +0100 Message-ID: <20250220105514.43107-2-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250220105514.43107-1-angelogioacchino.delregno@collabora.com> References: <20250220105514.43107-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250220_025546_293402_B53E8DD4 X-CRM114-Status: UNSURE ( 9.39 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Add a port used to connect the SuperSpeed output endpoint to a Type-C connector. Note that the MediaTek XHCI controllers are always in front of a different controller handling the USB HS (usually, MTU3), so the only port that this controller provides is SuperSpeed, while the HighSpeed one comes from elsewhere. Signed-off-by: AngeloGioacchino Del Regno Acked-by: Conor Dooley --- Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml b/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml index ef3143f4b794..004d3ebec091 100644 --- a/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml +++ b/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml @@ -106,6 +106,10 @@ properties: - description: USB3/SS(P) PHY - description: USB2/HS PHY + port: + $ref: /schemas/graph.yaml#/properties/port + description: Super Speed (SS) Output endpoint to a Type-C connector + vusb33-supply: description: Regulator of USB AVDD3.3v From patchwork Thu Feb 20 10:55:13 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 13983738 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 02F84C021B2 for ; Thu, 20 Feb 2025 11:00:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=4f+U9qTsk58DWRyTw7yq4CUfhhc1GxUeYpyu1AojW7Q=; b=tn8pDFoOhHofBMfzuKazVrld+z B9vznngIUgdMgiN2fEKh4M4f/NiU2vrLNPwLwXan+88YflYwC2rXwDgsf6oiQz4mCMKIegRlZZq5N 8FMhDzqakfU7NO1Rwr6xm0mBMpijlZozD9eY/Hkc5yjrikbg+ZqAtWssMv0fA38NJcZWqPQKpuNHR AAniiHuqs2Ff14gs6oBzTpaWwfuZ3citwPRvN4rUw5W6kL1NFyGEAokXp47C6BrO9VdXGzsPZV8Bb Atig/15l/6Y4A3vUZvSe6T1wvnJo1zfHxNJixSRGLnozooagU412pKbnHULIh9hX7YaR1LgSiZGUn r81hFH7A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tl4I0-00000000QO1-09F1; Thu, 20 Feb 2025 11:00:20 +0000 Received: from bali.collaboradmins.com ([2a01:4f8:201:9162::2]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tl4Da-00000000P2Y-3pBL; Thu, 20 Feb 2025 10:55:48 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1740048945; bh=yfGwynM8RSTXwKBvPY6q4QAZb29IgFCx6MpLyWY3uKg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=QGfNI4PEsp/P4oG0XslLQZWS5x6jCFUhblFrJdHayiAkQ/B/4fEHt4s6WT+b5S8eF vgXxLCds55Kx1YG62P/ndjpM+qD/uKpwj5VZ2k22MSV+coIMOGcT0kK8MHcAzINkvh IzIUhdCOG5xv5fjruwbdDIH5PSJIa3Eo+T2LNmKsL2JQ6BFy449IfvkEAypFFp0c/O pg4LWaFrtqNSNXT7uqqgpGDVqEMZWSBiaUISKAhkL2eM2qNlfGJEQuadnhmpKNSfAm jaUVd1LLC7CGY9Qv5ybtekz5+pjclnXzUgJAdDaxlW2XILLPlSGBfHJmVZzz0BUFGv SRlcWRLgUNkyw== Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by bali.collaboradmins.com (Postfix) with ESMTPSA id 89BDB17E156B; Thu, 20 Feb 2025 11:55:44 +0100 (CET) From: AngeloGioacchino Del Regno To: chunfeng.yun@mediatek.com Cc: gregkh@linuxfoundation.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, linux-usb@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, kernel@collabora.com, pablo.sun@mediatek.com Subject: [PATCH v3 2/3] arm64: dts: mediatek: mt8188: Add MTU3 nodes and correctly describe USB Date: Thu, 20 Feb 2025 11:55:13 +0100 Message-ID: <20250220105514.43107-3-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250220105514.43107-1-angelogioacchino.delregno@collabora.com> References: <20250220105514.43107-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250220_025547_120659_25CF59BB X-CRM114-Status: GOOD ( 10.63 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org The MT8188 SoC has three USB controllers, and all of them are behind the MTU3 DRD controller. Add the missing MTU3 nodes, default disabled, for all USB controllers and move the related XHCI nodes to be children of their MTU3 DRD to correctly describe the SoC. In order to retain USB functionality on all of the MT8188 and MT8390 boards, also move the vusb33 supply and enable the relevant MTU3 nodes with special attention to the MT8188 Geralt Chromebooks, where it was necessary to set the dr_mode of all MTU3 controllers to host to avoid interfering with the EC performing DRD on its own. Signed-off-by: AngeloGioacchino Del Regno --- .../boot/dts/mediatek/mt8188-geralt.dtsi | 18 +++ arch/arm64/boot/dts/mediatek/mt8188.dtsi | 121 ++++++++++++------ .../dts/mediatek/mt8390-genio-common.dtsi | 28 ++++ 3 files changed, 125 insertions(+), 42 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8188-geralt.dtsi b/arch/arm64/boot/dts/mediatek/mt8188-geralt.dtsi index b6abecbcfa81..faed5c8bc721 100644 --- a/arch/arm64/boot/dts/mediatek/mt8188-geralt.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8188-geralt.dtsi @@ -1103,6 +1103,12 @@ &u3phy2 { }; /* USB detachable base */ +&ssusb0 { + dr_mode = "host"; + vusb33-supply = <&pp3300_s3>; + status = "okay"; +}; + &xhci0 { /* controlled by EC */ vbus-supply = <&pp3300_z1>; @@ -1110,6 +1116,12 @@ &xhci0 { }; /* USB3 hub */ +&ssusb1 { + dr_mode = "host"; + vusb33-supply = <&pp3300_s3>; + status = "okay"; +}; + &xhci1 { vusb33-supply = <&pp3300_s3>; vbus-supply = <&pp5000_usb_vbus>; @@ -1117,6 +1129,12 @@ &xhci1 { }; /* USB BT */ +&ssusb2 { + dr_mode = "host"; + vusb33-supply = <&pp3300_s3>; + status = "okay"; +}; + &xhci2 { /* no power supply since MT7921's power is controlled by PCIe */ /* MT7921's USB BT has issues with USB2 LPM */ diff --git a/arch/arm64/boot/dts/mediatek/mt8188.dtsi b/arch/arm64/boot/dts/mediatek/mt8188.dtsi index d2e1ff7236b1..c226998b7e47 100644 --- a/arch/arm64/boot/dts/mediatek/mt8188.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8188.dtsi @@ -1649,6 +1649,38 @@ spi5: spi@11019000 { status = "disabled"; }; + ssusb1: usb@11201000 { + compatible = "mediatek,mt8188-mtu3", "mediatek,mtu3"; + reg = <0 0x11201000 0 0x2dff>, <0 0x11203e00 0 0x0100>; + reg-names = "mac", "ippc"; + ranges = <0 0 0 0x11200000 0 0x3f00>; + #address-cells = <2>; + #size-cells = <2>; + interrupts = ; + assigned-clocks = <&topckgen CLK_TOP_USB_TOP>; + assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D5_D4>; + clocks = <&pericfg_ao CLK_PERI_AO_SSUSB_BUS>, + <&topckgen CLK_TOP_SSUSB_TOP_REF>, + <&pericfg_ao CLK_PERI_AO_SSUSB_XHCI>; + clock-names = "sys_ck", "ref_ck", "mcu_ck"; + phys = <&u2port1 PHY_TYPE_USB2>, <&u3port1 PHY_TYPE_USB3>; + wakeup-source; + mediatek,syscon-wakeup = <&pericfg 0x468 2>; + status = "disabled"; + + xhci1: usb@0 { + compatible = "mediatek,mt8188-xhci", "mediatek,mtk-xhci"; + reg = <0 0 0 0x1000>; + reg-names = "mac"; + interrupts = ; + assigned-clocks = <&topckgen CLK_TOP_SSUSB_XHCI>; + assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D5_D4>; + clocks = <&pericfg_ao CLK_PERI_AO_SSUSB_XHCI>; + clock-names = "sys_ck"; + status = "disabled"; + }; + }; + eth: ethernet@11021000 { compatible = "mediatek,mt8188-gmac", "mediatek,mt8195-gmac", "snps,dwmac-5.10a"; @@ -1746,27 +1778,6 @@ queue3 { }; }; - xhci1: usb@11200000 { - compatible = "mediatek,mt8188-xhci", "mediatek,mtk-xhci"; - reg = <0 0x11200000 0 0x1000>, - <0 0x11203e00 0 0x0100>; - reg-names = "mac", "ippc"; - interrupts = ; - phys = <&u2port1 PHY_TYPE_USB2>, - <&u3port1 PHY_TYPE_USB3>; - assigned-clocks = <&topckgen CLK_TOP_USB_TOP>, - <&topckgen CLK_TOP_SSUSB_XHCI>; - assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D5_D4>, - <&topckgen CLK_TOP_UNIVPLL_D5_D4>; - clocks = <&pericfg_ao CLK_PERI_AO_SSUSB_BUS>, - <&topckgen CLK_TOP_SSUSB_TOP_REF>, - <&pericfg_ao CLK_PERI_AO_SSUSB_XHCI>; - clock-names = "sys_ck", "ref_ck", "mcu_ck"; - mediatek,syscon-wakeup = <&pericfg 0x468 2>; - wakeup-source; - status = "disabled"; - }; - mmc0: mmc@11230000 { compatible = "mediatek,mt8188-mmc", "mediatek,mt8183-mmc"; reg = <0 0x11230000 0 0x10000>, @@ -1867,42 +1878,68 @@ imp_iic_wrap_c: clock-controller@11283000 { #clock-cells = <1>; }; - xhci2: usb@112a0000 { - compatible = "mediatek,mt8188-xhci", "mediatek,mtk-xhci"; - reg = <0 0x112a0000 0 0x1000>, - <0 0x112a3e00 0 0x0100>; + ssusb2: usb@112a1000 { + compatible = "mediatek,mt8188-mtu3", "mediatek,mtu3"; + reg = <0 0x112a1000 0 0x2dff>, <0 0x112a3e00 0 0x0100>; reg-names = "mac", "ippc"; - interrupts = ; - phys = <&u2port2 PHY_TYPE_USB2>; - assigned-clocks = <&topckgen CLK_TOP_SSUSB_XHCI_3P>, - <&topckgen CLK_TOP_USB_TOP_3P>; - assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D5_D4>, - <&topckgen CLK_TOP_UNIVPLL_D5_D4>; + ranges = <0 0 0 0x112a0000 0 0x3f00>; + #address-cells = <2>; + #size-cells = <2>; + interrupts = ; + assigned-clocks = <&topckgen CLK_TOP_USB_TOP_3P>; + assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D5_D4>; clocks = <&pericfg_ao CLK_PERI_AO_SSUSB_3P_BUS>, <&topckgen CLK_TOP_SSUSB_TOP_P3_REF>, <&pericfg_ao CLK_PERI_AO_SSUSB_3P_XHCI>; clock-names = "sys_ck", "ref_ck", "mcu_ck"; + phys = <&u2port2 PHY_TYPE_USB2>; + wakeup-source; + mediatek,syscon-wakeup = <&pericfg 0x470 2>; status = "disabled"; + + xhci2: usb@0 { + compatible = "mediatek,mt8188-xhci", "mediatek,mtk-xhci"; + reg = <0 0 0 0x1000>; + reg-names = "mac"; + interrupts = ; + assigned-clocks = <&topckgen CLK_TOP_SSUSB_XHCI_3P>; + assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D5_D4>; + clocks = <&pericfg_ao CLK_PERI_AO_SSUSB_3P_XHCI>; + clock-names = "sys_ck"; + status = "disabled"; + }; }; - xhci0: usb@112b0000 { - compatible = "mediatek,mt8188-xhci", "mediatek,mtk-xhci"; - reg = <0 0x112b0000 0 0x1000>, - <0 0x112b3e00 0 0x0100>; + ssusb0: usb@112b1000 { + compatible = "mediatek,mt8188-mtu3", "mediatek,mtu3"; + reg = <0 0x112b1000 0 0x2dff>, <0 0x112b3e00 0 0x0100>; reg-names = "mac", "ippc"; - interrupts = ; - phys = <&u2port0 PHY_TYPE_USB2>; - assigned-clocks = <&topckgen CLK_TOP_SSUSB_XHCI_2P>, - <&topckgen CLK_TOP_USB_TOP_2P>; - assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D5_D4>, - <&topckgen CLK_TOP_UNIVPLL_D5_D4>; + ranges = <0 0 0 0x112b0000 0 0x3f00>; + #address-cells = <2>; + #size-cells = <2>; + interrupts = ; + assigned-clocks = <&topckgen CLK_TOP_SSUSB_XHCI_2P>; + assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D5_D4>; clocks = <&pericfg_ao CLK_PERI_AO_SSUSB_2P_BUS>, <&topckgen CLK_TOP_SSUSB_TOP_P2_REF>, <&pericfg_ao CLK_PERI_AO_SSUSB_2P_XHCI>; clock-names = "sys_ck", "ref_ck", "mcu_ck"; - mediatek,syscon-wakeup = <&pericfg 0x460 2>; + phys = <&u2port0 PHY_TYPE_USB2>; wakeup-source; + mediatek,syscon-wakeup = <&pericfg 0x460 2>; status = "disabled"; + + xhci0: usb@0 { + compatible = "mediatek,mt8188-xhci", "mediatek,mtk-xhci"; + reg = <0 0 0 0x1000>; + reg-names = "mac"; + interrupts = ; + assigned-clocks = <&topckgen CLK_TOP_USB_TOP_2P>; + assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D5_D4>; + clocks = <&pericfg_ao CLK_PERI_AO_SSUSB_2P_XHCI>; + clock-names = "sys_ck"; + status = "disabled"; + }; }; pcie: pcie@112f0000 { diff --git a/arch/arm64/boot/dts/mediatek/mt8390-genio-common.dtsi b/arch/arm64/boot/dts/mediatek/mt8390-genio-common.dtsi index a37cf102a6e9..fd977daa4185 100644 --- a/arch/arm64/boot/dts/mediatek/mt8390-genio-common.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8390-genio-common.dtsi @@ -1011,13 +1011,25 @@ &u3phy2 { status = "okay"; }; +&ssusb0 { + dr_mode = "host"; + vusb33-supply = <&mt6359_vusb_ldo_reg>; + status = "okay"; +}; + &xhci0 { status = "okay"; +}; + +&ssusb1 { + dr_mode = "host"; vusb33-supply = <&mt6359_vusb_ldo_reg>; + status = "okay"; }; &xhci1 { status = "okay"; + vdd-supply = <&usb_hub_fixed_3v3>; vusb33-supply = <&mt6359_vusb_ldo_reg>; #address-cells = <1>; #size-cells = <0>; @@ -1037,6 +1049,22 @@ hub_3_0: hub@2 { reset-gpios = <&pio 7 GPIO_ACTIVE_HIGH>; vdd-supply = <&usb_hub_fixed_3v3>; }; + + port { + xhci_ss_ep: endpoint { + remote-endpoint = <&typec_con_ss>; + }; + }; +}; + +&ssusb2 { + interrupts-extended = <&gic GIC_SPI 536 IRQ_TYPE_LEVEL_HIGH 0>, + <&pio 220 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "host", "wakeup"; + + dr_mode = "host"; + vusb33-supply = <&mt6359_vusb_ldo_reg>; + status = "okay"; }; &xhci2 { From patchwork Thu Feb 20 10:55:14 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 13983747 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 73E54C021B1 for ; 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Thu, 20 Feb 2025 11:55:45 +0100 (CET) From: AngeloGioacchino Del Regno To: chunfeng.yun@mediatek.com Cc: gregkh@linuxfoundation.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, linux-usb@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, kernel@collabora.com, pablo.sun@mediatek.com Subject: [PATCH v3 3/3] arm64: dts: mediatek: mt8390-genio-700: Add USB, TypeC Controller, MUX Date: Thu, 20 Feb 2025 11:55:14 +0100 Message-ID: <20250220105514.43107-4-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250220105514.43107-1-angelogioacchino.delregno@collabora.com> References: <20250220105514.43107-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250220_025548_135405_EA5CABA3 X-CRM114-Status: GOOD ( 11.81 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org This board features multiple USB connectors: * One Type-C connector with Power Delivery and Alt. Modes; * One MicroUSB connector, also used for bootloader SW download; * One USB through the RaspberryPi-compatible pins header. Add configuration for the MTU3 controllers providing OTG support with role switching both on the MicroUSB port, RPi pins header, and the Type-C port found on this board. Moreover, add the Richtek RT1715 Type-C Power Delivery Controller which manages current source/sink, linked to the iTE IT5205 Type-C Alternate Mode Passive Mux, handling both mode switching between USB (up to 3.1 Gen2 10Gbps) and DisplayPort (four lanes, DP1.4, op to 8.1Gbps) and plug orientation switching. All USB ports reside on different controller instances, and all of them support host or gadget and can be configured as desired at runtime. Signed-off-by: AngeloGioacchino Del Regno --- .../dts/mediatek/mt8390-genio-common.dtsi | 139 ++++++++++++++++-- 1 file changed, 130 insertions(+), 9 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8390-genio-common.dtsi b/arch/arm64/boot/dts/mediatek/mt8390-genio-common.dtsi index fd977daa4185..83828baa887b 100644 --- a/arch/arm64/boot/dts/mediatek/mt8390-genio-common.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8390-genio-common.dtsi @@ -260,6 +260,22 @@ &i2c1 { pinctrl-0 = <&i2c1_pins>; clock-frequency = <400000>; status = "okay"; + + typec-mux@48 { + compatible = "ite,it5205"; + reg = <0x48>; + + mode-switch; + orientation-switch; + + vcc-supply = <&mt6359_vcn33_1_bt_ldo_reg>; + + port { + it5205_sbu_mux: endpoint { + remote-endpoint = <&typec_sbu_out>; + }; + }; + }; }; &i2c2 { @@ -281,6 +297,66 @@ &i2c4 { pinctrl-0 = <&i2c4_pins>; clock-frequency = <1000000>; status = "okay"; + + rt1715@4e { + compatible = "richtek,rt1715"; + reg = <0x4e>; + interrupts-extended = <&pio 12 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&tcpci_int_pins>; + vbus-supply = <&usb_p1_vbus>; + + connector { + compatible = "usb-c-connector"; + label = "USB-C"; + data-role = "dual"; + op-sink-microwatt = <10000000>; + power-role = "dual"; + try-power-role = "sink"; + pd-revision = /bits/ 8 <0x03 0x00 0x01 0x08>; + + sink-pdos = ; + source-pdos = ; + + altmodes { + displayport { + svid = /bits/ 16 <0xff01>; + vdo = <0x001c1c47>; + }; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + typec_con_hs: endpoint { + remote-endpoint = <&mtu3_hs1_role_sw>; + }; + }; + + port@1 { + reg = <1>; + typec_con_ss: endpoint { + remote-endpoint = <&xhci_ss_ep>; + }; + }; + + port@2 { + reg = <2>; + typec_sbu_out: endpoint { + remote-endpoint = <&it5205_sbu_mux>; + }; + + }; + }; + }; + }; }; &i2c5 { @@ -849,6 +925,14 @@ pins-reset { }; }; + tcpci_int_pins: tcpci-int-pins { + pins-int-n { + pinmux = ; + bias-pull-up; + input-enable; + }; + }; + uart0_pins: uart0-pins { pins { pinmux = , @@ -904,6 +988,14 @@ pins-usb-hub-3v3-en { }; }; + usb2_default_pins: usb2-default-pins { + pins-iddig { + pinmux = ; + input-enable; + bias-pull-up; + }; + }; + wifi_pwrseq_pins: wifi-pwrseq-pins { pins-wifi-enable { pinmux = ; @@ -1012,9 +1104,21 @@ &u3phy2 { }; &ssusb0 { - dr_mode = "host"; + dr_mode = "otg"; + maximum-speed = "high-speed"; + usb-role-switch; + wakeup-source; vusb33-supply = <&mt6359_vusb_ldo_reg>; + pinctrl-0 = <&usb_default_pins>; + pinctrl-names = "default"; status = "okay"; + + connector { + compatible = "gpio-usb-b-connector", "usb-b-connector"; + type = "micro"; + id-gpios = <&pio 83 GPIO_ACTIVE_HIGH>; + vbus-supply = <&usb_p0_vbus>; + }; }; &xhci0 { @@ -1022,14 +1126,23 @@ &xhci0 { }; &ssusb1 { - dr_mode = "host"; + dr_mode = "otg"; + usb-role-switch; + wakeup-source; vusb33-supply = <&mt6359_vusb_ldo_reg>; + pinctrl-0 = <&usb1_default_pins>; + pinctrl-names = "default"; status = "okay"; + + port { + mtu3_hs1_role_sw: endpoint { + remote-endpoint = <&typec_con_hs>; + }; + }; }; &xhci1 { status = "okay"; - vdd-supply = <&usb_hub_fixed_3v3>; vusb33-supply = <&mt6359_vusb_ldo_reg>; #address-cells = <1>; #size-cells = <0>; @@ -1058,17 +1171,25 @@ xhci_ss_ep: endpoint { }; &ssusb2 { - interrupts-extended = <&gic GIC_SPI 536 IRQ_TYPE_LEVEL_HIGH 0>, - <&pio 220 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "host", "wakeup"; - - dr_mode = "host"; + dr_mode = "otg"; + maximum-speed = "high-speed"; + usb-role-switch; vusb33-supply = <&mt6359_vusb_ldo_reg>; + wakeup-source; + pinctrl-names = "default"; + pinctrl-0 = <&usb2_default_pins>; status = "okay"; + + connector { + compatible = "gpio-usb-b-connector", "usb-b-connector"; + type = "micro"; + id-gpios = <&pio 89 GPIO_ACTIVE_HIGH>; + vbus-supply = <&usb_p2_vbus>; + }; }; &xhci2 { - status = "okay"; vusb33-supply = <&mt6359_vusb_ldo_reg>; vbus-supply = <&sdio_fixed_3v3>; /* wifi_3v3 */ + status = "okay"; };