From patchwork Thu Feb 20 14:13:48 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joey Gouly X-Patchwork-Id: 13984033 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id B32AD1F5849 for ; Thu, 20 Feb 2025 14:14:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740060854; cv=none; b=CB+IlSxpmMlsEhaVJbwLP8FPengTDUbdkgcdFD0qkrc7v9IBF5v5oTUICnB2qWQ9FzJXVjM28V2/DZLgxetwLSNswNx/OC3buhHtBMd22FglucmGx6xE1/ewshR0ZM600xUNaWF49aocNYd3+ZvTce5M/cAyQGnu2ukN2pmXvc8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740060854; c=relaxed/simple; bh=/zLVvhHOLuwDjXwobGA7Kf3oSpD/5rKZ5dO/zbvitDE=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=E/Rmw+unCzMEleZ34gSxA4gw7uTQrhJf/8McY3e1IixxXIVzrIRuigcOe+4C0RdgpuXjTMmp2j1J+N6/YaciypGGN8+2m0xeXejseCqYc7/tfEfFefTknDiLclas0E+8H3ITNc4ZDJXTKvRTx0QCbfQLN0Fe55t2n5rKO5DHAxw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 350E31BB0; Thu, 20 Feb 2025 06:14:29 -0800 (PST) Received: from e124191.cambridge.arm.com (e124191.cambridge.arm.com [10.1.197.45]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id C14F33F59E; Thu, 20 Feb 2025 06:14:09 -0800 (PST) From: Joey Gouly To: kvm@vger.kernel.org Cc: alexandru.elisei@arm.com, joey.gouly@arm.com, drjones@redhat.com, kvmarm@lists.linux.dev, Marc Zyngier , Oliver Upton Subject: [kvm-unit-tests PATCH v1 1/7] arm64: drop to EL1 if booted at EL2 Date: Thu, 20 Feb 2025 14:13:48 +0000 Message-Id: <20250220141354.2565567-2-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250220141354.2565567-1-joey.gouly@arm.com> References: <20250220141354.2565567-1-joey.gouly@arm.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 EL2 is not currently supported, drop to EL1 to conitnue booting. Signed-off-by: Joey Gouly --- arm/cstart64.S | 27 +++++++++++++++++++++++++-- 1 file changed, 25 insertions(+), 2 deletions(-) diff --git a/arm/cstart64.S b/arm/cstart64.S index b480a552..3a305ad0 100644 --- a/arm/cstart64.S +++ b/arm/cstart64.S @@ -57,14 +57,25 @@ start: add x6, x6, :lo12:reloc_end 1: cmp x5, x6 - b.hs 1f + b.hs reloc_done ldr x7, [x5] // r_offset ldr x8, [x5, #16] // r_addend add x8, x8, x4 // val = base + r_addend str x8, [x4, x7] // base[r_offset] = val add x5, x5, #24 b 1b - +reloc_done: + mrs x4, CurrentEL + cmp x4, CurrentEL_EL2 + b.ne 1f +drop_to_el1: + mov x4, 4 + msr spsr_el2, x4 + adrp x4, 1f + add x4, x4, :lo12:1f + msr elr_el2, x4 + isb + eret 1: /* zero BSS */ adrp x4, bss @@ -186,6 +197,18 @@ get_mmu_off: .globl secondary_entry secondary_entry: + mrs x0, CurrentEL + cmp x0, CurrentEL_EL2 + b.ne 1f +drop_to_el1_secondary: + mov x0, 4 + msr spsr_el2, x0 + adrp x0, 1f + add x0, x0, :lo12:1f + msr elr_el2, x0 + isb + eret +1: /* enable FP/ASIMD and SVE */ mov x0, #(3 << 20) orr x0, x0, #(3 << 16) From patchwork Thu Feb 20 14:13:49 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joey Gouly X-Patchwork-Id: 13984034 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 5CAB91F2360 for ; Thu, 20 Feb 2025 14:14:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740060854; cv=none; b=Ib5S3LMkCNxlAvZNkbNuy4H+vqmLrqgQFwt3/2WynTNnAbMf6oWv9lRmGXPluvvCoVQNRmIuv1awtabTTjdIPuhlEfHvqwBPZT967QjUueqXiXYZjuBERHQc7pAbwWL0voxpyf+iAQIdS5cFrT3NTM1w+Un/StErMdBlrQ+w6/g= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740060854; c=relaxed/simple; bh=YV83ClylSHh3utT0mf6Mw13gE1kSErhGY2NlMx5wiHw=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=eZ5fHerqG64uSB4xTLLbwrQYh5VXEJIIw3GPbXLv1P8bzyH9upgwxKu1rvoUMGI7XHdFr2Zlvk76pVIENqs4vDdO5mUhdNIo5dhkJvTojYnjTCM9LjS18S81xLUz48s9pB/xEAQrZnlKVfWiDvunettPdYJMEMZutDNDWrl2Iug= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D680122EA; Thu, 20 Feb 2025 06:14:30 -0800 (PST) Received: from e124191.cambridge.arm.com (e124191.cambridge.arm.com [10.1.197.45]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 6E0983F59E; Thu, 20 Feb 2025 06:14:11 -0800 (PST) From: Joey Gouly To: kvm@vger.kernel.org Cc: alexandru.elisei@arm.com, joey.gouly@arm.com, drjones@redhat.com, kvmarm@lists.linux.dev, Marc Zyngier , Oliver Upton Subject: [kvm-unit-tests PATCH v1 2/7] arm64: timer: use hypervisor timers when at EL2 Date: Thu, 20 Feb 2025 14:13:49 +0000 Message-Id: <20250220141354.2565567-3-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250220141354.2565567-1-joey.gouly@arm.com> References: <20250220141354.2565567-1-joey.gouly@arm.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 At EL2, with VHE: - CNTP_CVAL_EL0 is forwarded to CNTHP_CVAL_EL0 - CNTV_CVAL_EL0 is forwarded to CNTHP_CVAL_EL0 Save the hypervisor physical and virtual timer IRQ numbers from the DT/ACPI. Signed-off-by: Joey Gouly --- arm/timer.c | 10 ++++++++-- lib/acpi.h | 2 ++ lib/arm/asm/timer.h | 11 +++++++++++ lib/arm/timer.c | 19 +++++++++++++++++-- 4 files changed, 38 insertions(+), 4 deletions(-) diff --git a/arm/timer.c b/arm/timer.c index 2cb80518..c6287ca7 100644 --- a/arm/timer.c +++ b/arm/timer.c @@ -347,8 +347,14 @@ static void test_ptimer(void) static void test_init(void) { assert(TIMER_PTIMER_IRQ != -1 && TIMER_VTIMER_IRQ != -1); - ptimer_info.irq = TIMER_PTIMER_IRQ; - vtimer_info.irq = TIMER_VTIMER_IRQ; + if (current_level() == CurrentEL_EL1) { + ptimer_info.irq = TIMER_PTIMER_IRQ; + vtimer_info.irq = TIMER_VTIMER_IRQ; + } else { + assert(TIMER_HPTIMER_IRQ != -1 && TIMER_HVTIMER_IRQ != -1); + ptimer_info.irq = TIMER_HPTIMER_IRQ; + vtimer_info.irq = TIMER_HVTIMER_IRQ; + } install_exception_handler(EL1H_SYNC, ESR_EL1_EC_UNKNOWN, ptimer_unsupported_handler); ptimer_info.read_ctl(); diff --git a/lib/acpi.h b/lib/acpi.h index c330c877..66e3062d 100644 --- a/lib/acpi.h +++ b/lib/acpi.h @@ -290,6 +290,8 @@ struct acpi_table_gtdt { u64 counter_read_block_address; u32 platform_timer_count; u32 platform_timer_offset; + u32 virtual_el2_timer_interrupt; + u32 virtual_el2_timer_flags; }; /* Reset to default packing */ diff --git a/lib/arm/asm/timer.h b/lib/arm/asm/timer.h index aaf839fc..7dda0f4f 100644 --- a/lib/arm/asm/timer.h +++ b/lib/arm/asm/timer.h @@ -21,12 +21,23 @@ struct timer_state { u32 irq; u32 irq_flags; } vtimer; + struct { + u32 irq; + u32 irq_flags; + } hptimer; + struct { + u32 irq; + u32 irq_flags; + } hvtimer; }; extern struct timer_state __timer_state; #define TIMER_PTIMER_IRQ (__timer_state.ptimer.irq) #define TIMER_VTIMER_IRQ (__timer_state.vtimer.irq) +#define TIMER_HPTIMER_IRQ (__timer_state.hptimer.irq) +#define TIMER_HVTIMER_IRQ (__timer_state.hvtimer.irq) + void timer_save_state(void); #endif /* !__ASSEMBLY__ */ diff --git a/lib/arm/timer.c b/lib/arm/timer.c index ae702e41..57f504e2 100644 --- a/lib/arm/timer.c +++ b/lib/arm/timer.c @@ -38,10 +38,11 @@ static void timer_save_state_fdt(void) * secure timer irq * non-secure timer irq (ptimer) * virtual timer irq (vtimer) - * hypervisor timer irq + * hypervisor timer irq (hptimer) + * hypervisor virtual timer irq (hvtimer) */ prop = fdt_get_property(fdt, node, "interrupts", &len); - assert(prop && len == (4 * 3 * sizeof(u32))); + assert(prop && len >= (4 * 3 * sizeof(u32))); data = (u32 *) prop->data; assert(fdt32_to_cpu(data[3]) == 1 /* PPI */ ); @@ -50,6 +51,14 @@ static void timer_save_state_fdt(void) assert(fdt32_to_cpu(data[6]) == 1 /* PPI */ ); __timer_state.vtimer.irq = PPI(fdt32_to_cpu(data[7])); __timer_state.vtimer.irq_flags = fdt32_to_cpu(data[8]); + if (len == (5 * 3 * sizeof(u32))) { + assert(fdt32_to_cpu(data[9]) == 1 /* PPI */ ); + __timer_state.hptimer.irq = PPI(fdt32_to_cpu(data[10])); + __timer_state.hptimer.irq_flags = fdt32_to_cpu(data[11]); + assert(fdt32_to_cpu(data[12]) == 1 /* PPI */ ); + __timer_state.hvtimer.irq = PPI(fdt32_to_cpu(data[13])); + __timer_state.hvtimer.irq_flags = fdt32_to_cpu(data[14]); + } } #ifdef CONFIG_EFI @@ -72,6 +81,12 @@ static void timer_save_state_acpi(void) __timer_state.vtimer.irq = gtdt->virtual_timer_interrupt; __timer_state.vtimer.irq_flags = gtdt->virtual_timer_flags; + + __timer_state.hptimer.irq = gtdt->non_secure_el2_interrupt; + __timer_state.hptimer.irq_flags = gtdt->non_secure_el2_flags; + + __timer_state.hvtimer.irq = gtdt->virtual_el2_timer_interrupt; + __timer_state.hvtimer.irq_flags = gtdt->virtual_el2_timer_flags; } #else From patchwork Thu Feb 20 14:13:50 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joey Gouly X-Patchwork-Id: 13984035 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 0E5211FAC48 for ; Thu, 20 Feb 2025 14:14:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740060856; cv=none; b=hwgGsTmmbeBDJOScEtTIMTkQ1OCM2Dt3uvja303mEi6b+4c0l13ZurbhC+6Kn3Xz4MmQkZOVIKNjy6Qm/VAIIhRVAkeXDqU7EhXDjnh7ZZ1tPvi66oQywB9dDK+XmlOv0CycdK16a35QWuCgL2cAm87KT38gdOurou4kLpVAAyQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; 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Thu, 20 Feb 2025 06:14:12 -0800 (PST) From: Joey Gouly To: kvm@vger.kernel.org Cc: alexandru.elisei@arm.com, joey.gouly@arm.com, drjones@redhat.com, kvmarm@lists.linux.dev, Marc Zyngier , Oliver Upton Subject: [kvm-unit-tests PATCH v1 3/7] arm64: micro-bench: fix timer IRQ Date: Thu, 20 Feb 2025 14:13:50 +0000 Message-Id: <20250220141354.2565567-4-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250220141354.2565567-1-joey.gouly@arm.com> References: <20250220141354.2565567-1-joey.gouly@arm.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Enable the correct (hvtimer) IRQ when at EL2. Signed-off-by: Joey Gouly --- arm/micro-bench.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/arm/micro-bench.c b/arm/micro-bench.c index 22408955..f47c5fc1 100644 --- a/arm/micro-bench.c +++ b/arm/micro-bench.c @@ -42,7 +42,7 @@ static void gic_irq_handler(struct pt_regs *regs) irq_received = true; gic_write_eoir(irqstat); - if (irqstat == TIMER_VTIMER_IRQ) { + if (irqstat == TIMER_VTIMER_IRQ || irqstat == TIMER_HVTIMER_IRQ) { write_sysreg((ARCH_TIMER_CTL_IMASK | ARCH_TIMER_CTL_ENABLE), cntv_ctl_el0); isb(); @@ -215,7 +215,11 @@ static bool timer_prep(void) install_irq_handler(EL1H_IRQ, gic_irq_handler); local_irq_enable(); - gic_enable_irq(TIMER_VTIMER_IRQ); + if (current_level() == CurrentEL_EL1) + gic_enable_irq(TIMER_VTIMER_IRQ); + else + gic_enable_irq(TIMER_HVTIMER_IRQ); + write_sysreg(ARCH_TIMER_CTL_IMASK | ARCH_TIMER_CTL_ENABLE, cntv_ctl_el0); isb(); From patchwork Thu Feb 20 14:13:51 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joey Gouly X-Patchwork-Id: 13984036 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 4565A1FBCB6 for ; Thu, 20 Feb 2025 14:14:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740060857; cv=none; b=KG1SBWq41s4s5rj2dCIfWPTr9QDI7YAczq8rhAH5J1mfMBlC0smOfuZ+1hrNlDNCk8TQEuWO2JHc0ktTsQRH/UmQGaUvIoG6o9L/d21P4yfU6tNtXqhBLIEJuYsD8fpJsHQLLECqD3UVO3yHmOOx0atBzz6FPTqMsFD+O1dzoDs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740060857; c=relaxed/simple; bh=mOtZZVMzbGeAvRtXFioKQvB1RsHgdPml9E/RILnggg0=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=eGiPqPvfM0l9+oRIqaeBoMqeIWRZ9Qxa6H/jvnsU9iRqdYo12Kj0lctma9h9nwWR6A2LMzH7rnglVEdTzFuxxDi+HPDnDd99gjEBkJ2fbiRcDCskowWgmcualhV5IW6xg/IYEgldEumc2cnNL/j6qfkscm8WDkeAE/rR3zn7auQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 317CC2696; Thu, 20 Feb 2025 06:14:34 -0800 (PST) Received: from e124191.cambridge.arm.com (e124191.cambridge.arm.com [10.1.197.45]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id BD5933F59E; Thu, 20 Feb 2025 06:14:14 -0800 (PST) From: Joey Gouly To: kvm@vger.kernel.org Cc: alexandru.elisei@arm.com, joey.gouly@arm.com, drjones@redhat.com, kvmarm@lists.linux.dev, Marc Zyngier , Oliver Upton Subject: [kvm-unit-tests PATCH v1 4/7] arm64: micro-bench: use smc when at EL2 Date: Thu, 20 Feb 2025 14:13:51 +0000 Message-Id: <20250220141354.2565567-5-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250220141354.2565567-1-joey.gouly@arm.com> References: <20250220141354.2565567-1-joey.gouly@arm.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 At EL2, hvc would target the current EL, use smc so that it targets EL3. Signed-off-by: Alexandru Elisei Signed-off-by: Joey Gouly --- arm/micro-bench.c | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/arm/micro-bench.c b/arm/micro-bench.c index f47c5fc1..32029c5a 100644 --- a/arm/micro-bench.c +++ b/arm/micro-bench.c @@ -282,6 +282,11 @@ static bool mmio_read_user_prep(void) return true; } +static void smc_exec(void) +{ + asm volatile("mov w0, #0x4b000000; smc #0" ::: "w0"); +} + static void mmio_read_user_exec(void) { readl(userspace_emulated_addr); @@ -300,6 +305,8 @@ static void eoi_exec(void) write_eoir(spurious_id); } +static bool exec_select(void); + struct exit_test { const char *name; bool (*prep)(void); @@ -310,7 +317,7 @@ struct exit_test { }; static struct exit_test tests[] = { - {"hvc", NULL, hvc_exec, NULL, 65536, true}, + {"hyp_call", exec_select, hvc_exec, NULL, 65536, true}, {"mmio_read_user", mmio_read_user_prep, mmio_read_user_exec, NULL, 65536, true}, {"mmio_read_vgic", NULL, mmio_read_vgic_exec, NULL, 65536, true}, {"eoi", NULL, eoi_exec, NULL, 65536, true}, @@ -320,6 +327,15 @@ static struct exit_test tests[] = { {"timer_10ms", timer_prep, timer_exec, timer_post, 256, true}, }; +static bool exec_select(void) +{ + if (current_level() == CurrentEL_EL2) + tests[0].exec = &smc_exec; + else + tests[0].exec = &hvc_exec; + return true; +} + struct ns_time { uint64_t ns; uint64_t ns_frac; From patchwork Thu Feb 20 14:13:52 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joey Gouly X-Patchwork-Id: 13984037 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 568191FC7C1 for ; Thu, 20 Feb 2025 14:14:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740060859; cv=none; b=CjXzr0YUFvMGRz9qufTrQkUWR0azic0spB6X5ge+jOd+WYo2ANOsQZExlsDA8jf7dDMDMpMZOjIfBCjf9W3x+xKGsScpmHONpzNvr6/+7RYc8Fm6xa+69RfaAMTDjabBsbh/7tN2yU2UC7SERwwvGLudXwS5/Tj28Jb8oA8u1+g= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740060859; c=relaxed/simple; bh=K6qrRVVzSh9sptw9wrOzAWWshx8blOFuK2k21pxl4MQ=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=UmOYRkupo9snpj4j2wV0S10Q1Ag/PJEjiHsSuaaLfi2zEkWc/1PpRXzqiE4MbKAJri44hZjCRnCYU8UHBBEv6SR42NEmkqmwtT8o+1s+36T8r78ixqSQbqvZ0TdcbYCxRxO1wKd/TiBfOiSmKpWM3B343U1Reg4bf8OoYovLcFc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D2E4E2BC0; Thu, 20 Feb 2025 06:14:35 -0800 (PST) Received: from e124191.cambridge.arm.com (e124191.cambridge.arm.com [10.1.197.45]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 6AAE53F59E; Thu, 20 Feb 2025 06:14:16 -0800 (PST) From: Joey Gouly To: kvm@vger.kernel.org Cc: alexandru.elisei@arm.com, joey.gouly@arm.com, drjones@redhat.com, kvmarm@lists.linux.dev, Marc Zyngier , Oliver Upton Subject: [kvm-unit-tests PATCH v1 5/7] arm64: selftest: update test for running at EL2 Date: Thu, 20 Feb 2025 14:13:52 +0000 Message-Id: <20250220141354.2565567-6-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250220141354.2565567-1-joey.gouly@arm.com> References: <20250220141354.2565567-1-joey.gouly@arm.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Remove some hard-coded assumptions that this test is running at EL1. Signed-off-by: Alexandru Elisei Signed-off-by: Joey Gouly --- arm/selftest.c | 18 +++++++++++++----- 1 file changed, 13 insertions(+), 5 deletions(-) diff --git a/arm/selftest.c b/arm/selftest.c index 1553ed8e..eccdc3d4 100644 --- a/arm/selftest.c +++ b/arm/selftest.c @@ -232,6 +232,7 @@ static void user_psci_system_off(struct pt_regs *regs) __user_psci_system_off(); } #elif defined(__aarch64__) +static unsigned long expected_level; /* * Capture the current register state and execute an instruction @@ -276,8 +277,7 @@ static bool check_regs(struct pt_regs *regs) { unsigned i; - /* exception handlers should always run in EL1 */ - if (current_level() != CurrentEL_EL1) + if (current_level() != expected_level) return false; for (i = 0; i < ARRAY_SIZE(regs->regs); ++i) { @@ -301,7 +301,11 @@ static enum vector check_vector_prep(void) return EL0_SYNC_64; asm volatile("mrs %0, daif" : "=r" (daif) ::); - expected_regs.pstate = daif | PSR_MODE_EL1h; + expected_regs.pstate = daif; + if (current_level() == CurrentEL_EL1) + expected_regs.pstate |= PSR_MODE_EL1h; + else + expected_regs.pstate |= PSR_MODE_EL2h; return EL1H_SYNC; } @@ -317,8 +321,8 @@ static bool check_und(void) install_exception_handler(v, ESR_EL1_EC_UNKNOWN, unknown_handler); - /* try to read an el2 sysreg from el0/1 */ - test_exception("", "mrs x0, sctlr_el2", "", "x0"); + /* try to read an el3 sysreg from el0/1/2 */ + test_exception("", "mrs x0, sctlr_el3", "", "x0"); install_exception_handler(v, ESR_EL1_EC_UNKNOWN, NULL); @@ -429,6 +433,10 @@ int main(int argc, char **argv) if (argc < 2) report_abort("no test specified"); +#if defined(__aarch64__) + expected_level = current_level(); +#endif + report_prefix_push(argv[1]); if (strcmp(argv[1], "setup") == 0) { From patchwork Thu Feb 20 14:13:53 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joey Gouly X-Patchwork-Id: 13984039 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 099861FC7E8 for ; Thu, 20 Feb 2025 14:14:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740060862; cv=none; b=EJ1ts3ZoxyrGLNsnLIq359fa00rmx31xdczh9RdB+MgNrbbhk1JT4hlEvWzWP0FICrdI0OPTWS2g18uh+uILqF6TE9z+CCRLqIh1JP87BgoZTIaJ7nZDvnPzOAmah2D0EcEHLpqHf/EZkbDpI5KPWyVFrEBVP+oY8r3z8ePjd1U= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740060862; c=relaxed/simple; bh=+QymMD9PZ03FYhrzS94YxXSriXLeyHDZss1xD7MUkKA=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=G3NSi3v6iB0YcuAFxH8c+mcV+740tWuoYKSmzIHgP31kw7bUMVznLmethBoyKTZ/+gbcRYhrTDGPJMwfJYQ8hF9jseJF6YvjBqeB2obZIvYferAjdEwQg3cRyaFgorG1x1X3aj3VMdHXBCuAJO6Q7fXho37C6C0+2gUpskR97Zs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 803B82BC2; Thu, 20 Feb 2025 06:14:37 -0800 (PST) Received: from e124191.cambridge.arm.com (e124191.cambridge.arm.com [10.1.197.45]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 17E1A3F59E; Thu, 20 Feb 2025 06:14:17 -0800 (PST) From: Joey Gouly To: kvm@vger.kernel.org Cc: alexandru.elisei@arm.com, joey.gouly@arm.com, drjones@redhat.com, kvmarm@lists.linux.dev, Marc Zyngier , Oliver Upton Subject: [kvm-unit-tests PATCH v1 6/7] arm64: pmu: count EL2 cycles Date: Thu, 20 Feb 2025 14:13:53 +0000 Message-Id: <20250220141354.2565567-7-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250220141354.2565567-1-joey.gouly@arm.com> References: <20250220141354.2565567-1-joey.gouly@arm.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Count EL2 cycles if that's the EL kvm-unit-tests is running at! Signed-off-by: Joey Gouly --- arm/pmu.c | 21 ++++++++++++++++++--- 1 file changed, 18 insertions(+), 3 deletions(-) diff --git a/arm/pmu.c b/arm/pmu.c index 2dc0822b..238e4628 100644 --- a/arm/pmu.c +++ b/arm/pmu.c @@ -206,6 +206,8 @@ static void test_overflow_interrupt(bool overflow_at_64bits) {} #define ID_DFR0_PMU_V3_8_5 0b0110 #define ID_DFR0_PMU_IMPDEF 0b1111 +#define PMCCFILTR_EL0_NSH BIT(27) + static inline uint32_t get_id_aa64dfr0(void) { return read_sysreg(id_aa64dfr0_el1); } static inline uint32_t get_pmcr(void) { return read_sysreg(pmcr_el0); } static inline void set_pmcr(uint32_t v) { write_sysreg(v, pmcr_el0); } @@ -247,7 +249,7 @@ static inline void precise_instrs_loop(int loop, uint32_t pmcr) #define PMCNTENCLR_EL0 sys_reg(3, 3, 9, 12, 2) #define PMEVTYPER_EXCLUDE_EL1 BIT(31) -#define PMEVTYPER_EXCLUDE_EL0 BIT(30) +#define PMEVTYPER_EXCLUDE_EL0 BIT(30) | BIT(27) static bool is_event_supported(uint32_t n, bool warn) { @@ -1059,11 +1061,18 @@ static void test_overflow_interrupt(bool overflow_at_64bits) static bool check_cycles_increase(void) { bool success = true; + u64 pmccfiltr = 0; /* init before event access, this test only cares about cycle count */ pmu_reset(); set_pmcntenset(1 << PMU_CYCLE_IDX); - set_pmccfiltr(0); /* count cycles in EL0, EL1, but not EL2 */ + +#if defined(__aarch64__) + if (current_level() == CurrentEL_EL2) + // include EL2 cycle counts + pmccfiltr |= PMCCFILTR_EL0_NSH; +#endif + set_pmccfiltr(pmccfiltr); set_pmcr(get_pmcr() | PMU_PMCR_LC | PMU_PMCR_C | PMU_PMCR_E); isb(); @@ -1114,11 +1123,17 @@ static void measure_instrs(int num, uint32_t pmcr) static bool check_cpi(int cpi) { uint32_t pmcr = get_pmcr() | PMU_PMCR_LC | PMU_PMCR_C | PMU_PMCR_E; + u64 pmccfiltr = 0; /* init before event access, this test only cares about cycle count */ pmu_reset(); set_pmcntenset(1 << PMU_CYCLE_IDX); - set_pmccfiltr(0); /* count cycles in EL0, EL1, but not EL2 */ +#if defined(__aarch64__) + if (current_level() == CurrentEL_EL2) + // include EL2 cycle counts + pmccfiltr |= PMCCFILTR_EL0_NSH; +#endif + set_pmccfiltr(pmccfiltr); if (cpi > 0) printf("Checking for CPI=%d.\n", cpi); From patchwork Thu Feb 20 14:13:54 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joey Gouly X-Patchwork-Id: 13984038 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 6670A1F754A for ; Thu, 20 Feb 2025 14:14:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740060862; cv=none; b=Ow3Ayjx7OuQyNx4ExwioWT5+FdkCByFWlczq0kuHCBpV516OjjsybHMkSbv5o2YqzgLufpHz9XFU6YhkvepAXRIpp+cnxhlzrsUDoNk1M1C955kw4DIVpZc8R1o16H4zm9e9LGfWFDOGbaPVN4or72fR9VPBUSz5ibbs58oyVpc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740060862; c=relaxed/simple; bh=TnsB6W7oVq8pi6s+GL2z4jqeBf3HSO8+1U4kvFDCpZ0=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=atu2fW2UBsToMjNHs00leB3UF94SVSUpVHBKq1g3mGopiAQ+4I063YBoqCLVEMyoR8GApSWQbRlA202n+DuSfUPWOQXTQqqBNVEOiteF8FkPFiSfvWSpzgaqmRNN56UF6tHaGkyibHCBD5HQ8J0/P7K0nop1Y3rabee8Xt5BYxs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2DBB62BC3; Thu, 20 Feb 2025 06:14:39 -0800 (PST) Received: from e124191.cambridge.arm.com (e124191.cambridge.arm.com [10.1.197.45]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id B94583F59E; Thu, 20 Feb 2025 06:14:19 -0800 (PST) From: Joey Gouly To: kvm@vger.kernel.org Cc: alexandru.elisei@arm.com, joey.gouly@arm.com, drjones@redhat.com, kvmarm@lists.linux.dev, Marc Zyngier , Oliver Upton Subject: [kvm-unit-tests PATCH v1 7/7] arm64: run at EL2 if supported Date: Thu, 20 Feb 2025 14:13:54 +0000 Message-Id: <20250220141354.2565567-8-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250220141354.2565567-1-joey.gouly@arm.com> References: <20250220141354.2565567-1-joey.gouly@arm.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 If VHE is supported, continue booting at EL2, otherwise continue booting at EL1. Signed-off-by: Joey Gouly --- arm/cstart64.S | 28 ++++++++++++++++++++++++++++ lib/arm64/asm/sysreg.h | 5 +++++ 2 files changed, 33 insertions(+) diff --git a/arm/cstart64.S b/arm/cstart64.S index 3a305ad0..2a15c03d 100644 --- a/arm/cstart64.S +++ b/arm/cstart64.S @@ -68,6 +68,20 @@ reloc_done: mrs x4, CurrentEL cmp x4, CurrentEL_EL2 b.ne 1f + /* EL2 setup */ + mrs x4, mpidr_el1 + msr vmpidr_el2, x4 + mrs x4, midr_el1 + msr vpidr_el2, x4 + /* check VHE is supported */ + mrs x4, ID_AA64MMFR1_EL1 + ubfx x4, x4, ID_AA64MMFR1_EL1_VH_SHIFT, #4 + cmp x4, #0 + b.eq drop_to_el1 + ldr x4, =(HCR_EL2_TGE | HCR_EL2_E2H) + msr hcr_el2, x4 + isb + b 1f drop_to_el1: mov x4, 4 msr spsr_el2, x4 @@ -200,6 +214,20 @@ secondary_entry: mrs x0, CurrentEL cmp x0, CurrentEL_EL2 b.ne 1f + /* EL2 setup */ + mrs x0, mpidr_el1 + msr vmpidr_el2, x0 + mrs x0, midr_el1 + msr vpidr_el2, x0 + /* check VHE is supported */ + mrs x0, ID_AA64MMFR1_EL1 + ubfx x0, x0, ID_AA64MMFR1_EL1_VH_SHIFT, #4 + cmp x0, #0 + b.eq drop_to_el1 + ldr x0, =(HCR_EL2_TGE | HCR_EL2_E2H) + msr hcr_el2, x0 + isb + b 1f drop_to_el1_secondary: mov x0, 4 msr spsr_el2, x0 diff --git a/lib/arm64/asm/sysreg.h b/lib/arm64/asm/sysreg.h index f214a4f0..d99ab5ec 100644 --- a/lib/arm64/asm/sysreg.h +++ b/lib/arm64/asm/sysreg.h @@ -75,6 +75,8 @@ asm( #define ID_AA64ISAR0_EL1_RNDR_SHIFT 60 +#define ID_AA64MMFR1_EL1_VH_SHIFT 8 + #define ICC_PMR_EL1 sys_reg(3, 0, 4, 6, 0) #define ICC_SGI1R_EL1 sys_reg(3, 0, 12, 11, 5) #define ICC_IAR1_EL1 sys_reg(3, 0, 12, 12, 0) @@ -99,6 +101,9 @@ asm( #define SCTLR_EL1_A _BITULL(1) #define SCTLR_EL1_M _BITULL(0) +#define HCR_EL2_TGE _BITULL(27) +#define HCR_EL2_E2H _BITULL(34) + #define INIT_SCTLR_EL1_MMU_OFF \ (SCTLR_EL1_ITD | SCTLR_EL1_SED | SCTLR_EL1_EOS | \ SCTLR_EL1_TSCXT | SCTLR_EL1_EIS | SCTLR_EL1_SPAN | \