From patchwork Mon Feb 24 07:49:27 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kever Yang X-Patchwork-Id: 13987555 Received: from mail-m1973175.qiye.163.com (mail-m1973175.qiye.163.com [220.197.31.75]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C678515DBA3; Mon, 24 Feb 2025 08:25:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=220.197.31.75 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740385509; cv=none; b=rzn+AqcPMXv2qS9dkGOB4P5Sc5bLT8Df4hPk8/NC2UqzIcry7YKO7lV84FL2glHO4MoYEmE9n1dBcV4eMBWo6MGLCJRUp4+WpY/S86oWfwjx4wxu2BIIAvW0verQF+PNjoxLQrins8C/Vw6zUFBPsBI14JvfdXj7kQkrvtS7DwI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740385509; c=relaxed/simple; bh=n+1AbUHyIqz3GkfRI23KPRjvlGBixKKQiJNQhqZ77HI=; h=From:To:Cc:Subject:Date:Message-Id:MIME-Version; b=iybk7/sqJiIXAWRUUZYxkQJv2RMxb/4rxaJGZTdvjV9Wi56pUFX9jOIN8LM8PGscZuICUKeoKArvTIu1C4hsQy0n85mxySQNQaS00Y6Z85Hx/JIYGgedPF6s6QnDrnmKF+oOqBOKxBNpW4JV8Pwod1zpbVZ+nYI9mG+PdYymTM0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rock-chips.com; spf=pass smtp.mailfrom=rock-chips.com; dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com header.b=SmWlMBhK; arc=none smtp.client-ip=220.197.31.75 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com header.b="SmWlMBhK" Received: from localhost.localdomain (unknown [103.29.142.67]) by smtp.qiye.163.com (Hmail) with ESMTP id bfc40046; Mon, 24 Feb 2025 15:49:32 +0800 (GMT+08:00) From: Kever Yang To: heiko@sntech.de Cc: linux-rockchip@lists.infradead.org, Kever Yang , Sebastian Reichel , Simon Xue , Conor Dooley , Rob Herring , Bjorn Helgaas , linux-pci@vger.kernel.org, =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , linux-kernel@vger.kernel.org, Krzysztof Kozlowski , devicetree@vger.kernel.org, Lorenzo Pieralisi , Shawn Lin , Manivannan Sadhasivam , linux-arm-kernel@lists.infradead.org Subject: [PATCH v6 1/2] dt-bindings: PCI: dw: rockchip: Add rk3576 support Date: Mon, 24 Feb 2025 15:49:27 +0800 Message-Id: <20250224074928.2005744-1-kever.yang@rock-chips.com> X-Mailer: git-send-email 2.25.1 Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFITzdXWS1ZQUlXWQ8JGhUIEh9ZQVlDHRgaVk9ISB9JGBlOSU0eHVYVFAkWGhdVEwETFh oSFyQUDg9ZV1kYEgtZQVlKS0hVSUJVSk9JVU1MWVdZFhoPEhUdFFlBWU9LSFVKS0lCQ0NMVUpLS1 VLWQY+ X-HM-Tid: 0a9536eec49e03afkunmbfc40046 X-HM-MType: 1 X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6ORQ6MBw*LzIRShMuSEsNDQwY GUgKCjxVSlVKTE9LSENISExPTExNVTMWGhIXVRAeDR4JVQIaFRw7CRQYEFYYExILCFUYFBZFWVdZ EgtZQVlKS0hVSUJVSk9JVU1MWVdZCAFZQU9JS0M3Bg++ DKIM-Signature: a=rsa-sha256; b=SmWlMBhKcNySNTWiQ22qRydMuZBe3cbNVFwMfg4e5b/Q73gR4I+7UgoAuL/d7SQrYEnkSHIbghyNqRXrRiGcXewg1lvGUBuJggXKKU9GqwzzM823kzCRxuSZK8vmNw2KqlfEHKbyuQ//L4qZj7APZAzRZYk3vh77kimgUxXo2UQ=; c=relaxed/relaxed; s=default; d=rock-chips.com; v=1; bh=gZcFfe/3Ec2Froj8QkKmzTvvnm/edhrxyAVxPgLiWlo=; h=date:mime-version:subject:message-id:from; rk3576 is using DWC PCIe controller, with msi interrupt directly to GIC instead of using GIC ITS, so - no ITS support is required and the 'msi-map' is not required, - a new 'msi' interrupt is needed. Signed-off-by: Kever Yang Signed-off-by: Sebastian Reichel --- Changes in v6: - Fix make dt_binding_check and make CHECK_DTBS=y Changes in v5: - Add constraints per device for interrupt-names due to the interrupt is different from rk3588. Changes in v4: - Fix wrong indentation in dt_binding_check report by Rob Changes in v3: - Fix dtb check broken on rk3588 - Update commit message Changes in v2: - remove required 'msi-map' - add interrupt name 'msi' .../bindings/pci/rockchip-dw-pcie-common.yaml | 41 ++++++++++++++++++- .../bindings/pci/rockchip-dw-pcie.yaml | 19 ++++++--- 2 files changed, 52 insertions(+), 8 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie-common.yaml b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie-common.yaml index cc9adfc7611c..e1ca8e2f35fe 100644 --- a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie-common.yaml +++ b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie-common.yaml @@ -65,7 +65,11 @@ properties: tx_cpl_timeout, cor_err_sent, nf_err_sent, f_err_sent, cor_err_rx, nf_err_rx, f_err_rx, radm_qoverflow - description: - eDMA write channel 0 interrupt + If the matching interrupt name is "msi", then this is the combinded + MSI line interrupt, which is to support MSI interrupts output to GIC + controller via GIC SPI interrupt instead of GIC its interrupt. + If the matching interrupt name is "dma0", then this is the eDMA write + channel 0 interrupt. - description: eDMA write channel 1 interrupt - description: @@ -81,7 +85,9 @@ properties: - const: msg - const: legacy - const: err - - const: dma0 + - enum: + - msi + - dma0 - const: dma1 - const: dma2 - const: dma3 @@ -123,4 +129,35 @@ required: additionalProperties: true +anyOf: + - if: + properties: + compatible: + contains: + const: rockchip,rk3576-pcie + then: + properties: + interrupt-names: + items: + - const: sys + - const: pmc + - const: msg + - const: legacy + - const: err + - const: msi + else: + properties: + interrupt-names: + minItems: 5 + items: + - const: sys + - const: pmc + - const: msg + - const: legacy + - const: err + - const: dma0 + - const: dma1 + - const: dma2 + - const: dma3 + ... diff --git a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml index 550d8a684af3..d727502ed822 100644 --- a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml @@ -16,16 +16,13 @@ description: |+ PCIe IP and thus inherits all the common properties defined in snps,dw-pcie.yaml. -allOf: - - $ref: /schemas/pci/snps,dw-pcie.yaml# - - $ref: /schemas/pci/rockchip-dw-pcie-common.yaml# - properties: compatible: oneOf: - const: rockchip,rk3568-pcie - items: - enum: + - rockchip,rk3576-pcie - rockchip,rk3588-pcie - const: rockchip,rk3568-pcie @@ -71,8 +68,18 @@ properties: vpcie3v3-supply: true -required: - - msi-map +allOf: + - $ref: /schemas/pci/snps,dw-pcie.yaml# + - $ref: /schemas/pci/rockchip-dw-pcie-common.yaml# + - if: + not: + properties: + compatible: + contains: + const: rockchip,rk3576-pcie + then: + required: + - msi-map unevaluatedProperties: false