From patchwork Mon Feb 24 15:14:16 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Yan X-Patchwork-Id: 13988353 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4AEDFC021A4 for ; Mon, 24 Feb 2025 15:25:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=nmvZ3fwGKK1GXF5Tg09uceM5PBTkO8q7jbUNj002pnw=; b=FKyI3GfKwy47UcpYS2Ev9OX3DD FurpkCY76xWEaTcaT/XxTeOUkYQcNq29uOTbiYVNkPRxoVBm/b4vYrwfrqVCiQRLgEMzqLUX8lPyW 71nEBIRNP4J03rwA65AMLXsIxAcPve9eTQneR03Qrb3AtlDesEh5B9JCsoh1uZOCgjOuXrTDIHjjn 7d7p8SkFI2q56I3XnzFKgKVLaNDI+YzotEc9WHmvFDXSUooy09BW3iIGvTBz6KMjJ97dJIf4o2/YG nEcI0tkeerNBT2u4dYsqnnSjPRcWcfO6Y76beyku3T8+lBCvhv7lnjK2W71/qrQKkAeXr000TkA1K ftauuJ7w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tmaKf-0000000EHKt-00Ai; Mon, 24 Feb 2025 15:25:21 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tmaAR-0000000EFAq-3WKX for linux-arm-kernel@lists.infradead.org; Mon, 24 Feb 2025 15:14:49 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0709E16F8; Mon, 24 Feb 2025 07:15:02 -0800 (PST) Received: from e132581.cambridge.arm.com (e132581.arm.com [10.2.76.71]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 8BE9E3F6A8; Mon, 24 Feb 2025 07:14:43 -0800 (PST) From: Leo Yan To: Suzuki K Poulose , Mike Leach , James Clark , Jonathan Corbet , Alexander Shishkin , Namhyung Kim , Arnaldo Carvalho de Melo , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Leo Yan Subject: [PATCH v1 1/8] coresight: etm4x: Extract the trace unit controlling Date: Mon, 24 Feb 2025 15:14:16 +0000 Message-Id: <20250224151423.1630639-2-leo.yan@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250224151423.1630639-1-leo.yan@arm.com> References: <20250224151423.1630639-1-leo.yan@arm.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250224_071447_963840_D44824C4 X-CRM114-Status: GOOD ( 18.27 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The trace unit is controlled in the ETM hardware enabling and disabling. The sequential changes for support AUX pause and resume will reuse the same operations. Extract the operations in the etm4_{enable|disable}_trace_unit() functions. A minor improvement in etm4_enable_trace_unit() is for returning the timeout error to callers. Signed-off-by: Leo Yan --- .../coresight/coresight-etm4x-core.c | 126 ++++++++++-------- 1 file changed, 74 insertions(+), 52 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c index 2c1a60577728..71be566bd117 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c @@ -428,6 +428,78 @@ static void etm4_check_arch_features(struct etmv4_drvdata *drvdata, } #endif /* CONFIG_ETM4X_IMPDEF_FEATURE */ +static int etm4_enable_trace_unit(struct etmv4_drvdata *drvdata) +{ + struct coresight_device *csdev = drvdata->csdev; + struct device *etm_dev = &csdev->dev; + struct csdev_access *csa = &csdev->access; + + /* + * ETE mandates that the TRCRSR is written to before + * enabling it. + */ + if (etm4x_is_ete(drvdata)) + etm4x_relaxed_write32(csa, TRCRSR_TA, TRCRSR); + + etm4x_allow_trace(drvdata); + /* Enable the trace unit */ + etm4x_relaxed_write32(csa, 1, TRCPRGCTLR); + + /* Synchronize the register updates for sysreg access */ + if (!csa->io_mem) + isb(); + + /* wait for TRCSTATR.IDLE to go back down to '0' */ + if (coresight_timeout(csa, TRCSTATR, TRCSTATR_IDLE_BIT, 0)) { + dev_err(etm_dev, + "timeout while waiting for Idle Trace Status\n"); + return -ETIME; + } + + /* + * As recommended by section 4.3.7 ("Synchronization when using the + * memory-mapped interface") of ARM IHI 0064D + */ + dsb(sy); + isb(); + + return 0; +} + +static void etm4_disable_trace_unit(struct etmv4_drvdata *drvdata) +{ + u32 control; + struct coresight_device *csdev = drvdata->csdev; + struct device *etm_dev = &csdev->dev; + struct csdev_access *csa = &csdev->access; + + control = etm4x_relaxed_read32(csa, TRCPRGCTLR); + + /* EN, bit[0] Trace unit enable bit */ + control &= ~0x1; + + /* + * If the CPU supports v8.4 Trace filter Control, + * set the ETM to trace prohibited region. + */ + etm4x_prohibit_trace(drvdata); + /* + * Make sure everything completes before disabling, as recommended + * by section 7.3.77 ("TRCVICTLR, ViewInst Main Control Register, + * SSTATUS") of ARM IHI 0064D + */ + dsb(sy); + isb(); + /* Trace synchronization barrier, is a nop if not supported */ + tsb_csync(); + etm4x_relaxed_write32(csa, control, TRCPRGCTLR); + + /* wait for TRCSTATR.PMSTABLE to go to '1' */ + if (coresight_timeout(csa, TRCSTATR, TRCSTATR_PMSTABLE_BIT, 1)) + dev_err(etm_dev, + "timeout while waiting for PM stable Trace Status\n"); +} + static int etm4_enable_hw(struct etmv4_drvdata *drvdata) { int i, rc; @@ -536,33 +608,7 @@ static int etm4_enable_hw(struct etmv4_drvdata *drvdata) etm4x_relaxed_write32(csa, trcpdcr | TRCPDCR_PU, TRCPDCR); } - /* - * ETE mandates that the TRCRSR is written to before - * enabling it. - */ - if (etm4x_is_ete(drvdata)) - etm4x_relaxed_write32(csa, TRCRSR_TA, TRCRSR); - - etm4x_allow_trace(drvdata); - /* Enable the trace unit */ - etm4x_relaxed_write32(csa, 1, TRCPRGCTLR); - - /* Synchronize the register updates for sysreg access */ - if (!csa->io_mem) - isb(); - - /* wait for TRCSTATR.IDLE to go back down to '0' */ - if (coresight_timeout(csa, TRCSTATR, TRCSTATR_IDLE_BIT, 0)) - dev_err(etm_dev, - "timeout while waiting for Idle Trace Status\n"); - - /* - * As recommended by section 4.3.7 ("Synchronization when using the - * memory-mapped interface") of ARM IHI 0064D - */ - dsb(sy); - isb(); - + rc = etm4_enable_trace_unit(drvdata); done: etm4_cs_lock(drvdata, csa); @@ -906,7 +952,6 @@ static void etm4_disable_hw(void *info) struct etmv4_drvdata *drvdata = info; struct etmv4_config *config = &drvdata->config; struct coresight_device *csdev = drvdata->csdev; - struct device *etm_dev = &csdev->dev; struct csdev_access *csa = &csdev->access; int i; @@ -920,31 +965,8 @@ static void etm4_disable_hw(void *info) etm4x_relaxed_write32(csa, control, TRCPDCR); } - control = etm4x_relaxed_read32(csa, TRCPRGCTLR); + etm4_disable_trace_unit(drvdata); - /* EN, bit[0] Trace unit enable bit */ - control &= ~0x1; - - /* - * If the CPU supports v8.4 Trace filter Control, - * set the ETM to trace prohibited region. - */ - etm4x_prohibit_trace(drvdata); - /* - * Make sure everything completes before disabling, as recommended - * by section 7.3.77 ("TRCVICTLR, ViewInst Main Control Register, - * SSTATUS") of ARM IHI 0064D - */ - dsb(sy); - isb(); - /* Trace synchronization barrier, is a nop if not supported */ - tsb_csync(); - etm4x_relaxed_write32(csa, control, TRCPRGCTLR); - - /* wait for TRCSTATR.PMSTABLE to go to '1' */ - if (coresight_timeout(csa, TRCSTATR, TRCSTATR_PMSTABLE_BIT, 1)) - dev_err(etm_dev, - "timeout while waiting for PM stable Trace Status\n"); /* read the status of the single shot comparators */ for (i = 0; i < drvdata->nr_ss_cmp; i++) { config->ss_status[i] = From patchwork Mon Feb 24 15:14:17 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Yan X-Patchwork-Id: 13988374 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 76DD4C021A4 for ; Mon, 24 Feb 2025 15:28:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=G4ZR6vOLLWi2sSULP7vwg0TEipKde6nREL3yJcQpbb4=; b=a2yXKBWJOfNWTebgvOJpcF1Orb g1LPbsQot2DawDd08/No66YuOPLzhy9YZf+ajVnpQzjOT3PaSPiXZHbo40nAX7dTBAhtWEpX6SmnT u2sPPF2cRUhVrl1c+5yEV8bFdpaMftT4b8WrHxQUV/FNNRFiFAO5Io9ojGWytZZ/3j9RdIfR262LP nSBz8dpZWhoZpo62kaIUDnMKtZiQLu06QLl1mdOmLG3IXymcJRZbAi4Czg0OwELTs0BdZPo5PMIe9 crb1/VmNX3ZWYa/wJhRK7/lXZmAGA6rkXFnxfO+jprE8HOW2oFvvKbNXoSotP5E3dn4lo695ih8uD BGdGTgkw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tmaNY-0000000EHfV-1Spe; Mon, 24 Feb 2025 15:28:20 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tmaAX-0000000EFDb-2hHS for linux-arm-kernel@lists.infradead.org; Mon, 24 Feb 2025 15:14:54 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 00CE01756; Mon, 24 Feb 2025 07:15:04 -0800 (PST) Received: from e132581.cambridge.arm.com (e132581.arm.com [10.2.76.71]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 919E23F6A8; Mon, 24 Feb 2025 07:14:45 -0800 (PST) From: Leo Yan To: Suzuki K Poulose , Mike Leach , James Clark , Jonathan Corbet , Alexander Shishkin , Namhyung Kim , Arnaldo Carvalho de Melo , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Leo Yan Subject: [PATCH v1 2/8] coresight: Introduce pause and resume APIs for source Date: Mon, 24 Feb 2025 15:14:17 +0000 Message-Id: <20250224151423.1630639-3-leo.yan@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250224151423.1630639-1-leo.yan@arm.com> References: <20250224151423.1630639-1-leo.yan@arm.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250224_071453_800216_38B10C5D X-CRM114-Status: GOOD ( 10.12 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Introduce APIs for pausing and resuming trace source and export as GPL symbols. Signed-off-by: Leo Yan --- drivers/hwtracing/coresight/coresight-core.c | 12 ++++++++++++ drivers/hwtracing/coresight/coresight-priv.h | 2 ++ include/linux/coresight.h | 4 ++++ 3 files changed, 18 insertions(+) diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c index 0a9380350fb5..4c911183928c 100644 --- a/drivers/hwtracing/coresight/coresight-core.c +++ b/drivers/hwtracing/coresight/coresight-core.c @@ -365,6 +365,18 @@ void coresight_disable_source(struct coresight_device *csdev, void *data) } EXPORT_SYMBOL_GPL(coresight_disable_source); +void coresight_pause_source(struct coresight_device *csdev) +{ + source_ops(csdev)->pause(csdev); +} +EXPORT_SYMBOL_GPL(coresight_pause_source); + +void coresight_resume_source(struct coresight_device *csdev) +{ + source_ops(csdev)->resume(csdev); +} +EXPORT_SYMBOL_GPL(coresight_resume_source); + /* * coresight_disable_path_from : Disable components in the given path beyond * @nd in the list. If @nd is NULL, all the components, except the SOURCE are diff --git a/drivers/hwtracing/coresight/coresight-priv.h b/drivers/hwtracing/coresight/coresight-priv.h index 76403530f33e..a9f14c075e91 100644 --- a/drivers/hwtracing/coresight/coresight-priv.h +++ b/drivers/hwtracing/coresight/coresight-priv.h @@ -247,5 +247,7 @@ void coresight_add_helper(struct coresight_device *csdev, void coresight_set_percpu_sink(int cpu, struct coresight_device *csdev); struct coresight_device *coresight_get_percpu_sink(int cpu); void coresight_disable_source(struct coresight_device *csdev, void *data); +void coresight_pause_source(struct coresight_device *csdev); +void coresight_resume_source(struct coresight_device *csdev); #endif diff --git a/include/linux/coresight.h b/include/linux/coresight.h index 17276965ff1d..703e1b8dbe22 100644 --- a/include/linux/coresight.h +++ b/include/linux/coresight.h @@ -385,6 +385,8 @@ struct coresight_ops_link { * is associated to. * @enable: enables tracing for a source. * @disable: disables tracing for a source. + * @resume: resumes tracing for a source. + * @pause: pauses tracing for a source. */ struct coresight_ops_source { int (*cpu_id)(struct coresight_device *csdev); @@ -392,6 +394,8 @@ struct coresight_ops_source { enum cs_mode mode, struct coresight_trace_id_map *id_map); void (*disable)(struct coresight_device *csdev, struct perf_event *event); + int (*resume)(struct coresight_device *csdev); + void (*pause)(struct coresight_device *csdev); }; /** From patchwork Mon Feb 24 15:14:18 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Yan X-Patchwork-Id: 13988375 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 760CEC021A4 for ; Mon, 24 Feb 2025 15:30:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=bZ+P2eh126WCPqq5KRjRVV0sZQ1LzK7x3oGWlhU+IAM=; b=yvf4v7wb1ZIORNxJgHofgnChDF 1a/3cn7IPxQiZGJgY5jUrs1DCtYyvCeYo8Pa3JifeYdOlte38UeOortaw4TP5jP3kpdvNLIfdG+6U h94qBHYw1kOMR+1juqx6Ngc6r6JXsNB9xYaXnxTFvUWJAX9LcroVnC/EIqTGW2TNCvnsND2QjZryf tId1vtph35gQ41djD6urPYNQk7VIXE3OaS+x7wU/mTN501H1RX7F3Zjc3JtL5BPtV4CPlsJug80Rx USMzztsWLj94bsAD33uPWxgtLBhvzwlf5bTmf5tBz/rncEaWHu/ZmS/6bnlEFd2dLNKtw4zY62xeU z1Xjlmcg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tmaOz-0000000EHpK-46Pb; Mon, 24 Feb 2025 15:29:49 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tmaAY-0000000EFEP-3cL1 for linux-arm-kernel@lists.infradead.org; Mon, 24 Feb 2025 15:14:56 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 07B3F1CE0; Mon, 24 Feb 2025 07:15:06 -0800 (PST) Received: from e132581.cambridge.arm.com (e132581.arm.com [10.2.76.71]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 97CFB3F6A8; Mon, 24 Feb 2025 07:14:47 -0800 (PST) From: Leo Yan To: Suzuki K Poulose , Mike Leach , James Clark , Jonathan Corbet , Alexander Shishkin , Namhyung Kim , Arnaldo Carvalho de Melo , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Leo Yan Subject: [PATCH v1 3/8] coresight: etm4x: Hook pause and resume callbacks Date: Mon, 24 Feb 2025 15:14:18 +0000 Message-Id: <20250224151423.1630639-4-leo.yan@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250224151423.1630639-1-leo.yan@arm.com> References: <20250224151423.1630639-1-leo.yan@arm.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250224_071454_988397_CB97E596 X-CRM114-Status: GOOD ( 16.80 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add callbacks for pausing and resuming the tracer. A "paused" flag in the driver data indicates whether the tracer is paused. If the flag is set, the driver will skip starting the hardware trace. The flag is always set to false for the sysfs mode, meaning the tracer will never be paused in the case. Signed-off-by: Leo Yan --- .../coresight/coresight-etm4x-core.c | 42 ++++++++++++++++++- drivers/hwtracing/coresight/coresight-etm4x.h | 2 + 2 files changed, 43 insertions(+), 1 deletion(-) diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c index 71be566bd117..3a97d81b79db 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c @@ -608,7 +608,8 @@ static int etm4_enable_hw(struct etmv4_drvdata *drvdata) etm4x_relaxed_write32(csa, trcpdcr | TRCPDCR_PU, TRCPDCR); } - rc = etm4_enable_trace_unit(drvdata); + if (!drvdata->paused) + rc = etm4_enable_trace_unit(drvdata); done: etm4_cs_lock(drvdata, csa); @@ -866,6 +867,9 @@ static int etm4_enable_perf(struct coresight_device *csdev, } drvdata->trcid = (u8)trace_id; + /* Populate pause state */ + drvdata->paused = !!READ_ONCE(event->hw.aux_paused); + /* And enable it */ ret = etm4_enable_hw(drvdata); @@ -895,6 +899,9 @@ static int etm4_enable_sysfs(struct coresight_device *csdev) if (ret < 0) goto unlock_sysfs_enable; + /* Tracer will never be paused in sysfs mode */ + drvdata->paused = false; + /* * Executing etm4_enable_hw on the cpu whose ETM is being enabled * ensures that register writes occur when cpu is powered. @@ -1082,10 +1089,43 @@ static void etm4_disable(struct coresight_device *csdev, coresight_set_mode(csdev, CS_MODE_DISABLED); } +static int etm4_resume(struct coresight_device *csdev) +{ + struct etmv4_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); + struct csdev_access *csa = &csdev->access; + + if (coresight_get_mode(csdev) != CS_MODE_PERF) + return -EINVAL; + + etm4_cs_unlock(drvdata, csa); + etm4_enable_trace_unit(drvdata); + etm4_cs_lock(drvdata, csa); + + drvdata->paused = false; + return 0; +} + +static void etm4_pause(struct coresight_device *csdev) +{ + struct etmv4_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent); + struct csdev_access *csa = &csdev->access; + + if (coresight_get_mode(csdev) != CS_MODE_PERF) + return; + + etm4_cs_unlock(drvdata, csa); + etm4_disable_trace_unit(drvdata); + etm4_cs_lock(drvdata, csa); + + drvdata->paused = true; +} + static const struct coresight_ops_source etm4_source_ops = { .cpu_id = etm4_cpu_id, .enable = etm4_enable, .disable = etm4_disable, + .resume = etm4_resume, + .pause = etm4_pause, }; static const struct coresight_ops etm4_cs_ops = { diff --git a/drivers/hwtracing/coresight/coresight-etm4x.h b/drivers/hwtracing/coresight/coresight-etm4x.h index 1119762b5cec..c3389fdb5d67 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x.h +++ b/drivers/hwtracing/coresight/coresight-etm4x.h @@ -983,6 +983,7 @@ struct etmv4_save_state { * @state_needs_restore: True when there is context to restore after PM exit * @skip_power_up: Indicates if an implementation can skip powering up * the trace unit. + * @paused: Indicates if the trace unit is paused. * @arch_features: Bitmap of arch features of etmv4 devices. */ struct etmv4_drvdata { @@ -1036,6 +1037,7 @@ struct etmv4_drvdata { struct etmv4_save_state *save_state; bool state_needs_restore; bool skip_power_up; + bool paused; DECLARE_BITMAP(arch_features, ETM4_IMPDEF_FEATURE_MAX); }; From patchwork Mon Feb 24 15:14:19 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Yan X-Patchwork-Id: 13988373 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 56077C021A4 for ; Mon, 24 Feb 2025 15:27:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=Sbr4sCthiHghLZFUGrTZdA0WJ+e/O3nVoV4Mae1CwPw=; b=VJsEl/kMNg9ScbMfwqxeWh+Guq XuvlyLbMtyDWh9P/mE2w/lQaZEqbbvRcU2AiyKspITtDyHzjQl4UUVPxE3c0JmsRgdKj7gZRQO+j7 ZrCQKF984FoLEsGrqN/gykR7Xefbz7UVgJya6ZpX1BCxZnMDIm5mZ4/2fBpTVOK8jhD32/z7NT2rQ MR1meYo2LTdtmC0iyrB/1J//CXubUjXzux2EqEwioRcaLX7ZHeKDkfI/mjJ2HY+qjAxRLcDDQxyA2 zBA32alGM0O9iqzCVqGX7YqDfNIVU8Q1pc7jnvQ+1St5If5u8vMXlZdH0fYQKJPs4jCLspD2VsO1n EXK3v88A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tmaM6-0000000EHW0-2dhE; Mon, 24 Feb 2025 15:26:50 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tmaAW-0000000EFCw-3Wuy for linux-arm-kernel@lists.infradead.org; Mon, 24 Feb 2025 15:14:54 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0DBEC2661; Mon, 24 Feb 2025 07:15:08 -0800 (PST) Received: from e132581.cambridge.arm.com (e132581.arm.com [10.2.76.71]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 9E8683F6A8; Mon, 24 Feb 2025 07:14:49 -0800 (PST) From: Leo Yan To: Suzuki K Poulose , Mike Leach , James Clark , Jonathan Corbet , Alexander Shishkin , Namhyung Kim , Arnaldo Carvalho de Melo , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Leo Yan Subject: [PATCH v1 4/8] coresight: perf: Support AUX trace pause and resume Date: Mon, 24 Feb 2025 15:14:19 +0000 Message-Id: <20250224151423.1630639-5-leo.yan@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250224151423.1630639-1-leo.yan@arm.com> References: <20250224151423.1630639-1-leo.yan@arm.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250224_071452_970062_1C1DFB90 X-CRM114-Status: GOOD ( 18.30 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This commit supports AUX trace pause and resume in a perf session for Arm CoreSight. First, we need to decide which flag can indicate the CoreSight PMU event has started. The 'event->hw.state' cannot be used for this purpose because its initial value and the value after hardware trace enabling are both 0. On the other hand, the context value 'ctxt->event_data' stores the ETM private info. This pointer is valid only when the PMU event has been enabled. It is safe to permit AUX trace pause and resume operations only when it is not a NULL pointer. To achieve fine-grained control of the pause and resume, only the tracer is disabled and enabled. This avoids the unnecessary complexity and latency caused by manipulating the entire link path. Signed-off-by: Leo Yan --- .../hwtracing/coresight/coresight-etm-perf.c | 40 ++++++++++++++++++- 1 file changed, 39 insertions(+), 1 deletion(-) diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c index ad6a8f4b70b6..29d52386ffbb 100644 --- a/drivers/hwtracing/coresight/coresight-etm-perf.c +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c @@ -366,6 +366,18 @@ static void *etm_setup_aux(struct perf_event *event, void **pages, continue; } + /* + * If AUX pause feature is enabled but the ETM driver does not + * support the operations, clear this CPU from the mask and + * continue to next one. + */ + if (event->attr.aux_start_paused && + (!source_ops(csdev)->pause || !source_ops(csdev)->resume)) { + dev_err_once(&csdev->dev, "AUX pause is not supported.\n"); + cpumask_clear_cpu(cpu, mask); + continue; + } + /* * No sink provided - look for a default sink for all the ETMs, * where this event can be scheduled. @@ -451,6 +463,15 @@ static void *etm_setup_aux(struct perf_event *event, void **pages, goto out; } +static void etm_event_resume(struct coresight_device *csdev, + struct etm_ctxt *ctxt) +{ + if (!ctxt->event_data) + return; + + coresight_resume_source(csdev); +} + static void etm_event_start(struct perf_event *event, int flags) { int cpu = smp_processor_id(); @@ -465,6 +486,9 @@ static void etm_event_start(struct perf_event *event, int flags) if (!csdev) goto fail; + if (flags & PERF_EF_RESUME) + return etm_event_resume(csdev, ctxt); + /* Have we messed up our tracking ? */ if (WARN_ON(ctxt->event_data)) goto fail; @@ -550,6 +574,16 @@ static void etm_event_start(struct perf_event *event, int flags) return; } +static void etm_event_pause(struct coresight_device *csdev, + struct etm_ctxt *ctxt) +{ + if (!ctxt->event_data) + return; + + /* Stop tracer */ + coresight_pause_source(csdev); +} + static void etm_event_stop(struct perf_event *event, int mode) { int cpu = smp_processor_id(); @@ -560,6 +594,9 @@ static void etm_event_stop(struct perf_event *event, int mode) struct etm_event_data *event_data; struct list_head *path; + if (mode & PERF_EF_PAUSE) + return etm_event_pause(csdev, ctxt); + /* * If we still have access to the event_data via handle, * confirm that we haven't messed up the tracking. @@ -904,7 +941,8 @@ int __init etm_perf_init(void) int ret; etm_pmu.capabilities = (PERF_PMU_CAP_EXCLUSIVE | - PERF_PMU_CAP_ITRACE); + PERF_PMU_CAP_ITRACE | + PERF_PMU_CAP_AUX_PAUSE); etm_pmu.attr_groups = etm_pmu_attr_groups; etm_pmu.task_ctx_nr = perf_sw_context; From patchwork Mon Feb 24 15:14:20 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Yan X-Patchwork-Id: 13988383 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AA23DC021A4 for ; Mon, 24 Feb 2025 15:34:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=qwlGj6Hchdxakq37kd6CdZyEXv9W6UVVmypf4GHk0yI=; b=4zQYjEP2jlDlfOzML0Y6BkA6cK CP9+RQEVcf/8s7W/uhNQxi07ryLrrYEvkV+gt3dwfpEPAHl1Uv5UBH2ldSC9mfIY4jM1dEuqRmjNp 48/vD42sZuA+GReyYD2apUXUpLaZHlndgGjCGe2N0IYYYKe5bYKLkKdFb4PPfsjtASraSDEJrY6OX MrNUxRu0DMKRf5PbOQfGdz29SNv/bhnxnFfEWst/4u6k9YaZqkUWYxz5Jc7UAVackQTiEpq7xHzrC zS871DU4NwByTNlZLQE3M1SLUvfGvnds0uwnT4UkoBsEO96ssWWcjgEYjOv3Y9GFG6ZshJFcZUDbt P4GnlnEg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tmaTL-0000000EIPj-49Vg; Mon, 24 Feb 2025 15:34:19 +0000 Received: from desiato.infradead.org ([2001:8b0:10b:1:d65d:64ff:fe57:4e05]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tmaAe-0000000EFHW-0Dsz for linux-arm-kernel@bombadil.infradead.org; Mon, 24 Feb 2025 15:15:00 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Content-Transfer-Encoding:MIME-Version :References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To: Content-Type:Content-ID:Content-Description; bh=qwlGj6Hchdxakq37kd6CdZyEXv9W6UVVmypf4GHk0yI=; b=KqkqOWH9HHTcQ9qxORm3mmVcup 5wbLBhONHuLIq25g8K6zv+WiTCvugf1tAQciU/Tiwh58Jy3X0kWsEMGrk/jMyeU6QmHabZmGAOWWZ L7seNoBcPqssfRmmGGJEw1fypEKaPhMadwIforRRPGFyR2v2Xzt6UJxHk0ZIbTQQwP4egAN/YOHjB xuABH/enFF4CWWwxgZWEIHlOmluqVWPdwYoxtVXvUqcmXKHj7t4iVG5TDEb7MvDOr2LC5We0KFVKQ /rlywfygxy4/gjrG5A6Cfoz3m0n9hns977ywLAhWtg6Wu3MOXSyzR2f0aaq7dxSSFU6HzaqkQYBE5 69QANUdQ==; Received: from foss.arm.com ([217.140.110.172]) by desiato.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tmaAa-00000003DYI-3sry for linux-arm-kernel@lists.infradead.org; Mon, 24 Feb 2025 15:14:58 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 142302681; Mon, 24 Feb 2025 07:15:10 -0800 (PST) Received: from e132581.cambridge.arm.com (e132581.arm.com [10.2.76.71]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id A491B3F6A8; Mon, 24 Feb 2025 07:14:51 -0800 (PST) From: Leo Yan To: Suzuki K Poulose , Mike Leach , James Clark , Jonathan Corbet , Alexander Shishkin , Namhyung Kim , Arnaldo Carvalho de Melo , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Leo Yan Subject: [PATCH v1 5/8] coresight: etm: Add an attribute for updating buffer Date: Mon, 24 Feb 2025 15:14:20 +0000 Message-Id: <20250224151423.1630639-6-leo.yan@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250224151423.1630639-1-leo.yan@arm.com> References: <20250224151423.1630639-1-leo.yan@arm.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250224_151457_295118_EE0CE135 X-CRM114-Status: GOOD ( 18.07 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add an attribute for updating buffer when the AUX trace is paused. And populate the value to the 'update_buf_on_pause' flag during the AUX setting up. If the AUX pause operation is attached to a PMU counter, when the counter is overflow and if the PMU interrupt in an NMI, then AUX pause operation will be triggered in the NMI context. On the other hand, the per CPU sink has its own interrupt handling. Thus, there will be a race condition between the updating buffer in NMI and sink's interrupt handler. To avoid the race condition, this commit disallows updating buffer on AUX pause for the per CPU sink. Currently, this is only applied for TRBE. Signed-off-by: Leo Yan --- .../hwtracing/coresight/coresight-etm-perf.c | 20 +++++++++++++++++++ .../hwtracing/coresight/coresight-etm-perf.h | 2 ++ include/linux/coresight-pmu.h | 1 + 3 files changed, 23 insertions(+) diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c index 29d52386ffbb..d759663a1f7d 100644 --- a/drivers/hwtracing/coresight/coresight-etm-perf.c +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c @@ -62,6 +62,8 @@ PMU_FORMAT_ATTR(contextid1, "config:" __stringify(ETM_OPT_CTXTID)); PMU_FORMAT_ATTR(contextid2, "config:" __stringify(ETM_OPT_CTXTID2)); PMU_FORMAT_ATTR(timestamp, "config:" __stringify(ETM_OPT_TS)); PMU_FORMAT_ATTR(retstack, "config:" __stringify(ETM_OPT_RETSTK)); +PMU_FORMAT_ATTR(update_buf_on_pause, + "config:" __stringify(ETM_OPT_UPDATE_BUF_ON_PAUSE)); /* preset - if sink ID is used as a configuration selector */ PMU_FORMAT_ATTR(preset, "config:0-3"); /* Sink ID - same for all ETMs */ @@ -103,6 +105,7 @@ static struct attribute *etm_config_formats_attr[] = { &format_attr_configid.attr, &format_attr_branch_broadcast.attr, &format_attr_cc_threshold.attr, + &format_attr_update_buf_on_pause.attr, NULL, }; @@ -434,6 +437,23 @@ static void *etm_setup_aux(struct perf_event *event, void **pages, if (!sink) goto err; + /* Populate the flag for updating buffer on AUX pause */ + event_data->update_buf_on_pause = + !!(event->attr.config & BIT(ETM_OPT_UPDATE_BUF_ON_PAUSE)); + + if (event_data->update_buf_on_pause) { + /* + * The per CPU sink has own interrupt handling, it might have + * race condition with updating buffer on AUX trace pause if + * it is invoked from NMI. To avoid the race condition, + * disallows updating buffer for the per CPU sink case. + */ + if (coresight_is_percpu_sink(sink)) { + dev_err(&sink->dev, "update_buf_on_pause is not permitted.\n"); + goto err; + } + } + /* If we don't have any CPUs ready for tracing, abort */ cpu = cpumask_first(mask); if (cpu >= nr_cpu_ids) diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.h b/drivers/hwtracing/coresight/coresight-etm-perf.h index 744531158d6b..52b9385f8c11 100644 --- a/drivers/hwtracing/coresight/coresight-etm-perf.h +++ b/drivers/hwtracing/coresight/coresight-etm-perf.h @@ -51,6 +51,7 @@ struct etm_filters { * @aux_hwid_done: Whether a CPU has emitted the TraceID packet or not. * @snk_config: The sink configuration. * @cfg_hash: The hash id of any coresight config selected. + * @update_buf_on_pause: The flag to indicate updating buffer on AUX pause. * @path: An array of path, each slot for one CPU. */ struct etm_event_data { @@ -59,6 +60,7 @@ struct etm_event_data { cpumask_t aux_hwid_done; void *snk_config; u32 cfg_hash; + bool update_buf_on_pause; struct list_head * __percpu *path; }; diff --git a/include/linux/coresight-pmu.h b/include/linux/coresight-pmu.h index 89b0ac0014b0..04147e30c2f2 100644 --- a/include/linux/coresight-pmu.h +++ b/include/linux/coresight-pmu.h @@ -35,6 +35,7 @@ #define ETM_OPT_CTXTID2 15 #define ETM_OPT_TS 28 #define ETM_OPT_RETSTK 29 +#define ETM_OPT_UPDATE_BUF_ON_PAUSE 30 /* ETMv4 CONFIGR programming bits for the ETM OPTs */ #define ETM4_CFG_BIT_BB 3 From patchwork Mon Feb 24 15:14:21 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Yan X-Patchwork-Id: 13988381 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D2C72C021A4 for ; Mon, 24 Feb 2025 15:31:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=8ZwLU+r/bpzuuexUx/f17H1dOMQb6Dmb1357PlWuMVI=; b=jtnreyq2pbMo81UAiZCdtznWTh Jv+h4gW/fAs4+CsHDerXF0gAOJKhUmoSFIpvhRZsQzv3uwbv0ErerhIuXoZz7NLuFijCJFKckGVZb Bd+nCpRgn73IWxaDwcHQAALrv0hIdUMstFXit7icHGYNTihQKIgpCZnN5k2fMLNQ/Hj/f8djI3HRI hOj8AjEFruMKC/JM5GRQvpX9XXjCd8rB7hb7OIPfl56wDMLcYHNEycT8InbHI9TDT8nQQtrKT7ELB 2pKR9FfjOzjutrBVOvOgVwoZCxQt4XPY2eUXKxo+jodUEEEYCo7KSNV5ELlqu1CP1B0WHtDzBtp3b vmUa+otw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tmaQR-0000000EHxm-2c74; Mon, 24 Feb 2025 15:31:19 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tmaAc-0000000EFGc-1cCs for linux-arm-kernel@lists.infradead.org; Mon, 24 Feb 2025 15:14:59 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1B87E26AC; Mon, 24 Feb 2025 07:15:12 -0800 (PST) Received: from e132581.cambridge.arm.com (e132581.arm.com [10.2.76.71]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id ABBE43F6A8; Mon, 24 Feb 2025 07:14:53 -0800 (PST) From: Leo Yan To: Suzuki K Poulose , Mike Leach , James Clark , Jonathan Corbet , Alexander Shishkin , Namhyung Kim , Arnaldo Carvalho de Melo , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Leo Yan Subject: [PATCH v1 6/8] coresight: perf: Update buffer on AUX pause Date: Mon, 24 Feb 2025 15:14:21 +0000 Message-Id: <20250224151423.1630639-7-leo.yan@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250224151423.1630639-1-leo.yan@arm.com> References: <20250224151423.1630639-1-leo.yan@arm.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250224_071458_472345_7638F491 X-CRM114-Status: GOOD ( 15.52 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Due to sinks like ETR and ETB don't support interrupt handling, the hardware trace data might be lost for continuous running tasks. This commit takes advantage of the AUX pause for updating trace buffer to mitigate the trace data losing issue. Signed-off-by: Leo Yan --- .../hwtracing/coresight/coresight-etm-perf.c | 38 ++++++++++++++++++- 1 file changed, 36 insertions(+), 2 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c index d759663a1f7d..667110429de9 100644 --- a/drivers/hwtracing/coresight/coresight-etm-perf.c +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c @@ -594,14 +594,48 @@ static void etm_event_start(struct perf_event *event, int flags) return; } -static void etm_event_pause(struct coresight_device *csdev, +static void etm_event_pause(struct perf_event *event, + struct coresight_device *csdev, struct etm_ctxt *ctxt) { + int cpu = smp_processor_id(); + struct coresight_device *sink; + struct perf_output_handle *handle = &ctxt->handle; + struct list_head *path; + unsigned long size; + if (!ctxt->event_data) return; /* Stop tracer */ coresight_pause_source(csdev); + + /* Bail out if no need update buffer */ + if (!ctxt->event_data->update_buf_on_pause) + return; + + if (WARN_ON_ONCE(handle->event != event)) + return; + + path = etm_event_cpu_path(ctxt->event_data, cpu); + sink = coresight_get_sink(path); + if (WARN_ON_ONCE(!sink)) + return; + + if (!sink_ops(sink)->update_buffer) + return; + + size = sink_ops(sink)->update_buffer(sink, handle, + ctxt->event_data->snk_config); + if (READ_ONCE(handle->event)) { + if (!size) + return; + + perf_aux_output_end(handle, size); + perf_aux_output_begin(handle, event); + } else { + WARN_ON_ONCE(size); + } } static void etm_event_stop(struct perf_event *event, int mode) @@ -615,7 +649,7 @@ static void etm_event_stop(struct perf_event *event, int mode) struct list_head *path; if (mode & PERF_EF_PAUSE) - return etm_event_pause(csdev, ctxt); + return etm_event_pause(event, csdev, ctxt); /* * If we still have access to the event_data via handle, From patchwork Mon Feb 24 15:14:22 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Yan X-Patchwork-Id: 13988387 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 270E6C021A4 for ; Mon, 24 Feb 2025 15:37:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=j7xR4SiGV/Zsrl53/7fnJi2BlyWRQB9CJi1ByTsZgto=; b=eJkjymX+wwAyRSvNT+ghaxyBgP m9UXAEsoyf11B7cpYc49Y03Ny4Cm0TCGAbF621qPfoiE1usv94+nDeT5TVHAlguNP4bHdCn4NhDK9 G0jME12E6PkfBoL5L2mun4s3VEJshoTovt0AdapDcaL7F8X/Ejzg234fdhly8nSz3M2oSMgLxSGx9 XKKN9Jb6S8h2LYbEwpDM3MWD94WPTYQE4LtHgVJv4iQI62c+v9h2sgM30CtH8COs9J/Um4r0wiZiX EjJb2HF5uAUh65V74l8YDsebypnmX8QECY7LK/XehhKp25Z5OHjWQVv2S+eoqorfCG+UeprS/2ows peSj1ttw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tmaWF-0000000EIq8-1C8R; Mon, 24 Feb 2025 15:37:19 +0000 Received: from desiato.infradead.org ([2001:8b0:10b:1:d65d:64ff:fe57:4e05]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tmaAh-0000000EFJf-0BE0 for linux-arm-kernel@bombadil.infradead.org; Mon, 24 Feb 2025 15:15:03 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Content-Transfer-Encoding:MIME-Version :References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To: Content-Type:Content-ID:Content-Description; bh=j7xR4SiGV/Zsrl53/7fnJi2BlyWRQB9CJi1ByTsZgto=; b=aNVWvxTTxn3MuxdYt40BbovXSi CNR6Z44+LAyQgF1gKy5aI1nCspJ0lg5HnZc4od4EfLtv8m5u1xP6jL2Xzi19pkqTf5DV47q7ZVw0o sWRagjeHLlmhnDe1Wtjo4m1w4SAF21uCt3fPAseXveF+asmxrNWgrbTsx3jYqVPVRZPDO+BK01Sbq bgdfYZz58QnaLpdhO+YW6P82ABC9Pst1Vw1q9OSxm2X8bE+J6b10F0l4UHt6SiDZ7jR2WJaIb7f2i g435kTM22gGFSjU9z/hmnom5csgqRJEbX5hw9Pd4aTOY9REuDbXOlUoj0A/zhD1hATKLir1tkXFUc PpQmGEOQ==; Received: from foss.arm.com ([217.140.110.172]) by desiato.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tmaAd-00000003DZ9-3pfg for linux-arm-kernel@lists.infradead.org; Mon, 24 Feb 2025 15:15:01 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 22BAF26B9; Mon, 24 Feb 2025 07:15:14 -0800 (PST) Received: from e132581.cambridge.arm.com (e132581.arm.com [10.2.76.71]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id B2FAA3F6A8; Mon, 24 Feb 2025 07:14:55 -0800 (PST) From: Leo Yan To: Suzuki K Poulose , Mike Leach , James Clark , Jonathan Corbet , Alexander Shishkin , Namhyung Kim , Arnaldo Carvalho de Melo , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Leo Yan Subject: [PATCH v1 7/8] Documentation: coresight: Document AUX pause and resume Date: Mon, 24 Feb 2025 15:14:22 +0000 Message-Id: <20250224151423.1630639-8-leo.yan@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250224151423.1630639-1-leo.yan@arm.com> References: <20250224151423.1630639-1-leo.yan@arm.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250224_151500_339457_89665BD8 X-CRM114-Status: GOOD ( 12.80 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This adds description for AUX pause and resume. It gives introduction for what's AUX pause and resume and how to use the configuration terms. As last, it records several usage examples. Signed-off-by: Leo Yan --- .../trace/coresight/coresight-perf.rst | 50 +++++++++++++++++++ 1 file changed, 50 insertions(+) diff --git a/Documentation/trace/coresight/coresight-perf.rst b/Documentation/trace/coresight/coresight-perf.rst index d087aae7d492..c49aa05c51eb 100644 --- a/Documentation/trace/coresight/coresight-perf.rst +++ b/Documentation/trace/coresight/coresight-perf.rst @@ -78,6 +78,56 @@ enabled like:: Please refer to the kernel configuration help for more information. +Fine-grained tracing with AUX pause and resume +---------------------------------------------- + +Arm CoreSight may generate a large amount of hardware trace data, which +will lead to overhead in recording and distract users when reviewing +profiling result. To mitigate the issue of excessive trace data, Perf +provides AUX pause and resume functionality for fine-grained tracing. + +The AUX pause and resume can be triggered by associated events. These +events can be ftrace tracepoints (including static and dynamic +tracepoints) or PMU events (e.g. CPU PMU cycle event). To create a perf +session with AUX pause / resume, three configuration terms are +introduced: + +- "aux-action=start-paused": it is specified for the cs_etm PMU event to + launch in a paused state. +- "aux-action=pause": an associated event is specified with this term + to pause AUX trace. +- "aux-action=resume": an associated event is specified with this term + to resume AUX trace. + +Some Arm CoreSight sinks (e.g., ETR, ETB) do not support interrupt +mechanism. As a result, trace data might be lost if it cannot be copied +to the user space tool in a timely manner. To mitigate trace data lose, +a configuration term "update_buf_on_pause" can be used for the cs_etm +PMU event. As its name suggests, it directs the driver to update the +buffer when the AUX trace is paused. By default, this feature is +disabled until users explicitly specify "update_buf_on_pause=1". + +TRBE has interrupt handling. To avoid the race condition between the +AUX pause or resume invoked in NMI and TRBE interrupt handler, the +driver reports a failure if users try to use "update_buf_on_pause=1" on +TRBE. + +Example for triggering AUX pause and resume with ftrace tracepoints:: + + perf record -e cs_etm/aux-action=start-paused/k,syscalls:sys_enter_openat/aux-action=resume/,syscalls:sys_exit_openat/aux-action=pause/ ls + +Example for triggering AUX pause and resume with PMU event:: + + perf record -a -e cs_etm/aux-action=start-paused/k \ + -e cycles/aux-action=pause,period=10000000/ \ + -e cycles/aux-action=resume,period=1050000/ -- sleep 1 + +Example for updating buffer on AUX pause:: + + perf record -a -e cs_etm/aux-action=start-paused,update_buf_on_pause=1/ \ + -e cycles/aux-action=pause,period=10000000/ \ + -e cycles/aux-action=resume,period=1050000/ -- sleep 1 + Perf test - Verify kernel and userspace perf CoreSight work ----------------------------------------------------------- From patchwork Mon Feb 24 15:14:23 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Yan X-Patchwork-Id: 13988384 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 49A6BC021A4 for ; Mon, 24 Feb 2025 15:36:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=F1JDFTUUJTuHrknJtfDybmD2pQSQhM/J7L4REYqLfLo=; b=Xslx3Ff8DwYlXwI4mQRsIPpPKH hKKEKnXg/89DltqtBVQ4kUluh2I4omFdZI4d+zQfMZRYVMlQ7ON1NAZKdicp8PnlOzQSemRP3AQSp 4eeyQ6kpl3SiC6vWo/emivQI3a7KuJo1Hzrb1mtCQCmM7fCWKaIydiEwtaaJ3PdJnybnUweg4D8cD w0C0Tggek23JlCD7Y+hdNVafbKD4nJsEt4fdCsbHvTAUurHUEuxdlwpHQcppqgt46kio1GpMpavYP ZWjytlrV1DHa09NVyEMIsWgJoLyFjqo/D4RaKcZPv5CLF34mi4vBpFAJBxeaYXlTzMTR+zNuvNcSt JntxE9cg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tmaUn-0000000EIbu-2e6Z; Mon, 24 Feb 2025 15:35:49 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tmaAe-0000000EFGc-0zoW for linux-arm-kernel@lists.infradead.org; Mon, 24 Feb 2025 15:15:01 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 338A4106F; Mon, 24 Feb 2025 07:15:16 -0800 (PST) Received: from e132581.cambridge.arm.com (e132581.arm.com [10.2.76.71]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id BA7153F6A8; Mon, 24 Feb 2025 07:14:57 -0800 (PST) From: Leo Yan To: Suzuki K Poulose , Mike Leach , James Clark , Jonathan Corbet , Alexander Shishkin , Namhyung Kim , Arnaldo Carvalho de Melo , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Leo Yan Subject: [PATCH v1 8/8] perf cs-etm: Sync kernel coresight-pmu.h header Date: Mon, 24 Feb 2025 15:14:23 +0000 Message-Id: <20250224151423.1630639-9-leo.yan@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250224151423.1630639-1-leo.yan@arm.com> References: <20250224151423.1630639-1-leo.yan@arm.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250224_071500_325774_0D7DA0F4 X-CRM114-Status: UNSURE ( 8.63 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Update the header in the tools to align with the kernel header. Signed-off-by: Leo Yan --- tools/include/linux/coresight-pmu.h | 1 + 1 file changed, 1 insertion(+) diff --git a/tools/include/linux/coresight-pmu.h b/tools/include/linux/coresight-pmu.h index 89b0ac0014b0..04147e30c2f2 100644 --- a/tools/include/linux/coresight-pmu.h +++ b/tools/include/linux/coresight-pmu.h @@ -35,6 +35,7 @@ #define ETM_OPT_CTXTID2 15 #define ETM_OPT_TS 28 #define ETM_OPT_RETSTK 29 +#define ETM_OPT_UPDATE_BUF_ON_PAUSE 30 /* ETMv4 CONFIGR programming bits for the ETM OPTs */ #define ETM4_CFG_BIT_BB 3