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Mon, 24 Feb 2025 09:46:58 -0800 (PST) Received: from localhost ([50.145.13.30]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-220d556d473sm182695845ad.166.2025.02.24.09.46.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 24 Feb 2025 09:46:58 -0800 (PST) Date: Mon, 24 Feb 2025 09:46:58 -0800 (PST) X-Google-Original-Date: Mon, 24 Feb 2025 09:46:55 PST (-0800) Subject: [GIT PULL] RISC-V Fixes for 6.14-rc5 CC: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org From: Palmer Dabbelt To: Linus Torvalds Message-ID: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250224_094700_126479_C331CC11 X-CRM114-Status: GOOD ( 13.79 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org The following changes since commit 2014c95afecee3e76ca4a56956a936e23283f05b: Linux 6.14-rc1 (2025-02-02 15:39:26 -0800) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git tags/riscv-for-linus-6.14-rc5 for you to fetch changes up to 245aece3750d3692ae7a44516c1096936bded7ab: MAINTAINERS: Add myself as a riscv reviewer (2025-02-14 13:06:55 -0800) ---------------------------------------------------------------- RISC-V Fixes for 6.14-rc5 * A fix for cacheinfo DT probing to avoid reading non-boolean properties as booleans. * A fix for cpufeature to use bitmap_equal() instead of memcmp(), so unused bits are ignored. * Fixes for cmpxchg and futex cmpxchg that properly encode the sign extension requirements on inline asm, which results in spurious successes. This manifests in at least inode_set_ctime_current, but is likely just a disaster waiting to happen. * A fix for the rseq selftests, which was using an invalid constraint. * A pair of fixes for signal frame size handling: * We were reserving space for an extra empty extension context header on systems with extended signal context, thus resulting in unnecessarily large allocations. * We weren't properly checking for available extensions before calculating the signal stack size, which resulted in undersized stack allocations on some systems (at least those with T-Head custom vectors). Also, we've added Alex as a reviewer. He's been helping out a ton lately, thanks! ---------------------------------------------------------------- I've been sending PRs on Friday mornings, but these days the week seems to just run away from me. That happened the last two weeks and I've been meaning to try Monday mornings for a while now, so I figured I'll just give it a shot. Aside from that these all look fine to me: they build/boot like normal, aside from a spurious Sparse warning in the cmpxchg code. That might be worth working around, but doesn't seem like it's worth delaying a fix for a nasty bug on it. ---------------------------------------------------------------- Alexandre Ghiti (1): MAINTAINERS: Add myself as a riscv reviewer Andreas Schwab (2): riscv/atomic: Do proper sign extension also for unsigned in arch_cmpxchg riscv/futex: sign extend compare value in atomic cmpxchg Clément Léger (1): riscv: cpufeature: use bitmap_equal() instead of memcmp() Rob Herring (1): riscv: cacheinfo: Use of_property_present() for non-boolean properties Stafford Horne (1): rseq/selftests: Fix riscv rseq_offset_deref_addv inline asm Yong-Xuan Wang (2): riscv: signal: fix signal frame size riscv: signal: fix signal_minsigstksz MAINTAINERS | 1 + arch/riscv/include/asm/cmpxchg.h | 2 +- arch/riscv/include/asm/futex.h | 2 +- arch/riscv/kernel/cacheinfo.c | 12 ++++++------ arch/riscv/kernel/cpufeature.c | 2 +- arch/riscv/kernel/setup.c | 2 +- arch/riscv/kernel/signal.c | 6 ------ tools/testing/selftests/rseq/rseq-riscv-bits.h | 6 +++--- tools/testing/selftests/rseq/rseq-riscv.h | 2 +- 9 files changed, 15 insertions(+), 20 deletions(-)