From patchwork Tue Feb 25 07:33:51 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arun R Murthy X-Patchwork-Id: 13989407 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 10948C021BE for ; Tue, 25 Feb 2025 07:48:34 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7250B10E592; Tue, 25 Feb 2025 07:48:33 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="FfYPbrrv"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) by gabe.freedesktop.org (Postfix) with ESMTPS id E953610E591; Tue, 25 Feb 2025 07:48:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1740469713; x=1772005713; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=0WgbfTEwrZrdSlEBXZfv66GlzTA72Kz8ADpsq1JTsy8=; b=FfYPbrrvmbErCaFfef0qJ0mwZQDZZHMgXai4wo3H4izO5Da0UowImhyR Mk6jkWsPAoQ9NxL2wD4WSEIYshC5g1Jv6qtjt4NHbHOMXmArubCxzRU41 FOsffyeoCffy8PB7R/Ap3FvHMMQhhngS4zwLNMmqqT8kFBFcbMTD3UT6N 6updC3iMfjhWiNOR8ndw71K1YMfPaOeECris1NMjjYZxCjonJ5MCHZIF1 WtMIU1+eFd5C0dHAPp1B+ZF09Ejm5rXDR+JWXJR1a1741ahNs6D9Bu7rv 3QryNFlSXd0VmUpEJbZWXbOEY4ld1JzlnUu69q52yBuSqjzfz3tMiz9iw g==; X-CSE-ConnectionGUID: Qkl4ljpjQl6hryZXhvK3MQ== X-CSE-MsgGUID: 6AHYRAujQmS9BwgAB21hOA== X-IronPort-AV: E=McAfee;i="6700,10204,11355"; a="63726915" X-IronPort-AV: E=Sophos;i="6.13,313,1732608000"; d="scan'208";a="63726915" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Feb 2025 23:48:32 -0800 X-CSE-ConnectionGUID: Nfrpb2cGRuumPdAVLUELHQ== X-CSE-MsgGUID: JLa76mt6TBSPtmyftwmyeA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,313,1732608000"; d="scan'208";a="116330857" Received: from srr4-3-linux-106-armuthy.iind.intel.com ([10.190.238.56]) by fmviesa007.fm.intel.com with ESMTP; 24 Feb 2025 23:48:30 -0800 From: Arun R Murthy Date: Tue, 25 Feb 2025 13:03:51 +0530 Subject: [PATCH v7 1/3] drm/plane: Add new plane property IN_FORMATS_ASYNC MIME-Version: 1.0 Message-Id: <20250225-asyn-v7-1-20b81122f4ce@intel.com> References: <20250225-asyn-v7-0-20b81122f4ce@intel.com> In-Reply-To: <20250225-asyn-v7-0-20b81122f4ce@intel.com> To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org, ville.syrjala@linux.intel.com Cc: Arun R Murthy , Chaitanya Kumar Borah , Naveen Kumar X-Mailer: b4 0.15-dev X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" There exists a property IN_FORMATS which exposes the plane supported modifiers/formats to the user. In some platforms when asynchronous flip are used all of modifiers/formats mentioned in IN_FORMATS are not supported. This patch adds a new plane property IN_FORMATS_ASYNC to expose the async flip supported modifiers/formats so that user can use this information ahead and do flip with unsupported formats/modifiers. This will save flip failures. Add a new function pointer similar to format_mod_supported specifically for asynchronous flip. v2: Remove async variable from drm_plane (Ville) v3: Add new function pointer for async (Ville) v5: Typo corrected in commit message & some correction in the kernel documentation. (Chaitanya) v7: Place IN_FORMATS_ASYNC next to IN_FORMATS (Ville) Signed-off-by: Arun R Murthy Reviewed-by: Chaitanya Kumar Borah Tested-by: Naveen Kumar --- drivers/gpu/drm/drm_mode_config.c | 7 +++++++ drivers/gpu/drm/drm_plane.c | 8 ++++++++ include/drm/drm_mode_config.h | 6 ++++++ include/drm/drm_plane.h | 17 +++++++++++++++++ 4 files changed, 38 insertions(+) diff --git a/drivers/gpu/drm/drm_mode_config.c b/drivers/gpu/drm/drm_mode_config.c index 8642a2fb25a90116dab975aa0ab6b51deafb4b96..b4239fd04e9da4d4b5cfccdef1d3dde9556f322d 100644 --- a/drivers/gpu/drm/drm_mode_config.c +++ b/drivers/gpu/drm/drm_mode_config.c @@ -381,6 +381,13 @@ static int drm_mode_create_standard_properties(struct drm_device *dev) return -ENOMEM; dev->mode_config.modifiers_property = prop; + prop = drm_property_create(dev, + DRM_MODE_PROP_IMMUTABLE | DRM_MODE_PROP_BLOB, + "IN_FORMATS_ASYNC", 0); + if (!prop) + return -ENOMEM; + dev->mode_config.async_modifiers_property = prop; + prop = drm_property_create(dev, DRM_MODE_PROP_IMMUTABLE | DRM_MODE_PROP_BLOB, "SIZE_HINTS", 0); diff --git a/drivers/gpu/drm/drm_plane.c b/drivers/gpu/drm/drm_plane.c index a28b22fdd7a41aca82d097d42237851da9a0a79b..fe181c1002171acc68d3054c2d178f9b9f501fe2 100644 --- a/drivers/gpu/drm/drm_plane.c +++ b/drivers/gpu/drm/drm_plane.c @@ -141,6 +141,14 @@ * various bugs in this area with inconsistencies between the capability * flag and per-plane properties. * + * IN_FORMATS_ASYNC: + * Blob property which contains the set of buffer format and modifier + * pairs supported by this plane for asynchronous flips. The blob is a struct + * drm_format_modifier_blob. Userspace cannot change this property. This is an + * optional property and if not present then user should expect a failure in + * atomic ioctl when the modifier/format is not supported by that plane under + * asynchronous flip. + * * SIZE_HINTS: * Blob property which contains the set of recommended plane size * which can used for simple "cursor like" use cases (eg. no scaling). diff --git a/include/drm/drm_mode_config.h b/include/drm/drm_mode_config.h index 271765e2e9f2da62aaf0d258828ef4196e14822e..0c116d6dfd277262b1a4c0f097fce2d719f43844 100644 --- a/include/drm/drm_mode_config.h +++ b/include/drm/drm_mode_config.h @@ -936,6 +936,12 @@ struct drm_mode_config { */ struct drm_property *modifiers_property; + /** + * @async_modifiers_property: Plane property to list support modifier/format + * combination for asynchronous flips. + */ + struct drm_property *async_modifiers_property; + /** * @size_hints_property: Plane SIZE_HINTS property. */ diff --git a/include/drm/drm_plane.h b/include/drm/drm_plane.h index dd718c62ac31bf16606f3ee9f025a5b171cd1e67..4393a0e9edf91ccfd78ef62b168b9313187c1a81 100644 --- a/include/drm/drm_plane.h +++ b/include/drm/drm_plane.h @@ -549,6 +549,23 @@ struct drm_plane_funcs { */ bool (*format_mod_supported)(struct drm_plane *plane, uint32_t format, uint64_t modifier); + /** + * @format_mod_supported_async: + * + * This optional hook is used for the DRM to determine if for + * asynchronous flip the given format/modifier combination is valid for + * the plane. This allows the DRM to generate the correct format + * bitmask (which formats apply to which modifier), and to validate + * modifiers at atomic_check time. + * + * Returns: + * + * True if the given modifier is valid for that format on the plane. + * False otherwise. + */ + bool (*format_mod_supported_async)(struct drm_plane *plane, + uint32_t format, uint64_t modifier); + }; /** From patchwork Tue Feb 25 07:33:52 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arun R Murthy X-Patchwork-Id: 13989408 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 93204C021B8 for ; Tue, 25 Feb 2025 07:48:37 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 79EA810E596; Tue, 25 Feb 2025 07:48:36 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="EitktdbI"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) by gabe.freedesktop.org (Postfix) with ESMTPS id 3F86D10E596; Tue, 25 Feb 2025 07:48:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1740469715; x=1772005715; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=WYJNQVGGJ25Mc/mIlnFnQbjwv/k3xZBqc0F2Iki1nLI=; b=EitktdbIlbKV3Ma/WTV+bkpPrI8sONsHzoVpr+sPoCiZi4Jq21TcnTqS SMEXwtcJtlLpUFms9sdBbBdZzwe6PjbEh3LVsKaW8dvgTgXy2bRSrqXcv NHhtiPRkdVGtIcebsNYr/KYmS1DH11VLkdrQBXayJCN5VAyazEWNRcYiS GGHAJ0sz1oEAv2Vtg55CQKvZmNhT3uj2LXXJ/0OXaT6qyg9/dGPXeh01Y I6zLfTAzFGWVvskQPMpoFLWCxGHRoC1KylPNMtfvGkzdOHyXilXZZCkDp MqVoImylZIpGvl605L5WihjSQOap3AVcAFtMdKQfFpQSezXpCeL6iHJ53 w==; X-CSE-ConnectionGUID: Nmy+Yz1TRBiiaJH9fzocLQ== X-CSE-MsgGUID: OdVvZdm0TuqpFfoPZybvow== X-IronPort-AV: E=McAfee;i="6700,10204,11355"; a="63726916" X-IronPort-AV: E=Sophos;i="6.13,313,1732608000"; d="scan'208";a="63726916" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Feb 2025 23:48:35 -0800 X-CSE-ConnectionGUID: 3+olT39nTUOAccTpZRyb4A== X-CSE-MsgGUID: Bvi4J2aaSHSRP7A9U/mErg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,313,1732608000"; d="scan'208";a="116330871" Received: from srr4-3-linux-106-armuthy.iind.intel.com ([10.190.238.56]) by fmviesa007.fm.intel.com with ESMTP; 24 Feb 2025 23:48:33 -0800 From: Arun R Murthy Date: Tue, 25 Feb 2025 13:03:52 +0530 Subject: [PATCH v7 2/3] drm/plane: modify create_in_formats to accommodate async MIME-Version: 1.0 Message-Id: <20250225-asyn-v7-2-20b81122f4ce@intel.com> References: <20250225-asyn-v7-0-20b81122f4ce@intel.com> In-Reply-To: <20250225-asyn-v7-0-20b81122f4ce@intel.com> To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org, ville.syrjala@linux.intel.com Cc: Arun R Murthy , Naveen Kumar X-Mailer: b4 0.15-dev X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" create_in_formats creates the list of supported format/modifiers for synchronous flips, modify the same function so as to take the format_mod_supported as argument and create list of format/modifier for async as well. v5: create_in_formats can return -ve value in failure case, correct the if condition to check the creation of blob Dont add the modifier for which none of the formats is not supported. v6: Remove the code for masking the unsupported modifiers as UMD can leave with it. (Naveen/Chaitanya) v7: Retain the unsupported modifiers, userspace should have no impact, return pointer to blob instead of blob_id(Ville) Signed-off-by: Arun R Murthy Tested-by: Naveen Kumar --- drivers/gpu/drm/drm_plane.c | 41 +++++++++++++++++++++++++++++------------ 1 file changed, 29 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/drm_plane.c b/drivers/gpu/drm/drm_plane.c index fe181c1002171acc68d3054c2d178f9b9f501fe2..97a387a966622f4b53b0452279617cb27b42f7b2 100644 --- a/drivers/gpu/drm/drm_plane.c +++ b/drivers/gpu/drm/drm_plane.c @@ -193,9 +193,12 @@ modifiers_ptr(struct drm_format_modifier_blob *blob) return (struct drm_format_modifier *)(((char *)blob) + blob->modifiers_offset); } -static int create_in_format_blob(struct drm_device *dev, struct drm_plane *plane) +static struct drm_property_blob *create_in_format_blob(struct drm_device *dev, + struct drm_plane *plane, + bool (*format_mod_supported)(struct drm_plane *plane, + u32 format, + u64 modifier)) { - const struct drm_mode_config *config = &dev->mode_config; struct drm_property_blob *blob; struct drm_format_modifier *mod; size_t blob_size, formats_size, modifiers_size; @@ -237,10 +240,10 @@ static int create_in_format_blob(struct drm_device *dev, struct drm_plane *plane mod = modifiers_ptr(blob_data); for (i = 0; i < plane->modifier_count; i++) { for (j = 0; j < plane->format_count; j++) { - if (!plane->funcs->format_mod_supported || - plane->funcs->format_mod_supported(plane, - plane->format_types[j], - plane->modifiers[i])) { + if (!format_mod_supported || + format_mod_supported(plane, + plane->format_types[j], + plane->modifiers[i])) { mod->formats |= 1ULL << j; } } @@ -251,10 +254,7 @@ static int create_in_format_blob(struct drm_device *dev, struct drm_plane *plane mod++; } - drm_object_attach_property(&plane->base, config->modifiers_property, - blob->base.id); - - return 0; + return blob; } /** @@ -366,6 +366,7 @@ static int __drm_universal_plane_init(struct drm_device *dev, const char *name, va_list ap) { struct drm_mode_config *config = &dev->mode_config; + struct drm_property_blob *blob; static const uint64_t default_modifiers[] = { DRM_FORMAT_MOD_LINEAR, }; @@ -477,8 +478,24 @@ static int __drm_universal_plane_init(struct drm_device *dev, drm_plane_create_hotspot_properties(plane); } - if (format_modifier_count) - create_in_format_blob(dev, plane); + if (format_modifier_count) { + blob = create_in_format_blob(dev, plane, + plane->funcs->format_mod_supported); + if (!IS_ERR(blob)) + drm_object_attach_property(&plane->base, + config->modifiers_property, + blob->base.id); + } + + if (plane->funcs->format_mod_supported_async) { + blob = create_in_format_blob(dev, plane, + plane->funcs->format_mod_supported_async); + if (!IS_ERR(blob)) + drm_object_attach_property(&plane->base, + config->async_modifiers_property, + blob->base.id); + } + return 0; } From patchwork Tue Feb 25 07:33:53 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arun R Murthy X-Patchwork-Id: 13989409 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DB48EC021BC for ; Tue, 25 Feb 2025 07:48:40 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 850CC10E599; Tue, 25 Feb 2025 07:48:39 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="OJoQ7m8U"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) by gabe.freedesktop.org (Postfix) with ESMTPS id B095510E599; Tue, 25 Feb 2025 07:48:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1740469719; x=1772005719; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=IN5jsbe1MEnXVAgOBGgxeyNBVXSCyxGak3TqxJpBphE=; b=OJoQ7m8U9du835RS7q3jFW83XEBZUwfi0Z5hYT4EL+Epgqlns0jOOJ89 ngshyd71wvKzvVcGM9Vz71NPzOnqHQgstAV0sXCdslhzSo9CltHqmtTK4 67henBY8h5JCEBN9tNSBbcTnJ7JpoXZjKklHcImD8VFG8EoLcW3Z/lXH5 yfDlap7OmpoeZOweKB8RsEKMSzgsukqc/wbsEuWvB88Zq8hIYTDi/a5LJ 3OVId9vEdKjPQ2ukiNbFfEov8HUSrzSsQzmLYO00IMZmQWxB39xptiyBI /uDFYmH2JZ1OtK2vmdyi4sV797dGsvwV42HTJo+OGo0EMBzw0PJk1iRNi Q==; X-CSE-ConnectionGUID: GswgPWFYSPGN78uEipsrgA== X-CSE-MsgGUID: 1xfWPbwyQjOa9GyyKe0AEQ== X-IronPort-AV: E=McAfee;i="6700,10204,11355"; a="63726921" X-IronPort-AV: E=Sophos;i="6.13,313,1732608000"; d="scan'208";a="63726921" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Feb 2025 23:48:38 -0800 X-CSE-ConnectionGUID: 5DWWgmN+QDaAJfa6TFUDgQ== X-CSE-MsgGUID: kqzWqlCnRH6qc6X5NyR3BA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,313,1732608000"; d="scan'208";a="116330881" Received: from srr4-3-linux-106-armuthy.iind.intel.com ([10.190.238.56]) by fmviesa007.fm.intel.com with ESMTP; 24 Feb 2025 23:48:35 -0800 From: Arun R Murthy Date: Tue, 25 Feb 2025 13:03:53 +0530 Subject: [PATCH v7 3/3] drm/i915/display: Add i915 hook for format_mod_supported_async MIME-Version: 1.0 Message-Id: <20250225-asyn-v7-3-20b81122f4ce@intel.com> References: <20250225-asyn-v7-0-20b81122f4ce@intel.com> In-Reply-To: <20250225-asyn-v7-0-20b81122f4ce@intel.com> To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org, ville.syrjala@linux.intel.com Cc: Arun R Murthy , Chaitanya Kumar Borah , Sebastian Brzezinka , Naveen Kumar X-Mailer: b4 0.15-dev X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Hook up the newly added plane function pointer format_mod_supported_async to populate the modifiers/formats supported by asynchronous flips. v5: Correct the if condition for modifier support check (Chaitanya) v6: Replace uint32_t/uint64_t with u32/u64 (Jani) v7: Move plannar check from intel_async_flip_check_hw() to intel_plane_format_mod_supported_async() (Ville) Signed-off-by: Arun R Murthy Reviewed-by: Chaitanya Kumar Borah Reviewed-by: Sebastian Brzezinka Tested-by: Naveen Kumar --- drivers/gpu/drm/i915/display/i9xx_plane.c | 6 +++-- drivers/gpu/drm/i915/display/intel_atomic_plane.c | 30 +++++++++++++++++++++- drivers/gpu/drm/i915/display/intel_atomic_plane.h | 6 ++++- drivers/gpu/drm/i915/display/intel_display.c | 11 ++------ drivers/gpu/drm/i915/display/skl_universal_plane.c | 5 +++- 5 files changed, 44 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/i915/display/i9xx_plane.c b/drivers/gpu/drm/i915/display/i9xx_plane.c index 013295f66d56ec5e919b3a0c904034bf7985986a..6bd09adb8a30ba002ef334261d7638f398587a3e 100644 --- a/drivers/gpu/drm/i915/display/i9xx_plane.c +++ b/drivers/gpu/drm/i915/display/i9xx_plane.c @@ -820,7 +820,7 @@ unsigned int vlv_plane_min_alignment(struct intel_plane *plane, { struct intel_display *display = to_intel_display(plane); - if (intel_plane_can_async_flip(plane, fb->modifier)) + if (intel_plane_can_async_flip(plane, fb->format->format, fb->modifier)) return 256 * 1024; /* FIXME undocumented so not sure what's actually needed */ @@ -844,7 +844,7 @@ static unsigned int g4x_primary_min_alignment(struct intel_plane *plane, { struct intel_display *display = to_intel_display(plane); - if (intel_plane_can_async_flip(plane, fb->modifier)) + if (intel_plane_can_async_flip(plane, fb->format->format, fb->modifier)) return 256 * 1024; if (intel_scanout_needs_vtd_wa(display)) @@ -889,6 +889,7 @@ static const struct drm_plane_funcs i965_plane_funcs = { .atomic_duplicate_state = intel_plane_duplicate_state, .atomic_destroy_state = intel_plane_destroy_state, .format_mod_supported = i965_plane_format_mod_supported, + .format_mod_supported_async = intel_plane_format_mod_supported_async, }; static const struct drm_plane_funcs i8xx_plane_funcs = { @@ -898,6 +899,7 @@ static const struct drm_plane_funcs i8xx_plane_funcs = { .atomic_duplicate_state = intel_plane_duplicate_state, .atomic_destroy_state = intel_plane_destroy_state, .format_mod_supported = i8xx_plane_format_mod_supported, + .format_mod_supported_async = intel_plane_format_mod_supported_async, }; struct intel_plane * diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c index 124cd9ddba0b96657a8166e613b93003e77e133c..4ebc40c914b72b8fe3118edb74d9bf95ab661b13 100644 --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c @@ -170,11 +170,39 @@ bool intel_plane_needs_physical(struct intel_plane *plane) DISPLAY_INFO(i915)->cursor_needs_physical; } -bool intel_plane_can_async_flip(struct intel_plane *plane, u64 modifier) +bool intel_plane_can_async_flip(struct intel_plane *plane, u32 format, + u64 modifier) { + struct intel_display *display = to_intel_display(plane); + + if (DISPLAY_VER(display) <= 14 ? + drm_format_info(format)->is_yuv : + intel_format_info_is_yuv_semiplanar(drm_format_info(format), + modifier)) { + drm_dbg_kms(plane->base.dev, + "[PLANE:%d:%s] Planar formats do not support async flips\n", + plane->base.base.id, plane->base.name); + return false; + } + return plane->can_async_flip && plane->can_async_flip(modifier); } +bool intel_plane_format_mod_supported_async(struct drm_plane *plane, + u32 format, + u64 modifier) +{ + if (!plane->funcs->format_mod_supported(plane, format, modifier)) { + drm_dbg_kms(plane->dev, + "[PLANE:%d:%s] Planar format/modifier not in universal list\n", + plane->base.id, plane->name); + return false; + } + + return intel_plane_can_async_flip(to_intel_plane(plane), + format, modifier); +} + unsigned int intel_adjusted_rate(const struct drm_rect *src, const struct drm_rect *dst, unsigned int rate) diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.h b/drivers/gpu/drm/i915/display/intel_atomic_plane.h index 65edd88d28a9c532d6347fbd13b0f45698e9e5bb..0d1700bd5c6d7b1b3e4e7e6be760b548493d6846 100644 --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.h +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.h @@ -21,7 +21,8 @@ enum plane_id; struct intel_plane * intel_crtc_get_plane(struct intel_crtc *crtc, enum plane_id plane_id); -bool intel_plane_can_async_flip(struct intel_plane *plane, u64 modifier); +bool intel_plane_can_async_flip(struct intel_plane *plane, u32 format, + u64 modifier); unsigned int intel_adjusted_rate(const struct drm_rect *src, const struct drm_rect *dst, unsigned int rate); @@ -87,5 +88,8 @@ void intel_plane_init_cursor_vblank_work(struct intel_plane_state *old_plane_sta int intel_atomic_add_affected_planes(struct intel_atomic_state *state, struct intel_crtc *crtc); int intel_atomic_check_planes(struct intel_atomic_state *state); +bool intel_plane_format_mod_supported_async(struct drm_plane *plane, + u32 format, + u64 modifier); #endif /* __INTEL_ATOMIC_PLANE_H__ */ diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 065fdf6dbb88e3c4ac990b38e7f1575e0c9ca413..c9abe1412aef12d0eda17110431a57a06f3f5d20 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -6188,7 +6188,8 @@ static int intel_async_flip_check_hw(struct intel_atomic_state *state, struct in if (!plane->async_flip) continue; - if (!intel_plane_can_async_flip(plane, new_plane_state->hw.fb->modifier)) { + if (!intel_plane_can_async_flip(plane, new_plane_state->hw.fb->format->format, + new_plane_state->hw.fb->modifier)) { drm_dbg_kms(&i915->drm, "[PLANE:%d:%s] Modifier 0x%llx does not support async flip\n", plane->base.base.id, plane->base.name, @@ -6196,14 +6197,6 @@ static int intel_async_flip_check_hw(struct intel_atomic_state *state, struct in return -EINVAL; } - if (intel_format_info_is_yuv_semiplanar(new_plane_state->hw.fb->format, - new_plane_state->hw.fb->modifier)) { - drm_dbg_kms(&i915->drm, - "[PLANE:%d:%s] Planar formats do not support async flips\n", - plane->base.base.id, plane->base.name); - return -EINVAL; - } - /* * We turn the first async flip request into a sync flip * so that we can reconfigure the plane (eg. change modifier). diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c index cd9762947f1de227a3abbcd61b7c7b0c9848e439..1b0cafe9b158c24e74bf46222ac23d2c933555a5 100644 --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c @@ -601,7 +601,7 @@ static u32 tgl_plane_min_alignment(struct intel_plane *plane, * Figure out what's going on here... */ if (display->platform.alderlake_p && - intel_plane_can_async_flip(plane, fb->modifier)) + intel_plane_can_async_flip(plane, fb->format->format, fb->modifier)) return mult * 16 * 1024; switch (fb->modifier) { @@ -2623,6 +2623,7 @@ static const struct drm_plane_funcs skl_plane_funcs = { .atomic_duplicate_state = intel_plane_duplicate_state, .atomic_destroy_state = intel_plane_destroy_state, .format_mod_supported = skl_plane_format_mod_supported, + .format_mod_supported_async = intel_plane_format_mod_supported_async, }; static const struct drm_plane_funcs icl_plane_funcs = { @@ -2632,6 +2633,7 @@ static const struct drm_plane_funcs icl_plane_funcs = { .atomic_duplicate_state = intel_plane_duplicate_state, .atomic_destroy_state = intel_plane_destroy_state, .format_mod_supported = icl_plane_format_mod_supported, + .format_mod_supported_async = intel_plane_format_mod_supported_async, }; static const struct drm_plane_funcs tgl_plane_funcs = { @@ -2641,6 +2643,7 @@ static const struct drm_plane_funcs tgl_plane_funcs = { .atomic_duplicate_state = intel_plane_duplicate_state, .atomic_destroy_state = intel_plane_destroy_state, .format_mod_supported = tgl_plane_format_mod_supported, + .format_mod_supported_async = intel_plane_format_mod_supported_async, }; static void