From patchwork Tue Feb 25 14:33:47 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Patchwork-Id: 13990256 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 62E5BC021BE for ; Tue, 25 Feb 2025 16:41:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References :Message-Id:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date: From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=qWLlnni9ZV/38ejF8LSw3DF7K5lyDl0Bbk3JQASeHmQ=; b=2UJXtsRdpWqCPDEPr/UqBbp1XX 4XsYkrvZ89M14n1+RfdkJOgClJnFiNaf1IwWOrsPovB3tkEBmOv0fvx/z8n/4VPJBQyOmCdM1fpV0 bx9MVXFxF5AU21ztvbUMd8qmsUpYEU6bc6e1FRr/2WeNI9V1R7Kj4QhlrmMv/Jjl35ZqyRTVIaMYE Zjxf8I4lxrhhGmI8nCF/WViGjL1llhTtRsoDniWUYIcb26Ata1DRiWLmYn5+u6KFmATRWihwqKVQh GttTOb50JkuLIzvml9ilJcTyqyvoOVYImsnxu2T4SJuEs6gbLlg9wPSoHGMHDuzxZRbyArMP/2IYe ZOCZfsfg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tmxzI-00000000J6s-3KJm; Tue, 25 Feb 2025 16:40:52 +0000 Received: from bali.collaboradmins.com ([2a01:4f8:201:9162::2]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tmw1b-0000000HXit-18ro; Tue, 25 Feb 2025 14:35:08 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1740494105; bh=VOTlkRaTJUxVymB+VRML2zW6NSmIQJd6XGkId1VraY4=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=J8iN9rn7M9ODiSRDL1LE/Bf8VoJqyJSSl8XDO7lkOrw2THUkCmMpfLkLfqFtEjvSz HekKyWTk0Z1lN/gKHVh9L+NGuv5aMpMeeUkiVYorIqjpaBreR1inM0HqhdhekbcDwy SegcVs3yAE0OaPzqApBUTdkxJqtzM/5VDTvAjLTrp5lgdYM902VUAgcgE7B3gqJBIm wvBxsKJK8EsPRxDdoapjfqlDrGJD4hDl1Uw1hpfa0kpO77cMWFX52tkhyEwZhyKoh6 KqpEyE0UEaTrq0C0vr2/iqTfAOCeAs3pypscEvmdQQbQcXFgYl7o5sA+u7ONu3impj QsewR5a44WNfg== Received: from [192.168.0.47] (unknown [IPv6:2804:14c:1a9:53ee::1004]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: nfraprado) by bali.collaboradmins.com (Postfix) with ESMTPSA id D16AA17E0DD7; Tue, 25 Feb 2025 15:35:01 +0100 (CET) From: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= Date: Tue, 25 Feb 2025 11:33:47 -0300 Subject: [PATCH v2 1/8] ASoC: mediatek: mt8188: Add audsys hires clocks MIME-Version: 1.0 Message-Id: <20250225-genio700-dmic-v2-1-3076f5b50ef7@collabora.com> References: <20250225-genio700-dmic-v2-0-3076f5b50ef7@collabora.com> In-Reply-To: <20250225-genio700-dmic-v2-0-3076f5b50ef7@collabora.com> To: Liam Girdwood , Mark Brown , Jaroslav Kysela , Takashi Iwai , Matthias Brugger , AngeloGioacchino Del Regno , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Trevor Wu Cc: kernel@collabora.com, linux-sound@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Mailer: b4 0.14.2 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250225_063507_454636_0B78EB3F X-CRM114-Status: UNSURE ( 8.04 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Describe and register the aud_dmic_hires audsys clocks, which are needed when recording the DMIC at a sample rate of 96k. Signed-off-by: Nícolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno --- sound/soc/mediatek/mt8188/mt8188-audsys-clk.c | 4 ++++ sound/soc/mediatek/mt8188/mt8188-audsys-clkid.h | 4 ++++ 2 files changed, 8 insertions(+) diff --git a/sound/soc/mediatek/mt8188/mt8188-audsys-clk.c b/sound/soc/mediatek/mt8188/mt8188-audsys-clk.c index c796ad8b62eeaa929f24c09755f428116b105404..40d2ab0a7677b64985f9fc9eb38f67bca7ecd4f9 100644 --- a/sound/soc/mediatek/mt8188/mt8188-audsys-clk.c +++ b/sound/soc/mediatek/mt8188/mt8188-audsys-clk.c @@ -84,6 +84,10 @@ static const struct afe_gate aud_clks[CLK_AUD_NR_CLK] = { GATE_AUD1(CLK_AUD_AFE_26M_DMIC_TM, "aud_afe_26m_dmic_tm", "top_a1sys_hp", 14), GATE_AUD1(CLK_AUD_UL_TML_HIRES, "aud_ul_tml_hires", "top_audio_h", 16), GATE_AUD1(CLK_AUD_ADC_HIRES, "aud_adc_hires", "top_audio_h", 17), + GATE_AUD1(CLK_AUD_DMIC_HIRES1, "aud_dmic_hires1", "top_audio_h", 20), + GATE_AUD1(CLK_AUD_DMIC_HIRES2, "aud_dmic_hires2", "top_audio_h", 21), + GATE_AUD1(CLK_AUD_DMIC_HIRES3, "aud_dmic_hires3", "top_audio_h", 22), + GATE_AUD1(CLK_AUD_DMIC_HIRES4, "aud_dmic_hires4", "top_audio_h", 23), /* AUD3 */ GATE_AUD3(CLK_AUD_LINEIN_TUNER, "aud_linein_tuner", "top_apll5", 5), diff --git a/sound/soc/mediatek/mt8188/mt8188-audsys-clkid.h b/sound/soc/mediatek/mt8188/mt8188-audsys-clkid.h index 6f34ffc760e03beddc3001046e554edd7ea2c478..9cb732863c104383b9859b4bb5b3f5c289ad1864 100644 --- a/sound/soc/mediatek/mt8188/mt8188-audsys-clkid.h +++ b/sound/soc/mediatek/mt8188/mt8188-audsys-clkid.h @@ -33,6 +33,10 @@ enum{ CLK_AUD_AFE_26M_DMIC_TM, CLK_AUD_UL_TML_HIRES, CLK_AUD_ADC_HIRES, + CLK_AUD_DMIC_HIRES1, + CLK_AUD_DMIC_HIRES2, + CLK_AUD_DMIC_HIRES3, + CLK_AUD_DMIC_HIRES4, CLK_AUD_LINEIN_TUNER, CLK_AUD_EARC_TUNER, CLK_AUD_I2SIN, From patchwork Tue Feb 25 14:33:48 2025 Content-Type: text/plain; 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Tue, 25 Feb 2025 15:35:05 +0100 (CET) From: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= Date: Tue, 25 Feb 2025 11:33:48 -0300 Subject: [PATCH v2 2/8] ASoC: mediatek: mt8188: Add reference for dmic clocks MIME-Version: 1.0 Message-Id: <20250225-genio700-dmic-v2-2-3076f5b50ef7@collabora.com> References: <20250225-genio700-dmic-v2-0-3076f5b50ef7@collabora.com> In-Reply-To: <20250225-genio700-dmic-v2-0-3076f5b50ef7@collabora.com> To: Liam Girdwood , Mark Brown , Jaroslav Kysela , Takashi Iwai , Matthias Brugger , AngeloGioacchino Del Regno , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Trevor Wu Cc: kernel@collabora.com, linux-sound@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Mailer: b4 0.14.2 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250225_063511_526866_8DFFFDBC X-CRM114-Status: UNSURE ( 9.18 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add the names for the dmic clocks, aud_afe_dmic* and aud_dmic_hires*, so they can be acquired and enabled by the platform driver. Signed-off-by: Nícolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno --- sound/soc/mediatek/mt8188/mt8188-afe-clk.c | 8 ++++++++ sound/soc/mediatek/mt8188/mt8188-afe-clk.h | 8 ++++++++ 2 files changed, 16 insertions(+) diff --git a/sound/soc/mediatek/mt8188/mt8188-afe-clk.c b/sound/soc/mediatek/mt8188/mt8188-afe-clk.c index e69c1bb2cb239596dee50b166c20192d5408be10..7f411b857782375ba16702543295a5ae4b774f47 100644 --- a/sound/soc/mediatek/mt8188/mt8188-afe-clk.c +++ b/sound/soc/mediatek/mt8188/mt8188-afe-clk.c @@ -58,7 +58,15 @@ static const char *aud_clks[MT8188_CLK_NUM] = { [MT8188_CLK_AUD_ADC] = "aud_adc", [MT8188_CLK_AUD_DAC_HIRES] = "aud_dac_hires", [MT8188_CLK_AUD_A1SYS_HP] = "aud_a1sys_hp", + [MT8188_CLK_AUD_AFE_DMIC1] = "aud_afe_dmic1", + [MT8188_CLK_AUD_AFE_DMIC2] = "aud_afe_dmic2", + [MT8188_CLK_AUD_AFE_DMIC3] = "aud_afe_dmic3", + [MT8188_CLK_AUD_AFE_DMIC4] = "aud_afe_dmic4", [MT8188_CLK_AUD_ADC_HIRES] = "aud_adc_hires", + [MT8188_CLK_AUD_DMIC_HIRES1] = "aud_dmic_hires1", + [MT8188_CLK_AUD_DMIC_HIRES2] = "aud_dmic_hires2", + [MT8188_CLK_AUD_DMIC_HIRES3] = "aud_dmic_hires3", + [MT8188_CLK_AUD_DMIC_HIRES4] = "aud_dmic_hires4", [MT8188_CLK_AUD_I2SIN] = "aud_i2sin", [MT8188_CLK_AUD_TDM_IN] = "aud_tdm_in", [MT8188_CLK_AUD_I2S_OUT] = "aud_i2s_out", diff --git a/sound/soc/mediatek/mt8188/mt8188-afe-clk.h b/sound/soc/mediatek/mt8188/mt8188-afe-clk.h index ec53c171c170a8b4b47900e63ef79d53641e9b12..c6c78d684f3ee11ce79f2fac45cc5f1abdc97147 100644 --- a/sound/soc/mediatek/mt8188/mt8188-afe-clk.h +++ b/sound/soc/mediatek/mt8188/mt8188-afe-clk.h @@ -54,7 +54,15 @@ enum { MT8188_CLK_AUD_ADC, MT8188_CLK_AUD_DAC_HIRES, MT8188_CLK_AUD_A1SYS_HP, + MT8188_CLK_AUD_AFE_DMIC1, + MT8188_CLK_AUD_AFE_DMIC2, + MT8188_CLK_AUD_AFE_DMIC3, + MT8188_CLK_AUD_AFE_DMIC4, MT8188_CLK_AUD_ADC_HIRES, + MT8188_CLK_AUD_DMIC_HIRES1, + MT8188_CLK_AUD_DMIC_HIRES2, + MT8188_CLK_AUD_DMIC_HIRES3, + MT8188_CLK_AUD_DMIC_HIRES4, MT8188_CLK_AUD_I2SIN, MT8188_CLK_AUD_TDM_IN, MT8188_CLK_AUD_I2S_OUT, From patchwork Tue Feb 25 14:33:49 2025 Content-Type: text/plain; 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Tue, 25 Feb 2025 15:35:10 +0100 (CET) From: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= Date: Tue, 25 Feb 2025 11:33:49 -0300 Subject: [PATCH v2 3/8] ASoC: mediatek: mt8188: Treat DMIC_GAINx_CUR as non-volatile MIME-Version: 1.0 Message-Id: <20250225-genio700-dmic-v2-3-3076f5b50ef7@collabora.com> References: <20250225-genio700-dmic-v2-0-3076f5b50ef7@collabora.com> In-Reply-To: <20250225-genio700-dmic-v2-0-3076f5b50ef7@collabora.com> To: Liam Girdwood , Mark Brown , Jaroslav Kysela , Takashi Iwai , Matthias Brugger , AngeloGioacchino Del Regno , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Trevor Wu Cc: kernel@collabora.com, linux-sound@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Mailer: b4 0.14.2 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250225_063516_104541_21F37D66 X-CRM114-Status: GOOD ( 13.21 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The DMIC_GAINx_CUR registers contain the current (as in present) gain of each DMIC. During capture, this gain will ramp up until a target value is reached, and therefore the register is volatile since it is updated automatically by hardware. However, after capture the register's value returns to the value that was written to it. So reading these registers returns the current gain, and writing configures the initial gain for every capture. From an audio configuration perspective, reading the instantaneous gain is not really useful. Instead, reading back the initial gain that was configured is the desired behavior. For that reason, consider the DMIC_GAINx_CUR registers as non-volatile, so the regmap's cache can be used to retrieve the values, rather than requiring pm runtime resuming the device. Signed-off-by: Nícolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno --- sound/soc/mediatek/mt8188/mt8188-afe-pcm.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/sound/soc/mediatek/mt8188/mt8188-afe-pcm.c b/sound/soc/mediatek/mt8188/mt8188-afe-pcm.c index 73e5c63aeec8783905d656af225c42cd95069049..d36520c6272dd8c8302bc3f59da33f82f273f366 100644 --- a/sound/soc/mediatek/mt8188/mt8188-afe-pcm.c +++ b/sound/soc/mediatek/mt8188/mt8188-afe-pcm.c @@ -2855,10 +2855,6 @@ static bool mt8188_is_volatile_reg(struct device *dev, unsigned int reg) case AFE_DMIC3_SRC_DEBUG_MON0: case AFE_DMIC3_UL_SRC_MON0: case AFE_DMIC3_UL_SRC_MON1: - case DMIC_GAIN1_CUR: - case DMIC_GAIN2_CUR: - case DMIC_GAIN3_CUR: - case DMIC_GAIN4_CUR: case ETDM_IN1_MONITOR: case ETDM_IN2_MONITOR: case ETDM_OUT1_MONITOR: From patchwork Tue Feb 25 14:33:50 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Patchwork-Id: 13990261 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8773BC021BB for ; Tue, 25 Feb 2025 16:41:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References :Message-Id:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date: From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=UaWWsAA8IODMdk5jKt8+zYUudYBBg8bVo1a07Aa1iFU=; b=NFFBYLlXS4ZM7D2T14JTwbsas5 wgqR61YG28/SwOe1xu7mOSkTgAvZpHjhKqbIl9FVUV3r8v9LuChkgsIyp+dmvjBrtDBo+thOg/2Vp ivjMF5JamDyBeZSJNaVtDU4o2TeX4ffuiBKdqpfRjO/jI0CTEwFa51z96l4OD4jCaBU/2PuyqvvuP J3N0bQ1LcRo647+PoiQfyfu9qu0aWBcRk0iH+kI6pvsFCPSABJLIXLd0bdXANy1WZ+Staz0HmW9aJ p6sJM0mJajKex2lZRmDvVukWdATb6sLEWvtcA4zYZQb48b/+LwXqjA4EqktJEWQf8uK9JkPZegr2P VMeAUlQA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tmxzQ-00000000JHR-2Jcx; Tue, 25 Feb 2025 16:41:00 +0000 Received: from bali.collaboradmins.com ([148.251.105.195]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tmw1o-0000000HXlu-1qF0; Tue, 25 Feb 2025 14:35:22 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1740494119; bh=OiZiSyyZ7MKNxaXd9AwEz7Pn4Wq9TqoFSQi1iVVYsvw=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=m1kmohEL9k0eEQLfDY98oEsj6T/su08C8P/CPaBxgFFyAfzNpNl6MM8SgT4WN/so0 JV4MG9eAqM0pU6rSbzdmNLfFyGbuXYQza09rPclVja5xCOkv8quhUzfUJvqY/hqM1H K24rzejGD88St+Vn8cDbCJ5vamRlMIghZGatGrQG7AjJPnITQUI6Qxef9ct80p+ioo oEJRVhmSe8lMs+Puiw55CBxQRQRY4p+PgO5IkzCZL3Ou7gfp/u5RBLHBb9yT/5x2Qy d/WokmAZddiYTNckKmEZY8ulOeLQNUCNclFP5imHuCsJHqrd05LVzM4LtE8LKztf+S jrD2TDTgIn1LA== Received: from [192.168.0.47] (unknown [IPv6:2804:14c:1a9:53ee::1004]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: nfraprado) by bali.collaboradmins.com (Postfix) with ESMTPSA id 1078F17E0E91; Tue, 25 Feb 2025 15:35:14 +0100 (CET) From: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= Date: Tue, 25 Feb 2025 11:33:50 -0300 Subject: [PATCH v2 4/8] ASoC: mediatek: mt8188: Add support for DMIC MIME-Version: 1.0 Message-Id: <20250225-genio700-dmic-v2-4-3076f5b50ef7@collabora.com> References: <20250225-genio700-dmic-v2-0-3076f5b50ef7@collabora.com> In-Reply-To: <20250225-genio700-dmic-v2-0-3076f5b50ef7@collabora.com> To: Liam Girdwood , Mark Brown , Jaroslav Kysela , Takashi Iwai , Matthias Brugger , AngeloGioacchino Del Regno , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Trevor Wu Cc: kernel@collabora.com, linux-sound@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= , parkeryang X-Mailer: b4 0.14.2 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250225_063520_788150_109C88C6 X-CRM114-Status: GOOD ( 20.87 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: parkeryang Add support for the DMIC DAIs present on the MT8188 SoC. To achieve that, add a DAI driver for DMIC and register it during probe, and describe the AFE routes that connect the DMIC (I004-I011) to the UL9 frontend (O002-O009). Signed-off-by: parkeryang Co-developed-by: Nícolas F. R. A. Prado Signed-off-by: Nícolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno --- sound/soc/mediatek/mt8188/Makefile | 1 + sound/soc/mediatek/mt8188/mt8188-afe-common.h | 1 + sound/soc/mediatek/mt8188/mt8188-afe-pcm.c | 24 + sound/soc/mediatek/mt8188/mt8188-dai-dmic.c | 682 ++++++++++++++++++++++++++ sound/soc/mediatek/mt8188/mt8188-reg.h | 17 +- 5 files changed, 723 insertions(+), 2 deletions(-) diff --git a/sound/soc/mediatek/mt8188/Makefile b/sound/soc/mediatek/mt8188/Makefile index 1178bce45c50ba252672a32b3877732a5a76c610..b9f3e4ad7b07ba9e21c846706371c53269f894db 100644 --- a/sound/soc/mediatek/mt8188/Makefile +++ b/sound/soc/mediatek/mt8188/Makefile @@ -6,6 +6,7 @@ snd-soc-mt8188-afe-y := \ mt8188-afe-pcm.o \ mt8188-audsys-clk.o \ mt8188-dai-adda.o \ + mt8188-dai-dmic.o \ mt8188-dai-etdm.o \ mt8188-dai-pcm.o diff --git a/sound/soc/mediatek/mt8188/mt8188-afe-common.h b/sound/soc/mediatek/mt8188/mt8188-afe-common.h index 1304d685a306bcb43b5131eff165b80051810b04..01aa11242e29c51539903fd1decc4c575d5e97bd 100644 --- a/sound/soc/mediatek/mt8188/mt8188-afe-common.h +++ b/sound/soc/mediatek/mt8188/mt8188-afe-common.h @@ -137,6 +137,7 @@ struct mt8188_afe_private { int mt8188_afe_fs_timing(unsigned int rate); /* dai register */ int mt8188_dai_adda_register(struct mtk_base_afe *afe); +int mt8188_dai_dmic_register(struct mtk_base_afe *afe); int mt8188_dai_etdm_register(struct mtk_base_afe *afe); int mt8188_dai_pcm_register(struct mtk_base_afe *afe); diff --git a/sound/soc/mediatek/mt8188/mt8188-afe-pcm.c b/sound/soc/mediatek/mt8188/mt8188-afe-pcm.c index d36520c6272dd8c8302bc3f59da33f82f273f366..a2b57e00ff4e502bfd8bc57835b792825f348c1b 100644 --- a/sound/soc/mediatek/mt8188/mt8188-afe-pcm.c +++ b/sound/soc/mediatek/mt8188/mt8188-afe-pcm.c @@ -652,6 +652,7 @@ static struct snd_soc_dai_driver mt8188_memif_dai_driver[] = { static const struct snd_kcontrol_new o002_mix[] = { SOC_DAPM_SINGLE_AUTODISABLE("I000 Switch", AFE_CONN2, 0, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I004 Switch", AFE_CONN2, 4, 1, 0), SOC_DAPM_SINGLE_AUTODISABLE("I012 Switch", AFE_CONN2, 12, 1, 0), SOC_DAPM_SINGLE_AUTODISABLE("I020 Switch", AFE_CONN2, 20, 1, 0), SOC_DAPM_SINGLE_AUTODISABLE("I022 Switch", AFE_CONN2, 22, 1, 0), @@ -662,6 +663,8 @@ static const struct snd_kcontrol_new o002_mix[] = { static const struct snd_kcontrol_new o003_mix[] = { SOC_DAPM_SINGLE_AUTODISABLE("I001 Switch", AFE_CONN3, 1, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I005 Switch", AFE_CONN3, 5, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I006 Switch", AFE_CONN3, 6, 1, 0), SOC_DAPM_SINGLE_AUTODISABLE("I013 Switch", AFE_CONN3, 13, 1, 0), SOC_DAPM_SINGLE_AUTODISABLE("I021 Switch", AFE_CONN3, 21, 1, 0), SOC_DAPM_SINGLE_AUTODISABLE("I023 Switch", AFE_CONN3, 23, 1, 0), @@ -672,6 +675,8 @@ static const struct snd_kcontrol_new o003_mix[] = { static const struct snd_kcontrol_new o004_mix[] = { SOC_DAPM_SINGLE_AUTODISABLE("I000 Switch", AFE_CONN4, 0, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I006 Switch", AFE_CONN4, 6, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I008 Switch", AFE_CONN4, 8, 1, 0), SOC_DAPM_SINGLE_AUTODISABLE("I014 Switch", AFE_CONN4, 14, 1, 0), SOC_DAPM_SINGLE_AUTODISABLE("I024 Switch", AFE_CONN4, 24, 1, 0), SOC_DAPM_SINGLE_AUTODISABLE("I074 Switch", AFE_CONN4_2, 10, 1, 0), @@ -679,6 +684,8 @@ static const struct snd_kcontrol_new o004_mix[] = { static const struct snd_kcontrol_new o005_mix[] = { SOC_DAPM_SINGLE_AUTODISABLE("I001 Switch", AFE_CONN5, 1, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I007 Switch", AFE_CONN5, 7, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I010 Switch", AFE_CONN5, 10, 1, 0), SOC_DAPM_SINGLE_AUTODISABLE("I015 Switch", AFE_CONN5, 15, 1, 0), SOC_DAPM_SINGLE_AUTODISABLE("I025 Switch", AFE_CONN5, 25, 1, 0), SOC_DAPM_SINGLE_AUTODISABLE("I075 Switch", AFE_CONN5_2, 11, 1, 0), @@ -686,6 +693,7 @@ static const struct snd_kcontrol_new o005_mix[] = { static const struct snd_kcontrol_new o006_mix[] = { SOC_DAPM_SINGLE_AUTODISABLE("I000 Switch", AFE_CONN6, 0, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I008 Switch", AFE_CONN6, 8, 1, 0), SOC_DAPM_SINGLE_AUTODISABLE("I016 Switch", AFE_CONN6, 16, 1, 0), SOC_DAPM_SINGLE_AUTODISABLE("I026 Switch", AFE_CONN6, 26, 1, 0), SOC_DAPM_SINGLE_AUTODISABLE("I076 Switch", AFE_CONN6_2, 12, 1, 0), @@ -693,18 +701,21 @@ static const struct snd_kcontrol_new o006_mix[] = { static const struct snd_kcontrol_new o007_mix[] = { SOC_DAPM_SINGLE_AUTODISABLE("I001 Switch", AFE_CONN7, 1, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I009 Switch", AFE_CONN7, 9, 1, 0), SOC_DAPM_SINGLE_AUTODISABLE("I017 Switch", AFE_CONN7, 17, 1, 0), SOC_DAPM_SINGLE_AUTODISABLE("I027 Switch", AFE_CONN7, 27, 1, 0), SOC_DAPM_SINGLE_AUTODISABLE("I077 Switch", AFE_CONN7_2, 13, 1, 0), }; static const struct snd_kcontrol_new o008_mix[] = { + SOC_DAPM_SINGLE_AUTODISABLE("I010 Switch", AFE_CONN8, 10, 1, 0), SOC_DAPM_SINGLE_AUTODISABLE("I018 Switch", AFE_CONN8, 18, 1, 0), SOC_DAPM_SINGLE_AUTODISABLE("I028 Switch", AFE_CONN8, 28, 1, 0), SOC_DAPM_SINGLE_AUTODISABLE("I078 Switch", AFE_CONN8_2, 14, 1, 0), }; static const struct snd_kcontrol_new o009_mix[] = { + SOC_DAPM_SINGLE_AUTODISABLE("I011 Switch", AFE_CONN9, 11, 1, 0), SOC_DAPM_SINGLE_AUTODISABLE("I019 Switch", AFE_CONN9, 19, 1, 0), SOC_DAPM_SINGLE_AUTODISABLE("I029 Switch", AFE_CONN9, 29, 1, 0), SOC_DAPM_SINGLE_AUTODISABLE("I079 Switch", AFE_CONN9_2, 15, 1, 0), @@ -1275,6 +1286,18 @@ static const struct snd_soc_dapm_route mt8188_memif_routes[] = { {"O002", "I070 Switch", "I070"}, {"O003", "I071 Switch", "I071"}, + {"O002", "I004 Switch", "I004"}, + {"O003", "I005 Switch", "I005"}, + {"O003", "I006 Switch", "I006"}, + {"O004", "I006 Switch", "I006"}, + {"O004", "I008 Switch", "I008"}, + {"O005", "I007 Switch", "I007"}, + {"O005", "I010 Switch", "I010"}, + {"O006", "I008 Switch", "I008"}, + {"O007", "I009 Switch", "I009"}, + {"O008", "I010 Switch", "I010"}, + {"O009", "I011 Switch", "I011"}, + {"O034", "I000 Switch", "I000"}, {"O035", "I001 Switch", "I001"}, {"O034", "I002 Switch", "I002"}, @@ -3072,6 +3095,7 @@ static int mt8188_dai_memif_register(struct mtk_base_afe *afe) typedef int (*dai_register_cb)(struct mtk_base_afe *); static const dai_register_cb dai_register_cbs[] = { mt8188_dai_adda_register, + mt8188_dai_dmic_register, mt8188_dai_etdm_register, mt8188_dai_pcm_register, mt8188_dai_memif_register, diff --git a/sound/soc/mediatek/mt8188/mt8188-dai-dmic.c b/sound/soc/mediatek/mt8188/mt8188-dai-dmic.c new file mode 100644 index 0000000000000000000000000000000000000000..4cfbcb71d2d9c73e9c6b355a655f78709a032af5 --- /dev/null +++ b/sound/soc/mediatek/mt8188/mt8188-dai-dmic.c @@ -0,0 +1,682 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * MediaTek ALSA SoC Audio DAI DMIC I/F Control + * + * Copyright (c) 2020 MediaTek Inc. + * Author: Bicycle Tsai + * Trevor Wu + * Parker Yang + */ + +#include +#include +#include +#include +#include "mt8188-afe-clk.h" +#include "mt8188-afe-common.h" +#include "mt8188-reg.h" + +/* DMIC HW Gain configuration maximum value. */ +#define DMIC_GAIN_MAX_STEP GENMASK(19, 0) +#define DMIC_GAIN_MAX_PER_STEP GENMASK(7, 0) +#define DMIC_GAIN_MAX_TARGET GENMASK(27, 0) +#define DMIC_GAIN_MAX_CURRENT GENMASK(27, 0) + +#define CLK_PHASE_SEL_CH1 0 +#define CLK_PHASE_SEL_CH2 ((CLK_PHASE_SEL_CH1) + 4) + +#define DMIC1_SRC_SEL 0 +#define DMIC2_SRC_SEL 0 +#define DMIC3_SRC_SEL 2 +#define DMIC4_SRC_SEL 0 +#define DMIC5_SRC_SEL 4 +#define DMIC6_SRC_SEL 0 +#define DMIC7_SRC_SEL 6 +#define DMIC8_SRC_SEL 0 + +enum { + SUPPLY_SEQ_DMIC_GAIN, + SUPPLY_SEQ_DMIC_CK, +}; + +enum { + DMIC0, + DMIC1, + DMIC2, + DMIC3, + DMIC_NUM, +}; + +struct mtk_dai_dmic_ctrl_reg { + unsigned int con0; +}; + +struct mtk_dai_dmic_hw_gain_ctrl_reg { + unsigned int bypass; + unsigned int con0; +}; + +struct mtk_dai_dmic_priv { + unsigned int gain_on[DMIC_NUM]; + unsigned int channels; + bool hires_required; +}; + +static const struct mtk_dai_dmic_ctrl_reg dmic_ctrl_regs[DMIC_NUM] = { + [DMIC0] = { + .con0 = AFE_DMIC0_UL_SRC_CON0, + }, + [DMIC1] = { + .con0 = AFE_DMIC1_UL_SRC_CON0, + }, + [DMIC2] = { + .con0 = AFE_DMIC2_UL_SRC_CON0, + }, + [DMIC3] = { + .con0 = AFE_DMIC3_UL_SRC_CON0, + }, +}; + +static const struct mtk_dai_dmic_ctrl_reg *get_dmic_ctrl_reg(int id) +{ + if (id < 0 || id >= DMIC_NUM) + return NULL; + + return &dmic_ctrl_regs[id]; +} + +static const struct mtk_dai_dmic_hw_gain_ctrl_reg + dmic_hw_gain_ctrl_regs[DMIC_NUM] = { + [DMIC0] = { + .bypass = DMIC_BYPASS_HW_GAIN, + .con0 = DMIC_GAIN1_CON0, + }, + [DMIC1] = { + .bypass = DMIC_BYPASS_HW_GAIN, + .con0 = DMIC_GAIN2_CON0, + }, + [DMIC2] = { + .bypass = DMIC_BYPASS_HW_GAIN, + .con0 = DMIC_GAIN3_CON0, + }, + [DMIC3] = { + .bypass = DMIC_BYPASS_HW_GAIN, + .con0 = DMIC_GAIN4_CON0, + }, +}; + +static const struct mtk_dai_dmic_hw_gain_ctrl_reg + *get_dmic_hw_gain_ctrl_reg(struct mtk_base_afe *afe, int id) +{ + if ((id < 0) || (id >= DMIC_NUM)) { + dev_dbg(afe->dev, "%s invalid id\n", __func__); + return NULL; + } + + return &dmic_hw_gain_ctrl_regs[id]; +} + +static void mtk_dai_dmic_hw_gain_bypass(struct mtk_base_afe *afe, + unsigned int id, bool bypass) +{ + const struct mtk_dai_dmic_hw_gain_ctrl_reg *reg; + unsigned int msk; + + reg = get_dmic_hw_gain_ctrl_reg(afe, id); + if (!reg) + return; + + switch (id) { + case DMIC0: + msk = DMIC_BYPASS_HW_GAIN_DMIC1_BYPASS; + break; + case DMIC1: + msk = DMIC_BYPASS_HW_GAIN_DMIC2_BYPASS; + break; + case DMIC2: + msk = DMIC_BYPASS_HW_GAIN_DMIC3_BYPASS; + break; + case DMIC3: + msk = DMIC_BYPASS_HW_GAIN_DMIC4_BYPASS; + break; + default: + return; + } + + if (bypass) + regmap_set_bits(afe->regmap, reg->bypass, msk); + else + regmap_clear_bits(afe->regmap, reg->bypass, msk); +} + +static void mtk_dai_dmic_hw_gain_on(struct mtk_base_afe *afe, unsigned int id, + bool on) +{ + const struct mtk_dai_dmic_hw_gain_ctrl_reg *reg = get_dmic_hw_gain_ctrl_reg(afe, id); + + if (!reg) + return; + + if (on) + regmap_set_bits(afe->regmap, reg->con0, DMIC_GAIN_CON0_GAIN_ON); + else + regmap_clear_bits(afe->regmap, reg->con0, DMIC_GAIN_CON0_GAIN_ON); +} + +static const struct reg_sequence mtk_dai_dmic_iir_coeff_reg_defaults[] = { + { AFE_DMIC0_IIR_COEF_02_01, 0x00000000 }, + { AFE_DMIC0_IIR_COEF_04_03, 0x00003FB8 }, + { AFE_DMIC0_IIR_COEF_06_05, 0x3FB80000 }, + { AFE_DMIC0_IIR_COEF_08_07, 0x3FB80000 }, + { AFE_DMIC0_IIR_COEF_10_09, 0x0000C048 }, + { AFE_DMIC1_IIR_COEF_02_01, 0x00000000 }, + { AFE_DMIC1_IIR_COEF_04_03, 0x00003FB8 }, + { AFE_DMIC1_IIR_COEF_06_05, 0x3FB80000 }, + { AFE_DMIC1_IIR_COEF_08_07, 0x3FB80000 }, + { AFE_DMIC1_IIR_COEF_10_09, 0x0000C048 }, + { AFE_DMIC2_IIR_COEF_02_01, 0x00000000 }, + { AFE_DMIC2_IIR_COEF_04_03, 0x00003FB8 }, + { AFE_DMIC2_IIR_COEF_06_05, 0x3FB80000 }, + { AFE_DMIC2_IIR_COEF_08_07, 0x3FB80000 }, + { AFE_DMIC2_IIR_COEF_10_09, 0x0000C048 }, + { AFE_DMIC3_IIR_COEF_02_01, 0x00000000 }, + { AFE_DMIC3_IIR_COEF_04_03, 0x00003FB8 }, + { AFE_DMIC3_IIR_COEF_06_05, 0x3FB80000 }, + { AFE_DMIC3_IIR_COEF_08_07, 0x3FB80000 }, + { AFE_DMIC3_IIR_COEF_10_09, 0x0000C048 }, +}; + +static int mtk_dai_dmic_load_iir_coeff_table(struct mtk_base_afe *afe) +{ + return regmap_multi_reg_write(afe->regmap, + mtk_dai_dmic_iir_coeff_reg_defaults, + ARRAY_SIZE(mtk_dai_dmic_iir_coeff_reg_defaults)); +} + +static int mtk_dai_dmic_configure_array(struct snd_soc_dai *dai) +{ + struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); + const u32 mask = PWR2_TOP_CON_DMIC8_SRC_SEL_MASK | + PWR2_TOP_CON_DMIC7_SRC_SEL_MASK | + PWR2_TOP_CON_DMIC6_SRC_SEL_MASK | + PWR2_TOP_CON_DMIC5_SRC_SEL_MASK | + PWR2_TOP_CON_DMIC4_SRC_SEL_MASK | + PWR2_TOP_CON_DMIC3_SRC_SEL_MASK | + PWR2_TOP_CON_DMIC2_SRC_SEL_MASK | + PWR2_TOP_CON_DMIC1_SRC_SEL_MASK; + const u32 val = PWR2_TOP_CON_DMIC8_SRC_SEL_VAL(DMIC8_SRC_SEL) | + PWR2_TOP_CON_DMIC7_SRC_SEL_VAL(DMIC7_SRC_SEL) | + PWR2_TOP_CON_DMIC6_SRC_SEL_VAL(DMIC6_SRC_SEL) | + PWR2_TOP_CON_DMIC5_SRC_SEL_VAL(DMIC5_SRC_SEL) | + PWR2_TOP_CON_DMIC4_SRC_SEL_VAL(DMIC4_SRC_SEL) | + PWR2_TOP_CON_DMIC3_SRC_SEL_VAL(DMIC3_SRC_SEL) | + PWR2_TOP_CON_DMIC2_SRC_SEL_VAL(DMIC2_SRC_SEL) | + PWR2_TOP_CON_DMIC1_SRC_SEL_VAL(DMIC1_SRC_SEL); + + return regmap_update_bits(afe->regmap, PWR2_TOP_CON0, mask, val); +} + +/* This function assumes that the caller checked that channels is valid */ +static u8 mtk_dmic_channels_to_dmic_number(unsigned int channels) +{ + switch (channels) { + case 1: + return DMIC0; + case 2: + return DMIC1; + case 3: + return DMIC2; + case 4: + default: + return DMIC3; + } +} + +static void mtk_dai_dmic_hw_gain_enable(struct mtk_base_afe *afe, + unsigned int channels, bool enable) +{ + struct mt8188_afe_private *afe_priv = afe->platform_priv; + struct mtk_dai_dmic_priv *dmic_priv = afe_priv->dai_priv[MT8188_AFE_IO_DMIC_IN]; + u8 dmic_num; + int i; + + dmic_num = mtk_dmic_channels_to_dmic_number(channels); + for (i = dmic_num; i >= DMIC0; i--) { + if (enable && dmic_priv->gain_on[i]) { + mtk_dai_dmic_hw_gain_bypass(afe, i, false); + mtk_dai_dmic_hw_gain_on(afe, i, true); + } else { + mtk_dai_dmic_hw_gain_on(afe, i, false); + mtk_dai_dmic_hw_gain_bypass(afe, i, true); + } + } +} + +static int mtk_dmic_gain_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, + int event) +{ + struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm); + struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt); + struct mt8188_afe_private *afe_priv = afe->platform_priv; + struct mtk_dai_dmic_priv *dmic_priv = afe_priv->dai_priv[MT8188_AFE_IO_DMIC_IN]; + unsigned int channels = dmic_priv->channels; + + dev_dbg(afe->dev, "%s(), name %s, event 0x%x\n", + __func__, w->name, event); + + if (!channels) + return -EINVAL; + + switch (event) { + case SND_SOC_DAPM_PRE_PMU: + mtk_dai_dmic_hw_gain_enable(afe, channels, true); + break; + case SND_SOC_DAPM_POST_PMD: + mtk_dai_dmic_hw_gain_enable(afe, channels, false); + break; + default: + break; + } + + return 0; +} + +static int mtk_dmic_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, + int event) +{ + struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm); + struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt); + struct mt8188_afe_private *afe_priv = afe->platform_priv; + struct mtk_dai_dmic_priv *dmic_priv = afe_priv->dai_priv[MT8188_AFE_IO_DMIC_IN]; + const struct mtk_dai_dmic_ctrl_reg *reg = NULL; + unsigned int channels = dmic_priv->channels; + unsigned int msk; + u8 dmic_num; + int i; + + dev_dbg(afe->dev, "%s(), name %s, event 0x%x\n", + __func__, w->name, event); + + if (!channels) + return -EINVAL; + + dmic_num = mtk_dmic_channels_to_dmic_number(channels); + + switch (event) { + case SND_SOC_DAPM_PRE_PMU: + /* request fifo soft rst */ + for (i = dmic_num; i >= DMIC0; i--) + msk |= PWR2_TOP_CON1_DMIC_FIFO_SOFT_RST_EN(i); + + regmap_set_bits(afe->regmap, PWR2_TOP_CON1, msk); + + msk = AFE_DMIC_UL_SRC_CON0_UL_MODE_3P25M_CH1_CTL | + AFE_DMIC_UL_SRC_CON0_UL_MODE_3P25M_CH2_CTL | + AFE_DMIC_UL_SRC_CON0_UL_SDM_3_LEVEL_CTL | + AFE_DMIC_UL_SRC_CON0_UL_IIR_ON_TMP_CTL; + + for (i = dmic_num; i >= DMIC0; i--) { + reg = get_dmic_ctrl_reg(i); + if (reg) + regmap_set_bits(afe->regmap, reg->con0, msk); + } + break; + case SND_SOC_DAPM_POST_PMU: + msk = AFE_DMIC_UL_SRC_CON0_UL_SRC_ON_TMP_CTL; + + for (i = dmic_num; i >= DMIC0; i--) { + reg = get_dmic_ctrl_reg(i); + if (reg) + regmap_set_bits(afe->regmap, reg->con0, msk); + } + + if (dmic_priv->hires_required) { + mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_DMIC_HIRES1]); + mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_DMIC_HIRES2]); + mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_DMIC_HIRES3]); + mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_DMIC_HIRES4]); + } + + mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_AFE_DMIC1]); + mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_AFE_DMIC2]); + mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_AFE_DMIC3]); + mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_AFE_DMIC4]); + + /* release fifo soft rst */ + msk = 0; + for (i = dmic_num; i >= DMIC0; i--) + msk |= PWR2_TOP_CON1_DMIC_FIFO_SOFT_RST_EN(i); + + regmap_clear_bits(afe->regmap, PWR2_TOP_CON1, msk); + break; + case SND_SOC_DAPM_PRE_PMD: + msk = AFE_DMIC_UL_SRC_CON0_UL_MODE_3P25M_CH1_CTL | + AFE_DMIC_UL_SRC_CON0_UL_MODE_3P25M_CH2_CTL | + AFE_DMIC_UL_SRC_CON0_UL_SRC_ON_TMP_CTL | + AFE_DMIC_UL_SRC_CON0_UL_IIR_ON_TMP_CTL | + AFE_DMIC_UL_SRC_CON0_UL_SDM_3_LEVEL_CTL; + + for (i = dmic_num; i >= DMIC0; i--) { + reg = get_dmic_ctrl_reg(i); + if (reg) + regmap_set_bits(afe->regmap, reg->con0, msk); + } + break; + case SND_SOC_DAPM_POST_PMD: + /* should delayed 1/fs(smallest is 8k) = 125us before afe off */ + usleep_range(125, 126); + + mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_AFE_DMIC1]); + mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_AFE_DMIC2]); + mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_AFE_DMIC3]); + mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_AFE_DMIC4]); + + if (dmic_priv->hires_required) { + mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_DMIC_HIRES1]); + mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_DMIC_HIRES2]); + mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_DMIC_HIRES3]); + mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_DMIC_HIRES4]); + } + break; + default: + break; + } + + return 0; +} + +static int mtk_dai_dmic_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); + struct mt8188_afe_private *afe_priv = afe->platform_priv; + struct mtk_dai_dmic_priv *dmic_priv = afe_priv->dai_priv[MT8188_AFE_IO_DMIC_IN]; + unsigned int rate = params_rate(params); + unsigned int channels = params_channels(params); + const struct mtk_dai_dmic_ctrl_reg *reg = NULL; + u32 val = AFE_DMIC_UL_SRC_CON0_UL_PHASE_SEL_CH1(CLK_PHASE_SEL_CH1) | + AFE_DMIC_UL_SRC_CON0_UL_PHASE_SEL_CH2(CLK_PHASE_SEL_CH2) | + AFE_DMIC_UL_SRC_CON0_UL_IIR_MODE_CTL(0); + const u32 msk = AFE_DMIC_UL_SRC_CON0_UL_TWO_WIRE_MODE_CTL | + AFE_DMIC_UL_SRC_CON0_UL_PHASE_SEL_MASK | + AFE_DMIC_UL_SRC_CON0_UL_IIR_MODE_CTL_MASK | + AFE_DMIC_UL_VOICE_MODE_MASK; + u8 dmic_num; + int ret; + int i; + + if (!channels || channels > 8) + return -EINVAL; + + ret = mtk_dai_dmic_configure_array(dai); + if (ret < 0) + return ret; + + ret = mtk_dai_dmic_load_iir_coeff_table(afe); + if (ret < 0) + return ret; + + switch (rate) { + case 96000: + val |= AFE_DMIC_UL_CON0_VOCIE_MODE_96K; + dmic_priv->hires_required = 1; + break; + case 48000: + val |= AFE_DMIC_UL_CON0_VOCIE_MODE_48K; + dmic_priv->hires_required = 0; + break; + case 32000: + val |= AFE_DMIC_UL_CON0_VOCIE_MODE_32K; + dmic_priv->hires_required = 0; + break; + case 16000: + val |= AFE_DMIC_UL_CON0_VOCIE_MODE_16K; + dmic_priv->hires_required = 0; + break; + case 8000: + val |= AFE_DMIC_UL_CON0_VOCIE_MODE_8K; + dmic_priv->hires_required = 0; + break; + default: + dev_dbg(afe->dev, "%s invalid rate %u, use 48000Hz\n", __func__, rate); + val |= AFE_DMIC_UL_CON0_VOCIE_MODE_48K; + dmic_priv->hires_required = 0; + break; + } + + dmic_num = mtk_dmic_channels_to_dmic_number(channels); + for (i = dmic_num; i >= DMIC0; i--) { + reg = get_dmic_ctrl_reg(i); + if (reg) { + ret = regmap_update_bits(afe->regmap, reg->con0, msk, val); + if (ret < 0) + return ret; + } + } + + dmic_priv->channels = channels; + + return 0; +} + +static const struct snd_soc_dai_ops mtk_dai_dmic_ops = { + .hw_params = mtk_dai_dmic_hw_params, +}; + +#define MTK_DMIC_RATES (SNDRV_PCM_RATE_8000 |\ + SNDRV_PCM_RATE_16000 |\ + SNDRV_PCM_RATE_32000 |\ + SNDRV_PCM_RATE_48000 |\ + SNDRV_PCM_RATE_96000) + +#define MTK_DMIC_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\ + SNDRV_PCM_FMTBIT_S32_LE) + +static struct snd_soc_dai_driver mtk_dai_dmic_driver[] = { + { + .name = "DMIC", + .id = MT8188_AFE_IO_DMIC_IN, + .capture = { + .stream_name = "DMIC Capture", + .channels_min = 1, + .channels_max = 8, + .rates = MTK_DMIC_RATES, + .formats = MTK_DMIC_FORMATS, + }, + .ops = &mtk_dai_dmic_ops, + }, +}; + +static const struct snd_soc_dapm_widget mtk_dai_dmic_widgets[] = { + SND_SOC_DAPM_MIXER("I004", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("I005", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("I006", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("I007", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("I008", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("I009", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("I010", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("I011", SND_SOC_NOPM, 0, 0, NULL, 0), + + SND_SOC_DAPM_SUPPLY_S("DMIC_GAIN_ON", SUPPLY_SEQ_DMIC_GAIN, + SND_SOC_NOPM, 0, 0, + mtk_dmic_gain_event, + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), + SND_SOC_DAPM_SUPPLY_S("DMIC_CK_ON", SUPPLY_SEQ_DMIC_CK, + PWR2_TOP_CON1, + PWR2_TOP_CON1_DMIC_CKDIV_ON_SHIFT, 0, + mtk_dmic_event, + SND_SOC_DAPM_PRE_POST_PMU | + SND_SOC_DAPM_PRE_POST_PMD), + SND_SOC_DAPM_INPUT("DMIC_INPUT"), +}; + +static const struct snd_soc_dapm_route mtk_dai_dmic_routes[] = { + {"I004", NULL, "DMIC Capture"}, + {"I005", NULL, "DMIC Capture"}, + {"I006", NULL, "DMIC Capture"}, + {"I007", NULL, "DMIC Capture"}, + {"I008", NULL, "DMIC Capture"}, + {"I009", NULL, "DMIC Capture"}, + {"I010", NULL, "DMIC Capture"}, + {"I011", NULL, "DMIC Capture"}, + {"DMIC Capture", NULL, "DMIC_CK_ON"}, + {"DMIC Capture", NULL, "DMIC_GAIN_ON"}, + {"DMIC Capture", NULL, "DMIC_INPUT"}, +}; + +static const char * const mt8188_dmic_gain_enable_text[] = { + "Bypass", "Connect", +}; + +static SOC_ENUM_SINGLE_EXT_DECL(dmic_gain_on_enum, + mt8188_dmic_gain_enable_text); + +static int mtk_dai_dmic_hw_gain_ctrl_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); + struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; + struct mtk_base_afe *afe = snd_soc_component_get_drvdata(component); + struct mt8188_afe_private *afe_priv = afe->platform_priv; + struct mtk_dai_dmic_priv *dmic_priv = afe_priv->dai_priv[MT8188_AFE_IO_DMIC_IN]; + unsigned int source = ucontrol->value.enumerated.item[0]; + unsigned int *cached; + + if (source >= e->items) + return -EINVAL; + + if (!strcmp(kcontrol->id.name, "DMIC1_HW_GAIN_EN")) + cached = &dmic_priv->gain_on[0]; + else if (!strcmp(kcontrol->id.name, "DMIC2_HW_GAIN_EN")) + cached = &dmic_priv->gain_on[1]; + else if (!strcmp(kcontrol->id.name, "DMIC3_HW_GAIN_EN")) + cached = &dmic_priv->gain_on[2]; + else if (!strcmp(kcontrol->id.name, "DMIC4_HW_GAIN_EN")) + cached = &dmic_priv->gain_on[3]; + else + return -EINVAL; + + if (source == *cached) + return 0; + + *cached = source; + return 1; +} + +static int mtk_dai_dmic_hw_gain_ctrl_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); + struct mtk_base_afe *afe = snd_soc_component_get_drvdata(component); + struct mt8188_afe_private *afe_priv = afe->platform_priv; + struct mtk_dai_dmic_priv *dmic_priv = afe_priv->dai_priv[MT8188_AFE_IO_DMIC_IN]; + unsigned int val; + + if (!strcmp(kcontrol->id.name, "DMIC1_HW_GAIN_EN")) + val = dmic_priv->gain_on[0]; + else if (!strcmp(kcontrol->id.name, "DMIC2_HW_GAIN_EN")) + val = dmic_priv->gain_on[1]; + else if (!strcmp(kcontrol->id.name, "DMIC3_HW_GAIN_EN")) + val = dmic_priv->gain_on[2]; + else if (!strcmp(kcontrol->id.name, "DMIC4_HW_GAIN_EN")) + val = dmic_priv->gain_on[3]; + else + return -EINVAL; + + ucontrol->value.enumerated.item[0] = val; + return 0; +} + +static const struct snd_kcontrol_new mtk_dai_dmic_controls[] = { + SOC_ENUM_EXT("DMIC1_HW_GAIN_EN", dmic_gain_on_enum, + mtk_dai_dmic_hw_gain_ctrl_get, + mtk_dai_dmic_hw_gain_ctrl_put), + SOC_ENUM_EXT("DMIC2_HW_GAIN_EN", dmic_gain_on_enum, + mtk_dai_dmic_hw_gain_ctrl_get, + mtk_dai_dmic_hw_gain_ctrl_put), + SOC_ENUM_EXT("DMIC3_HW_GAIN_EN", dmic_gain_on_enum, + mtk_dai_dmic_hw_gain_ctrl_get, + mtk_dai_dmic_hw_gain_ctrl_put), + SOC_ENUM_EXT("DMIC4_HW_GAIN_EN", dmic_gain_on_enum, + mtk_dai_dmic_hw_gain_ctrl_get, + mtk_dai_dmic_hw_gain_ctrl_put), + SOC_SINGLE("DMIC1_HW_GAIN_TARGET", DMIC_GAIN1_CON1, + 0, DMIC_GAIN_MAX_TARGET, 0), + SOC_SINGLE("DMIC2_HW_GAIN_TARGET", DMIC_GAIN2_CON1, + 0, DMIC_GAIN_MAX_TARGET, 0), + SOC_SINGLE("DMIC3_HW_GAIN_TARGET", DMIC_GAIN3_CON1, + 0, DMIC_GAIN_MAX_TARGET, 0), + SOC_SINGLE("DMIC4_HW_GAIN_TARGET", DMIC_GAIN4_CON1, + 0, DMIC_GAIN_MAX_TARGET, 0), + SOC_SINGLE("DMIC1_HW_GAIN_CURRENT", DMIC_GAIN1_CUR, + 0, DMIC_GAIN_MAX_CURRENT, 0), + SOC_SINGLE("DMIC2_HW_GAIN_CURRENT", DMIC_GAIN2_CUR, + 0, DMIC_GAIN_MAX_CURRENT, 0), + SOC_SINGLE("DMIC3_HW_GAIN_CURRENT", DMIC_GAIN3_CUR, + 0, DMIC_GAIN_MAX_CURRENT, 0), + SOC_SINGLE("DMIC4_HW_GAIN_CURRENT", DMIC_GAIN4_CUR, + 0, DMIC_GAIN_MAX_CURRENT, 0), + SOC_SINGLE("DMIC1_HW_GAIN_UP_STEP", DMIC_GAIN1_CON3, + 0, DMIC_GAIN_MAX_STEP, 0), + SOC_SINGLE("DMIC2_HW_GAIN_UP_STEP", DMIC_GAIN2_CON3, + 0, DMIC_GAIN_MAX_STEP, 0), + SOC_SINGLE("DMIC3_HW_GAIN_UP_STEP", DMIC_GAIN3_CON3, + 0, DMIC_GAIN_MAX_STEP, 0), + SOC_SINGLE("DMIC4_HW_GAIN_UP_STEP", DMIC_GAIN4_CON3, + 0, DMIC_GAIN_MAX_STEP, 0), + SOC_SINGLE("DMIC1_HW_GAIN_DOWN_STEP", DMIC_GAIN1_CON2, + 0, DMIC_GAIN_MAX_STEP, 0), + SOC_SINGLE("DMIC2_HW_GAIN_DOWN_STEP", DMIC_GAIN2_CON2, + 0, DMIC_GAIN_MAX_STEP, 0), + SOC_SINGLE("DMIC3_HW_GAIN_DOWN_STEP", DMIC_GAIN3_CON2, + 0, DMIC_GAIN_MAX_STEP, 0), + SOC_SINGLE("DMIC4_HW_GAIN_DOWN_STEP", DMIC_GAIN4_CON2, + 0, DMIC_GAIN_MAX_STEP, 0), + SOC_SINGLE("DMIC1_HW_GAIN_SAMPLE_PER_STEP", DMIC_GAIN1_CON0, + DMIC_GAIN_CON0_SAMPLE_PER_STEP_SHIFT, DMIC_GAIN_MAX_PER_STEP, 0), + SOC_SINGLE("DMIC2_HW_GAIN_SAMPLE_PER_STEP", DMIC_GAIN2_CON0, + DMIC_GAIN_CON0_SAMPLE_PER_STEP_SHIFT, DMIC_GAIN_MAX_PER_STEP, 0), + SOC_SINGLE("DMIC3_HW_GAIN_SAMPLE_PER_STEP", DMIC_GAIN3_CON0, + DMIC_GAIN_CON0_SAMPLE_PER_STEP_SHIFT, DMIC_GAIN_MAX_PER_STEP, 0), + SOC_SINGLE("DMIC4_HW_GAIN_SAMPLE_PER_STEP", DMIC_GAIN4_CON0, + DMIC_GAIN_CON0_SAMPLE_PER_STEP_SHIFT, DMIC_GAIN_MAX_PER_STEP, 0), +}; + +static int init_dmic_priv_data(struct mtk_base_afe *afe) +{ + struct mt8188_afe_private *afe_priv = afe->platform_priv; + struct mtk_dai_dmic_priv *dmic_priv; + + dmic_priv = devm_kzalloc(afe->dev, sizeof(struct mtk_dai_dmic_priv), + GFP_KERNEL); + if (!dmic_priv) + return -ENOMEM; + + afe_priv->dai_priv[MT8188_AFE_IO_DMIC_IN] = dmic_priv; + return 0; +} + +int mt8188_dai_dmic_register(struct mtk_base_afe *afe) +{ + struct mtk_base_afe_dai *dai; + + dai = devm_kzalloc(afe->dev, sizeof(*dai), GFP_KERNEL); + if (!dai) + return -ENOMEM; + + list_add(&dai->list, &afe->sub_dais); + + dai->dai_drivers = mtk_dai_dmic_driver; + dai->num_dai_drivers = ARRAY_SIZE(mtk_dai_dmic_driver); + dai->dapm_widgets = mtk_dai_dmic_widgets; + dai->num_dapm_widgets = ARRAY_SIZE(mtk_dai_dmic_widgets); + dai->dapm_routes = mtk_dai_dmic_routes; + dai->num_dapm_routes = ARRAY_SIZE(mtk_dai_dmic_routes); + dai->controls = mtk_dai_dmic_controls; + dai->num_controls = ARRAY_SIZE(mtk_dai_dmic_controls); + + return init_dmic_priv_data(afe); +} diff --git a/sound/soc/mediatek/mt8188/mt8188-reg.h b/sound/soc/mediatek/mt8188/mt8188-reg.h index bdd885419ff3874bab80549ea3ff4617172b8245..2e9c65de249da5227ee6f83daa7594a55bc8711c 100644 --- a/sound/soc/mediatek/mt8188/mt8188-reg.h +++ b/sound/soc/mediatek/mt8188/mt8188-reg.h @@ -2837,9 +2837,20 @@ #define PWR2_TOP_CON_DMIC3_SRC_SEL_MASK GENMASK(16, 14) #define PWR2_TOP_CON_DMIC2_SRC_SEL_MASK GENMASK(13, 11) #define PWR2_TOP_CON_DMIC1_SRC_SEL_MASK GENMASK(10, 8) +#define PWR2_TOP_CON_DMIC8_SRC_SEL_VAL(x) ((x) << 29) +#define PWR2_TOP_CON_DMIC7_SRC_SEL_VAL(x) ((x) << 26) +#define PWR2_TOP_CON_DMIC6_SRC_SEL_VAL(x) ((x) << 23) +#define PWR2_TOP_CON_DMIC5_SRC_SEL_VAL(x) ((x) << 20) +#define PWR2_TOP_CON_DMIC4_SRC_SEL_VAL(x) ((x) << 17) +#define PWR2_TOP_CON_DMIC3_SRC_SEL_VAL(x) ((x) << 14) +#define PWR2_TOP_CON_DMIC2_SRC_SEL_VAL(x) ((x) << 11) +#define PWR2_TOP_CON_DMIC1_SRC_SEL_VAL(x) ((x) << 8) /* PWR2_TOP_CON1 */ -#define PWR2_TOP_CON1_DMIC_CKDIV_ON BIT(1) +#define PWR2_TOP_CON1_DMIC_FIFO_SOFT_RST_EN(x) BIT(5 + 6 * (x)) +#define PWR2_TOP_CON1_DMIC_CKDIV_ON BIT(1) +#define PWR2_TOP_CON1_DMIC_CKDIV_ON_SHIFT 1 + /* PCM_INTF_CON1 */ #define PCM_INTF_CON1_SYNC_OUT_INV BIT(23) @@ -2921,13 +2932,14 @@ #define AFE_DMIC_UL_SRC_CON0_UL_TWO_WIRE_MODE_CTL BIT(23) #define AFE_DMIC_UL_SRC_CON0_UL_MODE_3P25M_CH2_CTL BIT(22) #define AFE_DMIC_UL_SRC_CON0_UL_MODE_3P25M_CH1_CTL BIT(21) - +#define AFE_DMIC_UL_VOICE_MODE(x) (((x) & GENMASK(2, 0)) << 17) #define AFE_DMIC_UL_VOICE_MODE_MASK GENMASK(19, 17) #define AFE_DMIC_UL_CON0_VOCIE_MODE_8K AFE_DMIC_UL_VOICE_MODE(0) #define AFE_DMIC_UL_CON0_VOCIE_MODE_16K AFE_DMIC_UL_VOICE_MODE(1) #define AFE_DMIC_UL_CON0_VOCIE_MODE_32K AFE_DMIC_UL_VOICE_MODE(2) #define AFE_DMIC_UL_CON0_VOCIE_MODE_48K AFE_DMIC_UL_VOICE_MODE(3) #define AFE_DMIC_UL_CON0_VOCIE_MODE_96K AFE_DMIC_UL_VOICE_MODE(4) +#define AFE_DMIC_UL_SRC_CON0_UL_IIR_MODE_CTL(x) (((x) & GENMASK(2, 0)) << 7) #define AFE_DMIC_UL_SRC_CON0_UL_IIR_MODE_CTL_MASK GENMASK(9, 7) #define AFE_DMIC_UL_SRC_CON0_UL_IIR_ON_TMP_CTL BIT(10) #define AFE_DMIC_UL_SRC_CON0_UL_SDM_3_LEVEL_CTL BIT(1) @@ -2944,6 +2956,7 @@ /* DMIC_GAINx_CON0 */ #define DMIC_GAIN_CON0_GAIN_ON BIT(0) +#define DMIC_GAIN_CON0_SAMPLE_PER_STEP_SHIFT 8 #define DMIC_GAIN_CON0_SAMPLE_PER_STEP_MASK GENMASK(15, 8) /* DMIC_GAINx_CON1 */ From patchwork Tue Feb 25 14:33:51 2025 Content-Type: text/plain; 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Tue, 25 Feb 2025 15:35:19 +0100 (CET) From: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= Date: Tue, 25 Feb 2025 11:33:51 -0300 Subject: [PATCH v2 5/8] ASoC: mediatek: mt8188-mt6359: Add DMIC support MIME-Version: 1.0 Message-Id: <20250225-genio700-dmic-v2-5-3076f5b50ef7@collabora.com> References: <20250225-genio700-dmic-v2-0-3076f5b50ef7@collabora.com> In-Reply-To: <20250225-genio700-dmic-v2-0-3076f5b50ef7@collabora.com> To: Liam Girdwood , Mark Brown , Jaroslav Kysela , Takashi Iwai , Matthias Brugger , AngeloGioacchino Del Regno , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Trevor Wu Cc: kernel@collabora.com, linux-sound@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= , parkeryang X-Mailer: b4 0.14.2 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250225_063525_226488_3E87E978 X-CRM114-Status: UNSURE ( 9.90 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add the DMIC backend, which connects to the DMIC DAI in the platform driver, as well as a "AP DMIC" mic widget. On the Genio 700 EVK board the dual DMIC on-board are wired through that DMIC DAI. Co-developed-by: parkeryang Signed-off-by: parkeryang Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Nícolas F. R. A. Prado --- sound/soc/mediatek/mt8188/mt8188-mt6359.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/sound/soc/mediatek/mt8188/mt8188-mt6359.c b/sound/soc/mediatek/mt8188/mt8188-mt6359.c index 2d0d04e0232da07ba43a030b14853322427d55e7..420b1427b71dc1424a52f7ab6140c14659036733 100644 --- a/sound/soc/mediatek/mt8188/mt8188-mt6359.c +++ b/sound/soc/mediatek/mt8188/mt8188-mt6359.c @@ -150,6 +150,11 @@ SND_SOC_DAILINK_DEFS(dl_src, "mt6359-snd-codec-aif1")), DAILINK_COMP_ARRAY(COMP_EMPTY())); +SND_SOC_DAILINK_DEFS(DMIC_BE, + DAILINK_COMP_ARRAY(COMP_CPU("DMIC")), + DAILINK_COMP_ARRAY(COMP_DUMMY()), + DAILINK_COMP_ARRAY(COMP_EMPTY())); + SND_SOC_DAILINK_DEFS(dptx, DAILINK_COMP_ARRAY(COMP_CPU("DPTX")), DAILINK_COMP_ARRAY(COMP_DUMMY()), @@ -297,6 +302,7 @@ static const struct snd_soc_dapm_widget mt8188_rear_spk_widgets[] = { static const struct snd_soc_dapm_widget mt8188_mt6359_widgets[] = { SND_SOC_DAPM_HP("Headphone", NULL), SND_SOC_DAPM_MIC("Headset Mic", NULL), + SND_SOC_DAPM_MIC("AP DMIC", NULL), SND_SOC_DAPM_SINK("HDMI"), SND_SOC_DAPM_SINK("DP"), SND_SOC_DAPM_MIXER(SOF_DMA_DL2, SND_SOC_NOPM, 0, 0, NULL, 0), @@ -533,6 +539,7 @@ enum { DAI_LINK_UL9_FE, DAI_LINK_UL10_FE, DAI_LINK_DL_SRC_BE, + DAI_LINK_DMIC_BE, DAI_LINK_DPTX_BE, DAI_LINK_ETDM1_IN_BE, DAI_LINK_ETDM2_IN_BE, @@ -1120,6 +1127,13 @@ static struct snd_soc_dai_link mt8188_mt6359_dai_links[] = { .playback_only = 1, SND_SOC_DAILINK_REG(dl_src), }, + [DAI_LINK_DMIC_BE] = { + .name = "DMIC_BE", + .no_pcm = 1, + .capture_only = 1, + .ignore_suspend = 1, + SND_SOC_DAILINK_REG(DMIC_BE), + }, [DAI_LINK_DPTX_BE] = { .name = "DPTX_BE", .ops = &mt8188_dptx_ops, From patchwork Tue Feb 25 14:33:52 2025 Content-Type: text/plain; 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Tue, 25 Feb 2025 15:35:23 +0100 (CET) From: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= Date: Tue, 25 Feb 2025 11:33:52 -0300 Subject: [PATCH v2 6/8] arm64: dts: mediatek: mt8390-genio-common: Add routes for DMIC MIME-Version: 1.0 Message-Id: <20250225-genio700-dmic-v2-6-3076f5b50ef7@collabora.com> References: <20250225-genio700-dmic-v2-0-3076f5b50ef7@collabora.com> In-Reply-To: <20250225-genio700-dmic-v2-0-3076f5b50ef7@collabora.com> To: Liam Girdwood , Mark Brown , Jaroslav Kysela , Takashi Iwai , Matthias Brugger , AngeloGioacchino Del Regno , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Trevor Wu Cc: kernel@collabora.com, linux-sound@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= , parkeryang X-Mailer: b4 0.14.2 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250225_063529_532881_04545176 X-CRM114-Status: UNSURE ( 8.79 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add necessary routes for the onboard dual DMIC present on the Genio 700/510 EVK. The dmic is supplied by micbias0 and micbias2, and inputs into the MT8188 DMIC DAI. Co-developed-by: parkeryang Signed-off-by: parkeryang Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Nícolas F. R. A. Prado --- arch/arm64/boot/dts/mediatek/mt8390-genio-common.dtsi | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8390-genio-common.dtsi b/arch/arm64/boot/dts/mediatek/mt8390-genio-common.dtsi index a37cf102a6e928440cc88e7e8fe0225fc28ec962..efdeca88b8c4e58f0c17825156276babf19af145 100644 --- a/arch/arm64/boot/dts/mediatek/mt8390-genio-common.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8390-genio-common.dtsi @@ -959,7 +959,11 @@ &sound { pinctrl-0 = <&audio_default_pins>; audio-routing = "Headphone", "Headphone L", - "Headphone", "Headphone R"; + "Headphone", "Headphone R", + "DMIC_INPUT", "AP DMIC", + "AP DMIC", "AUDGLB", + "AP DMIC", "MIC_BIAS_0", + "AP DMIC", "MIC_BIAS_2"; mediatek,adsp = <&adsp>; status = "okay"; From patchwork Tue Feb 25 14:33:53 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Patchwork-Id: 13990263 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B78DFC021B2 for ; Tue, 25 Feb 2025 16:41:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References :Message-Id:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date: From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=S6uKjY+c8znArEdsXxvvHalAJGtJQsKZwUYyqgytrlU=; b=xsQC+UldHcdQ2AL/5yWmI1BN8k 9rsgKfqCeRw58Ubd1yrfPBYfMW7ynGweYuv2A4g+DEwgfOBnpfApOvpj1ZAGCa7WloJDtn0UB50YN OKzvmjvqktkR19IHVy0juzwbAWygJdO14YRKXwVFLpu8baGa2B4aeL4RqdFBZSjzMXhgu7O1TpUZo BE3ri1RrKJZ6ok2PdesD0Lnli3+zAbbPhIFqd+Kc1etAIryb8EoIDavYYvTLDy6jQRh9Ibu/SsH1p o+Y9W8kuagHnKpHh3HHmAnt6nmI6aS5mwm7xohOTZShdnY+5RoapWEtn3rC3hZXINJ374l1SN/BOR fgD76eWg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tmxzf-00000000Jah-0ixR; Tue, 25 Feb 2025 16:41:15 +0000 Received: from bali.collaboradmins.com ([148.251.105.195]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tmw21-0000000HXpG-3RPk; Tue, 25 Feb 2025 14:35:35 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1740494132; bh=Skk39L7rjdPJjn3Yg0DBWoQQlhn9HJYB37tSSwUK8o4=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=bE+rB8Y1zsPx3E+gIBvGT2pcZT6YLZKwtTgTLm+h+8lfv5Ru8YqRCDR420+DE+Pa3 xFJyKfgFFemOuRxpScg8CEf/Dvt/eeGk4PZfCntr5814qcMCCzm1sHv4NcAg9ojXKD HU9jjhu3Jcqe4DcR/ujcLd+ikMu4d1Jgm6T0XPSmwRSFIsePIO85TTCMfUa3HWLJo2 xOLFEJStSXDcGmC2gN2//BAuhMn+WhbXukDVlQ3o2D+MP30fCWPlHw6SZAYQlZrYfP +iNf4BRLAoWDpuJUa5aetmNnubRkTZuTWCrNDsLYXEusyCH8fnn8eh/BRhiFm0bSGp b6mbv9rHe339w== Received: from [192.168.0.47] (unknown [IPv6:2804:14c:1a9:53ee::1004]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: nfraprado) by bali.collaboradmins.com (Postfix) with ESMTPSA id 9055617E0E91; Tue, 25 Feb 2025 15:35:28 +0100 (CET) From: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= Date: Tue, 25 Feb 2025 11:33:53 -0300 Subject: [PATCH v2 7/8] ASoC: dt-bindings: mediatek,mt8188-mt6359: Add DMIC backend to dai-link MIME-Version: 1.0 Message-Id: <20250225-genio700-dmic-v2-7-3076f5b50ef7@collabora.com> References: <20250225-genio700-dmic-v2-0-3076f5b50ef7@collabora.com> In-Reply-To: <20250225-genio700-dmic-v2-0-3076f5b50ef7@collabora.com> To: Liam Girdwood , Mark Brown , Jaroslav Kysela , Takashi Iwai , Matthias Brugger , AngeloGioacchino Del Regno , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Trevor Wu Cc: kernel@collabora.com, linux-sound@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Mailer: b4 0.14.2 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250225_063534_002749_1BBFF776 X-CRM114-Status: UNSURE ( 7.92 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org MT8188 platforms also have DMIC DAIs, which were previously undescribed. Add DMIC_BE as a possible backend for the dai-link property. Signed-off-by: Nícolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno --- Documentation/devicetree/bindings/sound/mediatek,mt8188-mt6359.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/sound/mediatek,mt8188-mt6359.yaml b/Documentation/devicetree/bindings/sound/mediatek,mt8188-mt6359.yaml index 362e729b51b43ec16716aee70ad736420def81f3..8c77e7f68ad7b6f5b88b53cedccb291139a2eeea 100644 --- a/Documentation/devicetree/bindings/sound/mediatek,mt8188-mt6359.yaml +++ b/Documentation/devicetree/bindings/sound/mediatek,mt8188-mt6359.yaml @@ -62,6 +62,7 @@ patternProperties: - PCM1_BE - DL_SRC_BE - UL_SRC_BE + - DMIC_BE codec: description: Holds subnode which indicates codec dai. From patchwork Tue Feb 25 14:33:54 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Patchwork-Id: 13990264 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E7DDEC021BE for ; Tue, 25 Feb 2025 16:41:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References :Message-Id:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date: From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=sxDpq1MTc8T7isEWATvD0EHbxutb1rkwsDjYgWdD0HY=; b=0XhReVyk1mrQEx/H9HEo0xJuQ4 73C/0XdVVq7Ahd8JPZc593Byygau56UpC6bFU/0HB4dsjDjIgdVn7bZmXjnIgdNtaI97J6k/DCMhj RexY+VzmsYXgxFG4rPIs8J5kv0Jsymrdqj3N0PX3nUImqoJvOHFlP6Ai2cfW4ontZZXd45RQTR/AW +gdSUTmtBYC2qVB5Q1Cah4AfzOc9WSQvwJE4GyK5rkGhrnZWS0SddzZ7q/OTgCQtjhZtZCP1meVkt F/tgqz5oVQjOC9v06aGhsUCf7W46xt0iyiA2eNMpoD9CZvp1t4KeYqSkQ1KX+JGR1iNI4FetC3fCj hYsSkFmQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tmxzi-00000000JfX-204X; Tue, 25 Feb 2025 16:41:18 +0000 Received: from bali.collaboradmins.com ([2a01:4f8:201:9162::2]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tmw26-0000000HXrJ-1KzB; Tue, 25 Feb 2025 14:35:39 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1740494136; bh=qVV8kVOhgmF8ivc217Cn73eSTlkBc3CdkndiqKhaMgE=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=FhjLbkqddWAwTD4TtQ4cAhWO0rMwRCsgE9B3muy8SXbHEEhqkSiG+9bwExP/7MBCJ 44dvHpYoviV1HjASKa7hm8dSvLG6t4hV3pMyhlFLOFU5vA/L+9sj/diiU7r6v8Hx98 qaRfiJzJj7esvIksUT2kAyIpJXDZWyYEZujAaTeYC5M9W3nehQAwVRGz22x2TrdKVB AlwWx6xJ4WPvO6an2zvWKoXUFxf6OugCKBPuSwfNO90VfLXfGwL7+F2q2x7YbNNU+a i9IRZlWuHkKf2CwWlvHKC74vUrBH2fZft5IlSFRSgDo5jOuIKHOQDQFfAnYFfzrnTa bGccwDUcUBp1g== Received: from [192.168.0.47] (unknown [IPv6:2804:14c:1a9:53ee::1004]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: nfraprado) by bali.collaboradmins.com (Postfix) with ESMTPSA id F15BA17E0DD7; Tue, 25 Feb 2025 15:35:32 +0100 (CET) From: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= Date: Tue, 25 Feb 2025 11:33:54 -0300 Subject: [PATCH v2 8/8] arm64: dts: mediatek: mt8390-genio-common: Add delay codec for DMIC MIME-Version: 1.0 Message-Id: <20250225-genio700-dmic-v2-8-3076f5b50ef7@collabora.com> References: <20250225-genio700-dmic-v2-0-3076f5b50ef7@collabora.com> In-Reply-To: <20250225-genio700-dmic-v2-0-3076f5b50ef7@collabora.com> To: Liam Girdwood , Mark Brown , Jaroslav Kysela , Takashi Iwai , Matthias Brugger , AngeloGioacchino Del Regno , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Trevor Wu Cc: kernel@collabora.com, linux-sound@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= , Zoran Zhan X-Mailer: b4 0.14.2 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250225_063538_501180_0953030C X-CRM114-Status: UNSURE ( 8.94 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The signal from the dual digital microphones connected to the DMIC_BE takes 30ms to settle after being enabled. Add a dmic-codec with corresponding wakeup-delay-ms to prevent an initial "pop" sound when recording with the microphones. Co-developed-by: Zoran Zhan Signed-off-by: Zoran Zhan Signed-off-by: Nícolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8390-genio-common.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8390-genio-common.dtsi b/arch/arm64/boot/dts/mediatek/mt8390-genio-common.dtsi index efdeca88b8c4e58f0c17825156276babf19af145..6aa59acd77c245e5fcf7044859a5985f503daeb3 100644 --- a/arch/arm64/boot/dts/mediatek/mt8390-genio-common.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8390-genio-common.dtsi @@ -218,6 +218,13 @@ usb_p2_vbus: regulator-9 { regulator-max-microvolt = <5000000>; enable-active-high; }; + + dmic_codec: dmic-codec { + #sound-dai-cells = <0>; + compatible = "dmic-codec"; + num-channels = <2>; + wakeup-delay-ms = <30>; + }; }; &adsp { @@ -974,6 +981,14 @@ codec { sound-dai = <&pmic 0>; }; }; + + dai-link-1 { + link-name = "DMIC_BE"; + + codec { + sound-dai = <&dmic_codec>; + }; + }; }; &spi2 {