From patchwork Tue Feb 25 18:09:04 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chaitanya Kumar Borah X-Patchwork-Id: 13990512 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3E159C021BB for ; Tue, 25 Feb 2025 18:24:43 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id DEF7010E794; Tue, 25 Feb 2025 18:24:42 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="mgQoh4S5"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.21]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8A56510E793; Tue, 25 Feb 2025 18:24:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1740507881; x=1772043881; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=xku03V5fJSaKYGqA1F2Fxp5Pzm0t+jp9vJ/aUzZZB+I=; b=mgQoh4S5bqUxSqy6pWefF3cWc8MIH/5abp4ApYoxQwTjg1jTQtV1kr09 9X0Z3U9C8NkIs+yQMs/oePaN0s1FPwffiZEfx7bTwuWLFOEQ3IBUGZJR1 7lgDVbnuSuIl6aO3bjp+tAlwFyq7WBuQeDkpG9g8TKr0ecE766LX/jl9M NvFVDIOmCTus0l1TLwReqrFhcf47weA3lWX0UEPKY02uOU9dY0sNo7PYk fpU32mMGxrGNfDWNP1RFxSOOSdwk3fd7AI7BDKYJ+EqYUc09Jn3KWCIiD YdI51ShM53yd05C/RXaVfLNeNgUMR++9929OfCGl+Tag3J76//RpIvO/I g==; X-CSE-ConnectionGUID: h+wXRvKxQ2+zWq89VkJN/w== X-CSE-MsgGUID: jvbpaH6ET8+hHBjKxPJcRQ== X-IronPort-AV: E=McAfee;i="6700,10204,11356"; a="41245936" X-IronPort-AV: E=Sophos;i="6.13,314,1732608000"; d="scan'208,223";a="41245936" Received: from fmviesa009.fm.intel.com ([10.60.135.149]) by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Feb 2025 10:24:41 -0800 X-CSE-ConnectionGUID: 9AU93LCZRbuizNFjtWqrTw== X-CSE-MsgGUID: 2Rid8mJITRCRq2N380tnGg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,314,1732608000"; d="scan'208,223";a="117081417" Received: from dut-2a59.iind.intel.com ([10.190.239.113]) by fmviesa009.fm.intel.com with ESMTP; 25 Feb 2025 10:24:39 -0800 From: Chaitanya Kumar Borah To: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org Cc: ville.syrjala@linux.intel.com, uma.shankar@intel.com, chaitanya.kumar.borah@intel.com Subject: [PATCH 1/2] drm/i915/display: Add MMIO path for double-buffered LUT registers Date: Tue, 25 Feb 2025 23:39:04 +0530 Message-Id: <20250225180905.1588084-2-chaitanya.kumar.borah@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250225180905.1588084-1-chaitanya.kumar.borah@intel.com> References: <20250225180905.1588084-1-chaitanya.kumar.borah@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From PTL, LUT registers are made double buffered. This helps us to program them in the active region without any concern of tearing. This particulary helps in case of displays with high refresh rates where vblank periods are shorter. This patch makes the following changes - Adds the macro HAS_DOUBLE_BUFFERED_LUT() to distinguish platforms that have double buffered LUT registers. - Program LUT values in active region through intel_pre_update_crtc() - Disable updating of LUT values during vblank. - Disable pre-loading of LUT values as they are no longer single buffered. Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/i915/display/intel_color.c | 4 ++++ drivers/gpu/drm/i915/display/intel_crtc.c | 4 +++- drivers/gpu/drm/i915/display/intel_display.c | 6 +++++- drivers/gpu/drm/i915/display/intel_display_device.h | 1 + 4 files changed, 13 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c index cfe14162231d..c3ee34b96c15 100644 --- a/drivers/gpu/drm/i915/display/intel_color.c +++ b/drivers/gpu/drm/i915/display/intel_color.c @@ -2022,6 +2022,10 @@ static bool intel_can_preload_luts(struct intel_atomic_state *state, { const struct intel_crtc_state *old_crtc_state = intel_atomic_get_old_crtc_state(state, crtc); + struct intel_display *display = to_intel_display(crtc); + + if (HAS_DOUBLE_BUFFERED_LUT(display)) + return false; return !old_crtc_state->post_csc_lut && !old_crtc_state->pre_csc_lut; diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c b/drivers/gpu/drm/i915/display/intel_crtc.c index 5b2603ef2ff7..927f9acf61c4 100644 --- a/drivers/gpu/drm/i915/display/intel_crtc.c +++ b/drivers/gpu/drm/i915/display/intel_crtc.c @@ -432,10 +432,12 @@ static void intel_crtc_vblank_work(struct kthread_work *base) struct intel_crtc_state *crtc_state = container_of(work, typeof(*crtc_state), vblank_work); struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); + struct intel_display *display = to_intel_display(crtc_state); trace_intel_crtc_vblank_work_start(crtc); - intel_color_load_luts(crtc_state); + if (!HAS_DOUBLE_BUFFERED_LUT(display)) + intel_color_load_luts(crtc_state); if (crtc_state->uapi.event) { spin_lock_irq(&crtc->base.dev->event_lock); diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 065fdf6dbb88..919e236a9650 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -6879,9 +6879,13 @@ static void intel_pre_update_crtc(struct intel_atomic_state *state, if (!modeset && intel_crtc_needs_color_update(new_crtc_state) && - !new_crtc_state->use_dsb) + !new_crtc_state->use_dsb) { intel_color_commit_noarm(NULL, new_crtc_state); + if (HAS_DOUBLE_BUFFERED_LUT(display)) + intel_color_load_luts(new_crtc_state); + } + if (!new_crtc_state->use_dsb) intel_crtc_planes_update_noarm(NULL, state, crtc); } diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h index fc33791f02b9..419d0213e412 100644 --- a/drivers/gpu/drm/i915/display/intel_display_device.h +++ b/drivers/gpu/drm/i915/display/intel_display_device.h @@ -155,6 +155,7 @@ struct intel_display_platforms { #define HAS_DMC(__display) (DISPLAY_RUNTIME_INFO(__display)->has_dmc) #define HAS_DMC_WAKELOCK(__display) (DISPLAY_VER(__display) >= 20) #define HAS_DOUBLE_BUFFERED_M_N(__display) (DISPLAY_VER(__display) >= 9 || (__display)->platform.broadwell) +#define HAS_DOUBLE_BUFFERED_LUT(__display) (DISPLAY_VER(__display) >= 30) #define HAS_DOUBLE_WIDE(__display) (DISPLAY_VER(__display) < 4) #define HAS_DP_MST(__display) (DISPLAY_INFO(__display)->has_dp_mst) #define HAS_DP20(__display) ((__display)->platform.dg2 || DISPLAY_VER(__display) >= 14) From patchwork Tue Feb 25 18:09:05 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chaitanya Kumar Borah X-Patchwork-Id: 13990513 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 79B6BC021B2 for ; Tue, 25 Feb 2025 18:24:44 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 266D810E796; Tue, 25 Feb 2025 18:24:44 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="hUlcuU/e"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.21]) by gabe.freedesktop.org (Postfix) with ESMTPS id 5DB6510E795; Tue, 25 Feb 2025 18:24:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1740507883; x=1772043883; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=B0fb9SGJQkHys+MAP7X3pLLbUOfZuUP44QonMfY4lyQ=; b=hUlcuU/elrGPEoHRd42Nd4/e4OXZT4+B6eg4bfNcB6y5fXfYla0RYA/D IZ6K7GLoOWM8J9zl6UnXbZJgDYJyfyy7lu1Bib23Yqxe0KaV8XEZhLEYN Dy+CY8tL+Y4GJXwdDeLBaBb8NVxnDx1HCNwacl2It2jn+n5NeQt6Ndjvm Xfgzg6nL5/l0fSeW7DJCu1W++fB+qHRsgouhyDZ1sOGh7KgaydFn76I64 jzRcST4t3bm9j6eVfwH9sHUwwUBSbAsW27KvbcL8fq/xGqJm+zGnwhW1A hrxanBXulicU5J52R2iERPhGZIJ0sOpkmbxMgsxoXgpGd9sqJ68/sdAph w==; X-CSE-ConnectionGUID: kCMivubdSaeaECvkE16GfQ== X-CSE-MsgGUID: 9QT2wHfyTXmEViw7hi9JdQ== X-IronPort-AV: E=McAfee;i="6700,10204,11356"; a="41245937" X-IronPort-AV: E=Sophos;i="6.13,314,1732608000"; d="scan'208,223";a="41245937" Received: from fmviesa009.fm.intel.com ([10.60.135.149]) by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Feb 2025 10:24:43 -0800 X-CSE-ConnectionGUID: kDPB9nszRASk92QPfWo2bw== X-CSE-MsgGUID: VqljkwQXRbazX0hEZSm58w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,314,1732608000"; d="scan'208,223";a="117081422" Received: from dut-2a59.iind.intel.com ([10.190.239.113]) by fmviesa009.fm.intel.com with ESMTP; 25 Feb 2025 10:24:41 -0800 From: Chaitanya Kumar Borah To: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org Cc: ville.syrjala@linux.intel.com, uma.shankar@intel.com, chaitanya.kumar.borah@intel.com Subject: [PATCH 2/2] drm/i915/display: Don't wait for vblank for LUT DSB programming Date: Tue, 25 Feb 2025 23:39:05 +0530 Message-Id: <20250225180905.1588084-3-chaitanya.kumar.borah@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250225180905.1588084-1-chaitanya.kumar.borah@intel.com> References: <20250225180905.1588084-1-chaitanya.kumar.borah@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From PTL, LUT registers are made double buffered. With this change, we don't need to wait for vblank to program them. Start DSB1 for programming them without waiting for vblank. Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/i915/display/intel_display.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 919e236a9650..9c3fdfcd6759 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -7352,6 +7352,7 @@ static void intel_atomic_dsb_finish(struct intel_atomic_state *state, { struct intel_crtc_state *new_crtc_state = intel_atomic_get_new_crtc_state(state, crtc); + struct intel_display *display = to_intel_display(state); if (!new_crtc_state->use_dsb && !new_crtc_state->dsb_color_vblank) return; @@ -7408,7 +7409,8 @@ static void intel_atomic_dsb_finish(struct intel_atomic_state *state, if (new_crtc_state->dsb_color_vblank) intel_dsb_chain(state, new_crtc_state->dsb_commit, - new_crtc_state->dsb_color_vblank, true); + new_crtc_state->dsb_color_vblank, + HAS_DOUBLE_BUFFERED_LUT(display) ? false : true); intel_dsb_finish(new_crtc_state->dsb_commit); }