From patchwork Wed Feb 26 20:25:03 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Atish Kumar Patra X-Patchwork-Id: 13993150 Received: from mail-pl1-f171.google.com (mail-pl1-f171.google.com [209.85.214.171]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 31220275617 for ; Wed, 26 Feb 2025 20:25:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740601513; cv=none; b=cAHU/NwzVAtkU5XZi4HGbGO5cra5jXEKga80yQ9postam9A+5yEeY1epO3QZveM8FY5PMQc7HhUMn7QT9hDdUuv5AmdkE6JV3LGU9gtJ8cfW7mWffG/RLOvb2+aifioW8MOa0/OZGlqmC7dtDLMLa0rtcavn7fMGxXVGkH/YaX0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740601513; c=relaxed/simple; bh=13OFkK4DG9rlwr0Q6UrPqb9K5Q7tJkO1UyK3M9GC5A8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=eHU0uoj3f9W1bMoaGcYUq7dr07oEDqknj4QJoloPDM5729mn8Nr73iZ2qTcljp6ghBoAQio8LsJdnQ2rlqodGAze2piqkUIXUSMGbp6kpTwUiLCh5NOdcnI0/LHPwE7AIzZ9nRz0opn7SxEQgUeOOqNpRT0ekWEdudyh+Pds+rY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=rivosinc.com; spf=pass smtp.mailfrom=rivosinc.com; dkim=pass (2048-bit key) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.b=BXQPDPNZ; arc=none smtp.client-ip=209.85.214.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=rivosinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rivosinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.b="BXQPDPNZ" Received: by mail-pl1-f171.google.com with SMTP id d9443c01a7336-220f4dd756eso3054695ad.3 for ; Wed, 26 Feb 2025 12:25:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1740601511; x=1741206311; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=9sbKkO5vslqQzNclWEzfBDF/g1FIfkcy+q0e0Bhe+Aw=; b=BXQPDPNZbX13CwkrIyYIjEg+U58EB6MUFXSyyF9WOWONVJYXG5FuaygjySUX46g8Go h+WXZwMOubdtLoc4mE9A1a23bHPjBGqn8iY2KWCKOqYrV1OT+DonxYw7cnubFWMnZu9O yJsqqt8hvmdp3kPThziblnH87SBYXi95v1isx+/xb3jFLQayUgsz5mbPR0/3oA+qorhq 1gZHnB2NwnsmONtzMFa/z75gUekNWiMHWw1sk0KqMmMR2KF4JKxwfVoQ1GvN9UlwvUzb M7sNYLyLogYSBQHqTsHN6mzXpkfRsHkUpbpRTHruXuima+Clf2WDylAT5NtweNcOOk+Y 1t3A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1740601511; x=1741206311; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=9sbKkO5vslqQzNclWEzfBDF/g1FIfkcy+q0e0Bhe+Aw=; b=X/TLFPUre2Yn1tv1tOXccv+Ltsc+cb01PHTQ1NWR4RIo4YeSDYKordthsVvXklVKGL lGimz0rHrq1LOYOlAv4qeNCn2oAMe1L3HxXBAam01MYhMi8GjaJDBRSq0unq/Q8S9VeF kYWQPfttMkAI+xeA+EPmQeM8f2uE43UnmW3f3EAH+kdLpspHkb2cihc8GCb4mjV29xAZ e+x940y0wkB6SsT30iLAwfTr5LCAANDFclcUtHCk8PX6d0pla55lkWhuNEXsLy7SkNXw EcSCRY8nLS+93Yf81xAUHk3g2CdwTmnyUjyfFKRhpygaSMbpnd7azP3SlJALSqot6B3C 9jiw== X-Forwarded-Encrypted: i=1; AJvYcCX9FzGFyjNZfZI6tKW3VtMyfIsR5rV+DemE3kYxuXKsUics79o2ixS4tLahN6SG5iQW4A9kWHRCUE9lCXnXrV0=@vger.kernel.org X-Gm-Message-State: AOJu0YwqHr2LnbjCwU08JdEZ1tF2vzEMvCxD90XYPtdQxSaJn9/TZb5H JeTdv+HJ/aQ6M3kKk6Dr1WP8c3/8oj1ckeZ/tGqH1bbaxb3lkzwBUfHfFoBq2XA= X-Gm-Gg: ASbGncuMOkZPg1wPLVLgLw1DzhqjFLhzA5sWM9GQlcbNmFL0kVojs+JB2Y7xwAki4gO 9XDhDtweB9cndzR3Jr+TZjomDq/+SNsut05+d+lHO+lyr0Fq3zUbVqyXKb+K6wt58INHA9uiDHW mHs+8UVLSSi6U3L8qu3Aj85SPWtiOvpRFhw94HyX3XaIginru/I4GPPUeVZAwcj+lrIwF5RGrZd tiyCovgn9HxaoQ0ol+4QsaJ+vbtPJ2jmtLdpmEadTE5+aIEzFbjjlP6DMDP45Oy613Vx4dorA71 /FAcL0epqjZSRxQdN53LbW4KAdGrVZ1sWBVcM+s= X-Google-Smtp-Source: AGHT+IEWIj7IHjMpuZgHnt8pmhZWNooJK4EQmrGTIUbek2AswW1q0QzF8a3PR6HcOQhdoiMYN4qKxA== X-Received: by 2002:a05:6a00:1ad4:b0:730:888a:252a with SMTP id d2e1a72fcca58-7347918d99bmr11980276b3a.15.1740601511484; Wed, 26 Feb 2025 12:25:11 -0800 (PST) Received: from atishp.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7347a7f7de2sm4100963b3a.106.2025.02.26.12.25.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 26 Feb 2025 12:25:11 -0800 (PST) From: Atish Patra Date: Wed, 26 Feb 2025 12:25:03 -0800 Subject: [PATCH 1/4] RISC-V: KVM: Disable the kernel perf counter during configure Precedence: bulk X-Mailing-List: linux-kselftest@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250226-kvm_pmu_improve-v1-1-74c058c2bf6d@rivosinc.com> References: <20250226-kvm_pmu_improve-v1-0-74c058c2bf6d@rivosinc.com> In-Reply-To: <20250226-kvm_pmu_improve-v1-0-74c058c2bf6d@rivosinc.com> To: Anup Patel , Atish Patra , Paul Walmsley , Palmer Dabbelt , Andrew Jones , Paolo Bonzini , Shuah Khan Cc: kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org, Atish Patra X-Mailer: b4 0.15-dev-13183 The perf event should be marked disabled during the creation as it is not ready to be scheduled until there is SBI PMU start call or config matching is called with auto start. Otherwise, event add/start gets called during perf_event_create_kernel_counter function. It will be enabled and scheduled to run via perf_event_enable during either the above mentioned scenario. Fixes: 0cb74b65d2e5 ("RISC-V: KVM: Implement perf support without sampling") Signed-off-by: Atish Patra --- arch/riscv/kvm/vcpu_pmu.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/riscv/kvm/vcpu_pmu.c b/arch/riscv/kvm/vcpu_pmu.c index 2707a51b082c..78ac3216a54d 100644 --- a/arch/riscv/kvm/vcpu_pmu.c +++ b/arch/riscv/kvm/vcpu_pmu.c @@ -666,6 +666,7 @@ int kvm_riscv_vcpu_pmu_ctr_cfg_match(struct kvm_vcpu *vcpu, unsigned long ctr_ba .type = etype, .size = sizeof(struct perf_event_attr), .pinned = true, + .disabled = true, /* * It should never reach here if the platform doesn't support the sscofpmf * extension as mode filtering won't work without it. From patchwork Wed Feb 26 20:25:04 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Atish Kumar Patra X-Patchwork-Id: 13993151 Received: from mail-pl1-f173.google.com (mail-pl1-f173.google.com [209.85.214.173]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 334F914EC62 for ; Wed, 26 Feb 2025 20:25:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.173 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740601514; cv=none; b=jFInhXmlv2gBcT5wUZT8vU/Cb7Er3ryTK5pJ7sLyuBgbUxUA9K+/+YhTt3elOqhd2ZuorheCCDqFXHM5VxeiRxi9X69stuEz91BA3BO8FvrmiliVsGAe3SPuBBIOkXcC3e5xYYHozN8t5wldiCcvPLVao5BoLdOKOnJYRN46IY8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740601514; c=relaxed/simple; bh=QBL/O8yP4cmvHwkIXxg+UQn9RcAHq1y3i0H/8OMhFUE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=HoptCsqPjuY0sJ+/iqifTiU9N/5a9mg8fupChy2U53ks/e+8zQAb8rg4q+H559G7OuPLxXpOsTHO/9q9Ic+j9KhfX6YBO7hl9xDaB3anW8FwFa9ptCr1VpGWQaiM2sZBKC2XXbWzOLQmRwbmZyqu6Z6sYhGnCsGCVPqxbujdEJ4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=rivosinc.com; spf=pass smtp.mailfrom=rivosinc.com; dkim=pass (2048-bit key) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.b=f5A/MGIS; arc=none smtp.client-ip=209.85.214.173 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=rivosinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rivosinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.b="f5A/MGIS" Received: by mail-pl1-f173.google.com with SMTP id d9443c01a7336-221206dbd7eso3170045ad.2 for ; Wed, 26 Feb 2025 12:25:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1740601512; x=1741206312; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=ElQVVHGvy1PCJJEf3x7O3Wq4GDtnkpov0IINkskU+dk=; b=f5A/MGISzjFSrplNEjJKnl/3POUBYwbI696oW9ISqocm+RF1moBEyuauSmL798Jm2B MaIDz2DygXuvQ5sxD+ZRUZZHl9d/hR2lirJHDU0rRb99bRnu/8zoxv0s2B8tAMeHldtO R3RYksblxEoXwgRvEEmnjpJmfcgrrM2fHD3r8u9ZI4E3lw4ODDkJf8AjZZA2oasdM6HH 9cm7j/eWlYrpPviN77cd2OWi8gvte12UeduYszP5VcEsBCN2hGRo4NiO8h4Ff9cbQJ3w OC5pUMOpSoypJBBFsQMrB+a+5TcCUcNQjE5s4vMtbb6NjFpHxOT62uYrfI6RHUrHSS+r g6rQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1740601512; x=1741206312; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ElQVVHGvy1PCJJEf3x7O3Wq4GDtnkpov0IINkskU+dk=; b=YoX1zcYXZ0P69XxHRxB+/q8+gfHGAT5KE0H/M9jyvSYIUnuWr0cO18V6p5fPwaMBBq /H4wbj+KOSs6ngzrn/KGn/MEhk+nUi0n/qtilLl4QIpH01wpKx10+8ET7xmtsPJf16ke 3LaZVbHGLA9vGH8tnv9uhTbvmI+ucu/6p1pBsfn8UnYwnLRg92NDvWJSqdpu9g/cdBx3 PEZQPAAE11jO9j4UNIuJFEyGf0p3SezJDc0/hYxp1mI8f0F5KPQkB0yBhKajasrGxkr+ PTQUrzOTktrRiN9Km7gSHmTAfkzg8LzJm18fFips/uKYwWp+i80bDfCnPzpvj22btXej bHsQ== X-Forwarded-Encrypted: i=1; AJvYcCWOZcc3RmWdudjERvTaWN8BAXwpuMF9IEY8wZm/OUK3iHhUABIyKS/7MAwuKmEJ7B+q8kJ8uuADT5ThzS5z7zA=@vger.kernel.org X-Gm-Message-State: AOJu0Yz+i5c+jgI2D3MSUolQSSdcc9b1d4++HdAkf87CpXdbAvSO9hHr A0Kl1rmA9Morvh5EuNzE9n9M5LBkXldCXY/ZSeh3z+nyUPGLD38ikO2CDQNOSwPBtZkyI/NjF6d S X-Gm-Gg: ASbGncuLDD+X5bkRnuFCyuFITL3S6Xc6SDLB3EVoHbeG8J9Xb+Drhw73Sp54zGNV2K4 f8iHQb7wDX77IctbSsOzgErZoLvJbwKvJN9uDygPK2vM7HiQ/ku4gW/01usO1dKF9+JVABYHF8z 70eeXdW+X6NvYbInZwwR0LgFGkNSZLbeqtKPeY+o60bghG+p627wxTprpeDKd+7lCUohLl0cu0O 5itnVuMl+D2PR0A7qKAgVuT80k7D8P5iAevCcJ12ujJDkDfYBBMEYwMyk1O08HYVo9UkQpF4HTj AnymOn43BuasneuK86MiIUKjWdi2LBf713XZBxw= X-Google-Smtp-Source: AGHT+IFqbgodjU8bkbuDJlr/kSmLoWQ/SEWprjRdiuzVEUOwMd31NiSuNQgBjPeic2eXnfkR3SMW9w== X-Received: by 2002:a05:6a00:a1e:b0:732:22e3:7de6 with SMTP id d2e1a72fcca58-7348be4650cmr6595071b3a.17.1740601512524; Wed, 26 Feb 2025 12:25:12 -0800 (PST) Received: from atishp.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7347a7f7de2sm4100963b3a.106.2025.02.26.12.25.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 26 Feb 2025 12:25:12 -0800 (PST) From: Atish Patra Date: Wed, 26 Feb 2025 12:25:04 -0800 Subject: [PATCH 2/4] KVM: riscv: selftests: Do not start the counter in the overflow handler Precedence: bulk X-Mailing-List: linux-kselftest@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250226-kvm_pmu_improve-v1-2-74c058c2bf6d@rivosinc.com> References: <20250226-kvm_pmu_improve-v1-0-74c058c2bf6d@rivosinc.com> In-Reply-To: <20250226-kvm_pmu_improve-v1-0-74c058c2bf6d@rivosinc.com> To: Anup Patel , Atish Patra , Paul Walmsley , Palmer Dabbelt , Andrew Jones , Paolo Bonzini , Shuah Khan Cc: kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org, Atish Patra X-Mailer: b4 0.15-dev-13183 There is no need to start the counter in the overflow handler as we intend to trigger precise number of LCOFI interrupts through these tests. The overflow irq handler has already stopped the counter. As a result, the stop call from the test function may return already supported error which is fine as well. Signed-off-by: Atish Patra --- tools/testing/selftests/kvm/riscv/sbi_pmu_test.c | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/tools/testing/selftests/kvm/riscv/sbi_pmu_test.c b/tools/testing/selftests/kvm/riscv/sbi_pmu_test.c index f45c0ecc902d..284bc80193bd 100644 --- a/tools/testing/selftests/kvm/riscv/sbi_pmu_test.c +++ b/tools/testing/selftests/kvm/riscv/sbi_pmu_test.c @@ -118,8 +118,8 @@ static void stop_counter(unsigned long counter, unsigned long stop_flags) ret = sbi_ecall(SBI_EXT_PMU, SBI_EXT_PMU_COUNTER_STOP, counter, 1, stop_flags, 0, 0, 0); - __GUEST_ASSERT(ret.error == 0, "Unable to stop counter %ld error %ld\n", - counter, ret.error); + __GUEST_ASSERT(ret.error == 0 || ret.error == SBI_ERR_ALREADY_STOPPED, + "Unable to stop counter %ld error %ld\n", counter, ret.error); } static void guest_illegal_exception_handler(struct ex_regs *regs) @@ -137,7 +137,6 @@ static void guest_irq_handler(struct ex_regs *regs) unsigned int irq_num = regs->cause & ~CAUSE_IRQ_FLAG; struct riscv_pmu_snapshot_data *snapshot_data = snapshot_gva; unsigned long overflown_mask; - unsigned long counter_val = 0; /* Validate that we are in the correct irq handler */ GUEST_ASSERT_EQ(irq_num, IRQ_PMU_OVF); @@ -151,10 +150,6 @@ static void guest_irq_handler(struct ex_regs *regs) GUEST_ASSERT(overflown_mask & 0x01); WRITE_ONCE(vcpu_shared_irq_count, vcpu_shared_irq_count+1); - - counter_val = READ_ONCE(snapshot_data->ctr_values[0]); - /* Now start the counter to mimick the real driver behavior */ - start_counter(counter_in_use, SBI_PMU_START_FLAG_SET_INIT_VALUE, counter_val); } static unsigned long get_counter_index(unsigned long cbase, unsigned long cmask, From patchwork Wed Feb 26 20:25:05 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Atish Kumar Patra X-Patchwork-Id: 13993152 Received: from mail-pl1-f174.google.com (mail-pl1-f174.google.com [209.85.214.174]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 60F5D256C62 for ; Wed, 26 Feb 2025 20:25:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.174 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740601515; cv=none; b=BK6nt3kdZP4uFDpfu9PHugqHV/XHq5OVkQYEfWxOMBpERl2+JhsHvcaW7BEkIwygxEWgHj9iZDRxaGCVBuYitmR6pF6/TlnOzfgKo2PIZdka+QvWmESOEiPVa10OtCse2gIrVAQOCJVFMN/8jeQO5o0Ii7TpMDHNOL2TZzBwPLg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740601515; c=relaxed/simple; bh=9XSeIVk0INKB27lpWUTKEMf0kFLfVrH++iNpjyRvsG0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=KgdtyuVNFuBAXur/jNDp/ucPfBVwX7msbXeI58N7AdKvYkqN8eyQVemsTPFsVh2f7XtPVuyAaj6i/hkZtGetRxQY7kG+P4iz7cb00DCKRj3ou1GSnI8ZW1/Kfu+UOjn8GL5Z1Ou1HFSxoSdglzojwgbOBID7VhDq8QOH7tqqDTA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=rivosinc.com; spf=pass smtp.mailfrom=rivosinc.com; dkim=pass (2048-bit key) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.b=PMEK6OfK; arc=none smtp.client-ip=209.85.214.174 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=rivosinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rivosinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.b="PMEK6OfK" Received: by mail-pl1-f174.google.com with SMTP id d9443c01a7336-22328dca22fso2348115ad.1 for ; Wed, 26 Feb 2025 12:25:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1740601513; x=1741206313; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=CUL9vPYfIsBYwLRgV8qB6RCZqGNjsrfsVU1Ka6aFYBY=; b=PMEK6OfKiv7r5lLXvZ4FIM4i3tlZZZicCAz+1V3T6kbjOGfImsREskI3N8d7UBipzw JAf61SmxKwGSHRnEwgH/0cREdBgd0DfYrNTRB09as7G8AXpl0PGzQ7kJPmfSPZFMLWZH R40VxRTdUyEM2q3FghqX4NCCwS0qF3SMuT/9rPU6ZYYAwMFiub32a7LIKMN1fWT/MTSS 6GE/v7Hl+JN1BjPRFJtomZAt88q9Cwio8PQiOnTm/5cEAwwxkW1NjlocQAeyEEZA5NcR 4ZrK8PyBUKk7YUtR0rzAiHB/MgFFEx0b5nlLqpEALk3PnGF1aS5EQ1Z425dPqge8TSzc 9AXA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1740601513; x=1741206313; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=CUL9vPYfIsBYwLRgV8qB6RCZqGNjsrfsVU1Ka6aFYBY=; b=mxs9HjtFpHZ4M0G3ik59CM7r+3GXPnq+vNUU04nopoiE7QaQ+xCV3VIPPzqMJUxh/7 ZBMBtoqwhk6gmwbS5Hdtgctwq6CeQw0HcI79HlYUC9cAaBIrsE8hAptugo0d4ZLa6bMU doOrzUwamf8R4P718sdCB+v+k3E9zDB5v+ybS7LfowqO4ytQWsx0p8rt4qa3nNN2AyPW RbPuRLCdcEj11TOdq1papYbDSGEOTIZilkUQnkgYZ+dEY1zPmsmx2AWkp/zI+oVSEHog hvxINPdPDqRtujZpi0kqGS+2oZqtPQEujk0PjLVWAJpcLGKbtHJ3kvnrhp12oTXWnq1e M9Kg== X-Forwarded-Encrypted: i=1; AJvYcCXMqnkIZkSjBw9vtqYDeSFqyKnhTqcwDoI8PUuzeuCtpqyD7MCPrPfrF2UqUwPtxACZR0AYcaUW/2qJGEkV3Wk=@vger.kernel.org X-Gm-Message-State: AOJu0YxCniv+0Vc1dYLPXTJnfYg5jQhvpD615KlfTEOspMIYwXvr+3oV vtjX71Jq4g2ADPJXstj0T2JjPee8pS1z8cUfBgvK7b9zaA3oObOashnsh/4UCyc= X-Gm-Gg: ASbGncv35eRMHm9k7jU4+jZaa+vwEngph3fBdFQn/iAVkSRqg4uL+sTlmF/OcE0fBB2 yqkLO1pkf7hjaGNRZOhg3LhlKmX9pYfTn93yHymPZDd/WpmQS7gBC1KWoI9LmZo29RMN7hKrBFh o/6MHJC7ENDbDbz2AMfcYCdg20izuFj9sAOk6IQCq/2LIiTCWVByl5lO0lz9tE1Kf+STq8y2yaj BhjzOp0jdGWe+dVCmiwDd1riV+ClO6lxrJI7aVah/6WUK82btCD2UmD0+Shkkl5sMA962euCsFf Tiyc6cCihjzTJCpEGssfCGIRwcyNgPsr4PizGds= X-Google-Smtp-Source: AGHT+IHVxqxBZKHrXRbMLQx94rePhcj/KMG3dvOa85IKXsVDVZmW7p4O5rV92MpOYiz4YyuBZBfk6Q== X-Received: by 2002:a05:6a00:1828:b0:732:5b10:572b with SMTP id d2e1a72fcca58-734790cbaf5mr13305359b3a.10.1740601513545; Wed, 26 Feb 2025 12:25:13 -0800 (PST) Received: from atishp.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7347a7f7de2sm4100963b3a.106.2025.02.26.12.25.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 26 Feb 2025 12:25:13 -0800 (PST) From: Atish Patra Date: Wed, 26 Feb 2025 12:25:05 -0800 Subject: [PATCH 3/4] KVM: riscv: selftests: Change command line option Precedence: bulk X-Mailing-List: linux-kselftest@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250226-kvm_pmu_improve-v1-3-74c058c2bf6d@rivosinc.com> References: <20250226-kvm_pmu_improve-v1-0-74c058c2bf6d@rivosinc.com> In-Reply-To: <20250226-kvm_pmu_improve-v1-0-74c058c2bf6d@rivosinc.com> To: Anup Patel , Atish Patra , Paul Walmsley , Palmer Dabbelt , Andrew Jones , Paolo Bonzini , Shuah Khan Cc: kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org, Atish Patra X-Mailer: b4 0.15-dev-13183 The PMU test commandline option takes an argument to disable a certain test. The initial assumption behind this was a common use case is just to run all the test most of the time. However, running a single test seems more useful instead. Especially, the overflow test has been helpful to validate PMU virtualizaiton interrupt changes. Switching the command line option to run a single test instead of disabling a single test also allows to provide additional test specific arguments to the test. The default without any options remains unchanged which continues to run all the tests. Signed-off-by: Atish Patra --- tools/testing/selftests/kvm/riscv/sbi_pmu_test.c | 40 +++++++++++++++--------- 1 file changed, 26 insertions(+), 14 deletions(-) diff --git a/tools/testing/selftests/kvm/riscv/sbi_pmu_test.c b/tools/testing/selftests/kvm/riscv/sbi_pmu_test.c index 284bc80193bd..533b76d0de82 100644 --- a/tools/testing/selftests/kvm/riscv/sbi_pmu_test.c +++ b/tools/testing/selftests/kvm/riscv/sbi_pmu_test.c @@ -39,7 +39,11 @@ static bool illegal_handler_invoked; #define SBI_PMU_TEST_SNAPSHOT BIT(2) #define SBI_PMU_TEST_OVERFLOW BIT(3) -static int disabled_tests; +struct test_args { + int disabled_tests; +}; + +static struct test_args targs; unsigned long pmu_csr_read_num(int csr_num) { @@ -604,7 +608,11 @@ static void test_vm_events_overflow(void *guest_code) vcpu_init_vector_tables(vcpu); /* Initialize guest timer frequency. */ timer_freq = vcpu_get_reg(vcpu, RISCV_TIMER_REG(frequency)); + + /* Export the shared variables to the guest */ sync_global_to_guest(vm, timer_freq); + sync_global_to_guest(vm, vcpu_shared_irq_count); + sync_global_to_guest(vm, targs); run_vcpu(vcpu); @@ -613,28 +621,30 @@ static void test_vm_events_overflow(void *guest_code) static void test_print_help(char *name) { - pr_info("Usage: %s [-h] [-d ]\n", name); - pr_info("\t-d: Test to disable. Available tests are 'basic', 'events', 'snapshot', 'overflow'\n"); + pr_info("Usage: %s [-h] [-t ]\n", name); + pr_info("\t-t: Test to run (default all). Available tests are 'basic', 'events', 'snapshot', 'overflow'\n"); pr_info("\t-h: print this help screen\n"); } static bool parse_args(int argc, char *argv[]) { int opt; - - while ((opt = getopt(argc, argv, "hd:")) != -1) { + int temp_disabled_tests = SBI_PMU_TEST_BASIC | SBI_PMU_TEST_EVENTS | SBI_PMU_TEST_SNAPSHOT | + SBI_PMU_TEST_OVERFLOW; + while ((opt = getopt(argc, argv, "h:t:n:")) != -1) { switch (opt) { - case 'd': + case 't': if (!strncmp("basic", optarg, 5)) - disabled_tests |= SBI_PMU_TEST_BASIC; + temp_disabled_tests &= ~SBI_PMU_TEST_BASIC; else if (!strncmp("events", optarg, 6)) - disabled_tests |= SBI_PMU_TEST_EVENTS; + temp_disabled_tests &= ~SBI_PMU_TEST_EVENTS; else if (!strncmp("snapshot", optarg, 8)) - disabled_tests |= SBI_PMU_TEST_SNAPSHOT; + temp_disabled_tests &= ~SBI_PMU_TEST_SNAPSHOT; else if (!strncmp("overflow", optarg, 8)) - disabled_tests |= SBI_PMU_TEST_OVERFLOW; + temp_disabled_tests &= ~SBI_PMU_TEST_OVERFLOW; else goto done; + targs.disabled_tests = temp_disabled_tests; break; case 'h': default: @@ -650,25 +660,27 @@ static bool parse_args(int argc, char *argv[]) int main(int argc, char *argv[]) { + targs.disabled_tests = 0; + if (!parse_args(argc, argv)) exit(KSFT_SKIP); - if (!(disabled_tests & SBI_PMU_TEST_BASIC)) { + if (!(targs.disabled_tests & SBI_PMU_TEST_BASIC)) { test_vm_basic_test(test_pmu_basic_sanity); pr_info("SBI PMU basic test : PASS\n"); } - if (!(disabled_tests & SBI_PMU_TEST_EVENTS)) { + if (!(targs.disabled_tests & SBI_PMU_TEST_EVENTS)) { test_vm_events_test(test_pmu_events); pr_info("SBI PMU event verification test : PASS\n"); } - if (!(disabled_tests & SBI_PMU_TEST_SNAPSHOT)) { + if (!(targs.disabled_tests & SBI_PMU_TEST_SNAPSHOT)) { test_vm_events_snapshot_test(test_pmu_events_snaphost); pr_info("SBI PMU event verification with snapshot test : PASS\n"); } - if (!(disabled_tests & SBI_PMU_TEST_OVERFLOW)) { + if (!(targs.disabled_tests & SBI_PMU_TEST_OVERFLOW)) { test_vm_events_overflow(test_pmu_events_overflow); pr_info("SBI PMU event verification with overflow test : PASS\n"); } From patchwork Wed Feb 26 20:25:06 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Atish Kumar Patra X-Patchwork-Id: 13993153 Received: from mail-pl1-f175.google.com (mail-pl1-f175.google.com [209.85.214.175]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 42792257ACA for ; Wed, 26 Feb 2025 20:25:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.175 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740601516; cv=none; b=biShXxhJsFLQ2/gKCDo/+WY4uPbkVodd3llkc9yonHf7UkQyDo6T3xmV/P8qGCC1jCY4roYzgIKqIyYDFiZdfQO2YJdyVSKhY6fWycgvjTmrwmIkZiOEAumhDCsOpKV+6A0JDqRDZ5Ym/4/PT5DW46EKRd1HsRUiN8JP580Y9Os= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740601516; c=relaxed/simple; bh=60wxU0lkF9ES7Q2Y1xRG0c1Mze/bj/KB7bV531P/zP8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=XFKKwWCyDCt1/GJRrlzdc+SKpfjn5x81Ox/8m4PzOszICC4VhdM0Q4Qe7wQcXWohIUL8pQc6IB8dOpIaAEnEIgfDIQwh+bXX5djzceAn0Kg4kmElUy1hwbNUJsflEhgwjok9LUOdRwTITR5Brbw4XbgFmjrqYIs0YvKMDkRAamI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=rivosinc.com; spf=pass smtp.mailfrom=rivosinc.com; dkim=pass (2048-bit key) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.b=jQh2RCUk; arc=none smtp.client-ip=209.85.214.175 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=rivosinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rivosinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=rivosinc-com.20230601.gappssmtp.com header.i=@rivosinc-com.20230601.gappssmtp.com header.b="jQh2RCUk" Received: by mail-pl1-f175.google.com with SMTP id d9443c01a7336-22349bb8605so3534615ad.0 for ; Wed, 26 Feb 2025 12:25:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1740601514; x=1741206314; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=K+xf5rb3O3ZrwcS1pmKysmwXefhXbLuGjQJfAu9gHOI=; b=jQh2RCUkMktFEZfucqbsRKlUqXy3ySCsKrij1MvceFCF9AKTip/2M8+Z/TrZhGc5xV OI8V/eSdPtEgZP1jaz8FI1+4mGffnWv0yJesWBHnNQl3y7M2z7BwrqiUtXoG0Zz/+y7D Eb2U2yIjPFmt/Y9df93LdHK/ixYNHQjjT2tddfvqP9vgRLFehQ+yFfjBGwcODwZuF/nB urD5L0jjR8JVJ3GeP1KStQxy+8iP6zsU4uDw9vRXmQCFnDUPxZ59ba73PUKmD4bwcfLf YLjGUMssmv/JChM1rnL2v3LxXqiOhXH0SEF9RNL0OBfN4qLqfT+UCShgDylR7+fWc2ui vtvw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1740601514; x=1741206314; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=K+xf5rb3O3ZrwcS1pmKysmwXefhXbLuGjQJfAu9gHOI=; b=aAmRJXVjfUeWpnGiCOayItcqcSQfyKbxft7wdgAAhqAsfl68sDskJvndeaZzuPU5yn +laruzACuaJiBSM0wv+SqgmX/6ckJt/ZKCmLw4dR3sZmB6l8YB2U5FTAC5b6GJNmMJmB +Nj7gLB9DDWXxjdvd/w4yRljWJJAIBkioBlNLSACrWqVdkPZvW+XV0Xq1yyePr57Ys+7 KHJI8ISvQ/LJ/yBwl8Us2QfTgERJlkJAZUFSmT/CeyCTZ1A7+TecHGqwxdV1XqbLkAkP UUFMchg6h3gfyIJT0oR/MRQHenTs4SPHaUiJdyJLvGcQ462pLv1dp+Hc3V9Qp8TRBf3J rhMw== X-Forwarded-Encrypted: i=1; AJvYcCWo1ZVnSp2CX0fN6f6Ax4ZuBsex/BiTn2NDBrgZVlN7APZJNUPrQGLho1uDYyYqNfW88FO+ity7YwqbUn1QKpc=@vger.kernel.org X-Gm-Message-State: AOJu0Yx1fQaOOAI6E2mZkScF7BVlL4KEMOp31ZHypD6Zj9Ne23EK4bik qX7KX0SGqVAELcwvEMGEQQHjP0TmUxcrBC0tCJVQF/vjn90+ZF5pxNszVyKqzgo= X-Gm-Gg: ASbGncu/ceOocTV2NCt+iGY3hUdAYIlmD+f3xQuwvI3KRVPntgzE/Mvfumm7l1/Lfl3 jubmNlRcL1p8OsN5VgYJ/5Zl7kzEQ3v6SypLVlJak9b7piM3nGbTXURElg6+QbieLn7fQU1h1w6 Zzb5CSzW+izu2FzBVeUMfhvdX378YFFo5XnG/9RIC+8shtaUtk1X8OXkXN5ezJe5ABRU3VwvOXl lMYVm3rzacPnmIDm+9CKyPN6Bwn+0TojSqB09JMpTRRBVNJHoMIM4uxtFjUap4zbAj1ovGTrmWo 5RFmE5zspRDpY3olNnpIhBzJloPfMiV/mZ4UV2E= X-Google-Smtp-Source: AGHT+IHw0vBB+PSny2qMliUf6DTVa+ZvGcPh/rPnK0tt+c9UR1fNAKJeSn8VDRagyarmbZCnK8Ejgg== X-Received: by 2002:a05:6a00:a26:b0:72d:3b2e:fef9 with SMTP id d2e1a72fcca58-734791aa184mr14536500b3a.20.1740601514558; Wed, 26 Feb 2025 12:25:14 -0800 (PST) Received: from atishp.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7347a7f7de2sm4100963b3a.106.2025.02.26.12.25.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 26 Feb 2025 12:25:14 -0800 (PST) From: Atish Patra Date: Wed, 26 Feb 2025 12:25:06 -0800 Subject: [PATCH 4/4] KVM: riscv: selftests: Allow number of interrupts to be configurable Precedence: bulk X-Mailing-List: linux-kselftest@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250226-kvm_pmu_improve-v1-4-74c058c2bf6d@rivosinc.com> References: <20250226-kvm_pmu_improve-v1-0-74c058c2bf6d@rivosinc.com> In-Reply-To: <20250226-kvm_pmu_improve-v1-0-74c058c2bf6d@rivosinc.com> To: Anup Patel , Atish Patra , Paul Walmsley , Palmer Dabbelt , Andrew Jones , Paolo Bonzini , Shuah Khan Cc: kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org, Atish Patra X-Mailer: b4 0.15-dev-13183 It is helpful to vary the number of the LCOFI interrupts generated by the overflow test. Allow additional argument for overflow test to accommodate that. It can be easily cross-validated with /proc/interrupts output in the host. Signed-off-by: Atish Patra --- tools/testing/selftests/kvm/riscv/sbi_pmu_test.c | 36 ++++++++++++++++++++---- 1 file changed, 30 insertions(+), 6 deletions(-) diff --git a/tools/testing/selftests/kvm/riscv/sbi_pmu_test.c b/tools/testing/selftests/kvm/riscv/sbi_pmu_test.c index 533b76d0de82..7c273a1adb17 100644 --- a/tools/testing/selftests/kvm/riscv/sbi_pmu_test.c +++ b/tools/testing/selftests/kvm/riscv/sbi_pmu_test.c @@ -39,8 +39,10 @@ static bool illegal_handler_invoked; #define SBI_PMU_TEST_SNAPSHOT BIT(2) #define SBI_PMU_TEST_OVERFLOW BIT(3) +#define SBI_PMU_OVERFLOW_IRQNUM_DEFAULT 5 struct test_args { int disabled_tests; + int overflow_irqnum; }; static struct test_args targs; @@ -478,7 +480,7 @@ static void test_pmu_events_snaphost(void) static void test_pmu_events_overflow(void) { - int num_counters = 0; + int num_counters = 0, i = 0; /* Verify presence of SBI PMU and minimum requrired SBI version */ verify_sbi_requirement_assert(); @@ -495,11 +497,15 @@ static void test_pmu_events_overflow(void) * Qemu supports overflow for cycle/instruction. * This test may fail on any platform that do not support overflow for these two events. */ - test_pmu_event_overflow(SBI_PMU_HW_CPU_CYCLES); - GUEST_ASSERT_EQ(vcpu_shared_irq_count, 1); + for (i = 0; i < targs.overflow_irqnum; i++) + test_pmu_event_overflow(SBI_PMU_HW_CPU_CYCLES); + GUEST_ASSERT_EQ(vcpu_shared_irq_count, targs.overflow_irqnum); + + vcpu_shared_irq_count = 0; - test_pmu_event_overflow(SBI_PMU_HW_INSTRUCTIONS); - GUEST_ASSERT_EQ(vcpu_shared_irq_count, 2); + for (i = 0; i < targs.overflow_irqnum; i++) + test_pmu_event_overflow(SBI_PMU_HW_INSTRUCTIONS); + GUEST_ASSERT_EQ(vcpu_shared_irq_count, targs.overflow_irqnum); GUEST_DONE(); } @@ -621,8 +627,11 @@ static void test_vm_events_overflow(void *guest_code) static void test_print_help(char *name) { - pr_info("Usage: %s [-h] [-t ]\n", name); + pr_info("Usage: %s [-h] [-t ] [-n ]\n", + name); pr_info("\t-t: Test to run (default all). Available tests are 'basic', 'events', 'snapshot', 'overflow'\n"); + pr_info("\t-n: Number of LCOFI interrupt to trigger for each event in overflow test (default: %d)\n", + SBI_PMU_OVERFLOW_IRQNUM_DEFAULT); pr_info("\t-h: print this help screen\n"); } @@ -631,6 +640,8 @@ static bool parse_args(int argc, char *argv[]) int opt; int temp_disabled_tests = SBI_PMU_TEST_BASIC | SBI_PMU_TEST_EVENTS | SBI_PMU_TEST_SNAPSHOT | SBI_PMU_TEST_OVERFLOW; + int overflow_interrupts = -1; + while ((opt = getopt(argc, argv, "h:t:n:")) != -1) { switch (opt) { case 't': @@ -646,12 +657,24 @@ static bool parse_args(int argc, char *argv[]) goto done; targs.disabled_tests = temp_disabled_tests; break; + case 'n': + overflow_interrupts = atoi_positive("Number of LCOFI", optarg); + break; case 'h': default: goto done; } } + if (overflow_interrupts > 0) { + if (targs.disabled_tests & SBI_PMU_TEST_OVERFLOW) { + pr_info("-n option is only available for overflow test\n"); + goto done; + } else { + targs.overflow_irqnum = overflow_interrupts; + } + } + return true; done: test_print_help(argv[0]); @@ -661,6 +684,7 @@ static bool parse_args(int argc, char *argv[]) int main(int argc, char *argv[]) { targs.disabled_tests = 0; + targs.overflow_irqnum = SBI_PMU_OVERFLOW_IRQNUM_DEFAULT; if (!parse_args(argc, argv)) exit(KSFT_SKIP);