From patchwork Thu Feb 27 12:36:19 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Himanshu Chauhan X-Patchwork-Id: 13994380 Received: from mail-pj1-f46.google.com (mail-pj1-f46.google.com [209.85.216.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BB7D122FE13 for ; Thu, 27 Feb 2025 12:36:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.216.46 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740659806; cv=none; b=HrIOHpmUmY75iGM9WlY5tWHKolJ1qLnhPMeSbJ/XDchbny25I1M8a57aPz6tRoLHd4wyoNs3vs3QscqNf9K/8L+I1z7ViS3kTULrfolcnMOl9EcqO5brBOX+BZ8dNcfeQDOkikqTKuQAJHKp8IINp8pkcJT4cY40zYT85hGdHQc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740659806; c=relaxed/simple; bh=4W8Vqpl+3IMkDiuQlRiTKkhuW1t/YZ/ZWyYWVjVjiH4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=aAMOAe83le5XAWfZG8bX0E1FtXoXgm83II0xAHrE3+JS3L1CYCv/a2aB9z0MFAcWG8k72CWssKUlc1mleQhYaiLmjRT7ONy3AqMqApj1Nq3xdSrpmMKPzOdOYTFU8WTQzqB7OaZtRM+snJ1fRh2nZmHg9Ep6uC/ra/RgFHRclTA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com; spf=pass smtp.mailfrom=ventanamicro.com; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b=WWt95wJi; arc=none smtp.client-ip=209.85.216.46 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b="WWt95wJi" Received: by mail-pj1-f46.google.com with SMTP id 98e67ed59e1d1-2fe77285e12so1670524a91.1 for ; Thu, 27 Feb 2025 04:36:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1740659804; x=1741264604; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=JeQ9SvTwKEilvSawoBKDfpL5rlVs3kDSMMrIWfL/lr8=; b=WWt95wJiIaUPtTEagHmAJfPWF4WsTvLJJ5r6dBuGBiQPe9WtLVOUuNVWDqOa/tb2O8 IzJeOxNAJZFigDiuVgl7a5vLlBtYGc21O34+od80johgNmw1+NzWO3JNCZeHWXYC2Q4C PFc+tn3NM2nNDptbiZagMjCQeUMzwK6fGZ8zxGoskaOmnEFp4gDXJ9FRpWbhWS2w77Ov JlSN/B9GMVe1HN2Wc19EEIej9PvKfRDCuYrLc4uoes8ldumWlEBilOb7ofjCB7MACiab QmRQdJUPrmFdziLvxPkt25XevTD6awiXWj8tLfm0WB5qK4Z6JOXVtch9OlCU+DS2y12s +y2g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1740659804; x=1741264604; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=JeQ9SvTwKEilvSawoBKDfpL5rlVs3kDSMMrIWfL/lr8=; b=H3l88qIoO1ZGVydAuT92qaQzstvJ2q30iW80jpmcHb8QYtuhS7HvNxIYkwfCHQ8lg9 Sm2e0aqnywz9mJdibByXwt4QqwkoRXLCCTpLnK/Kzdvzg9KU4qH8ShPWeRbdL3k6B7OT oomJ5oSRNgfRgCIkhk9YfaIwxtEGM+HZ5RsACj6sCA1+B4tjzYCPSze+ZCOFczp3sgdX VCkaNTCQh8frQXEtt1q4K8QhEwdHoXFfNAWd0drwl6MLtvOhxzE1+brcYR945NZPaTM+ Msi9wnBEtya7sxZCbkx/EutnX3XCawysLwHmbyrmFRJr/1c43cb2Lmk8gHcysUkJ3LE5 6BUA== X-Forwarded-Encrypted: i=1; AJvYcCU4O5RqqkZ9H/uWyOQArJgy2+kxOCePjBILm8ftDU9rHQREwbmj/0htIZ3xdX1en90/9L4mIcMwR236@vger.kernel.org X-Gm-Message-State: AOJu0YyW4qmdlzOyxdcul71GHcljdANUaa8Mna9bHLt5SUG98ijazq9Q rzhKq3lnjiAsNQ9ojJYQw2j8JrWT6vsX0OliQu0AOhvBrZv2tqqx+O77pt5xmZ0= X-Gm-Gg: ASbGncuW4TNsmjKWJu7GgSx79RhEKKyQss9F9tabxPHzKMmV4+wrQ60KZVWAtbopHsf Di0sdE7bHauYy6808lKJZmGLafVZbBK4K/e7Tc2kPtqcNXviEGTaGwPaxeeBP0VI1YGRT/3bZlj KomeCgcOE7LLV+m5qDd60+KFfpku6Ik1VKB2wJp3+85FhthTGh+7MVymMmFRhdKvT2BpBzfWu1B 70Z8LYfEn7MXOB85+vm9eTdFIzzwmH9T+Xi9tgjAW4g84i4Twna713mGiXyZe+Ro2rqk9DbpeNd Juz4DFJZNmhes/m6x1iOmsTIUTAYjRNuN73V X-Google-Smtp-Source: AGHT+IEWiqnbZ4w9mnQftgIr33jcau4DSGcKb/iqQJqvpeA7JbmmClnCCIaI0W3mRc0c/5zLfcvALg== X-Received: by 2002:a17:90b:2dc8:b0:2fa:ba3:5457 with SMTP id 98e67ed59e1d1-2fe68ae6c4fmr20594318a91.17.1740659804130; Thu, 27 Feb 2025 04:36:44 -0800 (PST) Received: from ventana-bhyve.. ([49.37.249.43]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-223504c5bddsm13219135ad.140.2025.02.27.04.36.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Feb 2025 04:36:43 -0800 (PST) From: Himanshu Chauhan To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org, linux-efi@vger.kernel.org, acpica-devel@lists.linux.dev Cc: paul.walmsley@sifive.com, palmer@dabbelt.com, lenb@kernel.org, james.morse@arm.com, tony.luck@intel.com, ardb@kernel.org, conor@kernel.org, cleger@rivosinc.com, robert.moore@intel.com, sunilvl@ventanamicro.com, apatel@ventanamicro.com, Himanshu Chauhan Subject: [RFC PATCH v1 01/10] riscv: Define ioremap_cache for RISC-V Date: Thu, 27 Feb 2025 18:06:19 +0530 Message-ID: <20250227123628.2931490-2-hchauhan@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250227123628.2931490-1-hchauhan@ventanamicro.com> References: <20250227123628.2931490-1-hchauhan@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 bert and einj drivers use ioremap_cache for mapping entries but ioremap_cache is not defined for RISC-V. Signed-off-by: Himanshu Chauhan --- arch/riscv/include/asm/io.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/riscv/include/asm/io.h b/arch/riscv/include/asm/io.h index 1c5c641075d2..e23a4901e928 100644 --- a/arch/riscv/include/asm/io.h +++ b/arch/riscv/include/asm/io.h @@ -30,6 +30,9 @@ #define PCI_IOBASE ((void __iomem *)PCI_IO_START) #endif /* CONFIG_MMU */ +#define ioremap_cache(addr, size) \ + ((__force void *)ioremap_prot((addr), (size), _PAGE_KERNEL)) + /* * Emulation routines for the port-mapped IO space used by some PCI drivers. * These are defined as being "fully synchronous", but also "not guaranteed to From patchwork Thu Feb 27 12:36:20 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Himanshu Chauhan X-Patchwork-Id: 13994381 Received: from mail-pl1-f174.google.com (mail-pl1-f174.google.com [209.85.214.174]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EE39D22FF44 for ; Thu, 27 Feb 2025 12:36:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.174 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740659811; cv=none; b=HQHTh6l0GRxbFpxQd2JdCbVv4/hiP0kgWjx3WUxiTW7fw+RUZXHrV+k9NDZeeanaAJTFZxDqjoXPcx0sgxll+0XSfm/4pD5ItGmdC+p6et1VnSCjj0PiQKYUnRarkF5zSi6sqrPoR22i3ah8x5KrPqkG4tqb/ewmXZFuKbE2Eqg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740659811; c=relaxed/simple; bh=TlIOJZgzYRa0uSdvlZ7h4NFliLwrLJg52Wgu33BrOfs=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=CwbeIXe8ph9QwIenEW3Eet43TExLR4deHgOUHPAnqeaNGTHCWedRQwrNBj7I05F65Oze+LJ6scP/GvYRYZ79uZ9qNBMJ6jNx22FPVotHo6CZojBJUjjFRev5DbHdTGt/beg3xu1KSj+huHFw8Ec8ilnGcxqYtxDyMIIynMQRRjs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com; spf=pass smtp.mailfrom=ventanamicro.com; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b=gJjdIbz2; arc=none smtp.client-ip=209.85.214.174 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b="gJjdIbz2" Received: by mail-pl1-f174.google.com with SMTP id d9443c01a7336-220d132f16dso10944785ad.0 for ; Thu, 27 Feb 2025 04:36:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1740659809; x=1741264609; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=EFXZa2m3ScC7B7xgAgov/Ch2E5BoKfJoACxjrPDC6sE=; b=gJjdIbz2EjD91RRxj+IUpT6zqd+Cccc1k4kTMQ1C20i+bS6x+pLAIWglGh3MkboIYm 2ALG1E2Z2SrdPGq74iq4w+WwKHyvUWijaBmivZae96ExuCIUoToTYKuNhiH4aIuBqEG/ z5AnFZHqLzwxvyXfYX+sZcJ1FVqehJnH9Q5f0AYLH2mJzdlporhyiGTbjwhUdO7PUcrd VRs6e9p05LfHI+dbFl4G2uLjz97PjzgYVaujMGoHl0OgatV6g5NRLfxIrBtsb7slPfvq ZjtLr2O1CAoYDODgWsgCfW7H6WkAPvdos/01aw9TOeVgxr7qHsrDtUAR9ZKmWcIB10ko DX3g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1740659809; x=1741264609; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=EFXZa2m3ScC7B7xgAgov/Ch2E5BoKfJoACxjrPDC6sE=; b=AN0qth3n4w7tTf+D8Wo0JqTm3iHs12QGGZHM/a0swXecM+ZNnA79QzOw3rkq65kbwM FHShiRDhnftEjcht/6fBp6elVOVbePjANGIlBtMI+zOfLoWrDU+rHkdIcJT0angoX5ri 5f9eMUA7vTyx9CYIrf/LYQgdoZ1wjqARbePco6QRmLIJ511qIgLhshqFAUoPqW/7Ydtf wHQbEU2/xhFGJHxjzXTk7O8pV4NXRkJFr7l8Pft5wnVAVo2Z7M554gAgeXk1os488o4X v2iNuTAco0xyvM1w0zzBZzgv4zMx1M8L3Hamn0tOTRNeoKaQS21PpEgsxehXg3sH9zlM IZLQ== X-Forwarded-Encrypted: i=1; AJvYcCX2edGnUCXlT7/BbDpPffJNrqV506iIv+YnVMB+KN4X+SvBl75L3ajrW8P2UKGWIHiTOq5Rlu4kwnHG@vger.kernel.org X-Gm-Message-State: AOJu0Yy+zeZWtQCpxAko9NpwQbsQK4bIJIwSAKedVenpOA4963C4pxdz J1ggE//hXtJTAEqg+uNkEfAuu2Y3qb4YIWvA76HQbHauV04p020eq7eOs+tboW5Ds+4Ic72v4M4 HU+E= X-Gm-Gg: ASbGncuwqfwqgyROjnlVFQX4g9yGKjThCSUySwuhIOhaeZLkQ8py9bwz5HZ02J3Zr2q P+yYVmffj68s29S5kOwgP1u3UXVL4p2wUG0TA13FewMyXccQic3nP2SCRL6ZlbJh3a48G8NStSW xhMo8bAu0wfCi6l7N9JMG2H7E9Xone6Fw6KoGAFwjAWns/suuIbVLUp8N5RZ0m7VwKkG1VDoBvd YlCbtaG8fd+n/CbOPUb75IrcpAHKrSeNz9dByZ13dQcpTh2fAEAT7emDQuPU/i2Yj/wdE8J667e W07aJ8Hs7+eME5P2T5QEZiKW3rTcmaqBVOyR X-Google-Smtp-Source: AGHT+IGIh9E0vXJbqDwy2DSU2gnNrcolcT0Umoa7eQqwP9lNhXHlny+mB50OGnl9ch8jNaDBTVMb8Q== X-Received: by 2002:a17:902:f706:b0:215:b058:289c with SMTP id d9443c01a7336-22320061fd6mr98812585ad.8.1740659809295; Thu, 27 Feb 2025 04:36:49 -0800 (PST) Received: from ventana-bhyve.. ([49.37.249.43]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-223504c5bddsm13219135ad.140.2025.02.27.04.36.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Feb 2025 04:36:49 -0800 (PST) From: Himanshu Chauhan To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org, linux-efi@vger.kernel.org, acpica-devel@lists.linux.dev Cc: paul.walmsley@sifive.com, palmer@dabbelt.com, lenb@kernel.org, james.morse@arm.com, tony.luck@intel.com, ardb@kernel.org, conor@kernel.org, cleger@rivosinc.com, robert.moore@intel.com, sunilvl@ventanamicro.com, apatel@ventanamicro.com, Himanshu Chauhan Subject: [RFC PATCH v1 02/10] riscv: Define arch_apei_get_mem_attribute for RISC-V Date: Thu, 27 Feb 2025 18:06:20 +0530 Message-ID: <20250227123628.2931490-3-hchauhan@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250227123628.2931490-1-hchauhan@ventanamicro.com> References: <20250227123628.2931490-1-hchauhan@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 ghes_map function uses arch_apei_get_mem_attribute to get the protection bits for a given physical address. These protection bits are then used to map the physical address. Signed-off-by: Himanshu Chauhan --- arch/riscv/include/asm/acpi.h | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/riscv/include/asm/acpi.h b/arch/riscv/include/asm/acpi.h index 6e13695120bc..0c599452ef48 100644 --- a/arch/riscv/include/asm/acpi.h +++ b/arch/riscv/include/asm/acpi.h @@ -27,6 +27,26 @@ extern int acpi_disabled; extern int acpi_noirq; extern int acpi_pci_disabled; +#ifdef CONFIG_ACPI_APEI +/* + * acpi_disable_cmcff is used in drivers/acpi/apei/hest.c for disabling + * IA-32 Architecture Corrected Machine Check (CMC) Firmware-First mode + * with a kernel command line parameter "acpi=nocmcoff". But we don't + * have this IA-32 specific feature on ARM64, this definition is only + * for compatibility. + */ +#define acpi_disable_cmcff 1 +static inline pgprot_t arch_apei_get_mem_attribute(phys_addr_t addr) +{ + /* + * Until we have a way to look for EFI memory attributes. + */ + return PAGE_KERNEL; +} +#else /* CONFIG_ACPI_APEI */ +#define acpi_disable_cmcff 0 +#endif /* !CONFIG_ACPI_APEI */ + static inline void disable_acpi(void) { acpi_disabled = 1; From patchwork Thu Feb 27 12:36:21 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Himanshu Chauhan X-Patchwork-Id: 13994382 Received: from mail-pl1-f176.google.com (mail-pl1-f176.google.com [209.85.214.176]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id ED3F722E011 for ; Thu, 27 Feb 2025 12:36:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.176 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740659816; cv=none; b=tZQEofAGMKX1JH126RVLcpy/rsZDIUFaAI/xYKDqI56R5gzLXMnRGfASHVvqS5c5sQa906PzZ3X48V3k7OFva7YNJAZHGaW7xTJ3yyA1R9ltL0qCR0EKP113bCXGdFjdnzon4cdfkL6avtivboLT+kGV+irKX69saVSU1IbFbXg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740659816; c=relaxed/simple; bh=67ls/POKUjWPQj872a0gGQ9pTH69yGPYjMpXWSU47vc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=fs+n8Q+ZMFweiuLUdTXaR2UespPzLh74dIr+H+V0D3gmgx6LP+wqTuEL4zXvyfG4rUILXaANeitwHKahVnl+zl1pqwMNKVX1NYKas83lB1Qe6rXLsUa249t2stQJth7ceQxE9PtnG92nAp3iaRHLZOWwSixrc4rbZGjWlVXxVic= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com; spf=pass smtp.mailfrom=ventanamicro.com; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b=brhJ3G17; arc=none smtp.client-ip=209.85.214.176 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b="brhJ3G17" Received: by mail-pl1-f176.google.com with SMTP id d9443c01a7336-223594b3c6dso7029645ad.2 for ; Thu, 27 Feb 2025 04:36:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1740659814; x=1741264614; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=J9tq9UU0quHGMxFhwTeHcsfn2hmcgfg1pwu61qXDOW4=; b=brhJ3G17yPJnnjGQzqGegbVp8BYquOSnTZC6Fvu2VbWhQfLlhaIr9k5gsN6BZfSzRC Rt8IyBKBeRpvhrrrNgImwQNS5WJg0qPiRxHSd+4IDNgMI6seFqJAvmp5u8RuLmXYuM9v jn8Dj045c+sKMNJVHYdNafDeFAQ8ebLCM969WMa4OOjpEuvYqj2xSlRsAisVSw1ndFLK Z9Qt5J8FLbR2DLN94wNnIDVxT/meE97dsqiN8TZIbHIabLYr65EILamnCumiB6ONGg4M +K6oT2aZq9ruFhFHcIuq3KkFwT9J3n9IUR2cic2X5F36R3s7lEOBtxv3EUqYSGdTnRLS VOOA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1740659814; x=1741264614; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=J9tq9UU0quHGMxFhwTeHcsfn2hmcgfg1pwu61qXDOW4=; b=ZDfKH1zTOgV013PDXssFdEWXJHhP8OwHReRnhNFaiBpIsJQFX3UxCJQDE/gteNwkTj DvwYPcyy1W4YVe21ajUe4H+UH3m+T9pq0cZv2yjQyeq3DnsUOAJeaVAMvA50JtwE0eQu Oh7+9Du1/2g9uhWP6701knZRWGpPKi5eX6RAqH4ZHoQYBIk9qeey93ZRdgEhsP9jENQh oCZvc/3xfawRa3unyrNHubGCc8rqf54HP0ahaPPeOOc/mY8tdnCMmTKL6EfnBrFV1DV8 bsBImDSYtSoi4ozF+I84eyoGBhlIOcTZFeqDmmMPCuZ/gx8c99fjc4FiFIqzwcFaMW7X n3kQ== X-Forwarded-Encrypted: i=1; AJvYcCU23C05aD69AbzypUsMv/0Cl0dIbHrCvwI766syLA1NNnd6bbPod5125UJey2XPKQFUNBwXJ+ATewG9@vger.kernel.org X-Gm-Message-State: AOJu0Yz4ry74w3qaIwfjnjZQ7/Ge6mDFlldI+LVJHmP9eWS53b5eBudU GO8uw1YLVxzvvQY+WqKOJ4SAaMNaRiimaW7ji9uRE8rIzGGCyFqdGocRCnLwd7o= X-Gm-Gg: ASbGncuo42vIDEuUP+2sETIaL0tp2QMky5Hv3jCJljJxqnGCe4w4yjNlC53VgMAVh5H gax7PElZ6+d8O1WirMDDdSIf2LlU44YCdZy3ZUc8wZTztmQWWI8X6HgQgdK12nCk+hZWE+zlYw8 t6+gbX9cJErRUhQzhnADFAlGs9VWZS0enlqNvSVcvTzRYwaTSUUQu4GSoN6vUQgl73BAEzveOgg rq53YHmrj/dOUcQ4PJ/EqT7XwG4tNYhNsflZlJS8pm+FFI+bZelhOAQw3rf+lqGKFjKh1ag0HdW +xui6xkTJS8W18Ov7QL4pJW6ywT8576LLoHf X-Google-Smtp-Source: AGHT+IHVfqxszUaYFM69ostPnakgkazkeqpkl6j+lHgInhnZ+gtwN2tclnkImUVqCbY1mWtl7iGV3Q== X-Received: by 2002:a17:903:22c2:b0:21f:55e:ed71 with SMTP id d9443c01a7336-22307b45598mr186650025ad.5.1740659814323; Thu, 27 Feb 2025 04:36:54 -0800 (PST) Received: from ventana-bhyve.. ([49.37.249.43]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-223504c5bddsm13219135ad.140.2025.02.27.04.36.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Feb 2025 04:36:54 -0800 (PST) From: Himanshu Chauhan To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org, linux-efi@vger.kernel.org, acpica-devel@lists.linux.dev Cc: paul.walmsley@sifive.com, palmer@dabbelt.com, lenb@kernel.org, james.morse@arm.com, tony.luck@intel.com, ardb@kernel.org, conor@kernel.org, cleger@rivosinc.com, robert.moore@intel.com, sunilvl@ventanamicro.com, apatel@ventanamicro.com, Himanshu Chauhan Subject: [RFC PATCH v1 03/10] acpi: Introduce SSE in HEST notification types Date: Thu, 27 Feb 2025 18:06:21 +0530 Message-ID: <20250227123628.2931490-4-hchauhan@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250227123628.2931490-1-hchauhan@ventanamicro.com> References: <20250227123628.2931490-1-hchauhan@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Introduce a new HEST notification type for RISC-V SSE events. The GHES entry's notification structure contains the notification to be used for a given error source. For error sources delivering events over SSE, it should contain the new SSE notification type. Signed-off-by: Himanshu Chauhan --- include/acpi/actbl1.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/include/acpi/actbl1.h b/include/acpi/actbl1.h index 387fc821703a..df577bf25423 100644 --- a/include/acpi/actbl1.h +++ b/include/acpi/actbl1.h @@ -1515,7 +1515,8 @@ enum acpi_hest_notify_types { ACPI_HEST_NOTIFY_SEI = 9, /* ACPI 6.1 */ ACPI_HEST_NOTIFY_GSIV = 10, /* ACPI 6.1 */ ACPI_HEST_NOTIFY_SOFTWARE_DELEGATED = 11, /* ACPI 6.2 */ - ACPI_HEST_NOTIFY_RESERVED = 12 /* 12 and greater are reserved */ + ACPI_HEST_NOTIFY_SSE = 12, /* RISCV SSE */ + ACPI_HEST_NOTIFY_RESERVED = 13 /* 13 and greater are reserved */ }; /* Values for config_write_enable bitfield above */ From patchwork Thu Feb 27 12:36:22 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Himanshu Chauhan X-Patchwork-Id: 13994383 Received: from mail-pl1-f169.google.com (mail-pl1-f169.google.com [209.85.214.169]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1751122D4F3 for ; Thu, 27 Feb 2025 12:36:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.169 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740659821; cv=none; b=Dn1dqOMjgCplElKi0ljO7tHPrlmNg5A09otzkYd2/jV2VjRtjTf63jdW84QZ/Edk0PTSM0wn70lBZpz/2Dj0MhwI1VOUGiRbOqlKmta62jtsY2+TXufiqgyXi7O5hNbq+cxf2vEvSvScsZvSIyAKH+lcz92IagbYLICqKEMVwAs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740659821; c=relaxed/simple; bh=rGWTzIIeViWhGlD8y9psao/8+qBiPCPjAKNTSslE/48=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=mqd0QGras6wXqNl/Ivcx/CJPr+kR+oL4mb9LbxBurXjLcLQPVv1dmax3GzlBM4RP5hyLqoyOiZYkr1bfhgSHq3IkaLO4nMihN/FCPueEzBkiRl9R90hSiMyBOM0vo8EG21KWx6l2H9VPA2prRFcqd1kLygqdgwHzctGc2Ik9OrU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com; spf=pass smtp.mailfrom=ventanamicro.com; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b=TqbrQbZB; arc=none smtp.client-ip=209.85.214.169 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b="TqbrQbZB" Received: by mail-pl1-f169.google.com with SMTP id d9443c01a7336-2212a930001so21333425ad.0 for ; Thu, 27 Feb 2025 04:36:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1740659819; x=1741264619; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=CvAemUtNRi9tUzWy4d/eui/dPAc9laFlbuC1eHj4jHs=; b=TqbrQbZBaYvY5y2YdGx3D0sg+gCI3UW5XBphTHTYm5Cgh5IaLoFi1b6kmPZtkK9ott oFBlbok9irak0WiJ7CBLZdtotOAHfKN66/9y2wmUuyKF4TzfdrgmNLIpwcjW2Lskdsbj xRJAFeyMCsQ5NQYuj8x8G2me+OuBQHyzIwd4Jqn5TWUA/axkd3ipYiM/5T/jXRuod28s M40yFH5ryMwAuFHv2GiiZSGEindR4F6jOXsWRoL101D/+Ce5OwBqhME6rKmt8XUj51Tp S3nCzkxEtNCmkFjYEClVZqZlOs1mTk7MPLpnDk8xdn/kW3NKaYwxZ+CAkkCzx4qV0R5A q8jg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1740659819; x=1741264619; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=CvAemUtNRi9tUzWy4d/eui/dPAc9laFlbuC1eHj4jHs=; b=GUiObY+yyQVQIccdLYGHyCV+Yyz0fHIHTQ3BAFXtswcHZ1FmnXXr+GCJmSMQxEhCxT TU8Q6PFHOU5Wme3bZrYSfTE/lROJu/Skicb1W4WTC38A1sxg0bfY40wDV/Rxmemwr9A1 hpIonPYx/HW0R0/xasdT56becESmJwI7f0OGWBquNHGAPke5iGPP8ERoRoqSeycrreCc ub+WiCSR4EN4ArjuMQwE1LcUkUQRcIXLiykyCdj7z2fXSwwNSVcH0zVcs+h6UekmR97t TDksgjIDIky/1nmAOdMxj/XOl0sN1B6XN/wVDGdNfMFUxtTx8JcLOUs7gKH5XFNmJHeW zlsA== X-Forwarded-Encrypted: i=1; AJvYcCXrQskYJPkzBeIKlrhNku/BY7Zp4dcqpVwjsmp+Cszeo91Zj/LTYqbv7xon7oQkdmaEI/EExq3vYBAK@vger.kernel.org X-Gm-Message-State: AOJu0YzTDosb5w/+muPayhMTspBaoK6pH4A++D6j9lNRODASuGrNkcr4 KutbUeq4nCRdI6jd4OVBe3n9HaTbaAQL2bL8jmbOWr2mp38dY1bVaQWiaQaSRXQ= X-Gm-Gg: ASbGncsHAT0A+NTriZVtTcwGD0fVBUTWNqEmhKnT7Kc5nSZ6+EcOELnnKBl0f7Nfp6d U5HrrFeV2YAQ0O54sW6+Z4jPqR+Q9uZHe3IgBrZfkeRZ9qooply77siqs9oI8Lk5qhNu2ApwjW8 hVy/c+ohLvbaIcC7yDiQ5S1LkPO2KpHEoubT+6/ah/4nWEXqnjbz+l4BBlJ2LkgWcb+Mz7LCVtC GzUCHvvdJTw4TuzhvLxAWB9fCHVc4AUkScZZq7/yUQO/3VbkJoJW5UYzQIg46Lh2PoGoVAkXgaf VUnEobeAzw9fn0hG7rYnxgLxl842ON52ZiHa X-Google-Smtp-Source: AGHT+IFYVtprbH9evLqNClf+RfnxGHGySs3bbzOLOoRiAZRk+G2rF8ng8rvkLS2SHiGq2QScEJQDTw== X-Received: by 2002:a17:903:228d:b0:21f:1bd:efd4 with SMTP id d9443c01a7336-221a0ed7e4cmr423165445ad.19.1740659819428; Thu, 27 Feb 2025 04:36:59 -0800 (PST) Received: from ventana-bhyve.. ([49.37.249.43]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-223504c5bddsm13219135ad.140.2025.02.27.04.36.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Feb 2025 04:36:59 -0800 (PST) From: Himanshu Chauhan To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org, linux-efi@vger.kernel.org, acpica-devel@lists.linux.dev Cc: paul.walmsley@sifive.com, palmer@dabbelt.com, lenb@kernel.org, james.morse@arm.com, tony.luck@intel.com, ardb@kernel.org, conor@kernel.org, cleger@rivosinc.com, robert.moore@intel.com, sunilvl@ventanamicro.com, apatel@ventanamicro.com, Himanshu Chauhan Subject: [RFC PATCH v1 04/10] riscv: Add fixmap indices for GHES IRQ and SSE contexts Date: Thu, 27 Feb 2025 18:06:22 +0530 Message-ID: <20250227123628.2931490-5-hchauhan@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250227123628.2931490-1-hchauhan@ventanamicro.com> References: <20250227123628.2931490-1-hchauhan@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 GHES error handling requires fixmap entries for IRQ notifications. Add fixmap indices for IRQ, SSE Low and High priority notifications. Signed-off-by: Himanshu Chauhan --- arch/riscv/include/asm/fixmap.h | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/riscv/include/asm/fixmap.h b/arch/riscv/include/asm/fixmap.h index 0a55099bb734..fa3a0ec0c55c 100644 --- a/arch/riscv/include/asm/fixmap.h +++ b/arch/riscv/include/asm/fixmap.h @@ -38,6 +38,14 @@ enum fixed_addresses { FIX_TEXT_POKE0, FIX_EARLYCON_MEM_BASE, +#ifdef CONFIG_ACPI_APEI_GHES + /* Used for GHES mapping from assorted contexts */ + FIX_APEI_GHES_IRQ, +#ifdef CONFIG_RISCV_SSE + FIX_APEI_GHES_SSE_LOW_PRIORITY, + FIX_APEI_GHES_SSE_HIGH_PRIORITY, +#endif /* CONFIG_RISCV_SSE */ +#endif /* CONFIG_ACPI_APEI_GHES */ __end_of_permanent_fixed_addresses, /* * Temporary boot-time mappings, used by early_ioremap(), From patchwork Thu Feb 27 12:36:23 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Himanshu Chauhan X-Patchwork-Id: 13994384 Received: from mail-pl1-f178.google.com (mail-pl1-f178.google.com [209.85.214.178]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E1D5322F163 for ; Thu, 27 Feb 2025 12:37:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.178 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740659826; cv=none; b=A2+BuNkbo/rKALKNgwSZ377py2Dj9lainhfebT0nvis76qO3gZnUHjkZlsBTmwY0wpu01W089CK0hdZ1SWEMJ2FzhH8jkCa9ThBttW4xYq5NhEZ6ISI3aFCyUuzGMXtjUNfvyEZI8wEVY1lEZBisAXe6q9L+VF+FnoPJuJUYy5s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740659826; c=relaxed/simple; bh=Z//TrE4r/P2ORzzHAfm4GTTR/FxL7V8in1j3CWT877s=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ZbyluQ4cIUTMpoFzsmYm4Kti5nGDu8TLOgQHE9Fn9SCXpIRiVXOM2XDKO1eLYQ9YOZ/Zb4VFZneOoCoSWKDjb1OQfmPo4N7VKv7D3uktyJYKB5t7nDEi+U/blbdpcpVb1qQx4h+rMcalTvKDpBZnXB+9ENiaFeOSmztSbQuUPcE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com; spf=pass smtp.mailfrom=ventanamicro.com; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b=N8sF/g18; arc=none smtp.client-ip=209.85.214.178 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b="N8sF/g18" Received: by mail-pl1-f178.google.com with SMTP id d9443c01a7336-220c8f38febso14516645ad.2 for ; Thu, 27 Feb 2025 04:37:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1740659824; x=1741264624; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=TtQ05xO+EnCCpS3XXknTi9mJFSuRz+8Y7aZxhDwaUdc=; b=N8sF/g18F4mULr2QnOeMcijsv9rbPzKDiy535tf7ppdmm6v90UZrtJ+px9jcdoKXXR nc2bbymnOr+QWE3R6+lNFbdCR6Dzye5GzAAMBAJZ3u3BZEBpCJ/KBhBcJKuSUwPJYaps wnFoL67qy8MkzA1QCI3Njl/g55O+s1PNcRCd9OW70JKtoQFwuqd0nvsWVsOd6x7ayG5O 4uwbHPvTklIYnX1VO+UcFvY7cQ/wf+1GhZZRsS0vXrmBOJW8fJtQwS0FhVzSNtQT/rrt RqqKtX0SSI1b4AMgabkD/VhcU+q6dp/RbY51yghXY4GzNbElV/VTJZGatbR7r2s3ePH/ UQQQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1740659824; x=1741264624; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=TtQ05xO+EnCCpS3XXknTi9mJFSuRz+8Y7aZxhDwaUdc=; b=suT95i8eTGUSQNCp+Qw7QhiH6Da17RFhabs7pWAjW9OogNB5iWdcIMHlsNzgFnmKDf n+WlFcfyiqHnyl/tLgQBVQr6s/vARPb4TOTT/QdiBAEij0p7/IQ4g445pDMpBemfUt2Y 3dDY/JTGN15EBAl8PFIPCdA9Bu1MFrYbhpHCqKc3YpHx9mx40GLU5cjZ2NaNC8iT3RU9 pyt/IGGPYakx/HudHNrPPfHh3aCbynud/fKwi23C/vOlsnw42HAiJNF8T//bh1Qk6nAd i1GlLjSwUB3c+Bm+4a/5n04tPcb5O7vfobDJXKTSZlj/30Uf7Rz4vGZw16+Er44scfyZ kRFw== X-Forwarded-Encrypted: i=1; AJvYcCVL9gFIysY2XrG+zPngCo6Bd+RsPBD8tFThEx3j5Ypifm8PaYxm3DPpXIJWzIKy/VS6/wh3pjdK3L/B@vger.kernel.org X-Gm-Message-State: AOJu0YxM7ZE+k+Gxzotf0pk5INopBXPwBNEAJr87G+bNRdkg6kaAxxTN /4SlawtqW6uRu2219E6UbIeDOWfJZgo/q6wu7gTRxnuNzHYtMvUb6deichSQ+EM= X-Gm-Gg: ASbGncvtg2UuvrkD76bOqc8E80z3S2jURJKSkSp9l6J+T/wQ+Ine3ubuoDcgmq853SV cN7h+jmDgGz6QbeVk4yUgBlYB/tjjc4vSOeaSWofG7xFahHG9zUoUVJOumYOI0OkJR0LWK8bern WmcEJr9pxWqW4FSFyP22Nl0oy9xcZ579t0ayA9GSZ7CNBYuoc5tar+RXgASky0nsUtYeQoIa0m4 1JqaeoQ+FYEh3aUdQiC6Nw44tfEzOv81vwhT5KkBhdWkJbprVXTCZXPih+8vj6uK0aYo5ovRJha eea3eyD2KMoPlVbvGJuoXFQgLJ6zU8VfQGAE X-Google-Smtp-Source: AGHT+IFkP7CS9xqANnPn4d9Sz+3RrDXTk1H1Jji56UTUSX5o72PLQQPlMQJClQVJhKn4XxMTw6Hpiw== X-Received: by 2002:a17:903:2288:b0:221:331:1d46 with SMTP id d9443c01a7336-2219ff8278fmr376544635ad.2.1740659824356; Thu, 27 Feb 2025 04:37:04 -0800 (PST) Received: from ventana-bhyve.. ([49.37.249.43]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-223504c5bddsm13219135ad.140.2025.02.27.04.36.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Feb 2025 04:37:04 -0800 (PST) From: Himanshu Chauhan To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org, linux-efi@vger.kernel.org, acpica-devel@lists.linux.dev Cc: paul.walmsley@sifive.com, palmer@dabbelt.com, lenb@kernel.org, james.morse@arm.com, tony.luck@intel.com, ardb@kernel.org, conor@kernel.org, cleger@rivosinc.com, robert.moore@intel.com, sunilvl@ventanamicro.com, apatel@ventanamicro.com, Himanshu Chauhan Subject: [RFC PATCH v1 05/10] riscv: conditionally compile GHES NMI spool function Date: Thu, 27 Feb 2025 18:06:23 +0530 Message-ID: <20250227123628.2931490-6-hchauhan@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250227123628.2931490-1-hchauhan@ventanamicro.com> References: <20250227123628.2931490-1-hchauhan@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Compile ghes_in_nmi_spool_from_list only when NMI and SEA is enabled. Otherwise compilation fails with "defined but not used" error. Signed-off-by: Himanshu Chauhan --- drivers/acpi/apei/ghes.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/acpi/apei/ghes.c b/drivers/acpi/apei/ghes.c index b72772494655..8a1029163799 100644 --- a/drivers/acpi/apei/ghes.c +++ b/drivers/acpi/apei/ghes.c @@ -1231,6 +1231,7 @@ static int ghes_in_nmi_queue_one_entry(struct ghes *ghes, return rc; } +#if defined(CONFIG_HAVE_ACPI_APEI_NMI) || defined(CONFIG_ACPI_APEI_SEA) static int ghes_in_nmi_spool_from_list(struct list_head *rcu_list, enum fixed_addresses fixmap_idx) { @@ -1249,6 +1250,7 @@ static int ghes_in_nmi_spool_from_list(struct list_head *rcu_list, return ret; } +#endif #ifdef CONFIG_ACPI_APEI_SEA static LIST_HEAD(ghes_sea); From patchwork Thu Feb 27 12:36:24 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Himanshu Chauhan X-Patchwork-Id: 13994385 Received: from mail-pl1-f174.google.com (mail-pl1-f174.google.com [209.85.214.174]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B93F323237A for ; Thu, 27 Feb 2025 12:37:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.174 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740659832; cv=none; b=r4YAKl/MCB+sImePl0/3pb1hu08kQACSxUzuDgQkWuLXEe/FA/1S2i96HPUk02jKPqEWMW+smgLZxnr5enl4eBWz1Pg+fUY2xUGk1sdBOclw+/Xy6CqiJPsv976cRKm+1AYfOxbrEUzDx7sZED2xoPOzb973JACRBl768XMU8Z0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740659832; c=relaxed/simple; bh=4VsOHzcXdPVrZvK5H8lPHWXGnI2bcbkoNfx5bjphVFI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=hs4DSvTHgen5K/BD/SCudR2jS5fqzrdmevWNDVqUfn1jTFyANJbIBzMCghO8l/jBLR0beQ0ivayBj/z0hEZH0aiUXvRxLc4wYscgyDU7nQ5vKYViDYv52WXW4zYmDdG/JMzT3ZMVJ7mERL16P3nStdZy8yDXxYNjzq1ex87aZHM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com; spf=pass smtp.mailfrom=ventanamicro.com; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b=ZrvAcelT; arc=none smtp.client-ip=209.85.214.174 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b="ZrvAcelT" Received: by mail-pl1-f174.google.com with SMTP id d9443c01a7336-2212a930001so21337955ad.0 for ; Thu, 27 Feb 2025 04:37:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1740659830; x=1741264630; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=3kGyolrr9eB+rihlUpak7d80WkLbYEDuFsdAvhSOlWk=; b=ZrvAcelTMkYQrfIW/FYMbl4uaDrQX69qwzbggJfFMqEQiRohCpThtuTQ8X0Sa8Ch4v zc6L/1W9KD5jpvZf6tirzetIFdQVNoTCdevI4TNvPlCgEYEqVB51+84x68I+i1Ph9ceY SGGRzQN9Bfd9D/TY0yDj5JYPO+NMfN3NhQwozfzGx8AstJHrAHp/Hmt116W3A+6tVy9Z CqDtw8UYzElJC9dOUYUDpzlCXQKPVX0bmH21FAkY7ttCAHlyhDwO3QGRuP9UGJQcgbhC IRtFBaxri7fMRoLk09cR4qeF9qPLwDLnbSdmW5OS00ViInfV1u10//fsRNrcpvJm8v9s 0YlQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1740659830; x=1741264630; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=3kGyolrr9eB+rihlUpak7d80WkLbYEDuFsdAvhSOlWk=; b=kwRFsmikBFvV6XCaTN9foiJns+WqD9jg63ako5yxiJCH2Emo8OknqWp74fOz+HRTDV iPi7y7/gUjlyxUOxQLyTkWDVKCxToj2bqXCq1eRRYC4IwN1kHRaPKRKoe2dv3C0aGRsj +ZjhszJs1k+x1I6gDRWibRsjojBccDS+CPz2GmTvWGeBhuMQnNB8LMesvgmGMNiPsm1+ uXPyKv8nroCPc+7NqzRBsm5StPbuLeavhs/VwXWZ91NJrvDziKG9uW6I1dLVomsRM3zR iqznF2MqZaYXFeK4ygdt3HnDA9mmKipRLuA2fC13OJV0O1w2gPfIMeKBxsXzNKXErzpB DOVA== X-Forwarded-Encrypted: i=1; AJvYcCWhEjVmHk27vxyJ+bhCKUGN6YeStEq0tkPPhwjA49DczaYNlnJrZ3MYy8RlR58rtmGKCrRUz8ojhtZP@vger.kernel.org X-Gm-Message-State: AOJu0YxQw7d8Htg46XkxmYtso2S5Al8tLdSLigzLXiUhgVlyJ1tkROV1 z79qgrPrkGzgs5vD83Yg3PhN2H2r6TBuwcYxy1kgQKeTksxvwUl6QG40qi2feR4= X-Gm-Gg: ASbGncuEa5ch7fklooxrHEc+Ncex0Q/InQ+uh2mT5MlvN3yJ3x0iSlqb4A5K1eWe4NI pyM6DrN+Xu10j66dpo7lsZliPYiRGKoCQBCu9nz0oAarm2TPVoh2UXUdLTFozqSkQOhEg32cnr+ zM65YGsjsKo+aXWnnnS7jO8g6J1l6hDD524HsF6SGGGbsO8vyBpecV4EnL52Pbk2EroCaOIcBA2 xPX8sr8e/R1nO2nOYe4YL/SLwLMKB6dALbdcYTlSD8IKLuJka0G+FojX59VNDY7oHSWF79uAXvZ +uy028JffZyMXTOmNXraW7CFi5HXVN071gmU X-Google-Smtp-Source: AGHT+IGCecOAkzBb0oLJqkAuzU2vtPXYUZlAY6MApfNhCwxjDIHSb/IyUg2/UngOj1IqUQZUagR0Tg== X-Received: by 2002:a17:902:daca:b0:220:c164:6ee1 with SMTP id d9443c01a7336-221a1148bdcmr409969065ad.32.1740659829813; Thu, 27 Feb 2025 04:37:09 -0800 (PST) Received: from ventana-bhyve.. ([49.37.249.43]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-223504c5bddsm13219135ad.140.2025.02.27.04.37.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Feb 2025 04:37:09 -0800 (PST) From: Himanshu Chauhan To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org, linux-efi@vger.kernel.org, acpica-devel@lists.linux.dev Cc: paul.walmsley@sifive.com, palmer@dabbelt.com, lenb@kernel.org, james.morse@arm.com, tony.luck@intel.com, ardb@kernel.org, conor@kernel.org, cleger@rivosinc.com, robert.moore@intel.com, sunilvl@ventanamicro.com, apatel@ventanamicro.com, Himanshu Chauhan Subject: [RFC PATCH v1 06/10] riscv: Add functions to register ghes having SSE notification Date: Thu, 27 Feb 2025 18:06:24 +0530 Message-ID: <20250227123628.2931490-7-hchauhan@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250227123628.2931490-1-hchauhan@ventanamicro.com> References: <20250227123628.2931490-1-hchauhan@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add functions to register the ghes entries which have SSE as notification type. The vector inside the ghes is the SSE event ID that should be registered. Signed-off-by: Himanshu Chauhan --- drivers/firmware/riscv/riscv_sse.c | 147 +++++++++++++++++++++++++++++ include/linux/riscv_sse.h | 15 +++ 2 files changed, 162 insertions(+) diff --git a/drivers/firmware/riscv/riscv_sse.c b/drivers/firmware/riscv/riscv_sse.c index c165e32cc9a5..511db9ad7a9e 100644 --- a/drivers/firmware/riscv/riscv_sse.c +++ b/drivers/firmware/riscv/riscv_sse.c @@ -5,6 +5,8 @@ #define pr_fmt(fmt) "sse: " fmt +#include +#include #include #include #include @@ -689,3 +691,148 @@ static int __init sse_init(void) return ret; } arch_initcall(sse_init); + +struct sse_ghes_callback { + struct list_head head; + struct ghes *ghes; + sse_event_handler *callback; +}; + +struct sse_ghes_event_data { + struct list_head head; + u32 event_num; + struct list_head callback_list; + struct sse_event *event; +}; + +static DEFINE_SPINLOCK(sse_ghes_event_list_lock); +static LIST_HEAD(sse_ghes_event_list); + +static int sse_ghes_handler(u32 event_num, void *arg, struct pt_regs *regs) +{ + struct sse_ghes_event_data *ev_data = arg; + struct sse_ghes_callback *cb = NULL; + + list_for_each_entry(cb, &ev_data->callback_list, head) { + if (cb && cb->ghes && cb->callback) { + cb->callback(ev_data->event_num, cb->ghes, regs); + } + } + + return 0; +} + +int sse_register_ghes(struct ghes *ghes, sse_event_handler *lo_cb, + sse_event_handler *hi_cb) +{ + struct sse_ghes_event_data *ev_data, *evd; + struct sse_ghes_callback *cb; + u32 ev_num; + int err; + + if (!sse_available) + return -EOPNOTSUPP; + if (!ghes || !lo_cb || !hi_cb) + return -EINVAL; + + ev_num = ghes->generic->notify.vector; + + ev_data = NULL; + spin_lock(&sse_ghes_event_list_lock); + list_for_each_entry(evd, &sse_ghes_event_list, head) { + if (evd->event_num == ev_num) { + ev_data = evd; + break; + } + } + spin_unlock(&sse_ghes_event_list_lock); + + if (!ev_data) { + ev_data = kzalloc(sizeof(*ev_data), GFP_KERNEL); + if (!ev_data) + return -ENOMEM; + + INIT_LIST_HEAD(&ev_data->head); + ev_data->event_num = ev_num; + + INIT_LIST_HEAD(&ev_data->callback_list); + + ev_data->event = sse_event_register(ev_num, ev_num, + sse_ghes_handler, ev_data); + if (IS_ERR(ev_data->event)) { + pr_err("%s: Couldn't register event 0x%x\n", __func__, ev_num); + kfree(ev_data); + return -ENOMEM; + } + + err = sse_event_enable(ev_data->event); + if (err) { + pr_err("%s: Couldn't enable event 0x%x\n", __func__, ev_num); + sse_event_unregister(ev_data->event); + kfree(ev_data); + return err; + } + + spin_lock(&sse_ghes_event_list_lock); + list_add_tail(&ev_data->head, &sse_ghes_event_list); + spin_unlock(&sse_ghes_event_list_lock); + } + + list_for_each_entry(cb, &ev_data->callback_list, head) { + if (cb->ghes == ghes) + return -EALREADY; + } + + cb = kzalloc(sizeof(*cb), GFP_KERNEL); + if (!cb) + return -ENOMEM; + INIT_LIST_HEAD(&cb->head); + cb->ghes = ghes; + cb->callback = lo_cb; + list_add_tail(&cb->head, &ev_data->callback_list); + + return 0; +} + +int sse_unregister_ghes(struct ghes *ghes) +{ + struct sse_ghes_event_data *ev_data, *tmp; + struct sse_ghes_callback *cb; + int free_ev_data = 0; + + if (!ghes) + return -EINVAL; + + spin_lock(&sse_ghes_event_list_lock); + + list_for_each_entry_safe(ev_data, tmp, &sse_ghes_event_list, head) { + list_for_each_entry(cb, &ev_data->callback_list, head) { + if (cb->ghes != ghes) + continue; + + list_del(&cb->head); + kfree(cb); + break; + } + + if (list_empty(&ev_data->callback_list)) + free_ev_data = 1; + + if (free_ev_data) { + spin_unlock(&sse_ghes_event_list_lock); + + sse_event_disable(ev_data->event); + sse_event_unregister(ev_data->event); + ev_data->event = NULL; + + spin_lock(&sse_ghes_event_list_lock); + + list_del(&ev_data->head); + kfree(ev_data); + } + } + + spin_unlock(&sse_ghes_event_list_lock); + + return 0; +} diff --git a/include/linux/riscv_sse.h b/include/linux/riscv_sse.h index c73184074b8c..16700677f1e8 100644 --- a/include/linux/riscv_sse.h +++ b/include/linux/riscv_sse.h @@ -12,6 +12,8 @@ struct sse_event; struct pt_regs; +struct ghes; + typedef int (sse_event_handler)(u32 event_num, void *arg, struct pt_regs *regs); #ifdef CONFIG_RISCV_SSE @@ -27,6 +29,9 @@ int sse_event_enable(struct sse_event *sse_evt); void sse_event_disable(struct sse_event *sse_evt); +int sse_register_ghes(struct ghes *ghes, sse_event_handler *lo_cb, + sse_event_handler *hi_cb); +int sse_unregister_ghes(struct ghes *ghes); #else static inline struct sse_event *sse_event_register(u32 event_num, u32 priority, sse_event_handler *handler, @@ -50,6 +55,16 @@ static inline int sse_event_enable(struct sse_event *sse_evt) static inline void sse_event_disable(struct sse_event *sse_evt) {} +static inline int sse_register_ghes(struct ghes *ghes, sse_event_handler *lo_cb, + sse_event_handler *hi_cb) +{ + return -EOPNOTSUPP; +} + +static inline int sse_unregister_ghes(struct ghes *ghes) +{ + return -EOPNOTSUPP; +} #endif From patchwork Thu Feb 27 12:36:25 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Himanshu Chauhan X-Patchwork-Id: 13994386 Received: from mail-pl1-f169.google.com (mail-pl1-f169.google.com [209.85.214.169]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5059322DF86 for ; Thu, 27 Feb 2025 12:37:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.169 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740659836; cv=none; b=oCNaKyIsVSFCewvdjERkIB4qEb/LfN7Y7O01+OXXVBXobuywJbWNkl2GcUnFDYPZp2e53j60lWNHhRdZI74pwhnrS8RU2+3wb9LDp7IMdW6IKoLV0+xZLmwYaLbnHDkfxr+esroGy2AK71cU5eko40S1ColSHtOPEF9SPaq5ZQA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740659836; c=relaxed/simple; bh=nwb9jXPHNocc0BR85JL7p0Pq9kLj9IODjbMJ59HBlc4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=lzFr0ozWdsDbH6r0IrgdyB1bhkiewidxx2+Nb736Fm0H/im4wTKG5t9IH3CmjwJXWY1klNfSrLwjKE5/Hs57rSgXA1abJKsbCELSU5lPQOOXkyPlbhZizHLmXeqyypdpeS0qM0k0btjAb01qmbScdD8gGBmfPTyvBOxnL7TSF2w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com; spf=pass smtp.mailfrom=ventanamicro.com; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b=FrxGrIna; arc=none smtp.client-ip=209.85.214.169 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b="FrxGrIna" Received: by mail-pl1-f169.google.com with SMTP id d9443c01a7336-22337bc9ac3so14395945ad.1 for ; Thu, 27 Feb 2025 04:37:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1740659835; x=1741264635; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=TNRn4grONdQPyJNJQgM7dzqjQjDGa6sfyVxFxG4j7Yo=; b=FrxGrInaEMo2o+tNyEgcDBM/rqIyuObzmxmjHxzGGm1WeD/h9+FEz0P5Q8th6tnPHt KbZCSleoKgCVflj4glTlmecBuaYMf/46rnlRvnbmh/MiDbbuymDrFnW6ECnIoYCANAy7 b5uHOgZJQOTpGVHLRKq5V6HFFGef7n5k1CXvnOGEYULRH7axeh6nWH0XaP0EyKtT9YMN Gi/eE1rf5ENt6TKsBy3sxI5mGGeMqQQDrzJ+Yu3OOVSBU2vb/Z0et4jHcIUAQ5v9lNcs I/fKbxgQVKRwWq9JeGDDsTuzwH6bin9anKJUl+Ima9wR/3PzewQZGAL1MXVPKAiKm9e1 +iSw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1740659835; x=1741264635; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=TNRn4grONdQPyJNJQgM7dzqjQjDGa6sfyVxFxG4j7Yo=; b=YNmgLCFzKrVumXCWvOZeqZhcuZakUNOsqSNFpBUbJ8Qu0jfadTkAe7XsbxWstSqVse R29n6dkjwh+0fsnadV7X7ZrKGpE8o2p0SfkBVlooetO5jqQtb2fatH44lIDsFQR793cv vE0DGeE9EIKqmHc3MaOBm6KNgsjjWgb3JMn7UY3zktYGyo+hyO/OH3+Hlg9jijQcZ0AZ gH2bD4gTt8vTax4TenXsR3TLhzEbQQAVfhn1gjKOyhn2gc2xICqG1hfMDtP1/8MYpKHR m1tQvU5Q9+G0ujuVlimcb1PgFtSCRHj7W+wdVCmNCHRerAo2RkKJocCy+YaHFxtcwZoB s11Q== X-Forwarded-Encrypted: i=1; AJvYcCXQS5EtBxNHDMe4sWngXsfqxCZZIrF/FHXd8DYp3lHGJwqKJJfp6iDuAz9SeVHfaIiCkMeCCKMu7eER@vger.kernel.org X-Gm-Message-State: AOJu0Yz6uqXxnIzJ9E/r33IQ5AMVmHfIqJs2MQxwbj6zz5unrRn6/S8U /wb0W1xdhin1cevR/3xdj+wgqPp9ldyC1FPKKLYfgIA3LknmUy1d4Cuwv68iKFE= X-Gm-Gg: ASbGncsbJNkKBoiy6YiU55HC0ISOkCje8sf0SXR0wBUQLEpNLc0T0JSYx8tGeeu0D9E 1Yh2WXjTjbDUKZnj4YC7AyL8I7hbvksLRyU8oaNdKc2TfYXc9bq+9HfT8IAcET4RsHuMpxu18QS CVtVH+tIcg3v4Pp/3mkv0f9iSrhRDC5w06JhZ2iSNaEn8mjfmwe3A5CVTqpSsJ7JN+eurb3Z3uU OhGBQSlsVnD0dgoIM3pBYaDLRaBBUntlmxzl7oFr+MXEji7KFjcHwEBHITwf9+/jCbdrzBmmTtW ZI7tCKQG86V6k41YDlSOXdo8Spw4uwa4E5d9 X-Google-Smtp-Source: AGHT+IG53PBDiu6FVTVuBFXKbMl/pH0m+lbJmkXDl+xjPCROuVKlD+c6+Y7yRaOAw5SWzcbapXcaKA== X-Received: by 2002:a17:902:e752:b0:223:3bf6:7e6a with SMTP id d9443c01a7336-2233bf6806bmr72051025ad.12.1740659834816; Thu, 27 Feb 2025 04:37:14 -0800 (PST) Received: from ventana-bhyve.. ([49.37.249.43]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-223504c5bddsm13219135ad.140.2025.02.27.04.37.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Feb 2025 04:37:14 -0800 (PST) From: Himanshu Chauhan To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org, linux-efi@vger.kernel.org, acpica-devel@lists.linux.dev Cc: paul.walmsley@sifive.com, palmer@dabbelt.com, lenb@kernel.org, james.morse@arm.com, tony.luck@intel.com, ardb@kernel.org, conor@kernel.org, cleger@rivosinc.com, robert.moore@intel.com, sunilvl@ventanamicro.com, apatel@ventanamicro.com, Himanshu Chauhan Subject: [RFC PATCH v1 07/10] riscv: Add RISC-V entries in processor type and ISA strings Date: Thu, 27 Feb 2025 18:06:25 +0530 Message-ID: <20250227123628.2931490-8-hchauhan@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250227123628.2931490-1-hchauhan@ventanamicro.com> References: <20250227123628.2931490-1-hchauhan@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 - Add RISCV in processor type - Add RISCV32/64 in ISA Signed-off-by: Himanshu Chauhan --- drivers/firmware/efi/cper.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/firmware/efi/cper.c b/drivers/firmware/efi/cper.c index b69e68ef3f02..f2908296a48f 100644 --- a/drivers/firmware/efi/cper.c +++ b/drivers/firmware/efi/cper.c @@ -110,6 +110,7 @@ static const char * const proc_type_strs[] = { "IA32/X64", "IA64", "ARM", + "RISCV", }; static const char * const proc_isa_strs[] = { @@ -118,6 +119,8 @@ static const char * const proc_isa_strs[] = { "X64", "ARM A32/T32", "ARM A64", + "RISCV32", + "RISCV64", }; const char * const cper_proc_error_type_strs[] = { From patchwork Thu Feb 27 12:36:26 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Himanshu Chauhan X-Patchwork-Id: 13994387 Received: from mail-pl1-f169.google.com (mail-pl1-f169.google.com [209.85.214.169]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 897B4233158 for ; Thu, 27 Feb 2025 12:37:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.169 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740659842; cv=none; b=DTVVh14pi9OTt1KDuGUrvr7Y9+LsFmqcLI5rwUtPCQArOPqNDg8TzNVaevAEUociVywwoj5vM/AEAHBzI+Rlx/p+HFPbL9oCAVH0TTCdYi7Cn4YNYdlvzHW7oT8yZ+IED5cdpkTKhlxrMX/356/v3uUGr8o3WaPXi9okgZFP7qE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740659842; c=relaxed/simple; bh=Q5uxxUx6KeY4zwC8bnmu7iQA3t7vZqPvLL2pQYA7C38=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=S/t4V7d/3Gwufg96VQ/F+dVgw21/DywhETDO1Awkws83qla44T5nrBkTqext6qJ0VKZyitNQZf/h/qZfzjNm0Ni35a5InH2pYoXxaxlun6B4HzMCeFXq78js8d+qYPuisr7BInSHkqzketGCLyyba+lwsDdoCX2GvJYiwybjZm0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com; spf=pass smtp.mailfrom=ventanamicro.com; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b=TTBTbf3p; arc=none smtp.client-ip=209.85.214.169 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b="TTBTbf3p" Received: by mail-pl1-f169.google.com with SMTP id d9443c01a7336-22185cddbffso34375895ad.1 for ; Thu, 27 Feb 2025 04:37:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1740659840; x=1741264640; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=mXVhLjcRoeCf2V/5WVQuQKEAR2qmhhl0hOLkmr0AsUA=; b=TTBTbf3p9mtat1hJOe3zuTTPvJL9QNYkfiejdQLuxo3foRymrjl6q3NvaSuNvubbz6 lKZyeVVoOlpcIIfXDgMMfMCnfxliOYrzIKxqkN51GLfGNaDVBJYWV9SMk60h7HMAHbhR 0VGpm5KvRUDppIElj36N1xcQd8HllUVWoiYFfKGdBHl3x1go1hAsvzOIX4bGA4ZXXOHh wM6aj6ZLpAJiAskOk8DLmmuhvSVGgJ0xJVh9+cQTLWQWslzViJa4SxgTgNQCIQr4ez0e xVHapLBSXizZLuBTcnrvfN7LKUZ0LA9TR70al96awVWiefgAOzMdekDbZSDR3uFo//TE y+RA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1740659840; x=1741264640; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=mXVhLjcRoeCf2V/5WVQuQKEAR2qmhhl0hOLkmr0AsUA=; b=rsblGOsfBIgDftmHNFtjp2WkVZIfzuSeDv4uE1MyBbsf8Qte8TmKoRnyYKovCzuZqB ZSfreAvKh0V4Ud6shO86IY2bFQCSFRvrdumy34sYXmdZh4xf3meo4CvGAm+LLCbuixSP TzIq7oFWoo1fkxYGY/WrAHkR+xRfqmgpXCsJeVVo2G8IZkGDo59TdNUWGbpGkpsAGQHC XNqgZ40pwjkfuyZrN+ovro1tQNEM2fM6Pd6O4gTIABAUbalzMSIwV8GcuCKWBU3ibCMm G23m7G6nMZBPb2MLJR1kMbsOFBvV0hD5LZT6PmE1BMEYPojXuiWrspwdNHRZ8LdUiDbe DzQg== X-Forwarded-Encrypted: i=1; AJvYcCU0cPDuf8N1BMIuW8STfC2DJF70oo8+vTdtCiaakHjcf84FFngCmgHOfhYDdjPzVQ3t7O4vFUurgKl9@vger.kernel.org X-Gm-Message-State: AOJu0Ywh+7Lt2nWdQs+TkaPfNV0PPA317f2P5MptuErNXrJOeeTc/3JG ly2Ly+Ij3r+bbnSGg1DKDUatq5YLuyDAJs09Ol8bznXe4c3XOt1Jlri3KPr1sqc= X-Gm-Gg: ASbGncsVEEx7lCmN1g89Ahss5zEprnk18cA0VHb1mCLKyYWiaA0f1TM2XLjLV0eRs/j 4BcZ3bOn+kd7A3gmdKQa6QQqBmzYtPG6tCWi2qStMYnbfK2zt6BMgfnzNiKguUp0u4dzOQs4SFJ 4DG3yA9N16yT1HqyGkKG0rtTTgcjlca8/I2Va0EZDpSba7jfvtM9llwZlIdS0/XuM2vUEIRUYLp lOl2QA3FWbm7nQ3vwqDtbYFTjWp7yIH5YwS+JT4Yo5JWAy31DL6SQtJNv7FrRvkyBpelIFb6zSO fvhVTCrH244Gn2V6bopzV45GIbrVGF5cZDJg X-Google-Smtp-Source: AGHT+IE/pZ3e6JonJxeQe62tq8o12LGMwm5f6Ts5InGRCEUeYVZmSfCnd9ZWVdPIH36ibrRnGp55zA== X-Received: by 2002:a17:902:d507:b0:21f:1348:10e6 with SMTP id d9443c01a7336-2234a57fd4fmr60713595ad.13.1740659839830; Thu, 27 Feb 2025 04:37:19 -0800 (PST) Received: from ventana-bhyve.. ([49.37.249.43]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-223504c5bddsm13219135ad.140.2025.02.27.04.37.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Feb 2025 04:37:19 -0800 (PST) From: Himanshu Chauhan To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org, linux-efi@vger.kernel.org, acpica-devel@lists.linux.dev Cc: paul.walmsley@sifive.com, palmer@dabbelt.com, lenb@kernel.org, james.morse@arm.com, tony.luck@intel.com, ardb@kernel.org, conor@kernel.org, cleger@rivosinc.com, robert.moore@intel.com, sunilvl@ventanamicro.com, apatel@ventanamicro.com, Himanshu Chauhan Subject: [RFC PATCH v1 08/10] riscv: Introduce HEST SSE notification handlers Date: Thu, 27 Feb 2025 18:06:26 +0530 Message-ID: <20250227123628.2931490-9-hchauhan@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250227123628.2931490-1-hchauhan@ventanamicro.com> References: <20250227123628.2931490-1-hchauhan@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 - Functions to register a ghes entry with SSE - Add Handlers for low/high priority events - Call ghes common handler to handle an error event Signed-off-by: Himanshu Chauhan --- drivers/acpi/apei/ghes.c | 100 ++++++++++++++++++++++++++++++++++----- 1 file changed, 89 insertions(+), 11 deletions(-) diff --git a/drivers/acpi/apei/ghes.c b/drivers/acpi/apei/ghes.c index 8a1029163799..59abb89d3547 100644 --- a/drivers/acpi/apei/ghes.c +++ b/drivers/acpi/apei/ghes.c @@ -17,6 +17,7 @@ * Author: Huang Ying */ +#include #include #include #include @@ -97,6 +98,11 @@ #define FIX_APEI_GHES_SDEI_CRITICAL __end_of_fixed_addresses #endif +#ifndef CONFIG_RISCV_SSE +#define FIX_APEI_GHES_SSE_LOW_PRIORITY __end_of_fixed_addresses +#define FIX_APEI_GHES_SSE_HIGH_PRIORITY __end_of_fixed_addresses +#endif + static ATOMIC_NOTIFIER_HEAD(ghes_report_chain); static inline bool is_hest_type_generic_v2(struct ghes *ghes) @@ -1405,6 +1411,63 @@ static int apei_sdei_unregister_ghes(struct ghes *ghes) return sdei_unregister_ghes(ghes); } +#if defined(CONFIG_ACPI_APEI_SSE) +/* SSE Handlers */ +static int __ghes_sse_callback(struct ghes *ghes, + enum fixed_addresses fixmap_idx) +{ + if (!ghes_in_nmi_queue_one_entry(ghes, fixmap_idx)) { + irq_work_queue(&ghes_proc_irq_work); + + return 0; + } + + return -ENOENT; +} + +/* Low priority */ +static int ghes_sse_lo_callback(u32 event_num, void *arg, struct pt_regs *regs) +{ + static DEFINE_RAW_SPINLOCK(ghes_notify_lock_sse_lo); + struct ghes *ghes = arg; + int err; + + raw_spin_lock(&ghes_notify_lock_sse_lo); + err = __ghes_sse_callback(ghes, FIX_APEI_GHES_SSE_LOW_PRIORITY); + raw_spin_unlock(&ghes_notify_lock_sse_lo); + + return err; +} + +/* High priority */ +static int ghes_sse_hi_callback(u32 event_num, void *arg, struct pt_regs *regs) +{ + static DEFINE_RAW_SPINLOCK(ghes_notify_lock_sse_hi); + struct ghes *ghes = arg; + int err; + + raw_spin_lock(&ghes_notify_lock_sse_hi); + err = __ghes_sse_callback(ghes, FIX_APEI_GHES_SSE_HIGH_PRIORITY); + raw_spin_unlock(&ghes_notify_lock_sse_hi); + + return err; +} + +static int apei_sse_register_ghes(struct ghes *ghes) +{ + return sse_register_ghes(ghes, ghes_sse_lo_callback, + ghes_sse_hi_callback); +} + +static int apei_sse_unregister_ghes(struct ghes *ghes) +{ + return sse_unregister_ghes(ghes); +} +#else /* CONFIG_ACPI_APEI_SSE */ +static int apei_sse_register_ghes(struct ghes *ghes) { return -ENOTSUPP; } +static int apei_sse_unregister_ghes(struct ghes *ghes) { return -ENOTSUPP; } +#endif + static int ghes_probe(struct platform_device *ghes_dev) { struct acpi_hest_generic *generic; @@ -1451,6 +1514,15 @@ static int ghes_probe(struct platform_device *ghes_dev) pr_warn(GHES_PFX "Generic hardware error source: %d notified via local interrupt is not supported!\n", generic->header.source_id); goto err; + case ACPI_HEST_NOTIFY_SSE: + if (!IS_ENABLED(CONFIG_ACPI_APEI_SSE)) { + pr_warn(GHES_PFX "Generic hardware error source: %d " + "notified via SSE is not supported\n", + generic->header.source_id); + rc = -ENOTSUPP; + goto err; + } + break; default: pr_warn(FW_WARN GHES_PFX "Unknown notification type: %u for generic hardware error source: %d\n", generic->notify.type, generic->header.source_id); @@ -1514,6 +1586,18 @@ static int ghes_probe(struct platform_device *ghes_dev) if (rc) goto err; break; + + case ACPI_HEST_NOTIFY_SSE: + rc = apei_sse_register_ghes(ghes); + if (rc) { + pr_err(GHES_PFX "Failed to register for SSE notification" + " on vector %d\n", + generic->notify.vector); + goto err; + } + pr_err(GHES_PFX "Registered SSE notification on vector %d\n", + generic->notify.vector); + break; default: BUG(); } @@ -1543,7 +1627,6 @@ static int ghes_probe(struct platform_device *ghes_dev) static void ghes_remove(struct platform_device *ghes_dev) { - int rc; struct ghes *ghes; struct acpi_hest_generic *generic; @@ -1577,16 +1660,11 @@ static void ghes_remove(struct platform_device *ghes_dev) ghes_nmi_remove(ghes); break; case ACPI_HEST_NOTIFY_SOFTWARE_DELEGATED: - rc = apei_sdei_unregister_ghes(ghes); - if (rc) { - /* - * Returning early results in a resource leak, but we're - * only here if stopping the hardware failed. - */ - dev_err(&ghes_dev->dev, "Failed to unregister ghes (%pe)\n", - ERR_PTR(rc)); - return; - } + apei_sdei_unregister_ghes(ghes); + break; + + case ACPI_HEST_NOTIFY_SSE: + apei_sse_unregister_ghes(ghes); break; default: BUG(); From patchwork Thu Feb 27 12:36:27 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Himanshu Chauhan X-Patchwork-Id: 13994388 Received: from mail-pl1-f177.google.com (mail-pl1-f177.google.com [209.85.214.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 17606233157 for ; Thu, 27 Feb 2025 12:37:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.177 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740659847; cv=none; b=mnUZMGiTpSPHYLQ4jKUx74+le982CjhFKBmoyT4nSPHkpG5RK5+DgXO6AAWCtomGiriwhLiKyB3EHrtdwGpMXEXiU2KWE7DJ/wJB0RlqEmF+Oyzz4igVKyFp7ZJa+slZYk5ONzVImIFFJVoAzjCl8wdJZKWY+yHqgSCH/pAgCak= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740659847; c=relaxed/simple; bh=Of9PqcRio9hOrtrXaK3C+7d5d06uoPfQDo/STc3oCQM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=UkCyInq0kvnh0AT5oFn46fdvLYd5+5wBquGoBeTWh7s+YPECjKvknxYSGJJlVjMdKrw8jBFJsqGeVuGGXC5MEFYky1U8pYlbZTD8blDZ6+xzL1HO01eYYir0SHxYYuS0pzch22i8+uKs95nwGhYPH12Zeas/PtYXSxlxIVhyr0Y= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com; spf=pass smtp.mailfrom=ventanamicro.com; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b=lJ0OCCkY; arc=none smtp.client-ip=209.85.214.177 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b="lJ0OCCkY" Received: by mail-pl1-f177.google.com with SMTP id d9443c01a7336-220f4dd756eso16024885ad.3 for ; Thu, 27 Feb 2025 04:37:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1740659845; x=1741264645; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=vcOi1q1j+KD4L6iG3zLb6+WxKLL1t6DJV3NbpeiJXTU=; b=lJ0OCCkYqSPgtJ4dZ5CW1e4TJpEUkvQ8TruxrJkxp+sYc4S39EiAnZNewqSQbILB63 forlY5KP6QqdDUb2i/QCV018Kf6KZDc/9RmNfZL/xnF1qeyjPRsuQntu7K4iaXuYSiWi /rgckz/qfXN8oAOVC3D4sTS+u0wkLMrUEyrQELnMvSqclFHk8aPKkBe33fUaSy6d8LdY NxctfU3nxHEAcCa+GnEoMChDPAO+omjxcXTTDegi8hEZ6AVchmfwBetA6R1ESy7x9TRR AuyT7nVDMfN8y6RwWEdGWQi3EUQtS9guYWx6uPBuM0gJnITHIY0VidW50RM5rXrobUun Mf1Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1740659845; x=1741264645; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=vcOi1q1j+KD4L6iG3zLb6+WxKLL1t6DJV3NbpeiJXTU=; b=gp84stiSZM34ErAJCAKiCThaEGXaZwtfW/i0jhiDW/S6iqGP1XB+cZF+KSpCt6g9Lg g68/6fkuXcRxYjoueq8HYx9KRuG2nlpbc4H9ALl4JGMbJptlu06K5/MFuFsoscTfhTpA eTf7+pV+gaNEUmAYeNX3UT94A3Oc6kgWdUx1/vSqQd+k/9QzjtMtlIVX7pLQ13WMBlT7 zonNh6ZC1UyQGyOviPeCp1n4p1v/Yn7qtG7YacwVA1QZowR7qiz5VuumP9Oh6LFcOSHL GsU2s1wEZEJQfb7x/n4f11ZbnNrgK18OWy3aoxxppfmheSwGf6VdBVjFdO0MwMZ4VXxa Wq2A== X-Forwarded-Encrypted: i=1; AJvYcCXKKcVspV1phPSB9bheyjvSD5aPQ1jKi1Fk9SjHvAYf99hn6tR0WCtfbc2jedv7yWMvCjfDd0p0dZ6k@vger.kernel.org X-Gm-Message-State: AOJu0YwqlX906Mp2yqWD7wtnVXkicZK/EVJQ1G3VveRBlvh1wCeYNWJY /zkd00ce4dtrwVBulPn8UndvOFtH2073JX9+l/n04zxsIg+Jo2xwDUssx14x9ON3AxFu9p9eKrx PM78= X-Gm-Gg: ASbGncvbLrhGa7OxRB26tiAzIkpXdo4thvZ2dzOUZW3M44rOtpvXFH7s51A7C1wOh28 U9f9EUHkv3k6gAAz4xUu7PpPUeZO6hfl7OiiH0Vd5SAq9QXkUml1S8OqFqR9voZaiiRSCwl8BbF Jgid9ZtkotpfoNcTjjjcA238tg9krsiCuKsbLKxrmLHDi4+D6k3IsKlThrqFiSaU47imSu+rh00 xs9LFgNthHNGF1bik9QhThJ2f1oAv3lkYwIy0Wut2CZSEfByhaXwnjugmerd5djyojFiUSJr+Wf gDPfKU9VbF/hebWpcpbhfyF7VK4a8sYyVxCx X-Google-Smtp-Source: AGHT+IFpHziUTuaJEINi+EgHoRKrGPAz4AsnUhhSqo24MLZ7IPH1ipJJRVjiescHNO1qawzm+Z45XQ== X-Received: by 2002:a17:903:1c6:b0:223:4a10:311b with SMTP id d9443c01a7336-2234a1033camr48544315ad.1.1740659845617; Thu, 27 Feb 2025 04:37:25 -0800 (PST) Received: from ventana-bhyve.. ([49.37.249.43]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-223504c5bddsm13219135ad.140.2025.02.27.04.37.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Feb 2025 04:37:24 -0800 (PST) From: Himanshu Chauhan To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org, linux-efi@vger.kernel.org, acpica-devel@lists.linux.dev Cc: paul.walmsley@sifive.com, palmer@dabbelt.com, lenb@kernel.org, james.morse@arm.com, tony.luck@intel.com, ardb@kernel.org, conor@kernel.org, cleger@rivosinc.com, robert.moore@intel.com, sunilvl@ventanamicro.com, apatel@ventanamicro.com, Himanshu Chauhan Subject: [RFC PATCH v1 09/10] riscv: Add config option to enable APEI SSE handler Date: Thu, 27 Feb 2025 18:06:27 +0530 Message-ID: <20250227123628.2931490-10-hchauhan@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250227123628.2931490-1-hchauhan@ventanamicro.com> References: <20250227123628.2931490-1-hchauhan@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 APEI SSE handlers can be enabled/disabled with this config option. When enabled, the SSE registration is done for GHES entries having notification type set to SSE. When disabled, registration function return not supported error. Signed-off-by: Himanshu Chauhan --- drivers/acpi/apei/Kconfig | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/acpi/apei/Kconfig b/drivers/acpi/apei/Kconfig index 3cfe7e7475f2..be1eaba9b093 100644 --- a/drivers/acpi/apei/Kconfig +++ b/drivers/acpi/apei/Kconfig @@ -45,6 +45,11 @@ config ACPI_APEI_SEA depends on ARM64 && ACPI_APEI_GHES default y +config ACPI_APEI_SSE + bool + depends on RISCV && RISCV_SSE && ACPI_APEI_GHES + default y + config ACPI_APEI_MEMORY_FAILURE bool "APEI memory error recovering support" depends on ACPI_APEI && MEMORY_FAILURE From patchwork Thu Feb 27 12:36:28 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Himanshu Chauhan X-Patchwork-Id: 13994389 Received: from mail-pl1-f171.google.com (mail-pl1-f171.google.com [209.85.214.171]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5077A2343C2 for ; Thu, 27 Feb 2025 12:37:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740659853; cv=none; b=TNCK6zAYXviWPa7wlId4WZLrCJUvHEQmpA8faOYMZX552tFylFEvGNhqGqNPcfNnm3D4sYUZmxoeJeAeHfrVZJ1Art7tT5/g3XnLKXcNFA98YOEiw+6XVCQa/8qarNpyIQ8UnGtgVmMnyj4ouZxyyfNZZfxcynERYHaeot8J+9M= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740659853; c=relaxed/simple; bh=VXd0R443A2CSpN6/WQb26SvFq5CeBSdmv/3wp2DtRPA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=UaeqSOEn8kcYAo4dRY/ldvbfJXI4Nvt5mC0snDkpGckKhYDzxushf2WNo9hyrrmqbLiPrI3Pvrw3b838E8ru/5lD8ulGUhDszXgGAjV/Kr0ux3N2OCa/SG9z6qwbiAgH5+nNjtE7/Sp5uBmlgo9WbAj8zZRC0fi4P1fodU4k20Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com; spf=pass smtp.mailfrom=ventanamicro.com; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b=IYpz8ai6; arc=none smtp.client-ip=209.85.214.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ventanamicro.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=ventanamicro.com header.i=@ventanamicro.com header.b="IYpz8ai6" Received: by mail-pl1-f171.google.com with SMTP id d9443c01a7336-220f4dd756eso16026415ad.3 for ; Thu, 27 Feb 2025 04:37:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1740659850; x=1741264650; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=5+mNjfrfC3KQpEysy41mS2Tv5FPl9byidBfQ8gAxtKE=; b=IYpz8ai6jUfZrW6JOesC2KeuqEZFq65PXtDxF5pjRRe+74aywVgCYQMxkfrO6sAi+b WoOmFQbBThkjkqWthkhnQdjFSGFyfZS0PPSeEvs5KoA4cD1f62t/x47ImxHxq44JQ0l+ yemtizH7DWZji+yz0P45m/rxFk7Gd41G3cnzB9EXE0VlWHVq/GYKsdMUCzugCe7EE6r+ 2ClSzlQSGJwdZYZeIRJeqZ2eEMx+Ewyv2zFUMf0feT5SCaniga7uAT33G3cs8AagiUj3 ID0w4nKnyNDptgMQjnKbfOAZpPkKpzHN8NfTqTs5AWnldKI1FDLgeYwXWG0C9Unv9h7w Mwrw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1740659850; x=1741264650; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=5+mNjfrfC3KQpEysy41mS2Tv5FPl9byidBfQ8gAxtKE=; b=QdMjqSy5Nuf6hrVaCsg0udJ+c3/lMbhUwzgeiOb02CQTumIWrrwpGdnFegC0111d8l LafnFiHN9t+XvF3T4EOORP/2rF5oi7nkeOmIYHoHbU765SocYymF7yZZCg2otfpUmIvH kMCLPXT7ZFnr44Do50wxhRr846S7OwSBB9y/8viYgg/UQpufX43AbAWK2sqD7X/smnY0 sneFiEVRtM1auZEO8I4Ot/W0MeBnqQCkBHn60Mk/jguz2QrFJqCp6j2mtykBj845RZ1f 17gtJn94bz1YLaOhOdnB0+qeB17DgRJTaSld6jUlOU7RVyvQKuvI+ZnNxTSo6aLVkecs lzxg== X-Forwarded-Encrypted: i=1; AJvYcCUTY2jOHXdFU2OpnCoBlfQFgWgNsYDTuJISOSJcooYN3RLz6RlOS/ML7QxE6InoT25up2DBMJFA9+5v@vger.kernel.org X-Gm-Message-State: AOJu0YzzVZsnXftBB2bYVMmxnpnDJzW9759k13UUhoBexguOHcBrjA6I akuGJ9OYoi7BSnuSamwX3Gf0As05s4V2auLOPMZyWjr9wGmWp6NewABJuzalEGY= X-Gm-Gg: ASbGncuTmYJJUc1xfBX2MZSguz2ALrUgJNW5t66/CsBCDc96pykSyAC2oUpNvE54fm2 c3lo7SSfSZ2HhMehd4i/eKtDioR6oWLnfnagTDkUZh3BrkUEA/qTrWKf9MuB8IFmdeCk6VGzXqi LtEhlcqjOCXeEOa1yNyuaHiQY+jRRna/9Of5d0D5bjhdHjxojtRdR6MduA5EbEY6NFXO+fh8mba sdQlDrnic7n2I7qh72vXVfVueNPLj+YUf2ZaskZOSjqe9cXZv9lc///sjHDd0BBtxXzxFVg2HbE MlkJR4ck+gy+3EY0XexR92947VMB/UkDHhwQ X-Google-Smtp-Source: AGHT+IE9Vof5DljJTx2QIG7oo7zj0JMnbJZ2cxvFEIVb6E+KmXCrNVvzk23nCPfXj+pXqJcPAINyhg== X-Received: by 2002:a17:902:e847:b0:223:4b8d:32f7 with SMTP id d9443c01a7336-2234b8d349dmr54186705ad.19.1740659850577; Thu, 27 Feb 2025 04:37:30 -0800 (PST) Received: from ventana-bhyve.. ([49.37.249.43]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-223504c5bddsm13219135ad.140.2025.02.27.04.37.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Feb 2025 04:37:30 -0800 (PST) From: Himanshu Chauhan To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org, linux-efi@vger.kernel.org, acpica-devel@lists.linux.dev Cc: paul.walmsley@sifive.com, palmer@dabbelt.com, lenb@kernel.org, james.morse@arm.com, tony.luck@intel.com, ardb@kernel.org, conor@kernel.org, cleger@rivosinc.com, robert.moore@intel.com, sunilvl@ventanamicro.com, apatel@ventanamicro.com, Himanshu Chauhan Subject: [RFC PATCH v1 10/10] riscv: Enable APEI and NMI safe cmpxchg options required for RAS Date: Thu, 27 Feb 2025 18:06:28 +0530 Message-ID: <20250227123628.2931490-11-hchauhan@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250227123628.2931490-1-hchauhan@ventanamicro.com> References: <20250227123628.2931490-1-hchauhan@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Enable the APEI option so that APEI GHES options are visible. Enable SAFE_CMPXCHG option required for GHES error handling. Signed-off-by: Himanshu Chauhan --- arch/riscv/Kconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 7612c52e9b1e..baf97a4f6830 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -54,6 +54,7 @@ config RISCV select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST select ARCH_HAS_UBSAN select ARCH_HAS_VDSO_TIME_DATA + select ARCH_HAVE_NMI_SAFE_CMPXCHG select ARCH_KEEP_MEMBLOCK if ACPI select ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE if 64BIT && MMU select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX @@ -175,6 +176,7 @@ config RISCV select HAVE_MOVE_PUD select HAVE_PAGE_SIZE_4KB select HAVE_PCI + select HAVE_ACPI_APEI if ACPI select HAVE_PERF_EVENTS select HAVE_PERF_REGS select HAVE_PERF_USER_STACK_DUMP