From patchwork Thu Feb 27 14:27:46 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?Q3PDs2vDoXMgQmVuY2U=?= X-Patchwork-Id: 13994647 Received: from fw2.prolan.hu (fw2.prolan.hu [193.68.50.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E7149234979; Thu, 27 Feb 2025 14:27:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.68.50.107 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740666480; cv=none; b=mz283xLgQ4QB1xUXmXUs9NHNr/S52ZdyqLznrzbLcNebwVBMvDJjer3jMMHGfY2kM6Dvvq7LiCap+rFm4D9pajDOzMIIg9xa0QuZ4SU9Vu9wajZlW+1XCw8wOvvh8ruNoNY2vPyNca6p007odWTv6T+G7ncqvzGJ93sLLi6wR+k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740666480; c=relaxed/simple; bh=lEJxavsE7gnbY6rHB+4b/7XAqg6RcAICRcsan3oliz4=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=aZYFU3P56kc82m2/e53ko7uOae0E50K+xSqomXcyNcFvOkipXykaU5GZ9o/iF2l9+BYkjrGulyKrD5514l3FYygu3AL9mbwC3ZOt2SC+eNuO/o9cR1Uti+Gh7sfVesHPyaX4urnT135kpZxmiGybGH+6IMk82vlM1QpvW/ZQlVo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=prolan.hu; spf=pass smtp.mailfrom=prolan.hu; dkim=pass (4096-bit key) header.d=prolan.hu header.i=@prolan.hu header.b=iIK4vdNz; arc=none smtp.client-ip=193.68.50.107 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=prolan.hu Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=prolan.hu Authentication-Results: smtp.subspace.kernel.org; dkim=pass (4096-bit key) header.d=prolan.hu header.i=@prolan.hu header.b="iIK4vdNz" Received: from proxmox-mailgw.intranet.prolan.hu (localhost.localdomain [127.0.0.1]) by proxmox-mailgw.intranet.prolan.hu (Proxmox) with ESMTP id F3C6EA0D06; Thu, 27 Feb 2025 15:27:55 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=prolan.hu; h=cc :cc:content-transfer-encoding:content-type:content-type:date :from:from:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=mail; bh=2dMTzqRKOVP6zI4y+SKJ qu8AaktMKU/o6Ry3f8HrIys=; b=iIK4vdNzwirARn9ePnH7YdLz9jSue29GshN8 PMBb+u8yV+/qrMmGUVni7WrsTDhIxQeNil2CdqKK3a0izxDYq0S96UnzGGuOG2X5 6v8qyLCpiHJfJdU0Ao1eL/DJLWojsA/nA16+mxTdbpFxT/70JWvF0bfQow1HO5xu nN5SdtAhb+Y1YYzhs7P+ANn/I/LvmP+mRCEBrfXSZiOb8TNv+2lsFayEtVpaf64y 95ps7r53PDjpLjmqRRQrvQkVRVmrNiXbvCoHLryAKMMhi0bhd+IlmphxGRqy+XWt 57YnUW2fBu1XXJF0cLmwVK1wXiaD5oHTeTm9n5Q6fo2sJ12I6nEDTlABhXcGB7aI EsaeoxsFfSPLs5cGxOKSvGUY07soWy4vBDcRvLbYF2uydIX76/i0Et+6bYZdDexe hXDru6upmu5L6I1ZNeynDsu8rees5A/uWkoTatceSqkAhdV8ser27IR4a4oc2eXs 96tDLiUUSrF18+jJSgyxtcfix4NcUiGfTzi37uE4MIpWB2pzq1HX+zRBVMEUecS/ LWzMPJzxobzmYzhbD93nxPDRSkv0GKTWKF1LacWxfDMUqwijNpsCLZ2atPi4kaee hP8jsRjrVI61YmK/lomaqrERYWFy9hHhPiUHQ3hcjpPXegA09WKY0hfvqeq5xDhw JJKDer4= From: =?utf-8?b?QmVuY2UgQ3PDs2vDoXM=?= To: , , CC: =?utf-8?b?QmVuY2UgQ3PDs2vDoXM=?= , "Kamel Bouhara" Subject: [PATCH v5 1/3] include: uapi: counter: Add microchip-tcb-capture.h Date: Thu, 27 Feb 2025 15:27:46 +0100 Message-ID: <20250227142751.61496-2-csokas.bence@prolan.hu> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250227142751.61496-1-csokas.bence@prolan.hu> References: <20250227142751.61496-1-csokas.bence@prolan.hu> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ESET-AS: R=OK;S=0;OP=CALC;TIME=1740666475;VERSION=7985;MC=289978743;ID=1450426;TRN=0;CRV=0;IPC=;SP=0;SIPS=0;PI=3;F=0 X-ESET-Antispam: OK X-EsetResult: clean, is OK X-EsetId: 37303A29ACD94852637760 Add UAPI header for the microchip-tcb-capture.c driver. This header will hold the various event channels, component numbers etc. used by this driver. Signed-off-by: Bence Csókás --- Notes: New in v5 MAINTAINERS | 1 + .../linux/counter/microchip-tcb-capture.h | 22 +++++++++++++++++++ 2 files changed, 23 insertions(+) create mode 100644 include/uapi/linux/counter/microchip-tcb-capture.h diff --git a/MAINTAINERS b/MAINTAINERS index 8e047e20fbd8..d1d264210690 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -15579,6 +15579,7 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) L: linux-iio@vger.kernel.org S: Maintained F: drivers/counter/microchip-tcb-capture.c +F: include/uapi/linux/counter/microchip-tcb-capture.h MICROCHIP USB251XB DRIVER M: Richard Leitner diff --git a/include/uapi/linux/counter/microchip-tcb-capture.h b/include/uapi/linux/counter/microchip-tcb-capture.h new file mode 100644 index 000000000000..7bda5fdef19b --- /dev/null +++ b/include/uapi/linux/counter/microchip-tcb-capture.h @@ -0,0 +1,22 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ +/* + * Channel numbers used by the microchip-tcb-capture driver + * Copyright (C) 2025 Bence Csókás + */ +#ifndef _UAPI_COUNTER_MCHP_TCB_H_ +#define _UAPI_COUNTER_MCHP_TCB_H_ + +/* + * The driver defines the following components: + * + * Count 0 + * \__ Synapse 0 -- Signal 0 (Channel A, i.e. TIOA) + * \__ Synapse 1 -- Signal 1 (Channel B, i.e. TIOB) + */ + +enum counter_mchp_signals { + COUNTER_MCHP_SIG_TIOA, + COUNTER_MCHP_SIG_TIOB, +}; + +#endif /* _UAPI_COUNTER_MCHP_TCB_H_ */ From patchwork Thu Feb 27 14:27:47 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?Q3PDs2vDoXMgQmVuY2U=?= X-Patchwork-Id: 13994648 Received: from fw2.prolan.hu (fw2.prolan.hu [193.68.50.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2CAAB233D91; Thu, 27 Feb 2025 14:27:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.68.50.107 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740666481; cv=none; b=piO7V209JQoRqApo8TslSbxaW4KNBhMvm3It/3w547he6HPTczOsEJd1B7YW/Q+b+eh9Btoig7druK3igIHMa4oCP3JB3Rc4ky91g+J9fpT85X8Mo2pkOMgTTc65Q9qQk5ptqQ2M/9uxcUxrroVf2D84jbxmKT7JKzNii4BakPY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740666481; c=relaxed/simple; bh=vH3/XuWuI9Es2C9TCwLKToujZ1sQCqicWg4VWeASNP8=; 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Thu, 27 Feb 2025 15:27:57 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=prolan.hu; h=cc :cc:content-transfer-encoding:content-type:content-type:date :from:from:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=mail; bh=d7fmU8TJDq6KTOuPGSb8 jkfqdk5VnvNn0zD+r2C2d+k=; b=uB1+dInFmyAOvQ2vWGPI3vdq4CTOxTGjWggw htDxDEgGcf9pns1HIPksWuGIUaItMg0fQ7gfrZTlKQmWGYArhwCZo+KtqVl0Azyj XbFdxAAYmOZ3zYo6jt+9B0BMAxEZ2g22B0hhFbbNn3VFjxtqkSy+SWpucZIAzpHP vhsEuTCanrmL1ytOVr37wAZraeDRcjklxRVFntTwcS0llBiuXvKlJ1WFhFouRmbo IDsMVcdR0ohMOm1d0kx/lD059Xzeho4pZK5cCX3Y2AJQj/WYczif4O5NmH+6yF9F Ba/iHuy3SREszlHOEqJOU6r+gTpGqlYaLpAhWZ0VPzIYD/p3szC5KDpgVp6UAgFt F+RkCqYvh1kNOjhTVejltRKNR9Ag4DfAoYfIsx9hhjzbnJmgj8t0ewp4BLUule0w kvSjX3VBBLCWbnwJOEz2n0fIdXJP9Z7B/f0VAz7cEbiK/9VzJoEe6lhaLxhxd97i XcDiZOXrOFouzcJl/j6UlFvzrkr/UskrC3JANTm4TfJ5HVnV5LjARyJ5OsOfaTnA 7h+k/gXKQmPpyu06rW37eG6RizJe+R3/bDWOXrx0adhoM7+nrOVUuHijKC9WITqf dnGFNHV+yvalF/OozJc/tJz3dyUNT8A9i6qRorPGJqyKgFZaiceWGD0K0UhXuAvZ bSoaoeA= From: =?utf-8?b?QmVuY2UgQ3PDs2vDoXM=?= To: , , CC: =?utf-8?b?QmVuY2UgQ3PDs2vDoXM=?= , "Kamel Bouhara" , William Breathitt Gray Subject: [PATCH v5 2/3] counter: microchip-tcb-capture: Add IRQ handling Date: Thu, 27 Feb 2025 15:27:47 +0100 Message-ID: <20250227142751.61496-3-csokas.bence@prolan.hu> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250227142751.61496-1-csokas.bence@prolan.hu> References: <20250227142751.61496-1-csokas.bence@prolan.hu> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ESET-AS: R=OK;S=0;OP=CALC;TIME=1740666476;VERSION=7985;MC=1421377409;ID=1450430;TRN=0;CRV=0;IPC=;SP=0;SIPS=0;PI=3;F=0 X-ESET-Antispam: OK X-EsetResult: clean, is OK X-EsetId: 37303A29ACD94852637760 Add interrupt servicing to allow userspace to wait for the following events: * Change-of-state caused by external trigger * Capture of timer value into RA/RB * Compare to RC register * Overflow Signed-off-by: Bence Csókás --- Notes: New in v2 Changes in v3: * Add IRQs for Capture events (from next patch) * Add IRQ for RC Compare * Add events as bullet points to commit msg Changes in v4: * Add uapi header, names for the event channels * Add check for -EPROBE_DEFER from `of_irq_get()` Changes in v5: * Split out UAPI header introduction drivers/counter/microchip-tcb-capture.c | 75 +++++++++++++++++++ .../linux/counter/microchip-tcb-capture.h | 18 +++++ 2 files changed, 93 insertions(+) diff --git a/drivers/counter/microchip-tcb-capture.c b/drivers/counter/microchip-tcb-capture.c index 2f096a5b973d..cc12c2e2113a 100644 --- a/drivers/counter/microchip-tcb-capture.c +++ b/drivers/counter/microchip-tcb-capture.c @@ -6,18 +6,24 @@ */ #include #include +#include #include #include #include #include +#include #include #include +#include #include #define ATMEL_TC_CMR_MASK (ATMEL_TC_LDRA_RISING | ATMEL_TC_LDRB_FALLING | \ ATMEL_TC_ETRGEDG_RISING | ATMEL_TC_LDBDIS | \ ATMEL_TC_LDBSTOP) +#define ATMEL_TC_DEF_IRQS (ATMEL_TC_ETRGS | ATMEL_TC_COVFS | \ + ATMEL_TC_LDRAS | ATMEL_TC_LDRBS | ATMEL_TC_CPCS) + #define ATMEL_TC_QDEN BIT(8) #define ATMEL_TC_POSEN BIT(9) @@ -27,6 +33,7 @@ struct mchp_tc_data { int qdec_mode; int num_channels; int channel[2]; + int irq; }; static const enum counter_function mchp_tc_count_functions[] = { @@ -294,6 +301,65 @@ static const struct of_device_id atmel_tc_of_match[] = { { /* sentinel */ } }; +static irqreturn_t mchp_tc_isr(int irq, void *dev_id) +{ + struct counter_device *const counter = dev_id; + struct mchp_tc_data *const priv = counter_priv(counter); + u32 sr, mask; + + regmap_read(priv->regmap, ATMEL_TC_REG(priv->channel[0], SR), &sr); + regmap_read(priv->regmap, ATMEL_TC_REG(priv->channel[0], IMR), &mask); + + sr &= mask; + if (!(sr & ATMEL_TC_ALL_IRQ)) + return IRQ_NONE; + + if (sr & ATMEL_TC_ETRGS) + counter_push_event(counter, COUNTER_EVENT_CHANGE_OF_STATE, + COUNTER_MCHP_EVCHN_CV); + if (sr & ATMEL_TC_LDRAS) + counter_push_event(counter, COUNTER_EVENT_CAPTURE, + COUNTER_MCHP_EVCHN_RA); + if (sr & ATMEL_TC_LDRBS) + counter_push_event(counter, COUNTER_EVENT_CAPTURE, + COUNTER_MCHP_EVCHN_RB); + if (sr & ATMEL_TC_CPCS) + counter_push_event(counter, COUNTER_EVENT_THRESHOLD, + COUNTER_MCHP_EVCHN_RC); + if (sr & ATMEL_TC_COVFS) + counter_push_event(counter, COUNTER_EVENT_OVERFLOW, + COUNTER_MCHP_EVCHN_CV); + + return IRQ_HANDLED; +} + +static void mchp_tc_irq_remove(void *ptr) +{ + struct mchp_tc_data *priv = ptr; + + regmap_write(priv->regmap, ATMEL_TC_REG(priv->channel[0], IDR), ATMEL_TC_DEF_IRQS); +} + +static int mchp_tc_irq_enable(struct counter_device *const counter) +{ + struct mchp_tc_data *const priv = counter_priv(counter); + int ret = devm_request_irq(counter->parent, priv->irq, mchp_tc_isr, 0, + dev_name(counter->parent), counter); + + if (ret < 0) + return ret; + + ret = regmap_write(priv->regmap, ATMEL_TC_REG(priv->channel[0], IER), ATMEL_TC_DEF_IRQS); + if (ret < 0) + return ret; + + ret = devm_add_action_or_reset(counter->parent, mchp_tc_irq_remove, priv); + if (ret < 0) + return ret; + + return 0; +} + static void mchp_tc_clk_remove(void *ptr) { clk_disable_unprepare((struct clk *)ptr); @@ -378,6 +444,15 @@ static int mchp_tc_probe(struct platform_device *pdev) counter->num_signals = ARRAY_SIZE(mchp_tc_count_signals); counter->signals = mchp_tc_count_signals; + priv->irq = of_irq_get(np->parent, 0); + if (priv->irq == -EPROBE_DEFER) + return -EPROBE_DEFER; + if (priv->irq > 0) { + ret = mchp_tc_irq_enable(counter); + if (ret < 0) + return dev_err_probe(&pdev->dev, ret, "Failed to set up IRQ"); + } + ret = devm_counter_add(&pdev->dev, counter); if (ret < 0) return dev_err_probe(&pdev->dev, ret, "Failed to add counter\n"); diff --git a/include/uapi/linux/counter/microchip-tcb-capture.h b/include/uapi/linux/counter/microchip-tcb-capture.h index 7bda5fdef19b..ee72f1463594 100644 --- a/include/uapi/linux/counter/microchip-tcb-capture.h +++ b/include/uapi/linux/counter/microchip-tcb-capture.h @@ -12,6 +12,17 @@ * Count 0 * \__ Synapse 0 -- Signal 0 (Channel A, i.e. TIOA) * \__ Synapse 1 -- Signal 1 (Channel B, i.e. TIOB) + * + * It also supports the following events: + * + * Channel 0: + * - CV register changed + * - CV overflowed + * - RA captured + * Channel 1: + * - RB captured + * Channel 2: + * - RC compare triggered */ enum counter_mchp_signals { @@ -19,4 +30,11 @@ enum counter_mchp_signals { COUNTER_MCHP_SIG_TIOB, }; +enum counter_mchp_event_channels { + COUNTER_MCHP_EVCHN_CV = 0, + COUNTER_MCHP_EVCHN_RA = 0, + COUNTER_MCHP_EVCHN_RB, + COUNTER_MCHP_EVCHN_RC, +}; + #endif /* _UAPI_COUNTER_MCHP_TCB_H_ */ From patchwork Thu Feb 27 14:27:48 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?Q3PDs2vDoXMgQmVuY2U=?= X-Patchwork-Id: 13994649 Received: from fw2.prolan.hu (fw2.prolan.hu [193.68.50.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 62C5F2356A5; Thu, 27 Feb 2025 14:28:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.68.50.107 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740666483; cv=none; b=olTFdV/Mn6GUUHzWI4lCJWzpMmqlSjUdxBPQnSX7Va0++QtcUuWqEBdhSYSNv/ccYj+Gd0PWDAnoGVeVchPnBok3AtGrdN1mqYXe50AgAY2muIn9GQq3SRuwFL11uxT29EWf3YzRcobIF0Dd+18Yb6BGqgesviJEM9KX/2+dvXk= ARC-Message-Signature: i=1; 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Thu, 27 Feb 2025 15:27:58 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=prolan.hu; h=cc :cc:content-transfer-encoding:content-type:content-type:date :from:from:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=mail; bh=N3gvCZwllnDs36gmGooR 78bQv9+iVTrO6OW7darmJIQ=; b=Dy5eK6M34lgjGdps+bVp+rDtcWlSyw4olQCN ZkV25IVDwwpWDqiVuj5V1TJS1YfAe3CXW//EgWO3lu21EOI7S/rf7zkapWiYCfOU AbEwhmlNRaqWSIpiAIUcmlSan/Y/DNvJw9zEkHiUDT8ffhqxxKuBmxpg1VAKcVsZ XWIvCOeqDfXfAgpAQmw0bT+EfKaVV8+8sfzCXUwfUkhumYmLHYnp5LWsYW0MUXuq 0o8xlzu8uT8xlYHeFpidhZQKRzQhNzL0ReMXsfuz9/G4wuXYaYQB/8GjsnFn1OsR bMv8mebaMe9SZ83TeNGu0ty0Giui8J6yoZ/Vlsm5iohZi9urChRNoZI0YEQ2R9d2 az/k6nABXqHcwOI21AxQHHmKE5CGSEBh6p0kQl9aDZ4/qHTZ/ffDZlxsH4DENOMs i/l91FJ55z4+8S3XNJ0mOIKfZCVsFP/EpaOCqtFYBPhhif40NaaD+GtJD4EJooDn NjAOiSVQ/cRWQnWM/cLjE4JF/rPHkBzdgnUw395dvDWwFVD2/Rz7+ogtLgSkevCd vSKRAAvXoZ3vFbOsdRLKK3IcZQ1QFfQfLD/74uSBGnOQ5Hr6vxJLsunBtyYQhpPX txeYgsgjWch8zm6esVjkSRnwTOik5Ol6QU4wLYxGesUK+dUwSm8sK7wPqXarNUwQ BRoF40I= From: =?utf-8?b?QmVuY2UgQ3PDs2vDoXM=?= To: , , CC: =?utf-8?b?QmVuY2UgQ3PDs2vDoXM=?= , "Kamel Bouhara" , William Breathitt Gray Subject: [PATCH v5 3/3] counter: microchip-tcb-capture: Add capture extensions for registers RA-RC Date: Thu, 27 Feb 2025 15:27:48 +0100 Message-ID: <20250227142751.61496-4-csokas.bence@prolan.hu> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250227142751.61496-1-csokas.bence@prolan.hu> References: <20250227142751.61496-1-csokas.bence@prolan.hu> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ESET-AS: R=OK;S=0;OP=CALC;TIME=1740666477;VERSION=7985;MC=1859151475;ID=1457601;TRN=0;CRV=0;IPC=;SP=0;SIPS=0;PI=3;F=0 X-ESET-Antispam: OK X-EsetResult: clean, is OK X-EsetId: 37303A2980D94852637760 TCB hardware is capable of capturing the timer value to registers RA and RB. On top, it is capable of triggering on compare against a third register, RC. Add these registers as extensions. Signed-off-by: Bence Csókás --- Notes: Changes in v2: * Add IRQs Changes in v3: * Move IRQs to previous patch Changes in v4: * Return the status of the regmap_*() operations * Add names for the extension numbers drivers/counter/microchip-tcb-capture.c | 62 +++++++++++++++++++ .../linux/counter/microchip-tcb-capture.h | 9 +++ 2 files changed, 71 insertions(+) diff --git a/drivers/counter/microchip-tcb-capture.c b/drivers/counter/microchip-tcb-capture.c index cc12c2e2113a..369f69aaf14f 100644 --- a/drivers/counter/microchip-tcb-capture.c +++ b/drivers/counter/microchip-tcb-capture.c @@ -254,6 +254,66 @@ static int mchp_tc_count_read(struct counter_device *counter, return 0; } +static int mchp_tc_count_cap_read(struct counter_device *counter, + struct counter_count *count, size_t idx, u64 *val) +{ + struct mchp_tc_data *const priv = counter_priv(counter); + u32 cnt; + int ret; + + switch (idx) { + case COUNTER_MCHP_EXCAP_RA: + ret = regmap_read(priv->regmap, ATMEL_TC_REG(priv->channel[0], RA), &cnt); + break; + case COUNTER_MCHP_EXCAP_RB: + ret = regmap_read(priv->regmap, ATMEL_TC_REG(priv->channel[0], RB), &cnt); + break; + case COUNTER_MCHP_EXCAP_RC: + ret = regmap_read(priv->regmap, ATMEL_TC_REG(priv->channel[0], RC), &cnt); + break; + default: + return -EINVAL; + } + + if (!ret) + *val = cnt; + + return ret; +} + +static int mchp_tc_count_cap_write(struct counter_device *counter, + struct counter_count *count, size_t idx, u64 val) +{ + struct mchp_tc_data *const priv = counter_priv(counter); + int ret; + + if (val > U32_MAX) + return -ERANGE; + + switch (idx) { + case COUNTER_MCHP_EXCAP_RA: + ret = regmap_write(priv->regmap, ATMEL_TC_REG(priv->channel[0], RA), val); + break; + case COUNTER_MCHP_EXCAP_RB: + ret = regmap_write(priv->regmap, ATMEL_TC_REG(priv->channel[0], RB), val); + break; + case COUNTER_MCHP_EXCAP_RC: + ret = regmap_write(priv->regmap, ATMEL_TC_REG(priv->channel[0], RC), val); + break; + default: + return -EINVAL; + } + + return ret; +} + +static DEFINE_COUNTER_ARRAY_CAPTURE(mchp_tc_cnt_cap_array, 3); + +static struct counter_comp mchp_tc_count_ext[] = { + COUNTER_COMP_ARRAY_CAPTURE(mchp_tc_count_cap_read, mchp_tc_count_cap_write, + mchp_tc_cnt_cap_array), +}; + static struct counter_count mchp_tc_counts[] = { { .id = 0, @@ -262,6 +322,8 @@ static struct counter_count mchp_tc_counts[] = { .num_functions = ARRAY_SIZE(mchp_tc_count_functions), .synapses = mchp_tc_count_synapses, .num_synapses = ARRAY_SIZE(mchp_tc_count_synapses), + .ext = mchp_tc_count_ext, + .num_ext = ARRAY_SIZE(mchp_tc_count_ext), }, }; diff --git a/include/uapi/linux/counter/microchip-tcb-capture.h b/include/uapi/linux/counter/microchip-tcb-capture.h index ee72f1463594..5c015fafe42c 100644 --- a/include/uapi/linux/counter/microchip-tcb-capture.h +++ b/include/uapi/linux/counter/microchip-tcb-capture.h @@ -12,6 +12,9 @@ * Count 0 * \__ Synapse 0 -- Signal 0 (Channel A, i.e. TIOA) * \__ Synapse 1 -- Signal 1 (Channel B, i.e. TIOB) + * \__ Extension capture0 (RA register) + * \__ Extension capture1 (RB register) + * \__ Extension capture2 (RC register) * * It also supports the following events: * @@ -30,6 +33,12 @@ enum counter_mchp_signals { COUNTER_MCHP_SIG_TIOB, }; +enum counter_mchp_capture_extensions { + COUNTER_MCHP_EXCAP_RA, + COUNTER_MCHP_EXCAP_RB, + COUNTER_MCHP_EXCAP_RC, +}; + enum counter_mchp_event_channels { COUNTER_MCHP_EVCHN_CV = 0, COUNTER_MCHP_EVCHN_RA = 0,