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Fri, 28 Feb 2025 11:18:31 +0100 From: Wadim Egorov To: , , , , , CC: , , , Subject: [PATCH 1/5] arm64: dts: ti: k3-am62x-phyboard-lyra: Add boot phase tags Date: Fri, 28 Feb 2025 11:18:13 +0100 Message-ID: <20250228101817.865811-1-w.egorov@phytec.de> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Originating-IP: [172.25.0.51] X-ClientProxiedBy: Diagnostix.phytec.de (172.25.0.14) To Florix.phytec.de (172.25.0.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AMS0EPF000001A0:EE_|PA2P195MB2535:EE_ X-MS-Office365-Filtering-Correlation-Id: f211d8c1-87d4-40f6-1acc-08dd57e140f3 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|82310400026|36860700013|376014; X-Microsoft-Antispam-Message-Info: 3IxQ4+e9r7ABV39Xz7Gpd2O5o/HT/Yd2dMXZatKCefw8gHzgD351idKnORvKnIN+yZjJeNhjO5HHPncPY6jn9wJ9vGACzwO7jlvtirIsbdMH8v4i4KkG1uAcTEQJn3ijJF9qGqsFlS3ejmSMgvTPSYAZpA+XTNaUPDh+j2YMP1P5/PnGr2nOXjm6IGbPb285GJnfXMjxLWVSvNn1Duj46GRQ6Z5TH7n3bN1WNo4duGte5kQMDr3ZYuBt9G2O9YB1oGNSPO8f858H27Vai8TsP0Trj5RuZUS2H70325ngomgM3WOTb0E6ZJs0j9DOpE0siyEmrxQ8i2Teg8d0zLqHAzJV0/DzrZp9dEqVdFUtNhrCF+tHF82l2n/ci3ASbuqDLEbIr99ZSUypgF79uSg+xwlQngrjKWSGQ51UCWbVPUx2AxD0BblXrMa60AllRbHSUTT+bFMI23lXz6FKQJLUplLgssG0043gIRK+yqIysm6u7DoPsE5sllNfTLXh4a7dYxZoTrZOnG/oanPNC5HNRLxWEnREPcbp1ProJIRYgaQ/broHqgyu5h8eqj2Smf4TDxZO4RQHkiO5b1rS63WLfbTZaUCq7j2qJuva7kgmuMQvsqA9QoolUFWRWC/A4Q/WnQb299zORQE/y1UFP+Y0EUuBmHRqvb+F0WNsp325FMVxqvYAk1hDgQtOBAjrBPTiCbyMtv9cqVcWLvDThGVcGy7PBElsfiV+WEuga98vyqZIVqVx4/yPmdOLqCbw1jYNkbKuRi7BXBJeeuhxwdt6GBNLOSc72ZqM9tlyFU0MYjuR0OK+tofrDZBxMnsh5efBAn62hqcMCglebT1nxeMg9VlqW/YUbMHFMW3/n0dflVBjbppHH3kc/UT+58fhrAg9bhwxbhvax2PAnjpB/GtbXXP0Hqba43RiY5mowIR9U2hjMWvs6MND5tNjJWvWhKXKy13Aw8ZqXU0GOIL5rgzd/ZQk88rroJgbjxFUb2DAgtW83q3gfPt9vvKfKNsHNEl+x63KcRPxZea60svME7IJFlmPl+DGwSrXVUcAgVnSDrQTF8eombPi5RIiXa5TsDMzA12T9jBUpJAiksRDYk6xV4LHQYf7CRRDVayiyPhY06Gmf4/P/g2Tlgvf8xduRiQwwy3egMZ3b6mG08Sh7L8OG/CEd/Z+LlwrJ6LFuRGHIk2fXZbjwdqnoDhGnDoeliNaFq/NXJbzKA6YMt1zm0myDlNikY5SPjgyQ4KSMvBQA2Tmx/fA3kXq+145b+99TIMGQJS7T1wN3C6Y437QHsgHi+7Crak83NZDXGIMkW8/nL7SFVMoH0lPMew/uouPplRQlDlrWnbS98DTcDZWX5Jmkh9nVfwrJiy29s4Ypd4SBD2VgTXshxjsdpwphKVXoSo6202z5XRwicWLCocE6QfW6JaNKChxNxGi3dCkjkqPKeQkVRBdNpTHswom6PrDXAzPI3HvnvhJfPgmV3QCVizWcA== X-Forefront-Antispam-Report: CIP:91.26.50.189;CTRY:DE;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:Diagnostix.phytec.de;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(1800799024)(82310400026)(36860700013)(376014);DIR:OUT;SFP:1102; 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X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The bootph-all and bootph-pre-ram tags were introduced in dt-schema (dtschema/schemas/bootph.yaml) to define node usage across different boot phases. Add boot phase tags to all required nodes to ensure boot support from all sources, including UART, USB (DFU), Ethernet, uSD card, eMMC, and OSPI NOR Flash. Signed-off-by: Wadim Egorov --- arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi | 12 ++++++++++++ arch/arm64/boot/dts/ti/k3-am62x-phyboard-lyra.dtsi | 9 +++++++++ 2 files changed, 21 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi index 2ef4cbaec789..8b845bf9eda1 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi @@ -29,6 +29,7 @@ aliases { memory@80000000 { device_type = "memory"; reg = <0x00000000 0x80000000 0x00000000 0x80000000>; + bootph-all; }; reserved_memory: reserved-memory { @@ -131,6 +132,7 @@ main_i2c0_pins_default: main-i2c0-default-pins { AM62X_IOPAD(0x1e0, PIN_INPUT_PULLUP, 0) /* (B16) I2C0_SCL */ AM62X_IOPAD(0x1e4, PIN_INPUT_PULLUP, 0) /* (A16) I2C0_SDA */ >; + bootph-all; }; main_mdio1_pins_default: main-mdio1-default-pins { @@ -138,6 +140,7 @@ main_mdio1_pins_default: main-mdio1-default-pins { AM62X_IOPAD(0x160, PIN_OUTPUT, 0) /* (AD24) MDIO0_MDC */ AM62X_IOPAD(0x15c, PIN_INPUT, 0) /* (AB22) MDIO0_MDIO */ >; + bootph-all; }; main_mmc0_pins_default: main-mmc0-default-pins { @@ -153,6 +156,7 @@ AM62X_IOPAD(0x200, PIN_INPUT_PULLUP, 0) /* (AC1) MMC0_DAT5 */ AM62X_IOPAD(0x1fc, PIN_INPUT_PULLUP, 0) /* (AD2) MMC0_DAT6 */ AM62X_IOPAD(0x1f8, PIN_INPUT_PULLUP, 0) /* (AC2) MMC0_DAT7 */ >; + bootph-all; }; main_rgmii1_pins_default: main-rgmii1-default-pins { @@ -170,6 +174,7 @@ AM62X_IOPAD(0x140, PIN_OUTPUT, 0) /* (AD18) RGMII1_TD3 */ AM62X_IOPAD(0x130, PIN_OUTPUT, 0) /* (AE19) RGMII1_TXC */ AM62X_IOPAD(0x12c, PIN_OUTPUT, 0) /* (AD19) RGMII1_TX_CTL */ >; + bootph-all; }; ospi0_pins_default: ospi0-default-pins { @@ -186,6 +191,7 @@ AM62X_IOPAD(0x024, PIN_INPUT, 0) /* (H25) OSPI0_D6 */ AM62X_IOPAD(0x028, PIN_INPUT, 0) /* (J22) OSPI0_D7 */ AM62X_IOPAD(0x008, PIN_INPUT, 0) /* (J24) OSPI0_DQS */ >; + bootph-all; }; pmic_irq_pins_default: pmic-irq-default-pins { @@ -205,11 +211,13 @@ opp-1400000000 { &cpsw3g { pinctrl-names = "default"; pinctrl-0 = <&main_rgmii1_pins_default>; + bootph-all; }; &cpsw_port1 { phy-mode = "rgmii-rxid"; phy-handle = <&cpsw3g_phy1>; + bootph-all; }; &cpsw3g_mdio { @@ -220,6 +228,7 @@ &cpsw3g_mdio { cpsw3g_phy1: ethernet-phy@1 { compatible = "ethernet-phy-id2000.a231", "ethernet-phy-ieee802.3-c22"; reg = <1>; + bootph-all; ti,rx-internal-delay = ; ti,fifo-depth = ; }; @@ -236,6 +245,7 @@ &main_i2c0 { pinctrl-names = "default"; pinctrl-0 = <&main_i2c0_pins_default>; clock-frequency = <400000>; + bootph-all; status = "okay"; pmic@30 { @@ -355,6 +365,7 @@ serial_flash: flash@0 { cdns,tchsh-ns = <60>; cdns,tslch-ns = <60>; cdns,read-delay = <0>; + bootph-all; }; }; @@ -363,5 +374,6 @@ &sdhci0 { pinctrl-0 = <&main_mmc0_pins_default>; disable-wp; non-removable; + bootph-all; status = "okay"; }; diff --git a/arch/arm64/boot/dts/ti/k3-am62x-phyboard-lyra.dtsi b/arch/arm64/boot/dts/ti/k3-am62x-phyboard-lyra.dtsi index 922cad14c9f8..aab74d6019b0 100644 --- a/arch/arm64/boot/dts/ti/k3-am62x-phyboard-lyra.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62x-phyboard-lyra.dtsi @@ -138,6 +138,7 @@ vcc_3v3_mmc: regulator-vcc-3v3-mmc { regulator-max-microvolt = <3300000>; regulator-always-on; regulator-boot-on; + bootph-all; }; vcc_3v3_sw: regulator-vcc-3v3-sw { @@ -233,6 +234,7 @@ AM62X_IOPAD(0x228, PIN_INPUT_PULLUP, 0) /* (C21) MMC1_DAT2 */ AM62X_IOPAD(0x224, PIN_INPUT_PULLUP, 0) /* (D22) MMC1_DAT3 */ AM62X_IOPAD(0x240, PIN_INPUT_PULLUP, 0) /* (D17) MMC1_SDCD */ >; + bootph-all; }; main_rgmii2_pins_default: main-rgmii2-default-pins { @@ -257,6 +259,7 @@ main_uart0_pins_default: main-uart0-default-pins { AM62X_IOPAD(0x1c8, PIN_INPUT, 0) /* (D14) UART0_RXD */ AM62X_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (E14) UART0_TXD */ >; + bootph-all; }; main_uart1_pins_default: main-uart1-default-pins { @@ -266,6 +269,7 @@ AM62X_IOPAD(0x198, PIN_OUTPUT, 2) /* (A19) MCASP0_AXR2.UART1_RTSn */ AM62X_IOPAD(0x1ac, PIN_INPUT, 2) /* (E19) MCASP0_AFSR.UART1_RXD */ AM62X_IOPAD(0x1b0, PIN_OUTPUT, 2) /* (A20) MCASP0_ACLKR.UART1_TXD */ >; + bootph-pre-ram; }; main_usb1_pins_default: main-usb1-default-pins { @@ -430,12 +434,14 @@ &main_mcan0 { &main_uart0 { pinctrl-names = "default"; pinctrl-0 = <&main_uart0_pins_default>; + bootph-all; status = "okay"; }; &main_uart1 { pinctrl-names = "default"; pinctrl-0 = <&main_uart1_pins_default>; + bootph-pre-ram; /* Main UART1 may be used by TIFS firmware */ status = "okay"; }; @@ -467,11 +473,13 @@ &sdhci1 { pinctrl-0 = <&main_mmc1_pins_default>; disable-wp; no-1-8-v; + bootph-all; status = "okay"; }; &usbss0 { ti,vbus-divider; + bootph-all; status = "okay"; }; @@ -482,6 +490,7 @@ &usbss1 { &usb0 { usb-role-switch; + bootph-all; port { typec_hs: endpoint { From patchwork Fri Feb 28 10:18:14 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wadim Egorov X-Patchwork-Id: 13996178 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2B737C19776 for ; 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X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The bootph-all and bootph-pre-ram tags were introduced in dt-schema (dtschema/schemas/bootph.yaml) to define node usage across different boot phases. Add boot phase tags to all required nodes to ensure boot support from all sources, including UART, USB (DFU), Ethernet, uSD card, eMMC, and OSPI NOR Flash. Signed-off-by: Wadim Egorov --- arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi index a5aceaa39670..1387d11f9a78 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi @@ -42,6 +42,7 @@ memory@80000000 { device_type = "memory"; /* 2G RAM */ reg = <0x00000000 0x80000000 0x00000000 0x80000000>; + bootph-all; }; reserved-memory { @@ -99,6 +100,7 @@ main_i2c0_pins_default: main-i2c0-default-pins { AM62AX_IOPAD(0x1e0, PIN_INPUT_PULLUP, 0) /* (D17) I2C0_SCL */ AM62AX_IOPAD(0x1e4, PIN_INPUT_PULLUP, 0) /* (E16) I2C0_SDA */ >; + bootph-all; }; main_mdio1_pins_default: main-mdio1-default-pins { @@ -106,6 +108,7 @@ main_mdio1_pins_default: main-mdio1-default-pins { AM62AX_IOPAD(0x160, PIN_OUTPUT, 0) /* (V12) MDIO0_MDC */ AM62AX_IOPAD(0x15c, PIN_INPUT, 0) /* (V13) MDIO0_MDIO */ >; + bootph-all; }; main_mmc0_pins_default: main-mmc0-default-pins { @@ -121,6 +124,7 @@ AM62AX_IOPAD(0x200, PIN_INPUT_PULLUP, 0) /* (W7) MMC0_DAT5 */ AM62AX_IOPAD(0x1fc, PIN_INPUT_PULLUP, 0) /* (W9) MMC0_DAT6 */ AM62AX_IOPAD(0x1f8, PIN_INPUT_PULLUP, 0) /* (AB8) MMC0_DAT7 */ >; + bootph-all; }; main_rgmii1_pins_default: main-rgmii1-default-pins { @@ -138,6 +142,7 @@ AM62AX_IOPAD(0x140, PIN_OUTPUT, 0) /* (AA17) RGMII1_TD3 */ AM62AX_IOPAD(0x130, PIN_OUTPUT, 0) /* (AB17) RGMII1_TXC */ AM62AX_IOPAD(0x12c, PIN_OUTPUT, 0) /* (W16) RGMII1_TX_CTL */ >; + bootph-all; }; ospi0_pins_default: ospi0-default-pins { @@ -155,6 +160,7 @@ AM62AX_IOPAD(0x024, PIN_INPUT, 0) /* (J20) OSPI0_D6 */ AM62AX_IOPAD(0x028, PIN_INPUT, 0) /* (J22) OSPI0_D7 */ AM62AX_IOPAD(0x008, PIN_INPUT, 0) /* (L21) OSPI0_DQS */ >; + bootph-all; }; pmic_irq_pins_default: pmic-irq-default-pins { @@ -168,6 +174,7 @@ &cpsw3g { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&main_rgmii1_pins_default>; + bootph-all; }; &cpsw_port1 { @@ -182,6 +189,7 @@ &cpsw3g_mdio { cpsw3g_phy1: ethernet-phy@1 { compatible = "ethernet-phy-id2000.a231", "ethernet-phy-ieee802.3-c22"; reg = <1>; + bootph-all; ti,clk-output-sel = ; ti,rx-internal-delay = ; ti,fifo-depth = ; @@ -196,6 +204,7 @@ &main_i2c0 { pinctrl-names = "default"; pinctrl-0 = <&main_i2c0_pins_default>; clock-frequency = <400000>; + bootph-all; status = "okay"; pmic@30 { @@ -318,6 +327,7 @@ serial_flash: flash@0 { cdns,tchsh-ns = <60>; cdns,tslch-ns = <60>; cdns,read-delay = <0>; + bootph-all; }; }; @@ -326,5 +336,6 @@ &sdhci0 { pinctrl-0 = <&main_mmc0_pins_default>; disable-wp; non-removable; + bootph-all; status = "okay"; }; From patchwork Fri Feb 28 10:18:15 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wadim Egorov X-Patchwork-Id: 13996180 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B47D8C282C5 for ; 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X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The bootph-all and bootph-pre-ram tags were introduced in dt-schema (dtschema/schemas/bootph.yaml) to define node usage across different boot phases. Add boot phase tags to all required nodes to ensure boot support from all sources, including UART, Ethernet, uSD card, eMMC, and OSPI NOR Flash. Signed-off-by: Wadim Egorov --- arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi | 12 ++++++++++++ .../boot/dts/ti/k3-am642-phyboard-electra-rdk.dts | 5 +++++ 2 files changed, 17 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi index 99a6fdfaa7fb..52d53b690ac9 100644 --- a/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi @@ -27,6 +27,7 @@ aliases { memory@80000000 { device_type = "memory"; reg = <0x00000000 0x80000000 0x00000000 0x80000000>; + bootph-all; }; reserved_memory: reserved-memory { @@ -132,6 +133,7 @@ AM64X_IOPAD(0x01f8, PIN_INPUT, 4) /* (P5) PRG0_PRU1_GPO18.MDIO0_MDIO */ AM64X_IOPAD(0x01fc, PIN_OUTPUT, 4) /* (R2) PRG0_PRU1_GPO19.MDIO0_MDC */ AM64X_IOPAD(0x0100, PIN_OUTPUT, 7) /* (V7) PRG1_PRU0_GPO18.GPIO0_63 */ >; + bootph-all; }; cpsw_rgmii1_pins_default: cpsw-rgmii1-default-pins { @@ -150,6 +152,7 @@ AM64X_IOPAD(0x01f4, PIN_INPUT, 4) /* (V5) PRG0_PRU1_GPO17.RGMII1_RD3 */ AM64X_IOPAD(0x014c, PIN_OUTPUT, 4) /* (AA14) PRG1_PRU1_GPO17.RGMII1_TD3 */ AM64X_IOPAD(0x0154, PIN_INPUT, 7) /* (V12) PRG1_PRU1_GPO19.GPIO0_84 */ >; + bootph-all; }; eeprom_wp_pins_default: eeprom-wp-default-pins { @@ -169,6 +172,7 @@ main_i2c0_pins_default: main-i2c0-default-pins { AM64X_IOPAD(0x0260, PIN_INPUT, 0) /* (A18) I2C0_SCL */ AM64X_IOPAD(0x0264, PIN_INPUT, 0) /* (B18) I2C0_SDA */ >; + bootph-all; }; ospi0_pins_default: ospi0-default-pins { @@ -185,6 +189,7 @@ AM64X_IOPAD(0x0024, PIN_INPUT, 0) /* (N18) OSPI0_D6 */ AM64X_IOPAD(0x0028, PIN_INPUT, 0) /* (M17) OSPI0_D7 */ AM64X_IOPAD(0x002c, PIN_OUTPUT, 0) /* (L19) OSPI0_CSn0 */ >; + bootph-all; }; rtc_pins_default: rtc-defaults-pins { @@ -197,6 +202,7 @@ AM64X_IOPAD(0x0278, PIN_INPUT, 7) /* (C19) EXTINTn.GPIO1_70 */ &cpsw3g { pinctrl-names = "default"; pinctrl-0 = <&cpsw_rgmii1_pins_default>; + bootph-all; status = "okay"; }; @@ -204,6 +210,7 @@ &cpsw3g_mdio { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&cpsw_mdio_pins_default>; + bootph-all; cpsw3g_phy1: ethernet-phy@1 { compatible = "ethernet-phy-id2000.a231", "ethernet-phy-ieee802.3-c22"; @@ -215,12 +222,14 @@ cpsw3g_phy1: ethernet-phy@1 { reset-gpios = <&main_gpio0 63 GPIO_ACTIVE_LOW>; reset-assert-us = <1000>; reset-deassert-us = <1000>; + bootph-all; }; }; &cpsw_port1 { phy-mode = "rgmii-rxid"; phy-handle = <&cpsw3g_phy1>; + bootph-all; status = "okay"; }; @@ -266,6 +275,7 @@ &main_i2c0 { pinctrl-names = "default"; pinctrl-0 = <&main_i2c0_pins_default>; clock-frequency = <400000>; + bootph-all; eeprom@50 { compatible = "atmel,24c32"; @@ -377,6 +387,7 @@ serial_flash: flash@0 { cdns,tchsh-ns = <60>; cdns,tslch-ns = <60>; cdns,read-delay = <0>; + bootph-all; }; }; @@ -386,6 +397,7 @@ &sdhci0 { ti,driver-strength-ohm = <50>; disable-wp; keep-power-in-suspend; + bootph-all; }; &tscadc0 { diff --git a/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts b/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts index bc8e1ce11047..6fbd8d932396 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts @@ -171,6 +171,7 @@ vcc_3v3_mmc: regulator-sd { regulator-max-microvolt = <3300000>; regulator-boot-on; regulator-always-on; + bootph-all; }; }; @@ -275,6 +276,7 @@ AM64X_IOPAD(0x0290, PIN_INPUT, 0) /* MMC1_CLKLB */ AM64X_IOPAD(0x0294, PIN_INPUT_PULLUP, 0) /* (J19) MMC1_CMD */ AM64X_IOPAD(0x0298, PIN_INPUT_PULLUP, 0) /* (D19) MMC1_SDCD */ >; + bootph-all; }; main_spi0_pins_default: main-spi0-default-pins { @@ -291,6 +293,7 @@ main_uart0_pins_default: main-uart0-default-pins { AM64X_IOPAD(0x0230, PIN_INPUT, 0) /* (D15) UART0_RXD */ AM64X_IOPAD(0x0234, PIN_OUTPUT, 0) /* (C16) UART0_TXD */ >; + bootph-all; }; main_uart1_pins_default: main-uart1-default-pins { @@ -413,6 +416,7 @@ &main_uart0 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&main_uart0_pins_default>; + bootph-all; }; &main_uart1 { @@ -429,6 +433,7 @@ &sdhci1 { pinctrl-0 = <&main_mmc1_pins_default>; disable-wp; no-1-8-v; + bootph-all; }; &serdes0 { From patchwork Fri Feb 28 10:18:16 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wadim Egorov X-Patchwork-Id: 13996162 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C06FFC19776 for ; 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X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Reorder properties to comply with the DeviceTree coding style guidelines: https://docs.kernel.org/devicetree/bindings/dts-coding-style.html Signed-off-by: Wadim Egorov --- arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi | 12 ++++++------ .../boot/dts/ti/k3-am642-phyboard-electra-rdk.dts | 14 +++++++------- 2 files changed, 13 insertions(+), 13 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi index 52d53b690ac9..4697c395fcb9 100644 --- a/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi @@ -207,22 +207,22 @@ &cpsw3g { }; &cpsw3g_mdio { - status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&cpsw_mdio_pins_default>; bootph-all; + status = "okay"; cpsw3g_phy1: ethernet-phy@1 { compatible = "ethernet-phy-id2000.a231", "ethernet-phy-ieee802.3-c22"; reg = <1>; interrupt-parent = <&main_gpio0>; interrupts = <84 IRQ_TYPE_EDGE_FALLING>; - ti,rx-internal-delay = ; - ti,fifo-depth = ; reset-gpios = <&main_gpio0 63 GPIO_ACTIVE_LOW>; reset-assert-us = <1000>; reset-deassert-us = <1000>; bootph-all; + ti,rx-internal-delay = ; + ti,fifo-depth = ; }; }; @@ -271,11 +271,11 @@ mbox_m4_0: mbox-m4-0 { }; &main_i2c0 { - status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&main_i2c0_pins_default>; clock-frequency = <400000>; bootph-all; + status = "okay"; eeprom@50 { compatible = "atmel,24c32"; @@ -372,9 +372,9 @@ &mcu_m4fss { }; &ospi0 { - status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&ospi0_pins_default>; + status = "okay"; serial_flash: flash@0 { compatible = "jedec,spi-nor"; @@ -392,12 +392,12 @@ serial_flash: flash@0 { }; &sdhci0 { - status = "okay"; non-removable; ti,driver-strength-ohm = <50>; disable-wp; keep-power-in-suspend; bootph-all; + status = "okay"; }; &tscadc0 { diff --git a/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts b/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts index 6fbd8d932396..f63c101b7d61 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts @@ -352,10 +352,10 @@ &i2c_som_rtc { }; &main_i2c1 { - status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&main_i2c1_pins_default>; clock-frequency = <400000>; + status = "okay"; eeprom@51 { compatible = "atmel,24c02"; @@ -385,25 +385,25 @@ led-5 { }; &main_mcan0 { - status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&main_mcan0_pins_default>; phys = <&can_tc1>; + status = "okay"; }; &main_mcan1 { - status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&main_mcan1_pins_default>; phys = <&can_tc2>; + status = "okay"; }; &main_spi0 { - status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&main_spi0_pins_default>; cs-gpios = <0>, <&main_gpio1 43 GPIO_ACTIVE_LOW>; ti,pindir-d0-out-d1-in; + status = "okay"; tpm@1 { compatible = "infineon,slb9670", "tcg,tpm_tis-spi"; @@ -413,27 +413,27 @@ tpm@1 { }; &main_uart0 { - status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&main_uart0_pins_default>; bootph-all; + status = "okay"; }; &main_uart1 { - status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&main_uart1_pins_default>; uart-has-rtscts; + status = "okay"; }; &sdhci1 { - status = "okay"; vmmc-supply = <&vcc_3v3_mmc>; pinctrl-names = "default"; pinctrl-0 = <&main_mmc1_pins_default>; disable-wp; no-1-8-v; bootph-all; + status = "okay"; }; &serdes0 { From patchwork Fri Feb 28 10:18:17 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wadim Egorov X-Patchwork-Id: 13996179 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 046DEC19776 for ; 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X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Reorder properties to comply with the DeviceTree coding style guidelines: https://docs.kernel.org/devicetree/bindings/dts-coding-style.html Signed-off-by: Wadim Egorov --- arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi index 1387d11f9a78..f567462ceb58 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi @@ -171,10 +171,10 @@ AM62AX_IOPAD(0x1f4, PIN_INPUT, 0) /* (D16) EXTINTn */ }; &cpsw3g { - status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&main_rgmii1_pins_default>; bootph-all; + status = "okay"; }; &cpsw_port1 { @@ -224,8 +224,8 @@ pmic@30 { interrupts = ; interrupt-controller; #interrupt-cells = <1>; - ti,power-button; system-power-controller; + ti,power-button; regulators { vdd_3v3: buck1 {