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Mon, 3 Mar 2025 14:59:18 +0000 (GMT) Received: from eusmgms2.samsung.com (unknown [182.198.249.180]) by eusmtrp1.samsung.com (KnoxPortal) with ESMTP id 20250303145918eusmtrp18841a15b616fc7e4a2bdbb4e56e3ccbf~pUviZDDaa2312323123eusmtrp1a; Mon, 3 Mar 2025 14:59:18 +0000 (GMT) X-AuditID: cbfec7f4-c0df970000004fb9-b2-67c5c3c7ba34 Received: from eusmtip2.samsung.com ( [203.254.199.222]) by eusmgms2.samsung.com (EUCPMTA) with SMTP id 21.2D.19654.6C3C5C76; Mon, 3 Mar 2025 14:59:18 +0000 (GMT) Received: from AMDC4942.home (unknown [106.210.136.40]) by eusmtip2.samsung.com (KnoxPortal) with ESMTPA id 20250303145917eusmtip262401cb62e98a1cb3c10584e5559065b~pUvhfIk212997429974eusmtip2E; Mon, 3 Mar 2025 14:59:17 +0000 (GMT) From: Michal Wilczynski To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, drew@pdp7.com, guoren@kernel.org, wefu@redhat.com, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, alex@ghiti.fr, jszhang@kernel.org, ulf.hansson@linaro.org, m.szyprowski@samsung.com Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Michal Wilczynski , Krzysztof Kozlowski Subject: [PATCH v1 1/5] dt-bindings: firmware: thead,th1520: Add support for firmware node Date: Mon, 3 Mar 2025 15:58:57 +0100 Message-Id: <20250303145901.446791-2-m.wilczynski@samsung.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250303145901.446791-1-m.wilczynski@samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrCKsWRmVeSWpSXmKPExsWy7djP87rHDx9NN7j2kN3i2Z2vrBZbf89i t1iz9xyTxfwj51gt7l3awmTxYm8ji0XzsfVsFi9n3WOz2Pt6K7vF5V1z2Cw+9x5htNj2uYXN Yu2Ru+wW67/OZ7J4ebmH2aJtFr/F/z072C2Orw23aNk/hcVB2OPNy5csHoc7vrB73DsxjdVj 06pONo871/aweWxeUu/RsvYYk8f7fVfZPPq2rGL0uNR8nd3j8ya5AO4oLpuU1JzMstQifbsE rowb6+cyFawSr7i8WK2BcYlwFyMHh4SAicT+M/ldjJwcQgIrGCWatpd0MXIB2V8YJY5MXsQG 4XxmlJhybhYLTEPnV0mI+HJGiQWLXjNBOG8YJXpudTKDjGITMJJ4sHw+K0hCRKCfSaLvyH8w h1ngIaPE65dNrCBVwgIxEq8/rWAHsVkEVCX2z5sI1s0rYCexc3IHE4gtISAvsf/gWWaQ1ZwC 9hKfGjQhSgQlTs58wgJiMwOVNG+dzQwyX0JgN6fE9k3XoXpdJBrOX2eDsIUlXh3fwg5hy0ic ntzDAmHnSzzY+okZwq6R2NlzHMq2lrhz7hcbyF5mAU2J9bv0IcKOEhNetzFBQoJP4sZbQYgT +CQmbZvODBHmlehoE4KoVpOY2tMLt/Tcim1QnR4Ss5fZTmBUnIXkl1lIfpmFsHYBI/MqRvHU 0uLc9NRio7zUcr3ixNzi0rx0veT83E2MwIR4+t/xLzsYl7/6qHeIkYmD8RCjBAezkgjvrfaj 6UK8KYmVValF+fFFpTmpxYcYpTlYlMR5F+1vTRcSSE8sSc1OTS1ILYLJMnFwSjUwZVzkc/v6 bFXDmeTP2j+/uKcZX7p0I07c7r2ygu2aMzEqSi1WPjpu71rjijcmF/8zen2G53eQo6fd55QJ T/l3s24qiP7u+FTPOFDsuMWcsLfLz95gnCr8e9uWiTtWZ9wNSjov/mSr+5SPDJlVK+ymbL4k uzvfzf9hxtdv95c+XXW8d5t9T8XarzIf/q39OOnps5Io52l8Z3nvdFsu2FsXIcyzWdXi8Iae 8MWzEve4uriXeXw7kr58+yPReS5lca96twBDVGevre9EXaWJUrXO57afc/tiMTuy/FYxy8p6 yV07BcRPz992M2ql8vxO341f/++YkPW9LsBbetXlsKNneRezrXp78G5H3+vm29rXMpRYijMS DbWYi4oTAfQv4Q33AwAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrCIsWRmVeSWpSXmKPExsVy+t/xe7rHDh9NN/hwRcni2Z2vrBZbf89i t1iz9xyTxfwj51gt7l3awmTxYm8ji0XzsfVsFi9n3WOz2Pt6K7vF5V1z2Cw+9x5htNj2uYXN Yu2Ru+wW67/OZ7J4ebmH2aJtFr/F/z072C2Orw23aNk/hcVB2OPNy5csHoc7vrB73DsxjdVj 06pONo871/aweWxeUu/RsvYYk8f7fVfZPPq2rGL0uNR8nd3j8ya5AO4oPZui/NKSVIWM/OIS W6VoQwsjPUNLCz0jE0s9Q2PzWCsjUyV9O5uU1JzMstQifbsEvYwb6+cyFawSr7i8WK2BcYlw FyMHh4SAiUTnV8kuRi4OIYGljBIPzjeydzFyAsVlJK51v2SBsIUl/lzrYoMoesUoMXFdEyNI gk3ASOLB8vmsIAkRgYVMElenbGAGSTALPGWU2HZDHMQWFoiS+PGyHWwqi4CqxP55E8FqeAXs JHZO7mCC2CAvsf/gWWaQizgF7CU+NWiCmEJAJa8+cUBUC0qcnPmEBWK6vETz1tnMExgFZiFJ zUKSWsDItIpRJLW0ODc9t9hIrzgxt7g0L10vOT93EyMwercd+7llB+PKVx/1DjEycTAeYpTg YFYS4b3VfjRdiDclsbIqtSg/vqg0J7X4EKMp0NUTmaVEk/OB6SOvJN7QzMDU0MTM0sDU0sxY SZyX7cr5NCGB9MSS1OzU1ILUIpg+Jg5OqQam6NnbLbuXPoxb+vpw5u9P91z+1qyRjn8/v/7x wnrB1+zyNpLruVKzeBhMNvp7KPAvatKfHHTDL1k6hCstcqGLYd6dcrYL/R8evZZa/kBGtP39 xN81Ku8l2T9E3LftYXd7dmeicHNVqUbGjMYkd5UVXFvCXNuXL7t5p3+T1qxJce2fBI431FRN klnx3fCdVvs112n+Ga4/eM8X8N2IvPnj8OPpfVZr/jwwXp/SrzXHnaEs5JTyzx1XP0+fIvTG 14j36d/4HTXPDmkFlZ26L31ggXnUSRMDCasDFhbPnJQPe78sb/rMJBSx+HbRo7eadZNun9EW XdLmoPd38v2Al7s715z1PqNTe23ezm18QScmKrEUZyQaajEXFScCABK364RnAwAA X-CMS-MailID: 20250303145918eucas1p10f64b2ce75e395ce208439307daa8a8f X-Msg-Generator: CA X-RootMTR: 20250303145918eucas1p10f64b2ce75e395ce208439307daa8a8f X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20250303145918eucas1p10f64b2ce75e395ce208439307daa8a8f References: <20250303145901.446791-1-m.wilczynski@samsung.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250303_065923_210102_C8F11115 X-CRM114-Status: GOOD ( 16.41 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org The kernel communicates with the E902 core through the mailbox transport using AON firmware protocol. Add dt-bindings to document it the dt node. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Michal Wilczynski --- .../bindings/firmware/thead,th1520-aon.yaml | 53 +++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 54 insertions(+) create mode 100644 Documentation/devicetree/bindings/firmware/thead,th1520-aon.yaml diff --git a/Documentation/devicetree/bindings/firmware/thead,th1520-aon.yaml b/Documentation/devicetree/bindings/firmware/thead,th1520-aon.yaml new file mode 100644 index 000000000000..bbc183200400 --- /dev/null +++ b/Documentation/devicetree/bindings/firmware/thead,th1520-aon.yaml @@ -0,0 +1,53 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/firmware/thead,th1520-aon.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: T-HEAD TH1520 AON (Always-On) Firmware + +description: | + The Always-On (AON) subsystem in the TH1520 SoC is responsible for managing + low-power states, system wakeup events, and power management tasks. It is + designed to operate independently in a dedicated power domain, allowing it to + remain functional even during the SoC's deep sleep states. + + At the heart of the AON subsystem is the E902, a low-power core that executes + firmware responsible for coordinating tasks such as power domain control, + clock management, and system wakeup signaling. Communication between the main + SoC and the AON subsystem is handled through a mailbox interface, which + enables message-based interactions with the AON firmware. + +maintainers: + - Michal Wilczynski + +properties: + compatible: + const: thead,th1520-aon + + mboxes: + maxItems: 1 + + mbox-names: + items: + - const: aon + + "#power-domain-cells": + const: 1 + +required: + - compatible + - mboxes + - mbox-names + - "#power-domain-cells" + +additionalProperties: false + +examples: + - | + aon: aon { + compatible = "thead,th1520-aon"; + mboxes = <&mbox_910t 1>; + mbox-names = "aon"; + #power-domain-cells = <1>; + }; diff --git a/MAINTAINERS b/MAINTAINERS index 8e0736dc2ee0..46745cfe9d1f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -20427,6 +20427,7 @@ L: linux-riscv@lists.infradead.org S: Maintained T: git https://github.com/pdp7/linux.git F: Documentation/devicetree/bindings/clock/thead,th1520-clk-ap.yaml +F: Documentation/devicetree/bindings/firmware/thead,th1520-aon.yaml F: Documentation/devicetree/bindings/mailbox/thead,th1520-mbox.yaml F: Documentation/devicetree/bindings/net/thead,th1520-gmac.yaml F: Documentation/devicetree/bindings/pinctrl/thead,th1520-pinctrl.yaml From patchwork Mon Mar 3 14:58:58 2025 Content-Type: text/plain; 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Mon, 3 Mar 2025 14:59:19 +0000 (GMT) X-AuditID: cbfec7f5-e59c770000004fad-c6-67c5c3c7654f Received: from eusmtip2.samsung.com ( [203.254.199.222]) by eusmgms2.samsung.com (EUCPMTA) with SMTP id 62.2D.19654.7C3C5C76; Mon, 3 Mar 2025 14:59:19 +0000 (GMT) Received: from AMDC4942.home (unknown [106.210.136.40]) by eusmtip2.samsung.com (KnoxPortal) with ESMTPA id 20250303145918eusmtip2fd020107a70bec49772d66fa7923dfba~pUviWhsAD0239102391eusmtip2H; Mon, 3 Mar 2025 14:59:18 +0000 (GMT) From: Michal Wilczynski To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, drew@pdp7.com, guoren@kernel.org, wefu@redhat.com, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, alex@ghiti.fr, jszhang@kernel.org, ulf.hansson@linaro.org, m.szyprowski@samsung.com Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Michal Wilczynski Subject: [PATCH v1 2/5] firmware: thead: Add AON firmware protocol driver Date: Mon, 3 Mar 2025 15:58:58 +0100 Message-Id: <20250303145901.446791-3-m.wilczynski@samsung.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250303145901.446791-1-m.wilczynski@samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrMKsWRmVeSWpSXmKPExsWy7djP87rHDx9NN5gwydji2Z2vrBZbf89i t1iz9xyTxfwj51gt7l3awmTxYm8ji0XzsfVsFi9n3WOzuLxrDpvF594jjBbbPrewWaw9cpfd Yv3X+UwWLy/3MFu0zeK3+L9nB7vF8bXhFi37p7A4CHm8efmSxeNwxxd2j3snprF6bFrVyeZx 59oeNo/NS+o9WtYeY/J4v+8qm0ffllWMHpear7N7fN4kF8AdxWWTkpqTWZZapG+XwJWx64B/ wfnpjBVzL51ja2A8XdbFyMkhIWAi8ad9PTOILSSwglGi6Ux1FyMXkP2FUeLY3JvsEM5nRomF ex8zw3S8OLWSDSKxnFFi8rQ9jBDOG0aJVdd/s4JUsQkYSTxYPp8VJCEi0M8k0XfkP5jDLLCS UeL+hbNgs4QFPCXutf0Fs1kEVCW2fbsDZvMK2EncODKHCWKfvMT+gyD1HBycAvYSnxo0IUoE JU7OfMICYjMDlTRvnc0MMl9CYDOnRMu+CYwQvS4SF/rns0HYwhKvjm9hh7BlJE5P7mGBsPMl Hmz9BPVbjcTOnuNQtrXEnXO/2ED2MgtoSqzfpQ8RdpR482QNWFhCgE/ixltBiBP4JCZtm84M EeaV6GgTgqhWk5ja0wu39NyKbVBPeUi8bNrLPIFRcRaSZ2YheWYWwt4FjMyrGMVTS4tz01OL jfNSy/WKE3OLS/PS9ZLzczcxAtPh6X/Hv+5gXPHqo94hRiYOxkOMEhzMSiK8t9qPpgvxpiRW VqUW5ccXleakFh9ilOZgURLnXbS/NV1IID2xJDU7NbUgtQgmy8TBKdXA1HphTVH7B9tPsY+P HE20PP1rrvobC4G7P20k0lhuXpSdKyggc+nUKj+364HKHBsafT7pTt/CJ7OQ66f7/x/VS4N/ xzWUe5jwVpVfDN6l9Cc657+kmaL2WR1jWcvPMSeuPeLdq+v6KSRK66hg50x24ZjbM/4bH2j+ bKj+Jm7x3IJ5Zw7x9cs85Xyh6bWsuCDqR83yFA5xpaipNY3x2Q1/wqfsexyiVHHngrFbz8nt //xtPCy+HTrkOflS1RkOB1PXfWtT5kp+EjgDTJ4JryV4klf8Z/6wMTOYb9PEayb9U//O+NG1 7MO7vb4hR3a9mvZmTmel65+DLW+C+uew2WmxTRWb0Nb+UIwlzEWyJWSREktxRqKhFnNRcSIA u+23sPYDAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrEIsWRmVeSWpSXmKPExsVy+t/xe7rHDx9NN1i8TdTi2Z2vrBZbf89i t1iz9xyTxfwj51gt7l3awmTxYm8ji0XzsfVsFi9n3WOzuLxrDpvF594jjBbbPrewWaw9cpfd Yv3X+UwWLy/3MFu0zeK3+L9nB7vF8bXhFi37p7A4CHm8efmSxeNwxxd2j3snprF6bFrVyeZx 59oeNo/NS+o9WtYeY/J4v+8qm0ffllWMHpear7N7fN4kF8AdpWdTlF9akqqQkV9cYqsUbWhh pGdoaaFnZGKpZ2hsHmtlZKqkb2eTkpqTWZZapG+XoJex64B/wfnpjBVzL51ja2A8XdbFyMkh IWAi8eLUSrYuRi4OIYGljBIzXvxhhUjISFzrfskCYQtL/LnWBVX0ilGi++YGsCI2ASOJB8vn s4IkRAQWMklcnbKBGcRhFljLKHH46iV2kCphAU+Je21/mUFsFgFViW3f7oDZvAJ2EjeOzGGC WCEvsf/gWaA4BwengL3EpwZNEFMIqOTVJw6IakGJkzOfgB3EDFTdvHU28wRGgVlIUrOQpBYw Mq1iFEktLc5Nzy020itOzC0uzUvXS87P3cQIjNxtx35u2cG48tVHvUOMTByMhxglOJiVRHhv tR9NF+JNSaysSi3Kjy8qzUktPsRoCnT1RGYp0eR8YOrIK4k3NDMwNTQxszQwtTQzVhLnZbty Pk1IID2xJDU7NbUgtQimj4mDU6qBSXS7b6bRpEsn/8RMevv5TFOf0ftv1r4NR66Wl1xPl29s rTpi+Vf347WNoVNmTRQ+nJ4ns0syokW013bbjRoWRQ4u4eSUu1IWE813fdluc0GYMaT88rz+ TRfDPNYGH1ip+nla0MMTRxVb21szrQ5/dHjz11BqxqQoj5qi96LmoZv/vVpnrfKsLzEq9YXP ta0HztxTXXh5Fdsmjmez5VoV54bvDtXwPeXfIDLD3Nxifcb1PPsZUwWPv3wRbhV4nidvz+/S aWZ2B2/qqchNZt0Twsb3U3VFbniSctQD1ltuFmua2fda9Pua6JQ3T3W+kvX93X+98xeSfzg9 uvSvK0AroUT8js/uxd8CVE8nH+8wVGIpzkg01GIuKk4EAIUDvpllAwAA X-CMS-MailID: 20250303145919eucas1p123e4b3ab94c67b7538a088be350372b4 X-Msg-Generator: CA X-RootMTR: 20250303145919eucas1p123e4b3ab94c67b7538a088be350372b4 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20250303145919eucas1p123e4b3ab94c67b7538a088be350372b4 References: <20250303145901.446791-1-m.wilczynski@samsung.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250303_065923_215169_19578AEE X-CRM114-Status: GOOD ( 30.99 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org The T-Head TH1520 SoC uses an E902 co-processor running Always-On (AON) firmware to manage power, clock, and other system resources [1]. This patch introduces a driver implementing the AON firmware protocol, allowing the Linux kernel to communicate with the firmware via mailbox channels. Through an RPC-based interface, the kernel can initiate power state transitions, update resource configurations, and perform other AON-related tasks. Link: https://openbeagle.org/beaglev-ahead/beaglev-ahead/-/blob/main/docs/TH1520%20System%20User%20Manual.pdf [1] Signed-off-by: Michal Wilczynski --- MAINTAINERS | 2 + drivers/firmware/Kconfig | 9 + drivers/firmware/Makefile | 1 + drivers/firmware/thead,th1520-aon.c | 247 ++++++++++++++++++ .../linux/firmware/thead/thead,th1520-aon.h | 200 ++++++++++++++ 5 files changed, 459 insertions(+) create mode 100644 drivers/firmware/thead,th1520-aon.c create mode 100644 include/linux/firmware/thead/thead,th1520-aon.h diff --git a/MAINTAINERS b/MAINTAINERS index 46745cfe9d1f..c446fed8ff96 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -20433,10 +20433,12 @@ F: Documentation/devicetree/bindings/net/thead,th1520-gmac.yaml F: Documentation/devicetree/bindings/pinctrl/thead,th1520-pinctrl.yaml F: arch/riscv/boot/dts/thead/ F: drivers/clk/thead/clk-th1520-ap.c +F: drivers/firmware/thead,th1520-aon.c F: drivers/mailbox/mailbox-th1520.c F: drivers/net/ethernet/stmicro/stmmac/dwmac-thead.c F: drivers/pinctrl/pinctrl-th1520.c F: include/dt-bindings/clock/thead,th1520-clk-ap.h +F: include/linux/firmware/thead/thead,th1520-aon.h RNBD BLOCK DRIVERS M: Md. Haris Iqbal diff --git a/drivers/firmware/Kconfig b/drivers/firmware/Kconfig index 9f35f69e0f9e..52c145097770 100644 --- a/drivers/firmware/Kconfig +++ b/drivers/firmware/Kconfig @@ -212,6 +212,15 @@ config SYSFB_SIMPLEFB If unsure, say Y. +config TH1520_AON_PROTOCOL + tristate "Always-On firmware protocol" + depends on ARCH_THEAD || COMPILE_TEST + help + Power, clock, and resource management capabilities on the TH1520 SoC are + managed by the E902 core. Firmware running on this core communicates with + the kernel through the Always-On protocol, using hardware mailbox as a medium. + Say yes if you need such capabilities. + config TI_SCI_PROTOCOL tristate "TI System Control Interface (TISCI) Message Protocol" depends on TI_MESSAGE_MANAGER diff --git a/drivers/firmware/Makefile b/drivers/firmware/Makefile index 7a8d486e718f..5db9c042430c 100644 --- a/drivers/firmware/Makefile +++ b/drivers/firmware/Makefile @@ -18,6 +18,7 @@ obj-$(CONFIG_RASPBERRYPI_FIRMWARE) += raspberrypi.o obj-$(CONFIG_FW_CFG_SYSFS) += qemu_fw_cfg.o obj-$(CONFIG_SYSFB) += sysfb.o obj-$(CONFIG_SYSFB_SIMPLEFB) += sysfb_simplefb.o +obj-$(CONFIG_TH1520_AON_PROTOCOL) += thead,th1520-aon.o obj-$(CONFIG_TI_SCI_PROTOCOL) += ti_sci.o obj-$(CONFIG_TRUSTED_FOUNDATIONS) += trusted_foundations.o obj-$(CONFIG_TURRIS_MOX_RWTM) += turris-mox-rwtm.o diff --git a/drivers/firmware/thead,th1520-aon.c b/drivers/firmware/thead,th1520-aon.c new file mode 100644 index 000000000000..48e1bd986768 --- /dev/null +++ b/drivers/firmware/thead,th1520-aon.c @@ -0,0 +1,247 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2021 Alibaba Group Holding Limited. + * Copyright (c) 2024 Samsung Electronics Co., Ltd. + * Author: Michal Wilczynski + */ + +#include +#include +#include +#include + +#define MAX_RX_TIMEOUT (msecs_to_jiffies(3000)) +#define MAX_TX_TIMEOUT 500 + +struct th1520_aon_chan { + struct mbox_chan *ch; + struct th1520_aon_rpc_ack_common ack_msg; + struct mbox_client cl; + struct completion done; + + /* make sure only one RPC is performed at a time */ + struct mutex transaction_lock; +}; + +struct th1520_aon_msg_req_set_resource_power_mode { + struct th1520_aon_rpc_msg_hdr hdr; + u16 resource; + u16 mode; + u16 reserved[10]; +} __packed __aligned(1); + +/* + * This type is used to indicate error response for most functions. + */ +enum th1520_aon_error_codes { + LIGHT_AON_ERR_NONE = 0, /* Success */ + LIGHT_AON_ERR_VERSION = 1, /* Incompatible API version */ + LIGHT_AON_ERR_CONFIG = 2, /* Configuration error */ + LIGHT_AON_ERR_PARM = 3, /* Bad parameter */ + LIGHT_AON_ERR_NOACCESS = 4, /* Permission error (no access) */ + LIGHT_AON_ERR_LOCKED = 5, /* Permission error (locked) */ + LIGHT_AON_ERR_UNAVAILABLE = 6, /* Unavailable (out of resources) */ + LIGHT_AON_ERR_NOTFOUND = 7, /* Not found */ + LIGHT_AON_ERR_NOPOWER = 8, /* No power */ + LIGHT_AON_ERR_IPC = 9, /* Generic IPC error */ + LIGHT_AON_ERR_BUSY = 10, /* Resource is currently busy/active */ + LIGHT_AON_ERR_FAIL = 11, /* General I/O failure */ + LIGHT_AON_ERR_LAST +}; + +static int th1520_aon_linux_errmap[LIGHT_AON_ERR_LAST] = { + 0, /* LIGHT_AON_ERR_NONE */ + -EINVAL, /* LIGHT_AON_ERR_VERSION */ + -EINVAL, /* LIGHT_AON_ERR_CONFIG */ + -EINVAL, /* LIGHT_AON_ERR_PARM */ + -EACCES, /* LIGHT_AON_ERR_NOACCESS */ + -EACCES, /* LIGHT_AON_ERR_LOCKED */ + -ERANGE, /* LIGHT_AON_ERR_UNAVAILABLE */ + -EEXIST, /* LIGHT_AON_ERR_NOTFOUND */ + -EPERM, /* LIGHT_AON_ERR_NOPOWER */ + -EPIPE, /* LIGHT_AON_ERR_IPC */ + -EBUSY, /* LIGHT_AON_ERR_BUSY */ + -EIO, /* LIGHT_AON_ERR_FAIL */ +}; + +static inline int th1520_aon_to_linux_errno(int errno) +{ + if (errno >= LIGHT_AON_ERR_NONE && errno < LIGHT_AON_ERR_LAST) + return th1520_aon_linux_errmap[errno]; + + return -EIO; +} + +static void th1520_aon_rx_callback(struct mbox_client *c, void *rx_msg) +{ + struct th1520_aon_chan *aon_chan = + container_of(c, struct th1520_aon_chan, cl); + struct th1520_aon_rpc_msg_hdr *hdr = + (struct th1520_aon_rpc_msg_hdr *)rx_msg; + u8 recv_size = sizeof(struct th1520_aon_rpc_msg_hdr) + hdr->size; + + if (recv_size != sizeof(struct th1520_aon_rpc_ack_common)) { + dev_err(c->dev, "Invalid ack size, not completing\n"); + return; + } + + memcpy(&aon_chan->ack_msg, rx_msg, recv_size); + complete(&aon_chan->done); +} + +/** + * th1520_aon_call_rpc() - Send an RPC request to the TH1520 AON subsystem + * @aon_chan: Pointer to the AON channel structure + * @msg: Pointer to the message (RPC payload) that will be sent + * + * This function sends an RPC message to the TH1520 AON subsystem via mailbox. + * It takes the provided @msg buffer, formats it with version and service flags, + * then blocks until the RPC completes or times out. The completion is signaled + * by the `aon_chan->done` completion, which is waited upon for a duration + * defined by `MAX_RX_TIMEOUT`. + * + * Return: + * * 0 on success + * * -ETIMEDOUT if the RPC call times out + * * A negative error code if the mailbox send fails or if AON responds with + * a non-zero error code (converted via th1520_aon_to_linux_errno()). + */ +int th1520_aon_call_rpc(struct th1520_aon_chan *aon_chan, void *msg) +{ + struct th1520_aon_rpc_msg_hdr *hdr = msg; + int ret; + + mutex_lock(&aon_chan->transaction_lock); + reinit_completion(&aon_chan->done); + + RPC_SET_VER(hdr, TH1520_AON_RPC_VERSION); + RPC_SET_SVC_ID(hdr, hdr->svc); + RPC_SET_SVC_FLAG_MSG_TYPE(hdr, RPC_SVC_MSG_TYPE_DATA); + RPC_SET_SVC_FLAG_ACK_TYPE(hdr, RPC_SVC_MSG_NEED_ACK); + + ret = mbox_send_message(aon_chan->ch, msg); + if (ret < 0) { + dev_err(aon_chan->cl.dev, "RPC send msg failed: %d\n", ret); + goto out; + } + + if (!wait_for_completion_timeout(&aon_chan->done, MAX_RX_TIMEOUT)) { + dev_err(aon_chan->cl.dev, "RPC send msg timeout\n"); + mutex_unlock(&aon_chan->transaction_lock); + return -ETIMEDOUT; + } + + ret = aon_chan->ack_msg.err_code; + +out: + mutex_unlock(&aon_chan->transaction_lock); + + return th1520_aon_to_linux_errno(ret); +} +EXPORT_SYMBOL_GPL(th1520_aon_call_rpc); + +/** + * th1520_aon_power_update() - Change power state of a resource via TH1520 AON + * @aon_chan: Pointer to the AON channel structure + * @rsrc: Resource ID whose power state needs to be updated + * @power_on: Boolean indicating whether the resource should be powered on (true) + * or powered off (false) + * + * This function requests the TH1520 AON subsystem to set the power mode of the + * given resource (@rsrc) to either on or off. It constructs the message in + * `struct th1520_aon_msg_req_set_resource_power_mode` and then invokes + * th1520_aon_call_rpc() to make the request. If the AON call fails, an error + * message is logged along with the specific return code. + * + * Return: + * * 0 on success + * * A negative error code in case of failures (propagated from + * th1520_aon_call_rpc()). + */ +int th1520_aon_power_update(struct th1520_aon_chan *aon_chan, u16 rsrc, + bool power_on) +{ + struct th1520_aon_msg_req_set_resource_power_mode msg = {}; + struct th1520_aon_rpc_msg_hdr *hdr = &msg.hdr; + int ret; + + hdr->svc = TH1520_AON_RPC_SVC_PM; + hdr->func = TH1520_AON_PM_FUNC_SET_RESOURCE_POWER_MODE; + hdr->size = TH1520_AON_RPC_MSG_NUM; + + RPC_SET_BE16(&msg.resource, 0, rsrc); + RPC_SET_BE16(&msg.resource, 2, + (power_on ? TH1520_AON_PM_PW_MODE_ON : + TH1520_AON_PM_PW_MODE_OFF)); + + ret = th1520_aon_call_rpc(aon_chan, &msg); + if (ret) + dev_err(aon_chan->cl.dev, "failed to power %s resource %d ret %d\n", + power_on ? "up" : "off", rsrc, ret); + + return ret; +} +EXPORT_SYMBOL_GPL(th1520_aon_power_update); + +/** + * th1520_aon_init() - Initialize TH1520 AON firmware protocol interface + * @dev: Device pointer for the AON subsystem + * + * This function initializes the TH1520 AON firmware protocol interface by: + * - Allocating and initializing the AON channel structure + * - Setting up the mailbox client + * - Requesting the AON mailbox channel + * - Initializing synchronization primitives + * + * Return: + * * Valid pointer to th1520_aon_chan structure on success + * * ERR_PTR(-ENOMEM) if memory allocation fails + * * ERR_PTR() with other negative error codes from mailbox operations + */ +struct th1520_aon_chan *th1520_aon_init(struct device *dev) +{ + struct th1520_aon_chan *aon_chan; + struct mbox_client *cl; + + aon_chan = kzalloc(sizeof(*aon_chan), GFP_KERNEL); + if (!aon_chan) + return ERR_PTR(-ENOMEM); + + cl = &aon_chan->cl; + cl->dev = dev; + cl->tx_block = true; + cl->tx_tout = MAX_TX_TIMEOUT; + cl->rx_callback = th1520_aon_rx_callback; + + aon_chan->ch = mbox_request_channel_byname(cl, "aon"); + if (IS_ERR(aon_chan->ch)) { + dev_err(dev, "Failed to request aon mbox chan\n"); + kfree(aon_chan); + return ERR_CAST(aon_chan->ch); + } + + mutex_init(&aon_chan->transaction_lock); + init_completion(&aon_chan->done); + + return aon_chan; +} +EXPORT_SYMBOL_GPL(th1520_aon_init); + +/** + * th1520_aon_deinit() - Clean up TH1520 AON firmware protocol interface + * @aon_chan: Pointer to the AON channel structure to clean up + * + * This function cleans up resources allocated by th1520_aon_init(): + * - Frees the mailbox channel + * - Frees the AON channel + */ +void th1520_aon_deinit(struct th1520_aon_chan *aon_chan) +{ + mbox_free_channel(aon_chan->ch); + kfree(aon_chan); +} +EXPORT_SYMBOL_GPL(th1520_aon_deinit); + +MODULE_AUTHOR("Michal Wilczynski "); +MODULE_DESCRIPTION("T-HEAD TH1520 Always-On firmware protocol library"); +MODULE_LICENSE("GPL"); diff --git a/include/linux/firmware/thead/thead,th1520-aon.h b/include/linux/firmware/thead/thead,th1520-aon.h new file mode 100644 index 000000000000..dae132b66873 --- /dev/null +++ b/include/linux/firmware/thead/thead,th1520-aon.h @@ -0,0 +1,200 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2021 Alibaba Group Holding Limited. + */ + +#ifndef _THEAD_AON_H +#define _THEAD_AON_H + +#include +#include + +#define AON_RPC_MSG_MAGIC (0xef) +#define TH1520_AON_RPC_VERSION 2 +#define TH1520_AON_RPC_MSG_NUM 7 + +struct th1520_aon_chan; + +enum th1520_aon_rpc_svc { + TH1520_AON_RPC_SVC_UNKNOWN = 0, + TH1520_AON_RPC_SVC_PM = 1, + TH1520_AON_RPC_SVC_MISC = 2, + TH1520_AON_RPC_SVC_AVFS = 3, + TH1520_AON_RPC_SVC_SYS = 4, + TH1520_AON_RPC_SVC_WDG = 5, + TH1520_AON_RPC_SVC_LPM = 6, + TH1520_AON_RPC_SVC_MAX = 0x3F, +}; + +enum th1520_aon_misc_func { + TH1520_AON_MISC_FUNC_UNKNOWN = 0, + TH1520_AON_MISC_FUNC_SET_CONTROL = 1, + TH1520_AON_MISC_FUNC_GET_CONTROL = 2, + TH1520_AON_MISC_FUNC_REGDUMP_CFG = 3, +}; + +enum th1520_aon_wdg_func { + TH1520_AON_WDG_FUNC_UNKNOWN = 0, + TH1520_AON_WDG_FUNC_START = 1, + TH1520_AON_WDG_FUNC_STOP = 2, + TH1520_AON_WDG_FUNC_PING = 3, + TH1520_AON_WDG_FUNC_TIMEOUTSET = 4, + TH1520_AON_WDG_FUNC_RESTART = 5, + TH1520_AON_WDG_FUNC_GET_STATE = 6, + TH1520_AON_WDG_FUNC_POWER_OFF = 7, + TH1520_AON_WDG_FUNC_AON_WDT_ON = 8, + TH1520_AON_WDG_FUNC_AON_WDT_OFF = 9, +}; + +enum th1520_aon_sys_func { + TH1520_AON_SYS_FUNC_UNKNOWN = 0, + TH1520_AON_SYS_FUNC_AON_RESERVE_MEM = 1, +}; + +enum th1520_aon_lpm_func { + TH1520_AON_LPM_FUNC_UNKNOWN = 0, + TH1520_AON_LPM_FUNC_REQUIRE_STR = 1, + TH1520_AON_LPM_FUNC_RESUME_STR = 2, + TH1520_AON_LPM_FUNC_REQUIRE_STD = 3, + TH1520_AON_LPM_FUNC_CPUHP = 4, + TH1520_AON_LPM_FUNC_REGDUMP_CFG = 5, +}; + +enum th1520_aon_pm_func { + TH1520_AON_PM_FUNC_UNKNOWN = 0, + TH1520_AON_PM_FUNC_SET_RESOURCE_REGULATOR = 1, + TH1520_AON_PM_FUNC_GET_RESOURCE_REGULATOR = 2, + TH1520_AON_PM_FUNC_SET_RESOURCE_POWER_MODE = 3, + TH1520_AON_PM_FUNC_PWR_SET = 4, + TH1520_AON_PM_FUNC_PWR_GET = 5, + TH1520_AON_PM_FUNC_CHECK_FAULT = 6, + TH1520_AON_PM_FUNC_GET_TEMPERATURE = 7, +}; + +struct th1520_aon_rpc_msg_hdr { + u8 ver; /* version of msg hdr */ + u8 size; /* msg size ,uinit in bytes,the size includes rpc msg header self */ + u8 svc; /* rpc main service id */ + u8 func; /* rpc sub func id of specific service, sent by caller */ +} __packed __aligned(1); + +struct th1520_aon_rpc_ack_common { + struct th1520_aon_rpc_msg_hdr hdr; + u8 err_code; +} __packed __aligned(1); + +#define RPC_SVC_MSG_TYPE_DATA 0 +#define RPC_SVC_MSG_TYPE_ACK 1 +#define RPC_SVC_MSG_NEED_ACK 0 +#define RPC_SVC_MSG_NO_NEED_ACK 1 + +#define RPC_GET_VER(MESG) ((MESG)->ver) +#define RPC_SET_VER(MESG, VER) ((MESG)->ver = (VER)) +#define RPC_GET_SVC_ID(MESG) ((MESG)->svc & 0x3F) +#define RPC_SET_SVC_ID(MESG, ID) ((MESG)->svc |= 0x3F & (ID)) +#define RPC_GET_SVC_FLAG_MSG_TYPE(MESG) (((MESG)->svc & 0x80) >> 7) +#define RPC_SET_SVC_FLAG_MSG_TYPE(MESG, TYPE) ((MESG)->svc |= (TYPE) << 7) +#define RPC_GET_SVC_FLAG_ACK_TYPE(MESG) (((MESG)->svc & 0x40) >> 6) +#define RPC_SET_SVC_FLAG_ACK_TYPE(MESG, ACK) ((MESG)->svc |= (ACK) << 6) + +#define RPC_SET_BE64(MESG, OFFSET, SET_DATA) \ + do { \ + u8 *data = (u8 *)(MESG); \ + u64 _offset = (OFFSET); \ + u64 _set_data = (SET_DATA); \ + data[_offset + 7] = _set_data & 0xFF; \ + data[_offset + 6] = (_set_data & 0xFF00) >> 8; \ + data[_offset + 5] = (_set_data & 0xFF0000) >> 16; \ + data[_offset + 4] = (_set_data & 0xFF000000) >> 24; \ + data[_offset + 3] = (_set_data & 0xFF00000000) >> 32; \ + data[_offset + 2] = (_set_data & 0xFF0000000000) >> 40; \ + data[_offset + 1] = (_set_data & 0xFF000000000000) >> 48; \ + data[_offset + 0] = (_set_data & 0xFF00000000000000) >> 56; \ + } while (0) + +#define RPC_SET_BE32(MESG, OFFSET, SET_DATA) \ + do { \ + u8 *data = (u8 *)(MESG); \ + u64 _offset = (OFFSET); \ + u64 _set_data = (SET_DATA); \ + data[_offset + 3] = (_set_data) & 0xFF; \ + data[_offset + 2] = (_set_data & 0xFF00) >> 8; \ + data[_offset + 1] = (_set_data & 0xFF0000) >> 16; \ + data[_offset + 0] = (_set_data & 0xFF000000) >> 24; \ + } while (0) + +#define RPC_SET_BE16(MESG, OFFSET, SET_DATA) \ + do { \ + u8 *data = (u8 *)(MESG); \ + u64 _offset = (OFFSET); \ + u64 _set_data = (SET_DATA); \ + data[_offset + 1] = (_set_data) & 0xFF; \ + data[_offset + 0] = (_set_data & 0xFF00) >> 8; \ + } while (0) + +#define RPC_SET_U8(MESG, OFFSET, SET_DATA) \ + do { \ + u8 *data = (u8 *)(MESG); \ + data[OFFSET] = (SET_DATA) & 0xFF; \ + } while (0) + +#define RPC_GET_BE64(MESG, OFFSET, PTR) \ + do { \ + u8 *data = (u8 *)(MESG); \ + u64 _offset = (OFFSET); \ + *(u32 *)(PTR) = \ + (data[_offset + 7] | data[_offset + 6] << 8 | \ + data[_offset + 5] << 16 | data[_offset + 4] << 24 | \ + data[_offset + 3] << 32 | data[_offset + 2] << 40 | \ + data[_offset + 1] << 48 | data[_offset + 0] << 56); \ + } while (0) + +#define RPC_GET_BE32(MESG, OFFSET, PTR) \ + do { \ + u8 *data = (u8 *)(MESG); \ + u64 _offset = (OFFSET); \ + *(u32 *)(PTR) = \ + (data[_offset + 3] | data[_offset + 2] << 8 | \ + data[_offset + 1] << 16 | data[_offset + 0] << 24); \ + } while (0) + +#define RPC_GET_BE16(MESG, OFFSET, PTR) \ + do { \ + u8 *data = (u8 *)(MESG); \ + u64 _offset = (OFFSET); \ + *(u16 *)(PTR) = (data[_offset + 1] | data[_offset + 0] << 8); \ + } while (0) + +#define RPC_GET_U8(MESG, OFFSET, PTR) \ + do { \ + u8 *data = (u8 *)(MESG); \ + *(u8 *)(PTR) = (data[OFFSET]); \ + } while (0) + +/* + * Defines for SC PM Power Mode + */ +#define TH1520_AON_PM_PW_MODE_OFF 0 /* Power off */ +#define TH1520_AON_PM_PW_MODE_STBY 1 /* Power in standby */ +#define TH1520_AON_PM_PW_MODE_LP 2 /* Power in low-power */ +#define TH1520_AON_PM_PW_MODE_ON 3 /* Power on */ + +/* + * Defines for AON power islands + */ +#define TH1520_AON_AUDIO_PD 0 +#define TH1520_AON_VDEC_PD 1 +#define TH1520_AON_NPU_PD 2 +#define TH1520_AON_VENC_PD 3 +#define TH1520_AON_GPU_PD 4 +#define TH1520_AON_DSP0_PD 5 +#define TH1520_AON_DSP1_PD 6 + +struct th1520_aon_chan *th1520_aon_init(struct device *dev); +void th1520_aon_deinit(struct th1520_aon_chan *aon_chan); + +int th1520_aon_call_rpc(struct th1520_aon_chan *aon_chan, void *msg); +int th1520_aon_power_update(struct th1520_aon_chan *aon_chan, u16 rsrc, + bool power_on); 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Mon, 3 Mar 2025 14:59:20 +0000 (GMT) Received: from eusmgms2.samsung.com (unknown [182.198.249.180]) by eusmtrp1.samsung.com (KnoxPortal) with ESMTP id 20250303145920eusmtrp16253f574e7cdc0974455c751817db909~pUvj92mBz2312323123eusmtrp1d; Mon, 3 Mar 2025 14:59:20 +0000 (GMT) X-AuditID: cbfec7f2-b09c370000005155-8a-67c5c3c8cf8e Received: from eusmtip2.samsung.com ( [203.254.199.222]) by eusmgms2.samsung.com (EUCPMTA) with SMTP id 14.2D.19654.8C3C5C76; Mon, 3 Mar 2025 14:59:20 +0000 (GMT) Received: from AMDC4942.home (unknown [106.210.136.40]) by eusmtip2.samsung.com (KnoxPortal) with ESMTPA id 20250303145919eusmtip2095bc55713009acd89a9d1b9a11988b0~pUvjFJmGb0240902409eusmtip2G; Mon, 3 Mar 2025 14:59:19 +0000 (GMT) From: Michal Wilczynski To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, drew@pdp7.com, guoren@kernel.org, wefu@redhat.com, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, alex@ghiti.fr, jszhang@kernel.org, ulf.hansson@linaro.org, m.szyprowski@samsung.com Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Michal Wilczynski , Krzysztof Kozlowski Subject: [PATCH v1 3/5] dt-bindings: power: Add TH1520 SoC power domains Date: Mon, 3 Mar 2025 15:58:59 +0100 Message-Id: <20250303145901.446791-4-m.wilczynski@samsung.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250303145901.446791-1-m.wilczynski@samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrOKsWRmVeSWpSXmKPExsWy7djP87onDh9NN7i4QM/i2Z2vrBZbf89i t1iz9xyTxfwj51gt7l3awmTxYm8ji0XzsfVsFi9n3WOz2Pt6K7vF5V1z2Cw+9x5htNj2uYXN Yu2Ru+wW67/OZ7J4ebmH2aJtFr/F/z072C2Orw23aNk/hcVB2OPNy5csHoc7vrB73DsxjdVj 06pONo871/aweWxeUu/RsvYYk8f7fVfZPPq2rGL0uNR8nd3j8ya5AO4oLpuU1JzMstQifbsE roz3r66zFfTzVhxeso25gbGXu4uRk0NCwETizr+dzF2MXBxCAisYJfbcaWeFcL4wSnw5/JAV pEpI4DOjxNqbPDAd5/bPZYEoWs4o8WnpaTYI5w2jxMFns8E62ASMJB4snw82SkSgn0mi78h/ MIdZ4CGjxOuXTWBVwgIeEvcatzOC2CwCqhJ/v39iA7F5Bewk9rU/YoLYJy+x/+BZoAs5ODgF 7CU+NWhClAhKnJz5hAXEZgYqad46mxmifDenxJr1VhC2i8SSllZ2CFtY4tXxLVC2jMTpyT0s EHa+xIOtn6B6ayR29hyHsq0l7pz7xQaylllAU2L9Ln2IsKNE3/kLTCBhCQE+iRtvBSEu4JOY tG06M0SYV6KjTQiiWk1iak8v3NJzK7ZB/eQhMevtI7YJjIqzkPwyC8kvsxD2LmBkXsUonlpa nJueWmyYl1quV5yYW1yal66XnJ+7iRGYFk//O/5pB+PcVx/1DjEycTAeYpTgYFYS4b3VfjRd iDclsbIqtSg/vqg0J7X4EKM0B4uSOO+i/a3pQgLpiSWp2ampBalFMFkmDk6pBibbNe4pkSIH F/e5FP+d63fvzIp7j/dcjHfRj2Se5CQt+FD8u5RcZnj+4z7beWGpPtZ6Af4uqjfZ91UwXti6 hf+7No/Kn7MukV/9jpSciijnO/dkpvPhtUHFXHlm2xfPYEl5am/5mdsmXex1aoEH9+vO6fti jx/IitcOk+T45CNfk5MbNH3xqjcTQqd9KVwjVb8sNenr3KjppyS2Hypff6jofm5mhMgB3oLl bYlT52ze+WhVF7fjjaI6H5vdd31XMf8+r3f02uIrLgUu/7si+68G3pPyaDjgVxFgLSE7ja2/ +O4tdr6qm8bCVzsFv6qkzH9rO4nb+VlCjMo7ox0pYizfZ9c/kLq+aHXs/2Vbm5RYijMSDbWY i4oTAc/qWpv6AwAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrGIsWRmVeSWpSXmKPExsVy+t/xe7onDh9NN/h7nsfi2Z2vrBZbf89i t1iz9xyTxfwj51gt7l3awmTxYm8ji0XzsfVsFi9n3WOz2Pt6K7vF5V1z2Cw+9x5htNj2uYXN Yu2Ru+wW67/OZ7J4ebmH2aJtFr/F/z072C2Orw23aNk/hcVB2OPNy5csHoc7vrB73DsxjdVj 06pONo871/aweWxeUu/RsvYYk8f7fVfZPPq2rGL0uNR8nd3j8ya5AO4oPZui/NKSVIWM/OIS W6VoQwsjPUNLCz0jE0s9Q2PzWCsjUyV9O5uU1JzMstQifbsEvYz3r66zFfTzVhxeso25gbGX u4uRk0NCwETi3P65LF2MXBxCAksZJRrn/mGHSMhIXOt+yQJhC0v8udbFBlH0ilFi/ao9jCAJ NgEjiQfL57OCJEQEFjJJXJ2ygRkkwSzwlFFi2w1xEFtYwEPiXuN2sAYWAVWJv98/sYHYvAJ2 EvvaHzFBbJCX2H/wLFAvBwengL3EpwZNEFMIqOTVJw6IakGJkzOfsEBMl5do3jqbeQKjwCwk qVlIUgsYmVYxiqSWFuem5xYb6RUn5haX5qXrJefnbmIERvC2Yz+37GBc+eqj3iFGJg7GQ4wS HMxKIry32o+mC/GmJFZWpRblxxeV5qQWH2I0Bbp6IrOUaHI+MIXklcQbmhmYGpqYWRqYWpoZ K4nzsl05nyYkkJ5YkpqdmlqQWgTTx8TBKdXAJG7CdV4pUFGJo+7P8s4N53hifG6Xpz97oW+9 MEJp7Y14v3vur+bcc+q43+wUZNicsDs0rPp6iXfdRusIT/2ZignB+c7en6f3tJ1JsWn/wbhr 1b3Q+dZ37j6NlBX6uSeq9pj3POFj18+dnsw9PUyB2XbvLY4Z23Kvn6g/Y3Wwp7Vyw+ILii+/ nI0WlrSQ0LfJuLdx1upZHzpn7S5MbJ0tGK6aZ1Lo59jloXjz//WUY1fLCgIdSj9/YHOLOqAp rhXxf2oW77YOl8rFvlv/V5+9osj2q0z1nUPlxWmtKevslvMtXlNU0Ja8ze+q1JmZ+6yiZ3/z /2t9o3CKFI9s6vyHc7bIhWp/blN9fe2efOMbJZbijERDLeai4kQA+QgBlmkDAAA= X-CMS-MailID: 20250303145920eucas1p1aff0c4204bc716ef8dc683c11a4b26b4 X-Msg-Generator: CA X-RootMTR: 20250303145920eucas1p1aff0c4204bc716ef8dc683c11a4b26b4 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20250303145920eucas1p1aff0c4204bc716ef8dc683c11a4b26b4 References: <20250303145901.446791-1-m.wilczynski@samsung.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250303_065923_155844_61CC7DB2 X-CRM114-Status: GOOD ( 13.53 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Add power domain ID's for the TH1520 SoC power domains. Acked-by: Krzysztof Kozlowski Signed-off-by: Michal Wilczynski --- MAINTAINERS | 1 + .../dt-bindings/power/thead,th1520-power.h | 19 +++++++++++++++++++ 2 files changed, 20 insertions(+) create mode 100644 include/dt-bindings/power/thead,th1520-power.h diff --git a/MAINTAINERS b/MAINTAINERS index c446fed8ff96..b2b32e431f35 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -20438,6 +20438,7 @@ F: drivers/mailbox/mailbox-th1520.c F: drivers/net/ethernet/stmicro/stmmac/dwmac-thead.c F: drivers/pinctrl/pinctrl-th1520.c F: include/dt-bindings/clock/thead,th1520-clk-ap.h +F: include/dt-bindings/power/thead,th1520-power.h F: include/linux/firmware/thead/thead,th1520-aon.h RNBD BLOCK DRIVERS diff --git a/include/dt-bindings/power/thead,th1520-power.h b/include/dt-bindings/power/thead,th1520-power.h new file mode 100644 index 000000000000..8395bd1459f3 --- /dev/null +++ b/include/dt-bindings/power/thead,th1520-power.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ +/* + * Copyright (C) 2022 Alibaba Group Holding Limited. + * Copyright (c) 2024 Samsung Electronics Co., Ltd. + * Author: Michal Wilczynski + */ + +#ifndef __DT_BINDINGS_POWER_TH1520_H +#define __DT_BINDINGS_POWER_TH1520_H + +#define TH1520_AUDIO_PD 0 +#define TH1520_VDEC_PD 1 +#define TH1520_NPU_PD 2 +#define TH1520_VENC_PD 3 +#define TH1520_GPU_PD 4 +#define TH1520_DSP0_PD 5 +#define TH1520_DSP1_PD 6 + +#endif From patchwork Mon Mar 3 14:59:00 2025 Content-Type: text/plain; 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Mon, 3 Mar 2025 14:59:21 +0000 (GMT) X-AuditID: cbfec7f5-e59c770000004fad-cc-67c5c3c93cdf Received: from eusmtip2.samsung.com ( [203.254.199.222]) by eusmgms2.samsung.com (EUCPMTA) with SMTP id 95.2D.19654.9C3C5C76; Mon, 3 Mar 2025 14:59:21 +0000 (GMT) Received: from AMDC4942.home (unknown [106.210.136.40]) by eusmtip2.samsung.com (KnoxPortal) with ESMTPA id 20250303145920eusmtip20047c6ed356f659ed8d58ba75d62a37f~pUvj4RzFb0239102391eusmtip2I; Mon, 3 Mar 2025 14:59:20 +0000 (GMT) From: Michal Wilczynski To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, drew@pdp7.com, guoren@kernel.org, wefu@redhat.com, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, alex@ghiti.fr, jszhang@kernel.org, ulf.hansson@linaro.org, m.szyprowski@samsung.com Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Michal Wilczynski Subject: [PATCH v1 4/5] pmdomain: thead: Add power-domain driver for TH1520 Date: Mon, 3 Mar 2025 15:59:00 +0100 Message-Id: <20250303145901.446791-5-m.wilczynski@samsung.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250303145901.446791-1-m.wilczynski@samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrMKsWRmVeSWpSXmKPExsWy7djPc7onDx9NNzhxVMPi2Z2vrBZbf89i t1iz9xyTxfwj51gt7l3awmTxYm8ji0XzsfVsFi9n3WOzuLxrDpvF594jjBbbPrewWaw9cpfd Yv3X+UwWLy/3MFu0zeK3+L9nB7vF8bXhFi37p7A4CHm8efmSxeNwxxd2j3snprF6bFrVyeZx 59oeNo/NS+o9WtYeY/J4v+8qm0ffllWMHpear7N7fN4kF8AdxWWTkpqTWZZapG+XwJVxZMJb loIZfhUtZ16xNDB+cuhi5OSQEDCRaPv1ibmLkYtDSGAFo8SSzklsEM4XRomGdbMYIZzPjBLf /i9lhWm5+uMRO0RiOaPEkU9XoFreMEqsf/ueCaSKTcBI4sHy+awgCRGBfiaJviP/wRxmgZWM EvcvnGUGqRIW8JZ4vP8MkM3BwSKgKrHuQQlImFfATqL12x4WiHXyEvsPngUr4RSwl/jUoAlR IihxcuYTsBJmoJLmrbPBnpAQ2Mwp0fD1NTtEr4vEns1XoOYIS7w6vgUqLiNxenIPVDxf4sHW T8wQdo3Ezp7jULa1xJ1zv9hA9jILaEqs36UPEXaUWH3sFDtIWEKAT+LGW0GIE/gkJm2bzgwR 5pXoaBOCqFaTmNrTC7f03IptTBC2h8Sc1f9YJzAqzkLyzCwkz8xC2LuAkXkVo3hqaXFuemqx cV5quV5xYm5xaV66XnJ+7iZGYDo8/e/41x2MK1591DvEyMTBeIhRgoNZSYT3VvvRdCHelMTK qtSi/Pii0pzU4kOM0hwsSuK8i/a3pgsJpCeWpGanphakFsFkmTg4pRqYStbbvT2p+rtxmrSv 8Lt3i7nMRNXndS3b4zB1ia/+/z2lLZm1i6q7nt3vUhJc1qy11dYqiVna4fla1aTdzBEd8yN+ TfswSfP/uxOFYTaxBY9khBfZ+M06f5T/m0hD1PTbWsemZTXd2Bep+vy7yrPfx7b4Weg7f5fe 2Oh5JGJng+WVR+aPmHOsvD+v2qAoHb2xrVB5+QamCwoph9y1ROvO3Ovhv1SbGLDBI+qAaGlL Cs+Da+skxQ+c2tewwm/fw1DdZp/Kq0/TSqOu8muUNihqSD8K1D2afpbJZ2KsUDNrxsoSFRbz lBOyza7lj9zuBT+bf13jyYobxYEMPZEVES9dp1cHZy+quRMa1phfoaHEUpyRaKjFXFScCADZ jRgp9gMAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrIIsWRmVeSWpSXmKPExsVy+t/xe7onDx9NN5j6gNni2Z2vrBZbf89i t1iz9xyTxfwj51gt7l3awmTxYm8ji0XzsfVsFi9n3WOzuLxrDpvF594jjBbbPrewWaw9cpfd Yv3X+UwWLy/3MFu0zeK3+L9nB7vF8bXhFi37p7A4CHm8efmSxeNwxxd2j3snprF6bFrVyeZx 59oeNo/NS+o9WtYeY/J4v+8qm0ffllWMHpear7N7fN4kF8AdpWdTlF9akqqQkV9cYqsUbWhh pGdoaaFnZGKpZ2hsHmtlZKqkb2eTkpqTWZZapG+XoJdxZMJbloIZfhUtZ16xNDB+cuhi5OSQ EDCRuPrjEXsXIxeHkMBSRolrXYtYIRIyEte6X7JA2MISf651sUEUvWKU2NveyAiSYBMwkniw fD4rSEJEYCGTxNUpG5hBHGaBtYwSh69eYgepEhbwlni8/wxQgoODRUBVYt2DEpAwr4CdROu3 PVAb5CX2HzwLVsIpYC/xqUETxBQCKnn1iQOiWlDi5MwnYNXMQNXNW2czT2AUmIUkNQtJagEj 0ypGkdTS4tz03GIjveLE3OLSvHS95PzcTYzAuN127OeWHYwrX33UO8TIxMF4iFGCg1lJhPdW +9F0Id6UxMqq1KL8+KLSnNTiQ4ymQEdPZJYSTc4HJo68knhDMwNTQxMzSwNTSzNjJXFetivn 04QE0hNLUrNTUwtSi2D6mDg4pRqYOlTzU3zy15eFxL5M3Rp1d/KUJZeOHoycopJ9/fLdM5rz Yg6GTdM6a+JvMkHupfffNUxL9d9fl7F7KfC7mKkyN0ahwqL470/XxX+vTUx5tZuF+Xpb9f4V xqd+/9/4l/Mq9zTZ2T6uzqqHFxpnbH59kP3cDaPOrZ9rty56kC5idlYx8Xhm1bYXui9Y7VLM t4lf1X/I8+7tiveSfWGz7HRNlhyrf2HG6bZ3jUqb3s2kL0e7H18s9cra5fqr9MOPPRG2Cfz5 jecsTG0jvhnsmnr6vaNSW/pzDr8thy6knzF6zG2etPB3quIOrkiJXB/d6mPz35u8k7r5cI78 3664NOGOyBt/u6Y/+WlS3fHyyuSp75VYijMSDbWYi4oTAQ8OO3JkAwAA X-CMS-MailID: 20250303145921eucas1p122376fdd6195916372cb13e66091b820 X-Msg-Generator: CA X-RootMTR: 20250303145921eucas1p122376fdd6195916372cb13e66091b820 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20250303145921eucas1p122376fdd6195916372cb13e66091b820 References: <20250303145901.446791-1-m.wilczynski@samsung.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250303_065925_042335_2A41E585 X-CRM114-Status: GOOD ( 30.32 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org The T-Head TH1520 SoC contains multiple power islands that can be programmatically turned on and off using the AON (Always-On) protocol and a hardware mailbox [1]. The relevant mailbox driver has already been merged into the mainline kernel in commit 5d4d263e1c6b ("mailbox: Introduce support for T-head TH1520 Mailbox driver"); Introduce a power-domain driver for the TH1520 SoC, which is using AON firmware protocol to communicate with E902 core through the hardware mailbox. This way it can send power on/off commands to the E902 core. The interaction with AUDIO power island e.g trying to turn it OFF proved to crash the firmware running on the E902 core. Introduce the workaround to disable interacting with the power island. Link: https://openbeagle.org/beaglev-ahead/beaglev-ahead/-/blob/main/docs/TH1520%20System%20User%20Manual.pdf [1] Signed-off-by: Michal Wilczynski --- MAINTAINERS | 1 + drivers/pmdomain/Kconfig | 1 + drivers/pmdomain/Makefile | 1 + drivers/pmdomain/thead/Kconfig | 12 ++ drivers/pmdomain/thead/Makefile | 2 + drivers/pmdomain/thead/th1520-pm-domains.c | 209 +++++++++++++++++++++ 6 files changed, 226 insertions(+) create mode 100644 drivers/pmdomain/thead/Kconfig create mode 100644 drivers/pmdomain/thead/Makefile create mode 100644 drivers/pmdomain/thead/th1520-pm-domains.c diff --git a/MAINTAINERS b/MAINTAINERS index b2b32e431f35..e240602f0931 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -20437,6 +20437,7 @@ F: drivers/firmware/thead,th1520-aon.c F: drivers/mailbox/mailbox-th1520.c F: drivers/net/ethernet/stmicro/stmmac/dwmac-thead.c F: drivers/pinctrl/pinctrl-th1520.c +F: drivers/pmdomain/thead/ F: include/dt-bindings/clock/thead,th1520-clk-ap.h F: include/dt-bindings/power/thead,th1520-power.h F: include/linux/firmware/thead/thead,th1520-aon.h diff --git a/drivers/pmdomain/Kconfig b/drivers/pmdomain/Kconfig index 23c64851a5b0..91f04ace35d4 100644 --- a/drivers/pmdomain/Kconfig +++ b/drivers/pmdomain/Kconfig @@ -16,6 +16,7 @@ source "drivers/pmdomain/st/Kconfig" source "drivers/pmdomain/starfive/Kconfig" source "drivers/pmdomain/sunxi/Kconfig" source "drivers/pmdomain/tegra/Kconfig" +source "drivers/pmdomain/thead/Kconfig" source "drivers/pmdomain/ti/Kconfig" source "drivers/pmdomain/xilinx/Kconfig" diff --git a/drivers/pmdomain/Makefile b/drivers/pmdomain/Makefile index a68ece2f4c68..7030f44a49df 100644 --- a/drivers/pmdomain/Makefile +++ b/drivers/pmdomain/Makefile @@ -14,6 +14,7 @@ obj-y += st/ obj-y += starfive/ obj-y += sunxi/ obj-y += tegra/ +obj-y += thead/ obj-y += ti/ obj-y += xilinx/ obj-y += core.o governor.o diff --git a/drivers/pmdomain/thead/Kconfig b/drivers/pmdomain/thead/Kconfig new file mode 100644 index 000000000000..c7a1ac0c61dc --- /dev/null +++ b/drivers/pmdomain/thead/Kconfig @@ -0,0 +1,12 @@ +# SPDX-License-Identifier: GPL-2.0-only + +config TH1520_PM_DOMAINS + tristate "Support TH1520 Power Domains" + depends on TH1520_AON_PROTOCOL || !TH1520_AON_PROTOCOL + select REGMAP_MMIO + help + This driver enables power domain management for the T-HEAD + TH-1520 SoC. On this SoC there are number of power domains, + which can be managed independently. For example GPU, NPU, + and DPU reside in their own power domains which can be + turned on/off. diff --git a/drivers/pmdomain/thead/Makefile b/drivers/pmdomain/thead/Makefile new file mode 100644 index 000000000000..adfdf5479c68 --- /dev/null +++ b/drivers/pmdomain/thead/Makefile @@ -0,0 +1,2 @@ +# SPDX-License-Identifier: GPL-2.0-only +obj-$(CONFIG_TH1520_PM_DOMAINS) += th1520-pm-domains.o diff --git a/drivers/pmdomain/thead/th1520-pm-domains.c b/drivers/pmdomain/thead/th1520-pm-domains.c new file mode 100644 index 000000000000..7c78cf3955d2 --- /dev/null +++ b/drivers/pmdomain/thead/th1520-pm-domains.c @@ -0,0 +1,209 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2021 Alibaba Group Holding Limited. + * Copyright (c) 2024 Samsung Electronics Co., Ltd. + * Author: Michal Wilczynski + */ + +#include +#include +#include +#include + +#include + +struct th1520_power_domain { + struct th1520_aon_chan *aon_chan; + struct generic_pm_domain genpd; + u32 rsrc; +}; + +struct th1520_power_info { + const char *name; + u32 rsrc; + bool disabled; +}; + +/* + * The AUDIO power domain is marked as disabled to prevent the driver from + * managing its power state. Direct AON firmware calls to control this power + * island trigger a firmware bug causing system instability. Until this + * firmware issue is resolved, the AUDIO power domain must remain disabled + * to avoid crashes. + */ +static const struct th1520_power_info th1520_pd_ranges[] = { + [TH1520_AUDIO_PD] = {"audio", TH1520_AON_AUDIO_PD, true }, + [TH1520_VDEC_PD] = { "vdec", TH1520_AON_VDEC_PD, false }, + [TH1520_NPU_PD] = { "npu", TH1520_AON_NPU_PD, false }, + [TH1520_VENC_PD] = { "venc", TH1520_AON_VENC_PD, false }, + [TH1520_GPU_PD] = { "gpu", TH1520_AON_GPU_PD, false }, + [TH1520_DSP0_PD] = { "dsp0", TH1520_AON_DSP0_PD, false }, + [TH1520_DSP1_PD] = { "dsp1", TH1520_AON_DSP1_PD, false } +}; + +static inline struct th1520_power_domain * +to_th1520_power_domain(struct generic_pm_domain *genpd) +{ + return container_of(genpd, struct th1520_power_domain, genpd); +} + +static int th1520_pd_power_on(struct generic_pm_domain *domain) +{ + struct th1520_power_domain *pd = to_th1520_power_domain(domain); + + return th1520_aon_power_update(pd->aon_chan, pd->rsrc, true); +} + +static int th1520_pd_power_off(struct generic_pm_domain *domain) +{ + struct th1520_power_domain *pd = to_th1520_power_domain(domain); + + return th1520_aon_power_update(pd->aon_chan, pd->rsrc, false); +} + +static struct generic_pm_domain *th1520_pd_xlate(const struct of_phandle_args *spec, + void *data) +{ + struct generic_pm_domain *domain = ERR_PTR(-ENOENT); + struct genpd_onecell_data *pd_data = data; + unsigned int i; + + for (i = 0; i < ARRAY_SIZE(th1520_pd_ranges); i++) { + struct th1520_power_domain *pd; + + if (th1520_pd_ranges[i].disabled) + continue; + + pd = to_th1520_power_domain(pd_data->domains[i]); + if (pd->rsrc == spec->args[0]) { + domain = &pd->genpd; + break; + } + } + + return domain; +} + +static struct th1520_power_domain * +th1520_add_pm_domain(struct device *dev, const struct th1520_power_info *pi) +{ + struct th1520_power_domain *pd; + int ret; + + pd = devm_kzalloc(dev, sizeof(*pd), GFP_KERNEL); + if (!pd) + return ERR_PTR(-ENOMEM); + + pd->rsrc = pi->rsrc; + pd->genpd.power_on = th1520_pd_power_on; + pd->genpd.power_off = th1520_pd_power_off; + pd->genpd.name = pi->name; + + ret = pm_genpd_init(&pd->genpd, NULL, true); + if (ret) + return ERR_PTR(ret); + + return pd; +} + +static void th1520_pd_init_all_off(struct generic_pm_domain **domains, + struct device *dev) +{ + int ret; + int i; + + for (i = 0; i < ARRAY_SIZE(th1520_pd_ranges); i++) { + struct th1520_power_domain *pd; + + if (th1520_pd_ranges[i].disabled) + continue; + + pd = to_th1520_power_domain(domains[i]); + + ret = th1520_aon_power_update(pd->aon_chan, pd->rsrc, false); + if (ret) + dev_err(dev, + "Failed to initially power down power domain %s\n", + pd->genpd.name); + } +} + +static int th1520_pd_probe(struct platform_device *pdev) +{ + struct generic_pm_domain **domains; + struct genpd_onecell_data *pd_data; + struct th1520_aon_chan *aon_chan; + struct device *dev = &pdev->dev; + int i; + + aon_chan = th1520_aon_init(dev); + if (IS_ERR(aon_chan)) + return dev_err_probe(dev, PTR_ERR(aon_chan), + "Failed to get AON channel\n"); + + platform_set_drvdata(pdev, aon_chan); + + domains = devm_kcalloc(dev, ARRAY_SIZE(th1520_pd_ranges), + sizeof(*domains), GFP_KERNEL); + if (!domains) + return -ENOMEM; + + pd_data = devm_kzalloc(dev, sizeof(*pd_data), GFP_KERNEL); + if (!pd_data) + return -ENOMEM; + + for (i = 0; i < ARRAY_SIZE(th1520_pd_ranges); i++) { + struct th1520_power_domain *pd; + + if (th1520_pd_ranges[i].disabled) + continue; + + pd = th1520_add_pm_domain(dev, &th1520_pd_ranges[i]); + if (IS_ERR(pd)) + return PTR_ERR(pd); + + pd->aon_chan = aon_chan; + domains[i] = &pd->genpd; + dev_dbg(dev, "added power domain %s\n", pd->genpd.name); + } + + pd_data->domains = domains; + pd_data->num_domains = ARRAY_SIZE(th1520_pd_ranges); + pd_data->xlate = th1520_pd_xlate; + + /* + * Initialize all power domains to off to ensure they start in a + * low-power state. This allows device drivers to manage power + * domains by turning them on or off as needed. + */ + th1520_pd_init_all_off(domains, dev); + + return of_genpd_add_provider_onecell(dev->of_node, pd_data); +} + +static void th1520_pd_remove(struct platform_device *pdev) +{ + struct th1520_aon_chan *aon_chan = platform_get_drvdata(pdev); + + th1520_aon_deinit(aon_chan); +} + +static const struct of_device_id th1520_pd_match[] = { + { .compatible = "thead,th1520-aon" }, + { /* Sentinel */ } +}; +MODULE_DEVICE_TABLE(of, th1520_pd_match); + +static struct platform_driver th1520_pd_driver = { + .driver = { + .name = "th1520-pd", + .of_match_table = th1520_pd_match, + }, + .probe = th1520_pd_probe, + .remove = th1520_pd_remove, +}; +module_platform_driver(th1520_pd_driver); + +MODULE_AUTHOR("Michal Wilczynski "); +MODULE_DESCRIPTION("T-HEAD TH1520 SoC power domain controller"); +MODULE_LICENSE("GPL"); From patchwork Mon Mar 3 14:59:01 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Wilczynski X-Patchwork-Id: 13998971 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B1B3EC282D4 for ; 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Mon, 3 Mar 2025 14:59:21 +0000 (GMT) From: Michal Wilczynski To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, drew@pdp7.com, guoren@kernel.org, wefu@redhat.com, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, alex@ghiti.fr, jszhang@kernel.org, ulf.hansson@linaro.org, m.szyprowski@samsung.com Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Michal Wilczynski Subject: [PATCH v1 5/5] riscv: Enable PM_GENERIC_DOMAINS for T-Head SoCs Date: Mon, 3 Mar 2025 15:59:01 +0100 Message-Id: <20250303145901.446791-6-m.wilczynski@samsung.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250303145901.446791-1-m.wilczynski@samsung.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrPKsWRmVeSWpSXmKPExsWy7djPc7qnDh9NNzh8XtLi2Z2vrBZbf89i t1iz9xyTxfwj51gt7l3awmTxYm8ji0XzsfVsFi9n3WOzuLxrDpvF594jjBbbPrewWaw9cpfd Yv3X+UwWLy/3MFu0zeK3+L9nB7vF8bXhFi37p7A4CHm8efmSxeNwxxd2j3snprF6bFrVyeZx 59oeNo/NS+o9WtYeY/J4v+8qm0ffllWMHpear7N7fN4kF8AdxWWTkpqTWZZapG+XwJUxe+0Z poIpnBU9uy+wNTCeZu9i5OCQEDCRuL46sYuRi0NIYAWjxMb9K1m7GDmBnC+MEgffVUMkPjNK TDiylBkkAdLwcv52Joii5YwSbxoKIIreMEr0rT/KBpJgEzCSeLB8PitIQkSgn0mi78h/MIdZ YCWjxP0LZ8FGCQt4SJw+vQBsH4uAqkT/qs9gNq+AnUTXkSdMEOvkJfYfBKnn4OAUsJf41KAJ USIocXLmExYQmxmopHnrbKjrNnNKnLsL9ZqLxNEfMRBhYYlXx7ewQ9gyEqcn97BA2PkSD7Z+ gmqtkdjZcxzKtpa4c+4XG8gYZgFNifW79CHCjhKX5k9ghJjOJ3HjrSDEAXwSk7ZNZ4YI80p0 tAlBVKtJTO3phVt6bsU2qJc8JL48bWOewKg4C8krs5C8Mgth7wJG5lWM4qmlxbnpqcVGeanl esWJucWleel6yfm5mxiBafD0v+NfdjAuf/VR7xAjEwfjIUYJDmYlEd5b7UfThXhTEiurUovy 44tKc1KLDzFKc7AoifMu2t+aLiSQnliSmp2aWpBaBJNl4uCUamASnVDr7se/Il26f/2e6svH FTZHZZ98b2m0qdlp85dl/Pw3+5vC1Dg1WAvEXhuuWzC/etvku1+P/njmaLO4QeyE4NZXVRuC 1+iy9jS/3brjx4WX/9Ut1uuvW/OjXz+KM6b05uckmwlHli86mbuv48FOq7Prb2hN6J7KlGLJ vfZs79xKkflaycdL/OftYHLnXu/tcI07JOPVp6P7G0/Ky1z11Issjm+0ZVzyo447o8jh8qY4 c83N7MEswqJhscX3D1a0OV7cfmjr9V6efbPOHkyW+aD2f89x5p5ZrXuMnT10GDi02bcqbX4t kKehfJDPtzFQ40u386LtnN9PGxgtaqwrFDE7fWGpCoPkFNb4jDtKLMUZiYZazEXFiQCDYMew 8gMAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrEIsWRmVeSWpSXmKPExsVy+t/xe7onDx9NN/i/2tTi2Z2vrBZbf89i t1iz9xyTxfwj51gt7l3awmTxYm8ji0XzsfVsFi9n3WOzuLxrDpvF594jjBbbPrewWaw9cpfd Yv3X+UwWLy/3MFu0zeK3+L9nB7vF8bXhFi37p7A4CHm8efmSxeNwxxd2j3snprF6bFrVyeZx 59oeNo/NS+o9WtYeY/J4v+8qm0ffllWMHpear7N7fN4kF8AdpWdTlF9akqqQkV9cYqsUbWhh pGdoaaFnZGKpZ2hsHmtlZKqkb2eTkpqTWZZapG+XoJcxe+0ZpoIpnBU9uy+wNTCeZu9i5OSQ EDCReDl/O1MXIxeHkMBSRomzE6+xQCRkJK51v4SyhSX+XOtigyh6xSjx93sXWIJNwEjiwfL5 rCAJEYGFTBJXp2xgBnGYBdYyShy+eglsh7CAh8Tp0wtYQWwWAVWJ/lWfwWxeATuJriNPmCBW yEvsP3gWqJmDg1PAXuJTgyaIKQRU8uoTB0S1oMTJmU/A9jIDVTdvnc08gVFgFpLULCSpBYxM qxhFUkuLc9Nzi430ihNzi0vz0vWS83M3MQIjd9uxn1t2MK589VHvECMTB+MhRgkOZiUR3lvt R9OFeFMSK6tSi/Lji0pzUosPMZoCXT2RWUo0OR+YOvJK4g3NDEwNTcwsDUwtzYyVxHnZrpxP ExJITyxJzU5NLUgtgulj4uCUamCyT6jfqrlQzzo+c3HSC9a2Zwmehze8faa0f8dZxZcHdu1m mMPAPHkez1vHEP/nH049lzv2bQULn3Ne2dFbf1inzVArM/6hvTF8cZPZuoy7k1dlvo+Jf3lr 4+s/v2R5fMXMuu6zGW4sd8+xL1tVf3pFZkZ7y70r6u9+TAquWFgbsvTVuw2ZmhXarwTFVvSu ruZn8GEr8P7aJP9ezOSoIutKu9db5UQen3T/rXXSm21f7ARZbpdQbUPvaKGph45tT5Pp2JV0 sJtpFpPAgl7Jp2WLon4o3pjTdffPjJ7Fe5/6pUkLbG/0PqDe1atyLlrDJDdG7721ed/Ox3kv slO+f9mdMH3XS5tJZgvbDRIMNrMpsRRnJBpqMRcVJwIA8FM+TGUDAAA= X-CMS-MailID: 20250303145922eucas1p1224cdbd627f5e3d7f854073ebbd93c42 X-Msg-Generator: CA X-RootMTR: 20250303145922eucas1p1224cdbd627f5e3d7f854073ebbd93c42 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20250303145922eucas1p1224cdbd627f5e3d7f854073ebbd93c42 References: <20250303145901.446791-1-m.wilczynski@samsung.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250303_065924_839623_3E8235DB X-CRM114-Status: GOOD ( 10.88 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org T-Head SoCs feature separate power domains (power islands) for major components like the GPU, Audio, and NPU. To manage the power states of these components effectively, the kernel requires generic power domain support. This commit enables `CONFIG_PM_GENERIC_DOMAINS` for T-Head SoCs, allowing the power domain driver for these components to be compiled and integrated. This ensures proper power management and energy efficiency on T-Head platforms. By selecting `PM_GENERIC_DOMAINS`, we provide the necessary framework for the power domain drivers to function correctly on RISC-V architecture with T-Head SoCs. Signed-off-by: Michal Wilczynski --- arch/riscv/Kconfig.socs | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs index 1916cf7ba450..83833ded8908 100644 --- a/arch/riscv/Kconfig.socs +++ b/arch/riscv/Kconfig.socs @@ -53,6 +53,7 @@ config ARCH_THEAD bool "T-HEAD RISC-V SoCs" depends on MMU && !XIP_KERNEL select ERRATA_THEAD + select PM_GENERIC_DOMAINS if PM help This enables support for the RISC-V based T-HEAD SoCs.