From patchwork Wed Mar 5 18:00:39 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Russell King (Oracle)" X-Patchwork-Id: 14003103 X-Patchwork-Delegate: kuba@kernel.org Received: from pandora.armlinux.org.uk (pandora.armlinux.org.uk [78.32.30.218]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1EB2A1C5D4E for ; Wed, 5 Mar 2025 18:01:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=78.32.30.218 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741197669; cv=none; b=UGstfGRpDIF4LDfZslURy5PK9t8bBLTnWmaasIgnVoh5df8ayBTbYJLLSYiSzmmGmUGTm/wnX13p+6M+pMczLKWCiFS9BUTgAC/peXbQgmx+TqDokF+UpaNqWqMtlxazGj/fMI6y7Ll60u8H/m00yycSzLhcyayrnvr4eoJ0T3c= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741197669; c=relaxed/simple; bh=hIRtoJXfoW4NUmSYHi51MerG0BJ4Zg7qUqzATOKa0gQ=; h=In-Reply-To:References:From:To:Cc:Subject:MIME-Version: Content-Disposition:Content-Type:Message-Id:Date; b=tg7VKfb/V3EKKz/Z1KjaOoitj0pBeBIxwrP//tSykWqBCiTI63hDnT6YPEzvfolWBqhGMmwvODxLBglwtjom0U5++BjdeYbciEU1uhbJBsFCfTwkqeyrKq8Z10aIZjzvxTP0qhO8kfS2ofvuvxs1oLwJ9vKWvlhbsfKj03qbemU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=armlinux.org.uk; spf=none smtp.mailfrom=armlinux.org.uk; dkim=pass (2048-bit key) header.d=armlinux.org.uk header.i=@armlinux.org.uk header.b=uKBqHpeT; arc=none smtp.client-ip=78.32.30.218 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=armlinux.org.uk Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=armlinux.org.uk Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=armlinux.org.uk header.i=@armlinux.org.uk header.b="uKBqHpeT" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=armlinux.org.uk; s=pandora-2019; h=Date:Sender:Message-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:Subject:Cc:To:From:References: In-Reply-To:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=9pjvvYJp8ichoRJUtSiiKLOuz012/ax4BEbPrpv6NLs=; b=uKBqHpeTGcB85XoF3h9x+TY4pg 5N5vTCybXOOkh6oIh/h9iNz9c9mTmL68EoXao2m/KC6fY2lka0DWgHetPF/yFTm6nFuwHNAufQYAe gR1N4h1TN8KAc/b8rUZNW9TtF8CpChPZINuZTZHIp+zUdgOgM6RJ56ag5JQ3S72UvgSPQsb+fMGLI h6vVrJEUiw2NQNIQLlyYXZSbmmxel8smKyeyXypnYuIUWbbfe04OxU9tQ/4VptoMzS5zc41Jy5CAs JUwWQtU0CsGAzOisg7tCnYRzoIqbXWAQMTeU8LJmSbGytdUWjIbIY/9XyHX56N7M0og4fROtVljHv vV8yo89A==; Received: from e0022681537dd.dyn.armlinux.org.uk ([fd8f:7570:feb6:1:222:68ff:fe15:37dd]:45972 helo=rmk-PC.armlinux.org.uk) by pandora.armlinux.org.uk with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1tpt3D-0004gu-2T; Wed, 05 Mar 2025 18:00:59 +0000 Received: from rmk by rmk-PC.armlinux.org.uk with local (Exim 4.94.2) (envelope-from ) id 1tpt2t-005UNB-MC; Wed, 05 Mar 2025 18:00:39 +0000 In-Reply-To: References: From: "Russell King (Oracle)" To: Jon Hunter , Thierry Reding , "Lad, Prabhakar" Cc: Alexandre Torgue , Andrew Lunn , Andrew Lunn , "David S. Miller" , Eric Dumazet , Heiner Kallweit , Jakub Kicinski , linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, Maxime Coquelin , netdev@vger.kernel.org, Paolo Abeni Subject: [PATCH net-next 1/2] net: phylink: add functions to block/unblock rx clock stop Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline Message-Id: Sender: Russell King Date: Wed, 05 Mar 2025 18:00:39 +0000 X-Patchwork-Delegate: kuba@kernel.org Some MACs require the PHY receive clock to be running to complete setup actions. This may fail if the PHY has negotiated EEE, the MAC supports receive clock stop, and the link has entered LPI state. Provide a pair of APIs that MAC drivers can use to temporarily block the PHY disabling the receive clock. Signed-off-by: Russell King (Oracle) --- drivers/net/phy/phylink.c | 50 +++++++++++++++++++++++++++++++++++++++ include/linux/phylink.h | 3 +++ 2 files changed, 53 insertions(+) diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c index a3b186ab3854..8f93b597d019 100644 --- a/drivers/net/phy/phylink.c +++ b/drivers/net/phy/phylink.c @@ -88,6 +88,7 @@ struct phylink { bool mac_enable_tx_lpi; bool mac_tx_clk_stop; u32 mac_tx_lpi_timer; + u8 mac_rx_clk_stop_blocked; struct sfp_bus *sfp_bus; bool sfp_may_have_phy; @@ -2592,6 +2593,55 @@ void phylink_stop(struct phylink *pl) } EXPORT_SYMBOL_GPL(phylink_stop); + +void phylink_rx_clk_stop_block(struct phylink *pl) +{ + ASSERT_RTNL(); + + if (pl->mac_rx_clk_stop_blocked == U8_MAX) { + phylink_warn(pl, "%s called too many times - ignoring\n", + __func__); + dump_stack(); + return; + } + + /* Disable PHY receive clock stop if this is the first time this + * function has been called and clock-stop was previously enabled. + */ + if (pl->mac_rx_clk_stop_blocked++ == 0 && + pl->mac_supports_eee_ops && pl->phydev) + pl->config->eee_rx_clk_stop_enable) + phy_eee_rx_clock_stop(pl->phydev, false); +} + +/** + * phylink_rx_clk_stop_unblock() - unblock PHY ability to stop receive clock + * @pl: a pointer to a &struct phylink returned from phylink_create() + * + * All calls to phylink_rx_clk_stop_block() must be balanced with a + * corresponding call to phylink_rx_clk_stop_unblock() to restore the PHYs + * clock stop ability. + */ +void phylink_rx_clk_stop_unblock(struct phylink *pl) +{ + ASSERT_RTNL(); + + if (pl->mac_rx_clk_stop_blocked == 0) { + phylink_warn(pl, "%s called too many times - ignoring\n", + __func__); + dump_stack(); + return; + } + + /* Re-enable PHY receive clock stop if the number of unblocks matches + * the number of calls to the block function above. + */ + if (--pl->mac_rx_clk_stop_blocked == 0 && + pl->mac_supports_eee_ops && pl->phydev && + pl->config->eee_rx_clk_stop_enable) + phy_eee_rx_clock_stop(pl->phydev, true); +} + /** * phylink_suspend() - handle a network device suspend event * @pl: a pointer to a &struct phylink returned from phylink_create() diff --git a/include/linux/phylink.h b/include/linux/phylink.h index 08df65f6867a..249c437d6b7b 100644 --- a/include/linux/phylink.h +++ b/include/linux/phylink.h @@ -698,6 +698,9 @@ int phylink_pcs_pre_init(struct phylink *pl, struct phylink_pcs *pcs); void phylink_start(struct phylink *); void phylink_stop(struct phylink *); +void phylink_rx_clk_stop_block(struct phylink *); +void phylink_rx_clk_stop_unblock(struct phylink *); + void phylink_suspend(struct phylink *pl, bool mac_wol); void phylink_resume(struct phylink *pl); From patchwork Wed Mar 5 18:00:44 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Russell King (Oracle)" X-Patchwork-Id: 14003104 X-Patchwork-Delegate: kuba@kernel.org Received: from pandora.armlinux.org.uk (pandora.armlinux.org.uk [78.32.30.218]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D963478F3A for ; Wed, 5 Mar 2025 18:01:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=78.32.30.218 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741197674; cv=none; b=IxWgwYDkI7B0ocQ2lT9oZmuJQEI9HF/xUBUxaaP8fB0sYGtnr0rn7zeUlgDqSIHH10sqpy1N5I5ekHk8YJLChtV73SeaGPR/RjPyvuW2uuadVWfJpnnQys/1yqftkF64RLid7ejider18muPwLM9/4FVZifwGvvMoUT6su8FFvE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1741197674; c=relaxed/simple; bh=2BgLe8zKjL1lF2NmWsoI6WXTc04lNfHWtGAqmYTQb10=; h=In-Reply-To:References:From:To:Cc:Subject:MIME-Version: Content-Disposition:Content-Type:Message-Id:Date; b=mgvSmat0a67sLHg74z2qikJb68qbEgameRy3z9CDbDr1fR4IPPu6Kvg11atVc6KuBiCmhd0jyEa3pantkBqS2s1omqPad61NBR2yY40CwYdK+tcUr/7yfuJUz5xE79OZ09iVlXKzQVhGQQuYtSQItTW9u4dz+bsGQkN078w939A= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=armlinux.org.uk; spf=none smtp.mailfrom=armlinux.org.uk; dkim=pass (2048-bit key) header.d=armlinux.org.uk header.i=@armlinux.org.uk header.b=1IjUqJmZ; arc=none smtp.client-ip=78.32.30.218 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=armlinux.org.uk Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=armlinux.org.uk Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=armlinux.org.uk header.i=@armlinux.org.uk header.b="1IjUqJmZ" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=armlinux.org.uk; s=pandora-2019; h=Date:Sender:Message-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:Subject:Cc:To:From:References: In-Reply-To:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=1osmxLM0JPtN1QjPJqhrKT1uQMk9kT2l9BrM2YTPnUY=; b=1IjUqJmZ20ZEzPYdnKOvwh17C6 gWttHMBeDJsebI58cev2xemiQvLC3l3AZe1FzwsBoTkCD8yLGZm7ikGskaUabDvlHN1sXbW3HtlH8 /8W/MSUESg3OHXJonAk6TuMgVPrb3lMsUW4dE7Jrwvl3ODqEHX+udzQ8gugC5VmgZWHgKwd/mGIjx YfCYIvpjymQlwfjjABJKh8v69ujswXaX/x423jEcvdeBI2g9/xIbud9RBnKHrYNWsBp60NFhNdty1 qtwzU4O4+tqmzNpWcgM8IVwcfprg0JqbiX/zJvMQ+KpIN9Q74IQGCdtzYOM/oX+Hovw6cwxmx7CTZ 8tipKrsg==; Received: from e0022681537dd.dyn.armlinux.org.uk ([fd8f:7570:feb6:1:222:68ff:fe15:37dd]:42194 helo=rmk-PC.armlinux.org.uk) by pandora.armlinux.org.uk with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1tpt3J-0004h6-0M; Wed, 05 Mar 2025 18:01:05 +0000 Received: from rmk by rmk-PC.armlinux.org.uk with local (Exim 4.94.2) (envelope-from ) id 1tpt2y-005UNH-QS; Wed, 05 Mar 2025 18:00:44 +0000 In-Reply-To: References: From: "Russell King (Oracle)" To: Jon Hunter , Thierry Reding , "Lad, Prabhakar" Cc: Alexandre Torgue , Andrew Lunn , Andrew Lunn , "David S. Miller" , Eric Dumazet , Heiner Kallweit , Jakub Kicinski , linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, Maxime Coquelin , netdev@vger.kernel.org, Paolo Abeni Subject: [PATCH net-next 2/2] net: stmmac: block PHY rx clock-stop over reset Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline Message-Id: Sender: Russell King Date: Wed, 05 Mar 2025 18:00:44 +0000 X-Patchwork-Delegate: kuba@kernel.org Signed-off-by: Russell King (Oracle) --- drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c index 6924df893e42..037039a9a33b 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c @@ -3096,7 +3096,10 @@ static int stmmac_init_dma_engine(struct stmmac_priv *priv) if (priv->extend_desc && (priv->mode == STMMAC_RING_MODE)) priv->plat->dma_cfg->atds = 1; + /* Note that the PHY clock must be running for reset to complete. */ + phylink_rx_clk_stop_block(priv->phylink); ret = stmmac_reset(priv, priv->ioaddr); + phylink_rx_clk_stop_unblock(priv->phylink); if (ret) { netdev_err(priv->dev, "Failed to reset the dma\n"); return ret;